* TekMagic
* Warp Engine
*
+* And more.
+*
* Copyright 2014 Toni Wilen
*
*/
{
return ISCPUBOARDP(p, BOARD_GVP, BOARD_GVP_SUB_A1230SII);
}
+static bool is_quikpak(struct uae_prefs *p)
+{
+ return ISCPUBOARDP(p, BOARD_GVP, BOARD_GVP_SUB_QUIKPAK);
+}
static bool is_aca500(struct uae_prefs *p)
{
if (is_tekmagic(&currprefs)) {
cpuboard_non_byte_ea = true;
v = cpuboard_ncr710_io_bget(addr);
+ } else if (is_quikpak(&currprefs)) {
+ cpuboard_non_byte_ea = true;
+ v = cpuboard_ncr720_io_bget(addr);
} else if (is_blizzard2060(&currprefs) && addr >= BLIZZARD_2060_SCSI_OFFSET) {
v = cpuboard_ncr9x_scsi_get(addr);
} else if (is_blizzard1230mk2(&currprefs) && addr >= 0x10000 && (currprefs.cpuboard_settings & 2)) {
if (is_tekmagic(&currprefs)) {
cpuboard_non_byte_ea = true;
cpuboard_ncr710_io_bput(addr, b);
+ } else if (is_quikpak(&currprefs)) {
+ cpuboard_non_byte_ea = true;
+ cpuboard_ncr720_io_bput(addr, b);
} else if (is_blizzard1230mk2(&currprefs) && addr >= 0x10000 && (currprefs.cpuboard_settings & 2)) {
cpuboard_ncr9x_scsi_put(addr, b);
} else if (is_blizzard2060(&currprefs) && addr >= BLIZZARD_2060_SCSI_OFFSET) {
map_banks(&dummy_bank, 0xf00000 >> 16, 0x80000 >> 16, 0);
}
}
- if (is_tekmagic(&currprefs)) {
+ if (is_tekmagic(&currprefs) || is_quikpak(&currprefs)) {
map_banks(&blizzardf0_bank, 0xf00000 >> 16, 131072 >> 16, 0);
map_banks(&blizzardea_bank, 0xf40000 >> 16, 65536 >> 16, 0);
}
blizzardram_bank.label = _T("fusionforty");
mapped_malloc(&blizzardram_bank);
- } else if (is_tekmagic(&currprefs)) {
+ } else if (is_tekmagic(&currprefs) || is_quikpak(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
blizzardf0_bank.reserved_size = 131072;
return true;
case BOARD_GVP_SUB_TEKMAGIC:
romtype = ROMTYPE_CB_TEKMAGIC;
- break;
+ break;
+ case BOARD_GVP_SUB_QUIKPAK:
+ romtype = romtype = ROMTYPE_CB_QUIKPAK;
+ break;
}
break;
cpuboard_non_byte_ea = false;
aci->start = 0xf00000;
aci->size = f0rom_size;
+ } else if (is_quikpak(p)) {
+ earom_size = 65536;
+ f0rom_size = 131072;
+ zfile_fread(blizzardf0_bank.baseaddr, 1, f0rom_size, autoconfig_rom);
+ autoconf = false;
+ cpuboard_non_byte_ea = false;
+ aci->start = 0xf00000;
+ aci->size = f0rom_size;
} else if (is_blizzard2060(p)) {
f0rom_size = 65536;
earom_size = 131072;
gvpa1230s2_settings, NULL,
2017, 9, 0, false
},
+ {
+ _T("QuikPak XP"),
+ _T("quikpakxp"),
+ ROMTYPE_CB_QUIKPAK, 0,
+ quikpak_add_scsi_unit, EXPANSIONTYPE_SCSI,
+ BOARD_MEMORY_HIGHMEM,
+ 64 * 1024 * 1024,
+ },
{
NULL
}
#define BOARD_GVP_SUB_GFORCE030 3
#define BOARD_GVP_SUB_TEKMAGIC 4
#define BOARD_GVP_SUB_A1230SII 5
+#define BOARD_GVP_SUB_QUIKPAK 6
#define BOARD_KUPKE 6
void cpuboard_ncr710_io_bput(uaecptr addr, uae_u32 v);
uae_u32 cpuboard_ncr710_io_bget(uaecptr addr);
+void cpuboard_ncr720_io_bput(uaecptr addr, uae_u32 v);
+uae_u32 cpuboard_ncr720_io_bget(uaecptr addr);
extern void a4000t_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern bool is_a4000t_scsi(void);
extern void warpengine_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void tekmagic_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+extern void quikpak_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void cyberstorm_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void blizzardppc_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void a4091_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
#define ROMTYPE_CB_FALCON40 0x0004001b
#define ROMTYPE_CB_A1230S2 0x0004001c
#define ROMTYPE_CB_TYPHOON2 0x0004001d
+#define ROMTYPE_CB_QUIKPAK 0x0004001e
#define ROMTYPE_FREEZER 0x00080000
#define ROMTYPE_AR 0x00080001
#ifdef NCR
-#define NCR_DEBUG 1
+#define NCR_DEBUG 10
#include "options.h"
#include "uae.h"
void pci_set_irq(PCIDevice *pci_dev, int level)
{
struct ncr_state *ncr = (struct ncr_state*)pci_dev;
+ if (!ncr)
+ return;
ncr->irq = level != 0;
ncr->irq_func(ncr->id, ncr->irq);
}
void pci710_set_irq(PCIDevice *pci_dev, int level)
{
struct ncr_state *ncr = (struct ncr_state*)pci_dev;
+ if (!ncr)
+ return;
ncr->irq = level != 0;
ncr->irq_func(ncr->id, ncr->irq);
}
ncr710_io_bput(ncr_cpuboard, addr, v);
}
+void cpuboard_ncr720_io_bput(uaecptr addr, uae_u32 v)
+{
+ struct ncr_state *ncr = ncr_cpuboard;
+ addr &= IO_MASK;
+ lsi_mmio_write(ncr->devobject.lsistate, beswap(addr), v, 1);
+}
+
static void ncr_bput2 (struct ncr_state *ncr, uaecptr addr, uae_u32 val)
{
uae_u32 v = val;
return ncr710_io_bget(ncr_cpuboard, addr);
}
+uae_u32 cpuboard_ncr720_io_bget(uaecptr addr)
+{
+ struct ncr_state *ncr = ncr_cpuboard;
+ addr &= IO_MASK;
+ return lsi_mmio_read(ncr_cpuboard, beswap(addr), 1);
+}
+
static bool isncrboard(struct ncr_state *ncr, struct ncr_state **ncrb)
{
return ncr == ncrb[0] || ncr == ncrb[1] || ncr == ncrb[2] || ncr == ncrb[3];
ncr_add_scsi_unit(&ncr_cpuboard, ch, ci, rc, false);
}
+void quikpak_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ ncr_add_scsi_unit(&ncr_cpuboard, ch, ci, rc, true);
+}
+
+
void a4091_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr_add_scsi_unit(&ncra4091[ci->controller_type_unit], ch, ci, rc, false);
0x3befa0c0, 0x4414673c, 0xa52f78a0, 0xae656824, 0xfd08b54f, 0xa1de237c, NULL, NULL },
ALTROMPN(166, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0xb64e3bbf, 0xd6f4fc81, 0x38325a78, 0x74ff1c15, 0x7c93f1a2, 0x444904ae)
ALTROMPN(166, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x541b5988, 0x3546517b, 0x57cecd2f, 0x9fbfcd0c, 0xf26fdbbf, 0xfb009e3e)
+ { _T("QuikPak 4060 XP"), 2, 1, 2, 1, _T("QUIKPAK\0"), 32768, 239, 0, 0, ROMTYPE_CB_QUIKPAK, 0, 0, NULL,
+ 0x3a8eb518, 0x902dd0ba, 0x56c2afd0, 0xbb425bf5, 0x264fbc62, 0x90ad2c4e, NULL, NULL },
{ _T("Preferred Technologies Nexus"), 1, 0, 1, 0, _T("PTNEXUS\0"), 8192, 139, 0, 0, ROMTYPE_PTNEXUS, 0, 0, NULL,
0xf495879a, 0xa3bd0202, 0xe14aa5b6, 0x49d3ce88, 0x22975950, 0x6500dbc2, NULL, NULL },