#if !defined(CPU_i386) && !defined(CPU_x86_64) && !defined(CPU_arm)
#error "Only IA-32, X86-64 and ARM v6 targets are supported with the JIT Compiler"
#endif
+#endif
#define USE_MATCH 0
-#endif
/* kludge for Brian, so he can compile under MSVC++ */
#define USE_NORMAL_CALLING_CONVENTION 0
active=NULL;
}
+#ifdef UAE
+static
+#endif
+void flush_icache_range(uae_u32 start, uae_u32 length)
+{
+ if (!active)
+ return;
+
+#if LAZY_FLUSH_ICACHE_RANGE
+ uae_u8 *start_p = get_real_address(start);
+ blockinfo *bi = active;
+ while (bi) {
+#if USE_CHECKSUM_INFO
+ bool invalidate = false;
+ for (checksum_info *csi = bi->csi; csi && !invalidate; csi = csi->next)
+ invalidate = (((start_p - csi->start_p) < csi->length) ||
+ ((csi->start_p - start_p) < length));
+#else
+ // Assume system is consistent and would invalidate the right range
+ const bool invalidate = (bi->pc_p - start_p) < length;
+#endif
+ if (invalidate) {
+ uae_u32 cl = cacheline(bi->pc_p);
+ if (bi == cache_tags[cl + 1].bi)
+ cache_tags[cl].handler = (cpuop_func *)popall_execute_normal;
+ bi->handler_to_use = (cpuop_func *)popall_execute_normal;
+ set_dhtu(bi, bi->direct_pen);
+ bi->status = BI_NEED_RECOMP;
+ }
+ bi = bi->next;
+ }
+ return;
+#else
+ UNUSED(start);
+ UNUSED(length);
+#endif
+ flush_icache(-1);
+}
+
/*
static void catastrophe(void)
{