void rethink_a2065 (void)
{
bool was = (uae_int_requested & 4) != 0;
- uae_int_requested &= ~4;
+ atomic_and(&uae_int_requested, ~4);
if (!configured)
return;
csr[0] &= ~CSR0_INTR;
if (csr[0] & (CSR0_BABL | CSR0_MISS | CSR0_MERR | CSR0_RINT | CSR0_TINT | CSR0_IDON))
csr[0] |= CSR0_INTR;
if ((csr[0] & (CSR0_INTR | CSR0_INEA)) == (CSR0_INTR | CSR0_INEA)) {
- uae_int_requested |= 4;
+ atomic_or(&uae_int_requested, 4);
if (!was && log_a2065 > 2)
write_log(_T("A2065 +IRQ\n"));
}
#include "scsi.h"
#include "cpummu030.h"
-// 00F83B7C 3.1 ROM expansion board diagrom
+// ROM expansion board diagrom call
+// 00F83B7C 3.1 A4000
+// 00F83C96 3.1 A1200
#define PPC_IRQ_DEBUG 0
#define CPUBOARD_IO_LOG 0
if (!(io_reg[CSIII_REG_IRQ] & (P5_IRQ_SCSI_EN | P5_IRQ_SCSI))) {
INTREQ_0(0x8000 | 0x0008);
if (currprefs.cachesize)
- uae_int_requested |= 0x010000;
+ atomic_or(&uae_int_requested, 0x010000);
uae_ppc_wakeup_main();
} else if (!(io_reg[CSIII_REG_IRQ] & (P5_IRQ_PPC_1 | P5_IRQ_PPC_2))) {
INTREQ_0(0x8000 | 0x0008);
if (currprefs.cachesize)
- uae_int_requested |= 0x010000;
+ atomic_or(&uae_int_requested, 0x010000);
uae_ppc_wakeup_main();
} else {
- uae_int_requested &= ~0x010000;
+ atomic_and(&uae_int_requested, ~0x010000);
}
check_ppc_int_lvl();
ppc_interrupt(intlev());
return 0;
}
+
+void rethink_uae_int(void)
+{
+ bool irq2 = false;
+ bool irq6 = false;
+
+ if (uae_int_requested) {
+ if (uae_int_requested & 0xff00)
+ irq6 = true;
+ if (uae_int_requested & 0x00ff)
+ irq2 = true;
+ }
+
+ {
+ extern void bsdsock_fake_int_handler(void);
+ extern int volatile bsd_int_requested;
+ if (bsd_int_requested)
+ bsdsock_fake_int_handler();
+ }
+
+ uae_u16 mask = (irq6 ? 0x2000 : 0) | (irq2 ? 0x0008 : 0);
+ if (mask)
+ INTREQ_0(0x8000 | mask);
+}
+
static void rethink_intreq (void)
{
serial_check_irq ();
v &= ~0x00F1;
else if (! (currprefs.chipset_mask & CSMASK_AGA))
v &= ~0x00B0;
- v &= ~(0x0080 | 0x0020);
+ v &= ~0x0080;
#if SPRBORDER
v |= 1;
reset_decisions ();
}
- if (uae_int_requested) {
- if (uae_int_requested & 0xff00)
- INTREQ(0x8000 | 0x2000);
- if (uae_int_requested & 0x00ff)
- INTREQ(0x8000 | 0x0008);
- }
-
- {
- if (uaenet_int_requested || (uaenet_vsync_requested && vpos == 10)) {
- INTREQ (0x8000 | 0x0008);
- }
- }
-
- {
- extern void bsdsock_fake_int_handler (void);
- extern int volatile bsd_int_requested;
- if (bsd_int_requested)
- bsdsock_fake_int_handler ();
- }
+ rethink_uae_int();
/* Default to no bitplane DMA overriding sprite DMA */
plfstrt_sprite = 0xff;
#define SPCFLAG_COPPER 4
#define SPCFLAG_INT 8
#define SPCFLAG_BRK 16
+#define SPCFLAG_UAEINT 32
#define SPCFLAG_TRACE 64
#define SPCFLAG_DOTRACE 128
#define SPCFLAG_DOINT 256 /* arg, JIT fails without this.. */
extern unsigned int joy0dir, joy1dir;
extern int joy0button, joy1button;
-extern void INTREQ (uae_u16);
-extern bool INTREQ_0 (uae_u16);
-extern void INTREQ_f (uae_u16);
-extern void send_interrupt (int num, int delay);
-extern uae_u16 INTREQR (void);
+extern void INTREQ(uae_u16);
+extern bool INTREQ_0(uae_u16);
+extern void INTREQ_f(uae_u16);
+extern void send_interrupt(int num, int delay);
+extern void rethink_uae_int(void);
+extern uae_u16 INTREQR(void);
/* maximums for statically allocated tables */
#ifdef UAE_MINI
static void check_uae_int_request(void)
{
- if (uae_int_requested || uaenet_int_requested) {
+ if (uae_int_requested) {
bool irq = false;
- if ((uae_int_requested & 0x00ff) || uaenet_int_requested) {
- INTREQ_f(0x8000 | 0x0008);
+ if (uae_int_requested & 0x00ff) {
+ INTREQ_0(0x8000 | 0x0008);
irq = true;
}
if (uae_int_requested & 0xff00) {
- INTREQ_f(0x8000 | 0x2000);
+ INTREQ_0(0x8000 | 0x2000);
irq = true;
}
if (uae_int_requested & 0xff0000) {
if (!cpuboard_is_ppcboard_irq())
- uae_int_requested &= ~0x010000;
+ atomic_and(&uae_int_requested, ~0x010000);
}
if (irq)
set_special(SPCFLAG_INT);
ovpos = vpos;
while (ovpos == vpos) {
x_do_cycles(8 * CYCLE_UNIT);
+ unset_special(SPCFLAG_UAEINT);
+ check_uae_int_request();
+ ppc_interrupt(intlev());
uae_ppc_execute_check();
if (regs.spcflags & SPCFLAG_COPPER)
do_copper();
if (regs.spcflags & SPCFLAG_CHECK) {
if (regs.halted) {
+ unset_special(SPCFLAG_CHECK);
if (haltloop())
return 1;
}
if (regs.spcflags & SPCFLAG_TRACE)
do_trace ();
+ if (regs.spcflags & SPCFLAG_UAEINT) {
+ check_uae_int_request();
+ unset_special(SPCFLAG_UAEINT);
+ }
+
if (m68k_interrupt_delay) {
if (time_for_interrupt ()) {
do_interrupt (regs.ipl);
#endif
}
- if (end_block(r->opcode) || r->spcflags || uae_int_requested || uaenet_int_requested)
+ if (end_block(r->opcode) || r->spcflags || uae_int_requested)
return; /* We will deal with the spcflags in the caller */
}
}
total_cycles += cpu_cycles;
pc_hist[blocklen].specmem = special_mem;
blocklen++;
- if (end_block (r->opcode) || blocklen >= MAXRUN || r->spcflags || uae_int_requested || uaenet_int_requested) {
+ if (end_block (r->opcode) || blocklen >= MAXRUN || r->spcflags || uae_int_requested) {
compile_block (pc_hist, blocklen, total_cycles);
return; /* We will deal with the spcflags in the caller */
}
for (int i = 0; i < MAX_PCI_BOARDS; i++) {
hsyncs[i] = NULL;
}
- uae_int_requested &= ~(0x10 | 0x100);
+ atomic_and(&uae_int_requested, ~(0x10 | 0x100));
}
void pci_reset(void)
{
void pci_rethink(void)
{
- uae_int_requested &= ~(0x10 | 0x100);
+ atomic_and(&uae_int_requested, ~(0x10 | 0x100));
for (int i = 0; i < PCI_BRIDGE_MAX; i++) {
struct pci_bridge *pcib = bridges[i];
if (!pcib)
}
}
if (pcib->irq & pcib->intena) {
- uae_int_requested |= pcib->intreq_mask;
+ atomic_or(&uae_int_requested, pcib->intreq_mask);
}
}
}
void sndboard_rethink(void)
{
struct toccata_data *data = &toccata;
- uae_int_requested &= ~0x200;
+ atomic_and(&uae_int_requested, ~0x200);
if (data->toccata_irq)
- uae_int_requested |= 0x200;
+ atomic_or(&uae_int_requested, 0x200);
}
static void sndboard_process_capture(void)
{
struct toccata_data *data = &toccata;
data->toccata_irq = 0;
- uae_int_requested &= ~0x200;
+ atomic_and(&uae_int_requested, ~0x200);
}
void sndboard_reset(void)