-/* * jit-rules-arm.ins - Instruction selector for ARM.
+/*
+ * jit-rules-arm.ins - Instruction selector for ARM.
*
* Copyright (C) 2004 Southern Storm Software, Pty Ltd.
* Copyright (C) 2008 Michele Tartara <mikyt@users.sourceforge.net>
* Register classes
*/
%regclass reg arm_reg
+%regclass freg arm_freg
%regclass freg32 arm_freg32
%regclass freg64 arm_freg64
-%regclass freg arm_freg
%lregclass lreg arm_lreg
-%regclass breg arm_breg
/*
* Conversion opcodes.
[imm, imm, imm, scratch reg] -> {
arm_mov_mem_imm(inst, $1 + $3, $2, 1, $4);
}
-[imm, breg, imm] -> {
+[imm, reg, imm] -> {
arm_mov_mem_reg(inst, $1 + $3, $2, 1);
}
[reg, imm, imm] -> {
arm_mov_membase_imm(inst, $1, $3, $2, 1, ARM_WORK);
}
-[reg, breg, imm] -> {
+[reg, reg, imm] -> {
arm_mov_membase_reg(inst, $1, $3, $2, 1);
}
}
JIT_OP_STORE_ELEMENT_BYTE: ternary
-[reg, reg, breg, scratch reg] -> {
+[reg, reg, reg, scratch reg] -> {
arm_mov_memindex_reg(inst, $1, 0, $2, 0, $3, 1, $4);
}
//Call the function
arm_call(inst, jit_memcpy);
}
- [reg, reg, reg, scratch breg, clobber("r0", "r1", "r2")] -> {
+ [reg, reg, reg, scratch reg, clobber("r0", "r1", "r2")] -> {
/*
* Call jit_memcpy(dest,src,size).
* $1=dest, $2=src, $3=size
arm_mov_membase_imm(inst, $1, disp, $2, 1, ARM_WORK);
}
}
-[reg, breg, imm, if("$3 < 4")] -> {
+[reg, reg, imm, if("$3 < 4")] -> {
TODO();
abort();
}
arm_mov_membase_reg(inst, $1, disp, $2, 2);
}
}
-[reg, +breg, imm, scratch reg,
+[reg, +reg, imm, scratch reg,
if("$3 <= 32 && ($3 % 2) != 0"), space("32 + $3 * 4")] -> {
TODO();
abort();