#include "sounddep/sound.h"
#include "events.h"
#include "savestate.h"
+#ifdef DRIVESOUND
#include "driveclick.h"
+#endif
#include "zfile.h"
#include "uae.h"
#include "gui.h"
static void markidlecycle(int hpos)
{
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITSTARTFINISH, hpos, vpos);
}
+#endif
}
static void check_channel_mods(int hpos, int ch, uaecptr *pt)
}
blt_info.blit_interrupt = 1;
INTREQ_INT(6, 3);
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITIRQ, current_hpos(), vpos);
}
+#endif
}
static void blitter_end(void)
if (blit_dof) {
w = regs.chipset_latch_rw;
}
+#ifdef DEBUGGER
debug_putpeekdma_chipram(addr, w, typemask, 0x000, 0x054);
+#endif
chipmem_wput_indirect(addr, w);
regs.chipset_latch_rw = w;
}
/* "free" blitter in immediate mode if it has been "stuck" ~3 frames
* fixes some JIT game incompatibilities
*/
+#ifdef DEBUGGER
debugtest (DEBUGTEST_BLITTER, _T("force-unstuck!\n"));
+#endif
}
blitter_stuck = 0;
if (blit_slowdown > 0 && !immediate_blits) {
if ((bltcon1 & BLTLINE) && !blitline_started) {
write_log(_T("BLITTER: linedraw enabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
+#ifdef DEBUGGER
if (log_blitter & 16)
activate_debugger();
+#endif
} else if (!(bltcon1 & BLTLINE) && blitline_started) {
write_log(_T("BLITTER: linedraw disabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
+#ifdef DEBUGGER
if (log_blitter & 16)
activate_debugger();
+#endif
}
if ((bltcon1 & BLTFILL) && !(bltcon1_old & BLTFILL)) {
write_log(_T("BLITTER: fill enabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
+#ifdef DEBUGGER
if (log_blitter & 16)
activate_debugger();
+#endif
} else if (!(bltcon1 & BLTFILL) && (bltcon1_old & BLTFILL)) {
write_log(_T("BLITTER: fill disabled when blitter is active! %08x\n"), M68K_GETPC);
blit_warned--;
+#ifdef DEBUGGER
if (log_blitter & 16)
activate_debugger();
+#endif
}
}
}
blitfc = !!(bltcon1 & BLTFC);
blitife = !!(bltcon1 & BLTIFE);
if ((bltcon1 & BLTFILL) == BLTFILL) {
+#ifdef DEBUGGER
debugtest(DEBUGTEST_BLITTER, _T("weird fill mode\n"));
+#endif
blitife = 0;
}
if (blitfill && !blitdesc) {
+#ifdef DEBUGGER
debugtest(DEBUGTEST_BLITTER, _T("fill without desc\n"));
if (log_blitter & 16) {
activate_debugger();
}
+#endif
}
shifter_skip_y = (bltcon0 & (BLTCHD | BLTCHC)) != 0x300;
blit_dof = 0;
if ((bltcon1 & BLTDOFF) && ecs_agnus) {
blit_dof = 1;
+#ifdef DEBUGGER
debugtest(DEBUGTEST_BLITTER, _T("ECS BLTCON1 DOFF-bit set\n"));
if (log_blitter & 16)
activate_debugger();
+#endif
}
if (blit_changed && blit_warned > 0 && !savestate_state) {
cycle_line_pipe[hpos] = 0;
if (dat & CYCLE_PIPE_CPUSTEAL) {
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_CPUBLITTERSTOLEN, hpos, vpos);
}
+#endif
break;
}
// last D write?
if (dat & BLITTER_PIPELINE_LASTD) {
line = false;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITFINALD, hpos, vpos);
}
+#endif
if (cycle_line_slot[hpos]) {
write_log("Blitter cycle allocated by %d!?\n", cycle_line_slot[hpos]);
}
// finished?
if (dat & BLITTER_PIPELINE_FINISHED) {
if (line) {
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_BLITFINALD, hpos, vpos);
//activate_debugger();
}
+#endif
}
}
blit_firstline_cycles = blit_first_cycle + (blit_cyclecount * blt_info.hblitsize) * CYCLE_UNIT + cpu_cycles;
}
+#ifdef DEBUGGER
if (memwatch_enabled || BLITTER_DEBUG) {
blitter_debugsave(copper, pc);
}
+#endif
if ((log_blitter & 1) || ((log_blitter & 32) && !blitline)) {
if (1) {
if (warned && dmaen (DMA_BLITTER) && blt_info.got_cycle) {
warned--;
+#ifdef DEBUGGER
debugtest (DEBUGTEST_BLITTER, _T("program does not wait for blitter tc=%d\n"), blit_cyclecounter);
+#endif
if (log_blitter)
warned = 0;
if (log_blitter & 2) {
void restore_blitter_finish (void)
{
+#ifdef DEBUGGER
record_dma_reset(0);
record_dma_reset(0);
+#endif
blitter_cycle_exact = currprefs.blitter_cycle_exact;
immediate_blits = currprefs.immediate_blits;
if (blt_statefile_type == 0) {
#include "sysconfig.h"
#include "sysdeps.h"
+#ifdef CDTV
+
#include "options.h"
#include "memory.h"
#include "custom.h"
}
}
-#endif
+#endif /* SAVESTATE */
+
+#endif /* CDTV */
#include "custom.h"
#include "newcpu.h"
#include "cia.h"
+#ifdef SERIAL_PORT
#include "serial.h"
+#endif
#include "disk.h"
#include "xwin.h"
#include "keybuf.h"
#endif
if (!(c->icr1 & 0x80)) {
c->icr1 |= 0x80 | 0x40;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(num ? DMA_EVENT_CIAB_IRQ : DMA_EVENT_CIAA_IRQ, current_hpos(), vpos);
}
+#endif
ICR(num);
}
}
arcadia_parport(1, c->prb, c->drb);
}
#endif
+#ifdef PARALLEL_PORT
if (!isprinter() && parallel_port_scsi) {
parallel_port_scsi_write(0, c->prb, c->drb);
}
+#endif
break;
case 2:
#if DONGLE_DEBUG > 0
cia_now_evt = get_cycles();
int syncdelay = 0;
int delay = get_cia_sync_cycles(&syncdelay);
+#ifdef DEBUGGER
if (debug_dma) {
cia_cycles(syncdelay, 100, 0, 0);
cia_cycles(delay, 0, 0, 0);
} else {
cia_cycles(syncdelay + delay, 0, 0, 0);
}
+#else
+ cia_cycles(syncdelay + delay, 0, 0, 0);
+#endif
#endif
}
if (!isgaylenocia (addr))
return dummy_get(addr, 1, false, 0);
+#ifdef DEBUGGER
if (memwatch_access_validator) {
validate_cia(addr, 0, 0);
}
+#endif
switch (cia_chipselect(addr))
{
if (!isgaylenocia (addr))
return dummy_get_safe(addr, 2, false, 0);
+#ifdef DEBUGGER
if (memwatch_access_validator) {
write_log(_T("CIA word read %08x PC=%08x\n"), addr, M68K_GETPC);
}
+#endif
switch (cia_chipselect(addr))
{
static bool cia_debug(uaecptr addr, uae_u32 value, int size)
{
+#ifdef DEBUGGER
if (addr == DEBUG_SPRINTF_ADDRESS || addr == DEBUG_SPRINTF_ADDRESS + 4 || addr == DEBUG_SPRINTF_ADDRESS + 8 ||
(addr == DEBUG_SPRINTF_ADDRESS + 2 && currprefs.cpu_model < 68020) ||
(addr == DEBUG_SPRINTF_ADDRESS + 6 && currprefs.cpu_model < 68020) ||
(addr == DEBUG_SPRINTF_ADDRESS + 10 && currprefs.cpu_model < 68020)) {
return debug_sprintf(addr, value, size);
}
+#endif
return false;
}
if (!isgaylenocia(addr))
return;
+#ifdef DEBUGGER
if (memwatch_access_validator) {
validate_cia(addr, 1, value);
}
+#endif
int cs = cia_chipselect(addr);
if (!isgaylenocia(addr))
return;
+#ifdef DEBUGGER
if (memwatch_access_validator) {
write_log(_T("CIA word write %08x = %04x PC=%08x\n"), addr, v & 0xffff, M68K_GETPC);
}
+#endif
if (addr & 1)
v = (v << 8) | (v >> 8);
#include "blitter.h"
#include "xwin.h"
#include "inputdevice.h"
+#ifdef SERIAL_PORT
#include "serial.h"
+#endif
#include "autoconf.h"
#include "traps.h"
#include "gui.h"
#define LORES_TO_SHRES_SHIFT 2
+#ifdef SERIAL_PORT
extern uae_u16 serper;
+#endif
static void uae_abort (const TCHAR *format,...)
{
next_color_change++;
cc[1].regno = -1;
last_recorded_diw_hpos = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
}
+#endif
thisline_changed = 1;
}
}
next_color_change++;
cc[1].regno = -1;
last_recorded_diw_hpos = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
}
+#endif
thisline_changed = 1;
}
}
exthblank_state = true;
last_recorded_diw_hpos = cc->linepos;
last_hblank_start = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
}
+#endif
}
if (hbstop_v2 < chpos && hbstop_v2 >= last_recorded_diw_hpos) {
// do_color_changes() HBLANK workaround
cc[1].regno = -1;
exthblank_state = false;
last_recorded_diw_hpos = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
}
+#endif
}
} else if (hbstrt_v2 > hbstop_v2) { // equal: blank disable wins
if (hbstop_v2 < chpos && hbstop_v2 >= last_recorded_diw_hpos) {
cc[1].regno = -1;
exthblank_state = false;
last_recorded_diw_hpos = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBE, diw_to_hpos(cc->linepos), vpos);
}
+#endif
}
if (hbstrt_v2 < chpos && hbstrt_v2 >= last_recorded_diw_hpos) {
cc = &curr_color_changes[next_color_change];
exthblank_state = true;
last_recorded_diw_hpos = cc->linepos;
last_hblank_start = cc->linepos;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HBS, diw_to_hpos(cc->linepos), vpos);
}
+#endif
}
}
}
// was closed previously in same line: blank closed part.
hdiw_restart(last_diwlastword, first2);
last_diwlastword = -1;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HDIWS, diw_to_hpos(first2), vpos);
}
+#endif
}
if (thisline_decision.diwfirstword < 0) {
thisline_decision.diwfirstword = adjust_hr2(first);
if (!plane0_first_done) {
plane0p_enabled = ecs_denise && (bplcon0 & 1) && (bplcon3 & 0x20);
}
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HDIWS, diw_to_hpos(first), vpos);
}
+#endif
}
hdiwstate = diw_states::DIW_waiting_stop;
}
// if HDIW opens again in same line
int v = thisline_decision.diwlastword * 2;
last_diwlastword = adjust_hr(v);
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_HDIWE, diw_to_hpos(last), vpos);
}
+#endif
}
hdiwstate = diw_states::DIW_waiting_start;
}
#endif
}
+#ifdef DEBUGGER
if (debug_dma && (new_beamcon0 & bemcon0_hsync_mask)) {
record_dma_event(DMA_EVENT_HSS, hpos, vpos);
record_dma_event(DMA_EVENT_HSE, hsstop, vpos);
}
+#endif
toscr_hend = 0;
last_bpl1dat_hpos = -1;
static void rethink_intreq(void)
{
+#ifdef SERIAL_PORT
serial_rethink();
+#endif
devices_rethink();
}
DISK_update_adkcon(hpos, v);
setclr(&adkcon, v);
audio_update_adkmasks();
+#ifdef SERIAL_PORT
if ((v >> 11) & 1) {
serial_uartbreak((adkcon >> 11) & 1);
}
+#endif
}
static void check_harddis(void)
{
int v;
+#ifdef DEBUGGER
value = debug_putpeekdma_chipset(0xdff000 + addr, value, MW_MASK_COPPER, 0x08c);
+#endif
copper_access = 1;
v = custom_wput_1(hpos, addr, value, noget);
copper_access = 0;
{
// COPJMP when previous instruction is mid-cycle
cop_state.state = COP_read1;
+#ifdef DEBUGGER
record_dma_event2(DMA_EVENT2_COPPERUSE, hpos, vpos);
+#endif
alloc_cycle(hpos, CYCLE_COPPER);
}
break;
cop_state.vcmp = (cop_state.ir[0] & (cop_state.ir[1] | 0x8000)) >> 8;
cop_state.hcmp = (cop_state.ir[0] & cop_state.ir[1] & 0xFE);
+#ifdef DEBUGGER
record_copper(debugip - 4, debugip, cop_state.ir[0], cop_state.ir[1], hpos, vpos);
+#endif
} else {
// MOVE
if (copper_bad_cycle - copper_bad_cycle_start != 3 * CYCLE_UNIT) {
copper_bad_cycle = 0;
} else {
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event(DMA_EVENT_SPECIAL, hpos, vpos);
}
+#endif
// early COPJMP processing
cop_state.state = COP_read1;
copper_bad_cycle_pc_old = cop_state.ip;
}
#define MAVG_VSYNC_SIZE 128
-
+#ifdef DEBUGGER
extern int log_vsync, debug_vsync_min_delay, debug_vsync_forced_delay;
+#endif
static bool framewait(void)
{
struct amigadisplay *ad = &adisplays[0];
}
t = legacy_avg;
+#ifdef DEBUGGER
if (debug_vsync_min_delay && t < debug_vsync_min_delay * vsynctimebase / 100) {
t = debug_vsync_min_delay * vsynctimebase / 100;
}
if (debug_vsync_forced_delay > 0) {
t = debug_vsync_forced_delay * vsynctimebase / 100;
}
+#endif
vsync_time = read_processor_time();
if (t > vsynctimebase * 2 / 3) {
vsynctimeperline = 1;
}
+#ifdef DEBUGGER
if (0 || (log_vsync & 2)) {
write_log (_T("%06d %06d/%06d %03d%%\n"), t, vsynctimeperline, vsynctimebase, t * 100 / vsynctimebase);
}
+#endif
frame_shown = true;
return 1;
}
}
+#ifdef DEBUGGER
debug_hsync();
+#endif
}
STATIC_INLINE bool is_last_line(void)
refresh_handled_slot = 0;
refptr_preupdated = true;
+#ifdef DEBUGGER
if (debug_dma) {
if (vs_state_on) {
record_dma_event(DMA_EVENT_VS, REFRESH_FIRST_HPOS, vpos);
record_dma_event(DMA_EVENT_LOL, REFRESH_FIRST_HPOS + 2, vpos);
}
}
-
+#endif
events_dmal_hsync();
#if 0
if (!isrestore()) {
/* must be called after audio_reset */
adkcon = 0;
+#ifdef SERIAL_PORT
serial_uartbreak(0);
+#endif
audio_update_adkmasks();
}
CLXCON(-1, clxcon);
CLXCON2(-1, clxcon2);
calcdiw();
+#ifdef SERIAL_PORT
v = serper;
serper = 0;
SERPER(v);
+#endif
for (int i = 0; i < 8; i++) {
SPRxCTLPOS(i);
nr_armed += spr[i].armed != 0;
#if CUSTOM_DEBUG > 2
write_log (_T("%d:%d:wget: %04X=%04X pc=%p\n"), current_hpos(), vpos, addr, addr & 0x1fe, m68k_getpc ());
#endif
+#ifdef DEBUGGER
if (memwatch_access_validator)
debug_check_reg(addr, 0, 0);
+#endif
addr &= 0xfff;
case 0x012: v = POT0DAT(); break;
case 0x014: v = POT1DAT(); break;
case 0x016: v = POTGOR(); break;
+#ifdef SERIAL_PORT
case 0x018: v = SERDATR(); break;
+#else
+ case 0x018: v = 0x3000 /* no data */; break;
+#endif
case 0x01A: v = DSKBYTR(hpos); break;
case 0x01C: v = INTENAR(); break;
case 0x01E: v = INTREQR(); break;
decide_line(hpos);
decide_fetch_safe(hpos);
decide_blitter(hpos);
+#ifdef DEBUGGER
debug_wputpeek(0xdff000 + addr, l);
+#endif
r = custom_wput_1(hpos, addr, l, 1);
// CPU gets back (OCS/ECS only):
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
return dummy_get(addr, 2, false, 0);
if (addr & 1) {
+#ifdef DEBUGGER
debug_invalid_reg(addr, 2, 0);
+#endif
/* think about move.w $dff005,d0.. (68020+ only) */
addr &= ~1;
v = custom_wget2(addr, false) << 8;
uae_u32 v;
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
return dummy_get(addr, 1, false, 0);
+#ifdef DEBUGGER
debug_invalid_reg(addr, 1, 0);
+#endif
v = custom_wget2(addr & ~1, true);
v >>= (addr & 1) ? 0 : 8;
return v;
ar_custom[addr + 1]=(uae_u8)(value);
#endif
#endif
+#ifdef DEBUGGER
if (memwatch_access_validator) {
debug_check_reg(oaddr, 1, value);
}
+#endif
switch (addr) {
case 0x00E: CLXDAT(hpos); break;
case 0x02A: VPOSW(value); break;
case 0x02C: VHPOSW(value); break;
case 0x02E: COPCON(value); break;
+#ifdef SERIAL_PORT
case 0x030: SERDAT(value); break;
case 0x032: SERPER(value); break;
+#else
+ case 0x030: break;
+ case 0x032: break;
+#endif
case 0x034: POTGO(value); break;
case 0x040: BLTCON0(hpos, value); break;
#endif
sync_copper(hpos);
if (addr & 1) {
+#ifdef DEBUGGER
debug_invalid_reg(addr, -2, value);
+#endif
addr &= ~1;
custom_wput_1(hpos, addr, (value >> 8) | (value & 0xff00), 0);
custom_wput_1(hpos, addr + 2, (value << 8) | (value & 0x00ff), 0);
dummy_put(addr, 1, value);
return;
}
+#ifdef DEBUGGER
debug_invalid_reg(addr, -1, value);
+#endif
if (aga_mode) {
if (addr & 1) {
rval = value & 0xff;
RW; /* 004 VPOSR */
RW; /* 006 VHPOSR */
RW; /* 008 DSKDATR (dummy register) */
- JOYSET(0, RW); /* 00A JOY0DAT */
- JOYSET(1, RW); /* 00C JOY1DAT */
+ JOYSET(0, RW); /* 00A JOY0DAT */
+ JOYSET(1, RW); /* 00C JOY1DAT */
clxdat = RW; /* 00E CLXDAT */
RW; /* 010 ADKCONR */
RW; /* 012 POT0DAT* */
RW; /* 02C VHPOSW */
COPCON(RW); /* 02E COPCON */
RW; /* 030 SERDAT* */
+#ifdef SERIAL_PORT
serper = RW; /* 032 SERPER* */
+#else
+ RW; /* 032 SERPER* */
+#endif
potgo_value = 0; POTGO(RW); /* 034 POTGO */
RW; /* 036 JOYTEST* */
RW; /* 038 STREQU */
RW; /* 03A STRVHBL */
RW; /* 03C STRHOR */
RW; /* 03E STRLONG */
- BLTCON0(0, RW); /* 040 BLTCON0 */
- BLTCON1(0, RW); /* 042 BLTCON1 */
- BLTAFWM(0, RW); /* 044 BLTAFWM */
- BLTALWM(0, RW); /* 046 BLTALWM */
+ BLTCON0(0, RW); /* 040 BLTCON0 */
+ BLTCON1(0, RW); /* 042 BLTCON1 */
+ BLTAFWM(0, RW); /* 044 BLTAFWM */
+ BLTALWM(0, RW); /* 046 BLTALWM */
BLTCPTH(0, RW);BLTCPTL(0, RW); /* 048-04B BLTCPT */
BLTBPTH(0, RW);BLTBPTL(0, RW); /* 04C-04F BLTBPT */
BLTAPTH(0, RW);BLTAPTL(0, RW); /* 050-053 BLTAPT */
RW; /* 05A BLTCON0L */
blt_info.vblitsize = RW;/* 05C BLTSIZV */
blt_info.hblitsize = RW;/* 05E BLTSIZH */
- BLTCMOD(0, RW); /* 060 BLTCMOD */
- BLTBMOD(0, RW); /* 062 BLTBMOD */
- BLTAMOD(0, RW); /* 064 BLTAMOD */
- BLTDMOD(0, RW); /* 066 BLTDMOD */
+ BLTCMOD(0, RW); /* 060 BLTCMOD */
+ BLTBMOD(0, RW); /* 062 BLTBMOD */
+ BLTAMOD(0, RW); /* 064 BLTAMOD */
+ BLTDMOD(0, RW); /* 066 BLTDMOD */
RW; /* 068 ? */
RW; /* 06A ? */
RW; /* 06C ? */
RW; /* 06E ? */
- BLTCDAT(0, RW); /* 070 BLTCDAT */
- BLTBDAT(0, RW); /* 072 BLTBDAT */
- BLTADAT(0, RW); /* 074 BLTADAT */
+ BLTCDAT(0, RW); /* 070 BLTCDAT */
+ BLTBDAT(0, RW); /* 072 BLTBDAT */
+ BLTADAT(0, RW); /* 074 BLTADAT */
RW; /* 076 ? */
RW; /* 078 ? */
RW; /* 07A ? */
ddfstrt = RW; /* 092 DDFSTRT */
ddfstop = RW; /* 094 DDFSTOP */
dmacon = RW & ~(0x2000|0x4000); /* 096 DMACON */
- CLXCON(-1, RW); /* 098 CLXCON */
+ CLXCON(-1, RW); /* 098 CLXCON */
intena = RW; /* 09A INTENA */
intreq = RW; /* 09C INTREQ */
adkcon = RW; /* 09E ADKCON */
vsstop = RW; /* 1CA VSSTOP */
vbstrt = RW; /* 1CC VBSTRT */
vbstop = RW; /* 1CE VBSTOP */
- SPRHSTRT(-1, RW); /* 1D0 SPRHSTART */
- SPRHSTOP(-1, RW); /* 1D2 SPRHSTOP */
- BPLHSTRT(-1, RW); /* 1D4 BPLHSTRT */
- BPLHSTOP(-1, RW); /* 1D6 BPLHSTOP */
+ SPRHSTRT(-1, RW); /* 1D0 SPRHSTART */
+ SPRHSTOP(-1, RW); /* 1D2 SPRHSTOP */
+ BPLHSTRT(-1, RW); /* 1D4 BPLHSTRT */
+ BPLHSTOP(-1, RW); /* 1D6 BPLHSTOP */
hhpos = RW; /* 1D8 HHPOSW */
RW; /* 1DA HHPOSR */
new_beamcon0 = RW; /* 1DC BEAMCON0 */
SW((lof_store ? 0x8001 : 0) | (lol ? 0x0080 : 0));/* 02A VPOSW */
SW(0); /* 02C VHPOSW */
SW(copcon); /* 02E COPCON */
+#ifdef SERIAL_PORT
SW(serdat); /* 030 SERDAT * */
SW(serper); /* 032 SERPER * */
+#else
+ SW(0); /* 030 SERDAT * */
+ SW(0); /* 032 SERPER * */
+#endif
SW(potgo_value); /* 034 POTGO */
SW(0); /* 036 JOYTEST * */
SW(0); /* 038 STREQU */
#include "sndboard.h"
#include "statusline.h"
#include "uae/ppc.h"
+#ifdef CD32
#include "cd32_fmv.h"
#include "akiko.h"
+#endif
#include "disk.h"
#include "cia.h"
#include "inputdevice.h"
#include "blitter.h"
#include "xwin.h"
#include "custom.h"
+#ifdef SERIAL_PORT
#include "serial.h"
+#endif
#include "bsdsocket.h"
#include "uaeserial.h"
#include "uaeresource.h"
#include "gui.h"
#include "savestate.h"
#include "uaeexe.h"
+#ifdef WITH_UAENATIVE
#include "uaenative.h"
+#endif
#include "tabletlibrary.h"
#include "luascript.h"
+#ifdef DRIVESOUND
#include "driveclick.h"
+#endif
#include "x86.h"
#include "ethernet.h"
#include "drawing.h"
CIA_hsync_prehandler();
decide_blitter(-1);
+#ifdef SERIAL_PORT
serial_hsynchandler();
+#endif
execute_device_items(device_hsyncs, device_hsync_cnt);
}
void devices_update_sync(float svpos, float syncadjust)
{
+#ifdef CD32
cd32_fmv_set_sync(svpos, syncadjust);
+#endif
}
void virtualdevice_free(void)
memory_cleanup();
free_shm();
cfgfile_addcfgparam(0);
+#ifdef DRIVESOUND
driveclick_free();
+#endif
ethernet_enumerate_free();
rtarea_free();
#include "fdi2raw.h"
#endif
#include "catweasel.h"
+#ifdef DRIVESOUND
#include "driveclick.h"
+#endif
#ifdef CAPS
#include "caps/caps_win32.h"
#endif
static int get_floppy_speed_from_image(drive *drv)
{
int l, m;
-
+
#ifdef FLOPPYBRIDGE
if (drv->bridge) {
drv->fourms = drv->bridge->getBitSpeed() == 4;
gui_data.drive_side = side;
gid->drive_writing = writ;
gid->floppy_protected = drive_writeprotected(drv);
+#ifdef FLOPPYBRIDGE
gid->floppy_inserted = gid->df[0] || (drv->bridge && !drv->bridge->hasDiskChanged());
+#else
+ gid->floppy_inserted = gid->df[0];
+#endif
gui_led (num + LED_DF0, (gid->drive_motor ? 1 : 0) | (gid->drive_writing ? 2 : 0), -1);
}
int dfxtype = p->floppyslots[dnum].dfxtype;
drive_image_free (drv);
+#ifdef FLOPPYBRIDGE
if (!fake && !drv->bridge) {
+#else
+ if (!fake) {
+#endif
DISK_examine_image(p, dnum, &disk_info_data, false, NULL);
}
DISK_validate_filename (p, fname_in, dnum, outname, 1, &drv->wrprot, &drv->crc32, &drv->diskfile);
drv->dskready_down_time = 0;
}
+#ifdef FLOPPYBRIDGE
if (drv->diskfile == NULL && !drv->catweasel && !drv->bridge) {
+#else
+ if (drv->diskfile == NULL && !drv->catweasel) {
+#endif
track_reset (drv);
return 0;
}
size == 9 * 80 * 1 * 512 || size == 18 * 80 * 1 * 512 || size == 10 * 80 * 1 * 512 || size == 20 * 80 * 1 * 512 ||
size == 9 * 81 * 1 * 512 || size == 18 * 81 * 1 * 512 || size == 10 * 81 * 1 * 512 || size == 20 * 81 * 1 * 512 ||
size == 9 * 82 * 1 * 512 || size == 18 * 82 * 1 * 512 || size == 10 * 82 * 1 * 512 || size == 20 * 82 * 1 * 512)) {
- /* PC formatted image */
- int side, sd;
+ /* PC formatted image */
+ int side, sd;
- drv->num_secs = 9;
- drv->ddhd = 1;
- sd = 0;
+ drv->num_secs = 9;
+ drv->ddhd = 1;
+ sd = 0;
- bool can40 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
- bool can80 = dfxtype == DRV_35_HD || dfxtype == DRV_PC_35_ONLY_80 || dfxtype == DRV_PC_525_40_80;
- bool drv525 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
-
- for (side = 2; side > 0; side--) {
- if (drv->hard_num_cyls >= 80 && can80) {
- if ( size == 9 * 80 * side * 512 || size == 9 * 81 * side * 512 || size == 9 * 82 * side * 512) {
- drv->num_secs = 9;
- drv->ddhd = 1;
- break;
- } else if (!drv525 && (size == 18 * 80 * side * 512 || size == 18 * 81 * side * 512 || size == 18 * 82 * side * 512)) {
- drv->num_secs = 18;
- drv->ddhd = 2;
- break;
- } else if (!drv525 && (size == 10 * 80 * side * 512 || size == 10 * 81 * side * 512 || size == 10 * 82 * side * 512)) {
- drv->num_secs = 10;
- drv->ddhd = 1;
- break;
- } else if (!drv525 && (size == 20 * 80 * side * 512 || size == 20 * 81 * side * 512 || size == 20 * 82 * side * 512)) {
- drv->num_secs = 20;
- drv->ddhd = 2;
- break;
- } else if (!drv525 && (size == 21 * 80 * side * 512 || size == 21 * 81 * side * 512 || size == 21 * 82 * side * 512)) {
- drv->num_secs = 21;
- drv->ddhd = 2;
- break;
- } else if (size == 15 * 80 * side * 512) {
- drv->num_secs = 15;
- drv->ddhd = 1;
- break;
- }
+ bool can40 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
+ bool can80 = dfxtype == DRV_35_HD || dfxtype == DRV_PC_35_ONLY_80 || dfxtype == DRV_PC_525_40_80;
+ bool drv525 = dfxtype == DRV_525_DD || dfxtype == DRV_PC_525_ONLY_40 || dfxtype == DRV_PC_525_40_80;
+
+ for (side = 2; side > 0; side--) {
+ if (drv->hard_num_cyls >= 80 && can80) {
+ if (size == 9 * 80 * side * 512 || size == 9 * 81 * side * 512 || size == 9 * 82 * side * 512) {
+ drv->num_secs = 9;
+ drv->ddhd = 1;
+ break;
+ } else if (!drv525 && (size == 18 * 80 * side * 512 || size == 18 * 81 * side * 512 || size == 18 * 82 * side * 512)) {
+ drv->num_secs = 18;
+ drv->ddhd = 2;
+ break;
+ } else if (!drv525 && (size == 10 * 80 * side * 512 || size == 10 * 81 * side * 512 || size == 10 * 82 * side * 512)) {
+ drv->num_secs = 10;
+ drv->ddhd = 1;
+ break;
+ } else if (!drv525 && (size == 20 * 80 * side * 512 || size == 20 * 81 * side * 512 || size == 20 * 82 * side * 512)) {
+ drv->num_secs = 20;
+ drv->ddhd = 2;
+ break;
+ } else if (!drv525 && (size == 21 * 80 * side * 512 || size == 21 * 81 * side * 512 || size == 21 * 82 * side * 512)) {
+ drv->num_secs = 21;
+ drv->ddhd = 2;
+ break;
+ } else if (size == 15 * 80 * side * 512) {
+ drv->num_secs = 15;
+ drv->ddhd = 1;
+ break;
}
- if (drv->hard_num_cyls == 40 || can40) {
- if (size == 9 * 40 * side * 512) {
- drv->num_secs = 9;
- drv->ddhd = 1;
- sd = 1;
- break;
- } else if (size == 8 * 40 * side * 512) {
- drv->num_secs = 8;
- drv->ddhd = 1;
- sd = 1;
- break;
- }
+ }
+ if (drv->hard_num_cyls == 40 || can40) {
+ if (size == 9 * 40 * side * 512) {
+ drv->num_secs = 9;
+ drv->ddhd = 1;
+ sd = 1;
+ break;
+ } else if (size == 8 * 40 * side * 512) {
+ drv->num_secs = 8;
+ drv->ddhd = 1;
+ sd = 1;
+ break;
}
}
+ }
- drv->num_tracks = size / (drv->num_secs * 512);
+ drv->num_tracks = size / (drv->num_secs * 512);
- // SD disk in 5.25 drive = duplicate each track
- if (sd && dfxtype == DRV_525_DD) {
- drv->num_tracks *= 2;
- } else {
- sd = 0;
- }
+ // SD disk in 5.25 drive = duplicate each track
+ if (sd && dfxtype == DRV_525_DD) {
+ drv->num_tracks *= 2;
+ } else {
+ sd = 0;
+ }
- drv->filetype = ADF_PCDOS;
- tid = &drv->trackdata[0];
- for (int i = 0; i < drv->num_tracks; i++) {
- tid->type = TRACK_PCDOS;
- tid->len = 512 * drv->num_secs;
- tid->bitlen = 0;
- tid->offs = (sd ? i / 2 : i) * 512 * drv->num_secs;
- if (side == 1) {
- tid++;
- tid->type = TRACK_NONE;
- tid->len = 512 * drv->num_secs;
- }
- tid->revolutions = 1;
+ drv->filetype = ADF_PCDOS;
+ tid = &drv->trackdata[0];
+ for (int i = 0; i < drv->num_tracks; i++) {
+ tid->type = TRACK_PCDOS;
+ tid->len = 512 * drv->num_secs;
+ tid->bitlen = 0;
+ tid->offs = (sd ? i / 2 : i) * 512 * drv->num_secs;
+ if (side == 1) {
tid++;
-
+ tid->type = TRACK_NONE;
+ tid->len = 512 * drv->num_secs;
}
- drv->num_heads = side;
- if (side == 1)
- drv->num_tracks *= 2;
+ tid->revolutions = 1;
+ tid++;
+
+ }
+ drv->num_heads = side;
+ if (side == 1)
+ drv->num_tracks *= 2;
} else if ((size == 262144 || size == 524288) && buffer[0] == 0x11 && (buffer[1] == 0x11 || buffer[1] == 0x14)) {
bool retrytrack;
int rev = -1;
+#ifdef FLOPPYBRIDGE
if ((!drv->diskfile && !drv->catweasel && !drv->bridge) || tr >= drv->num_tracks) {
+#else
+ if ((!drv->diskfile && !drv->catweasel) || tr >= drv->num_tracks) {
+#endif
track_reset (drv);
return;
}
memset (sectable, 0, MAX_SECTORS * sizeof (int));
mstart = mbuf;
+#ifdef FLOPPYBRIDGE
if (!drv->bridge) {
memcpy(mbuf + fwlen, mbuf, fwlen * sizeof(uae_u16));
}
+#else
+ memcpy(mbuf + fwlen, mbuf, fwlen * sizeof(uae_u16));
+#endif
mend -= (4 + 16 + 8 + 512);
while (secwritten < drvsec) {
int trackoffs;
#endif
if (drv->diskfile || drv->filetype >= 0)
statusline_add_message(STATUSTYPE_FLOPPY, _T("DF%d: -"), drv - floppy);
- drive_image_free (drv);
+ drive_image_free(drv);
drv->dskeject = false;
drv->dskchange = true;
drv->ddhd = 1;
}
dsklength--;
if (dsklength <= 0) {
- // delay write DMA finished state until bridge has all pending data written
#ifdef FLOPPYBRIDGE
+ // delay write DMA finished state until bridge has all pending data written
if (!wasBridge) {
disk_dmafinished();
}
+#else
+ disk_dmafinished();
#endif
for (int dr = 0; dr < MAX_FLOPPY_DRIVES ; dr++) {
drive *drv = &floppy[dr];
if (disk_debug_track < 0 || disk_debug_track == 2 * drv->cyl + side) {
disk_dma_debugmsg();
write_log(_T("DSKBYTR=%04X\n"), v);
+#ifdef DEBUGGER
activate_debugger();
+#endif
break;
}
}
if (!(selected & (1 << dr))) {
if (disk_debug_track < 0 || disk_debug_track == 2 * drv->cyl + side) {
disk_dma_debugmsg ();
+#ifdef DEBUGGER
activate_debugger ();
+#endif
break;
}
}
int done = 0;
for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) {
drive *drv = &floppy[dr];
+#ifdef FLOPPYBRIDGE
bool floppysupported = (drv->ddhd < 2) || (drv->ddhd > 1 && currprefs.floppyslots[dr].dfxtype == DRV_35_HD) || (drv->bridge);
+#else
+ bool floppysupported = (drv->ddhd < 2) || (drv->ddhd > 1 && currprefs.floppyslots[dr].dfxtype == DRV_35_HD);
+#endif
int pos, i;
if (drv->motoroff)
continue;
+#ifdef FLOPPYBRIDGE
if (!drv->useturbo && currprefs.floppy_speed > 0 && !drv->bridge)
+#else
+ if (!drv->useturbo && currprefs.floppy_speed > 0)
+#endif
continue;
if (selected & (1 << dr))
continue;
}
}
+#ifdef FLOPPYBRIDGE
static void floppybridge_read_track(drive *drv)
{
int timeout;
}
}
+#endif //FLOPPYBRIDGE
+
void DISK_init (void)
{
for (int dr = MAX_FLOPPY_DRIVES - 1; dr >= 0; dr--) {
if (!drive_insert (drv, &currprefs, dr, currprefs.floppyslots[dr].df, false, currprefs.floppyslots[dr].forcedwriteprotect))
disk_eject (dr);
}
+#ifdef FLOPPYBRIDGE
floppybridge_init2(&currprefs);
+#endif
if (disk_empty (0))
write_log (_T("No disk in drive 0.\n"));
amax_init ();
}
}
+#ifdef FLOPPYBRIDGE
static void get_floppybridgeinfo(struct uae_prefs *prefs, TCHAR *infotext, int num)
{
if (!infotext) {
p += _tcslen(p);
}
}
+#endif
int DISK_examine_image(struct uae_prefs *p, int num, struct diskinfo *di, bool deepcheck, TCHAR *infotext)
{
int sectable[MAX_SECTORS];
int oldcyl, oldside;
uae_u32 v = 0;
+#ifdef FLOPPYBRIDGE
bool fb = DISK_isfloppybridge(p, num);
+#else
+ bool fb = false;
+#endif
if (infotext) {
infotext[0] = 0;
ret = 0;
memset (di, 0, sizeof (struct diskinfo));
+#ifdef FLOPPYBRIDGE
if (fb) {
get_floppybridgeinfo(p, infotext, num);
}
+#endif
di->unreadable = true;
oldcyl = drv->cyl;
oldside = side;
drv->cyl = 0;
side = 0;
+#ifdef FLOPPYBRIDGE
if (!drive_insert (drv, p, num, p->floppyslots[num].df, true, true) || (!drv->diskfile && !drv->bridge)) {
+#else
+ if (!drive_insert(drv, p, num, p->floppyslots[num].df, true, true)) {
+#endif
drv->cyl = oldcyl;
side = oldside;
return 1;
#include "statusline.h"
#include "inputdevice.h"
#include "debug.h"
+#ifdef CD32
#include "cd32_fmv.h"
+#endif
#include "specialmonitors.h"
#include "devices.h"
#include "gfxboard.h"
vidinfo->drawbuffer.tempbufferinuse = true;
}
+#ifdef CD32
// cd32 fmv
if (!currprefs.monitoremu && vidinfo->tempbuffer.bufmem_allocated && currprefs.cs_cd32fmv) {
if (cd32_fmv_active) {
vidinfo->drawbuffer.tempbufferinuse = false;
}
}
+#endif
// grayscale
if (!currprefs.monitoremu && vidinfo->tempbuffer.bufmem_allocated &&
#include "a2091.h"
#include "a2065.h"
#include "gfxboard.h"
+#ifdef CD32
#include "cd32_fmv.h"
+#endif
#include "ncr_scsi.h"
#include "ncr9x_scsi.h"
#include "scsi.h"
#include "blkdev.h"
#include "isofs_api.h"
#include "scsi.h"
+#ifdef WITH_UAENATIVE
#include "uaenative.h"
+#endif
#include "tabletlibrary.h"
#include "cia.h"
#include "picasso96.h"
uaecptr ret = consolehook_beginio(ctx, trap_get_areg(ctx, 1));
trap_put_long(ctx, trap_get_areg(ctx, 7) + 4 * 4, ret);
} else if (mode == 200) {
+#ifdef DEBUGGER
uae_u32 v;
// a0 = data, d0 = length, a1 = task, d3 = stack size (in), stack ptr (out)
// a2 = debugdata, d2 = debuglength
trap_get_areg(ctx, 1), &stack);
trap_set_dreg(ctx, 2, stack);
return v;
+#endif
} else if (mode == 201) {
+#ifdef DEBUGGER
debugmem_break(8);
+#endif
return 1;
} else if (mode == 202) {
// a0 = seglist, a1 = name, d2 = lock
+#ifdef DEBUGGER
debugmem_addsegs(ctx, trap_get_areg(ctx, 0), trap_get_areg(ctx, 1), trap_get_dreg(ctx, 2), true);
+#endif
return 1;
} else if (mode == 203) {
// a0 = seglist
+#ifdef DEBUGGER
debugmem_remsegs(trap_get_areg(ctx, 0));
+#endif
return 1;
} else if (mode == 204 || mode == 206) {
// d0 = size, a1 = flags
+#ifdef DEBUGGER
uae_u32 v = debugmem_allocmem(mode == 206, trap_get_dreg(ctx, 0), trap_get_areg(ctx, 1), trap_get_areg(ctx, 0));
if (v) {
trap_set_areg(ctx, 0, v);
trap_set_dreg(ctx, 1, trap_get_areg(ctx, 1));
return trap_get_dreg(ctx, 0);
}
+#endif
} else if (mode == 205 || mode == 207) {
+#ifdef DEBUGGER
return debugmem_freemem(mode == 207, trap_get_areg(ctx, 1), trap_get_dreg(ctx, 0), trap_get_areg(ctx, 0));
+#endif
} else if (mode == 208) {
// segtrack: bit 0
// fsdebug: bit 1
return 0;
} else if (mode == 210) {
// debug trapcode
+#ifdef DEBUGGER
debugmem_trap(trap_get_areg(ctx, 0));
+#endif
} else if (mode == 212) {
// a0 = seglist, a1 = name, d2 = lock
+#ifdef DEBUGGER
debugmem_addsegs(ctx, trap_get_areg(ctx, 0), trap_get_areg(ctx, 1), trap_get_dreg(ctx, 2), false);
+#endif
return 1;
} else if (mode == 213) {
// a0 = seglist
+#ifdef DEBUGGER
debugmem_remsegs(trap_get_areg(ctx, 0));
+#endif
return 1;
} else if (mode == 299) {
+#ifdef DEBUGGER
return debugmem_exit();
-
+#endif
} else {
write_log (_T("Unknown mousehack hook %d\n"), mode);
}
extern void cputester_fault(void);
#endif
+#ifdef WITH_SOFTFLOAT
#include "softfloat/softfloat.h"
+#endif
// global variable for JIT FPU
#ifdef USE_LONG_DOUBLE
fpp_from_exten_fmovem(®s.fp[i], &temp_ext[i][0], &temp_ext[i][1], &temp_ext[i][2]);
}
if (currprefs.fpu_mode > 0) {
+#ifdef WITH_SOFTFLOAT
fp_init_softfloat(currprefs.fpu_model);
+#endif
#ifdef MSVC_LONG_DOUBLE
use_long_double = false;
} else if (currprefs.fpu_mode < 0) {
#ifndef CPU_TESTER
currprefs.fpu_mode = changed_prefs.fpu_mode;
if (currprefs.fpu_mode > 0) {
+#ifdef WITH_SOFTFLOAT
fp_init_softfloat(currprefs.fpu_model);
+#endif
#ifdef MSVC_LONG_DOUBLE
use_long_double = false;
} else if (currprefs.fpu_mode < 0) {
#define FPCR_PRECISION_DOUBLE 0x00000080
#define FPCR_PRECISION_EXTENDED 0x00000000
+#ifdef SOFTFLOAT_CONVERSIONS
static struct float_status fs;
+#endif
static uae_u32 fpu_mode_control = 0;
static int fpu_prec;
static int temp_prec;
void fp_init_native(void)
{
+#ifdef SOFTFLOAT_CONVERSIONS
set_floatx80_rounding_precision(80, &fs);
set_float_rounding_mode(float_round_to_zero, &fs);
-
+#endif
fpp_print = fp_print;
fpp_unset_snan = fp_unset_snan;
double softfloat_tan(double v)
{
+#if SOFTFLOAT_CONVERSIONS
struct float_status f = { 0 };
uae_u32 w1, w2;
fpdata fpd = { 0 };
float64 f64 = floatx80_to_float64(fv, &fs);
fp_to_double(&fpd, f64 >> 32, (uae_u32)f64);
return fpd.fp;
+#else
+ return tanl(v);
+#endif
}
static bool isa4000t (uaecptr *paddr)
{
+#ifdef NCR
if (!is_a4000t_scsi())
return false;
uaecptr addr = *paddr;
addr &= 0xff;
*paddr = addr;
return true;
+#else
+ return false;
+#endif
}
static uae_u32 REGPARAM2 gayle_lget (uaecptr addr)
return;
}
if (isa4000t(&addr)) {
+#ifdef NCR
if (addr >= NCR_ALT_OFFSET) {
addr &= NCR_MASK;
ncr710_io_bput_a4000t(addr + 3, value >> 0);
ncr710_io_bput_a4000t(addr + 1, value >> 16);
ncr710_io_bput_a4000t(addr + 0, value >> 24);
}
+#endif
return;
}
ide_reg = get_gayle_ide_reg (addr, &ide);
*
* Copyright 2001-2016 Toni Wilen
*
-* new fetures:
+* new features:
* - very configurable (and very complex to configure :)
* - supports multiple native input devices (joysticks and mice)
* - supports mapping joystick/mouse buttons to keys and vice versa
switch(code)
{
case AKS_ENTERDEBUGGER:
+#ifdef DEBUGGER
activate_debugger ();
+#endif
return true;
}
return false;
set_config_changed ();
break;
case AKS_ENTERDEBUGGER:
+#ifdef DEBUGGER
activate_debugger ();
+#endif
break;
case AKS_STATESAVEDIALOG:
if (s) {
#include "events.h"
#include "memory.h"
#include "custom.h"
+#ifdef SERIAL_PORT
#include "serial.h"
+#endif
#include "newcpu.h"
#include "disk.h"
#include "debug.h"
#include "cpuboard.h"
#include "uae/ppc.h"
#include "devices.h"
+#ifdef JIT
#include "jit/compemu.h"
+#endif
#ifdef RETROPLATFORM
#include "rp.h"
#endif
error_log(_T("Bad value for comptrustnaddr parameter: value must be within 0..2."));
p->comptrustnaddr = 1;
}
+#ifdef JIT
if (p->cachesize < 0 || p->cachesize > MAX_JIT_CACHE || (p->cachesize > 0 && p->cachesize < MIN_JIT_CACHE)) {
error_log(_T("JIT Bad value for cachesize parameter: value must zero or within %d..%d."), MIN_JIT_CACHE, MAX_JIT_CACHE);
p->cachesize = 0;
}
-
+#else
+ p->cachesize = 0;
+#endif
#if 0
if (p->cpu_cycle_exact && p->m68k_speed < 0 && currprefs.cpu_model <= 68020)
void uae_reset (int hardreset, int keyboardreset)
{
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_reset(0);
record_dma_reset(0);
}
+#endif
currprefs.quitstatefile[0] = changed_prefs.quitstatefile[0] = 0;
if (quit_program == 0) {
void uae_quit (void)
{
+#ifdef DEBUGGER
deactivate_debugger ();
+#endif
if (quit_program != -UAE_QUIT)
quit_program = -UAE_QUIT;
target_quit ();
logging_init (); /* Yes, we call this twice - the first case handles when the user has loaded
a config using the cmd-line. This case handles loads through the GUI. */
+#ifdef JIT
compiler_init();
+#endif
#ifdef NATMEM_OFFSET
if (!init_shm ()) {
if (currprefs.start_gui)
gui_update ();
if (graphics_init (true)) {
+#ifdef DEBUGGER
setup_brkhandler ();
if (currprefs.start_debugger && debuggable ())
activate_debugger ();
-
+#endif
if (!init_audio ()) {
if (sound_available && currprefs.produce_sound > 1) {
write_log (_T("Sound driver unavailable: Sound output disabled\n"));
}
#endif
+#ifdef DEBUGGER
extern bool debugmem_initialized;
+#endif
bool real_address_allowed(void)
{
+#ifdef DEBUGGER
return debugmem_initialized == false;
+#else
+ return true;
+#endif
}
int addr_valid (const TCHAR *txt, uaecptr addr, uae_u32 len)
return;
if (addr >= 0x07f7fff0 && addr <= 0x07ffffff)
return;
+#ifdef DEBUGGER
if (debugmem_extinvalidmem(addr, val, rw ? (1 << size) : -(1 << size)))
return;
if ((illegal_count >= MAX_ILG && MAX_ILG > 0) && !memwatch_access_validator)
return;
+#endif
if (MAX_ILG >= 0)
illegal_count++;
if (ins) {
static void ce2_timeout (void)
{
+#ifdef CPUEMU_13
wait_cpu_cycle_read (0, -1);
+#endif
}
static uae_u32 REGPARAM2 chipmem_lget_ce2 (uaecptr addr)
STATIC_INLINE void REGPARAM2 chipmem_lput_debugmem(uaecptr addr, uae_u32 v)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
debugmem_chiphit(addr, v, 4);
+#endif
put_long(addr, v);
}
STATIC_INLINE void REGPARAM2 chipmem_wput_debugmem(uaecptr addr, uae_u32 v)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
debugmem_chiphit(addr, v, 2);
+#endif
put_word(addr, v);
}
STATIC_INLINE void REGPARAM2 chipmem_bput_debugmem(uaecptr addr, uae_u32 v)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
debugmem_chiphit(addr, v, 1);
+#endif
put_byte(addr, v);
}
STATIC_INLINE uae_u32 REGPARAM2 chipmem_lget_debugmem(uaecptr addr)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
return debugmem_chiphit(addr, 0, -4);
+#endif
return get_long(addr);
}
STATIC_INLINE uae_u32 REGPARAM2 chipmem_wget_debugmem(uaecptr addr)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
return debugmem_chiphit(addr, 0, -2);
+#endif
return get_word(addr);
}
STATIC_INLINE uae_u32 REGPARAM2 chipmem_bget_debugmem(uaecptr addr)
{
+#ifdef DEBUGGER
if (addr < debugmem_chiplimit)
return debugmem_chiphit(addr, 0, -1);
+#endif
return get_byte(addr);
}
STATIC_INLINE int REGPARAM2 chipmem_check_debugmem(uaecptr addr, uae_u32 size)
void chipmem_setindirect(void)
{
+#ifdef DEBUGGER
if (debugmem_bank.baseaddr && debugmem_chiplimit) {
+#else
+ if (debugmem_bank.baseaddr && 0) {
+#endif
chipmem_lget_indirect = chipmem_lget_debugmem;
chipmem_wget_indirect = chipmem_wget_debugmem;
chipmem_bget_indirect = chipmem_bget_debugmem;
uaecptr a2 = addr - 32;
uaecptr a3 = m68k_getpc () - 32;
write_log (_T("Your Amiga program just did something terribly stupid %08X PC=%08X\n"), addr, M68K_GETPC);
+#ifdef DEBUGGER
if (debugging || DEBUG_STUPID) {
activate_debugger ();
m68k_dumpstate(NULL, 0xffffffff);
}
+#endif
for (i = 0; i < 10; i++) {
write_log (_T("%08X "), i >= 5 ? a3 : a2);
for (j = 0; j < 16; j += 2) {
write_log (_T("\n"));
}
memory_map_dump();
+#ifdef DEBUGGER
m68k_dumpstate(NULL, 0xffffffff);
+#endif
}
if (0 || (gary_toenb && (gary_nonrange(addr) || (size > 1 && gary_nonrange(addr + size - 1))))) {
hardware_exception2(addr, 0, true, true, size);
if (bogomem_aliasing)
size = 8;
cb = &chipmem_bank;
- #ifdef AGA
- #if 0
+#ifdef AGA
+#if 0
if (currprefs.cpu_cycle_exact && currprefs.cpu_model >= 68020)
- cb = &chipmem_bank_ce2;
- #endif
- #endif
+ cb = &chipmem_bank_ce2;
+#endif
+#endif
if (chip) {
map_banks(&dummy_bank, 0, size, 0);
if (!isdirectjit()) {
alg_flag = 0;
need_hardreset = false;
rom_write_enabled = true;
+#ifdef JIT
jit_n_addr_unsafe = 0;
+#endif
/* Use changed_prefs, as m68k_reset is called later. */
if (last_address_space_24 != changed_prefs.address_space_24)
need_hardreset = true;
}
#endif
+#ifdef DEBUGGER
if (quick <= 0)
old = debug_bankchange (-1);
+#endif
flush_icache(3); /* Sure don't want to keep any old mappings around! */
#ifdef NATMEM_OFFSET
if (!quick)
#endif
real_left--;
}
+#ifdef DEBUGGER
if (quick <= 0)
debug_bankchange (old);
+#endif
return;
}
#endif
real_left--;
}
}
+#ifdef DEBUGGER
if (quick <= 0)
debug_bankchange (old);
+#endif
fill_ce_banks ();
}
if (start == 0xffffffff)
return;
+#ifdef JIT
if ((bank->jit_read_flag | bank->jit_write_flag) & S_N_ADDR) {
jit_n_addr_unsafe = 1;
}
+#endif
if (start >= 0x100) {
int real_left = 0;
p->rdp = p->wrp = 0;
p->reader_waiting = 0;
p->writer_waiting = 0;
-};
+}
/*
* to be called when the Amiga boots, i.e. by filesys_diagentry()
}
}
+#ifdef DEBUGGER
static void flush_cpu_cache_debug(uaecptr addr, int size)
{
debugmem_flushcache(0, -1);
debug_smc_clear(0, -1);
}
+#endif
void flush_cpu_caches(bool force)
{
for (int i = 0; i < CACHELINES020; i++)
caches020[i].valid = 0;
regs.cacr &= ~0x08;
+#ifdef DEBUGGER
flush_cpu_cache_debug(0, -1);
+#endif
}
if (regs.cacr & 0x04) { // clear entry in instr cache
caches020[(regs.caar >> 2) & (CACHELINES020 - 1)].valid = 0;
regs.cacr &= ~0x04;
+#ifdef DEBUGGER
flush_cpu_cache_debug(regs.caar, CACHELINES020);
+#endif
}
} else if (currprefs.cpu_model == 68030) {
if ((regs.cacr & 0x08) || force) { // clear instr cache
}
}
regs.cacr &= ~0x08;
+#ifdef DEBUGGER
flush_cpu_cache_debug(0, -1);
+#endif
}
if (regs.cacr & 0x04) { // clear entry in instr cache
icaches030[(regs.caar >> 4) & (CACHELINES030 - 1)].valid[(regs.caar >> 2) & 3] = 0;
regs.cacr &= ~0x04;
+#ifdef DEBUGGER
flush_cpu_cache_debug(regs.caar, CACHELINES030);
+#endif
}
if ((regs.cacr & 0x800) || force) { // clear data cache
if (doflush) {
icaches040[i].valid[j] = false;
}
}
+#ifdef DEBUGGER
flush_cpu_cache_debug(0, -1);
+#endif
}
}
}
tagmask = cacheitag04060mask;
index = (addr >> 4) & cacheisets04060mask;
c = &icaches040[index];
+#ifdef DEBUGGER
flush_cpu_cache_debug(addr, 16);
+#endif
} else {
tagmask = cachedtag04060mask;
index = (addr >> 4) & cachedsets04060mask;
return;
}
m68k_setpc(newpc);
+#ifdef DEBUGGER
branch_stack_push(currpc, currpc);
+#endif
regs.ir = x_get_word(m68k_getpc()); // prefetch 1
if (hardware_bus_error) {
if (nr == 2 || nr == 3) {
set_special(SPCFLAG_END_COMPILE);
}
#endif
+#ifdef DEBUGGER
branch_stack_push(currpc, nextpc);
+#endif
regs.ipl_pin = intlev();
ipl_fetch_now();
fill_prefetch ();
regs.exception = nr;
regs.loop_mode = 0;
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, 0x20000);
}
+#endif
if (cpu_tracer) {
cputrace.state = nr;
}
static void do_interrupt (int nr)
{
+#ifdef DEBUGGER
if (debug_dma)
record_dma_event(DMA_EVENT_CPUIRQ, current_hpos (), vpos);
-
+#endif
if (inputrecord_debug & 2) {
if (input_record > 0)
inprec_recorddebug_cpu (2);
}
}
+#ifdef DEBUGGER
if (debugmem_illg(opcode)) {
m68k_incpc_normal(2);
return 4;
}
+#endif
if (cloanto_rom && (opcode & 0xF100) == 0x7100) {
m68k_dreg (regs, (opcode >> 9) & 7) = (uae_s8)(opcode & 0xFF);
irq6 = true;
}
if (uae_int_requested & 0xff0000) {
+#ifdef WITH_PPC
if (!cpuboard_is_ppcboard_irq()) {
+#endif
atomic_and(&uae_int_requested, ~0x010000);
+#ifdef WITH_PPC
}
+#endif
}
}
if (irq2 || irq6) {
static void debug_cpu_stop(void)
{
+#ifdef DEBUGGER
record_dma_event(DMA_EVENT_CPUSTOP, current_hpos(), vpos);
if (time_for_interrupt()) {
record_dma_event(DMA_EVENT_CPUSTOPIPL, current_hpos(), vpos);
}
+#endif
}
static int do_specialties (int cycles)
//write_log (_T("%08X-%04X "), pc, r->opcode);
}
#endif
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
r->instruction_pc = m68k_getpc ();
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) & 0xffff;
if (!regs.loop_mode)
inprec_playdebug_cpu (1);
}
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
r->instruction_pc = m68k_getpc ();
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, r->opcode);
}
+#endif
(*cpufunctbl_noret[r->opcode])(r->opcode);
if (!regs.loop_mode)
if (cputrace.needendcycles) {
cputrace.needendcycles = 0;
write_log(_T("STARTCYCLES=%016llx ENDCYCLES=%016llx\n"), cputrace.startcycles, get_cycles());
+#ifdef DEBUGGER
log_dma_record ();
+#endif
}
if (r->spcflags || regs.ipl[0] > 0) {
fault = 1;
} ENDTRY
if (!fault) {
+#ifdef DEBUGGER
TCHAR buf[100];
if (full)
write_log (_T("mmufixup=%d %04x %04x\n"), mmufixup[0].reg, regs.wb3_status, regs.mmu_ssw);
write_log (_T("%s\n"), buf);
if (full)
m68k_dumpstate(NULL, 0xffffffff);
+#endif
}
}
regs.intmask = 7;
MakeSR();
audio_deactivate();
+#ifdef DEBUGGER
if (debugging)
activate_debugger();
+#endif
}
}
set_special(SPCFLAG_CHECK);
// "prefetch"
if (regs.cacr & 0x8000)
fill_icache040(r->instruction_pc + 16);
-
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
-
+#endif
(*cpufunctbl_noret[r->opcode])(r->opcode);
if (r->spcflags) {
// "prefetch"
if (regs.cacr & 0x8000)
fill_icache040(r->instruction_pc + 16);
-
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
(*cpufunctbl_noret[r->opcode])(r->opcode);
else if (input_play > 0)
inprec_playdebug_cpu (1);
}
-
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
(*cpufunctbl_noret[r->opcode])(r->opcode);
else if (input_play > 0)
inprec_playdebug_cpu (1);
}
-
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
if (currprefs.cpu_memory_cycle_exact) {
r->opcode = x_get_iword(0);
count_instr (r->opcode);
-
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) & 0xffff;
cpu_cycles = adjust_cycles (cpu_cycles);
r->opcode = x_get_iword(0);
count_instr(r->opcode);
+#ifdef DEBUGGER
if (debug_opcode_watch) {
debug_trainer_match();
}
+#endif
cpu_cycles = (*cpufunctbl[r->opcode])(r->opcode) >> 16;
cpu_cycles = adjust_cycles(cpu_cycles);
#ifdef SAVESTATE
/* We may have been restoring state, but we're done now. */
if (isrestore ()) {
+#ifdef DEBUGGER
if (debug_dma) {
record_dma_reset(0);
record_dma_reset(0);
}
+#endif
restored = savestate_restore_finish ();
memory_map_dump ();
if (currprefs.mmu_model == 68030) {
if (changed_prefs.inprecfile[0] && input_record)
inprec_prepare_record (savestate_fname[0] ? savestate_fname : NULL);
-
+#ifdef DEBUGGER
if (changed_prefs.trainerfile[0])
debug_init_trainer(changed_prefs.trainerfile);
-
+#endif
set_cpu_tracer (false);
#ifdef DEBUGGER
buf = xcalloc (TCHAR, (MAX_LINEWIDTH + 1) * pcnt);
if (!buf)
return;
+#ifdef DEBUGGER
m68k_disasm_2(buf, MAX_LINEWIDTH * pcnt, addr, NULL, 0, nextpc, cnt, seaddr, deaddr, lastpc, 1);
+#endif
xfree (buf);
}
void m68k_disasm (uaecptr addr, uaecptr *nextpc, uaecptr lastpc, int cnt)
buf = xcalloc (TCHAR, (MAX_LINEWIDTH + 1) * pcnt);
if (!buf)
return;
+#ifdef DEBUGGER
m68k_disasm_2(buf, MAX_LINEWIDTH * pcnt, addr, NULL, 0, nextpc, cnt, NULL, NULL, lastpc, 0);
+#endif
console_out_f (_T("%s"), buf);
xfree (buf);
}
regs.isp = m68k_areg (regs, 7);
j = 2;
console_out_f (_T("USP %08X ISP %08X "), regs.usp, regs.isp);
+#ifdef DEBUGGER
for (i = 0; m2cregs[i].regno>= 0; i++) {
if (!movec_illg (m2cregs[i].regno)) {
if (!_tcscmp (m2cregs[i].regname, _T("USP")) || !_tcscmp (m2cregs[i].regname, _T("ISP")))
j++;
}
}
+#endif
if (j > 0)
console_out_f (_T("\n"));
console_out_f (_T("T=%d%d S=%d M=%d X=%d N=%d Z=%d V=%d C=%d IMASK=%d STP=%d\n"),
}
for (int i = 0; i < 3; i++) {
uae_u16 w;
+#ifdef DEBUGGER
if (!debug_get_prefetch(i, &w))
break;
+#endif
struct instr *dp;
struct mnemolookup *lookup;
dp = table68k + w;
if (!currprefs.cpu_compatible) {
do_cycles(c);
} else {
+#ifdef DEBUGGER
if (debug_dma) {
while (c > 0) {
debug_cpu_stop();
c -= CYCLE_UNIT;
}
} else {
+#endif
x_do_cycles(c);
+#ifdef DEBUGGER
}
+#endif
}
}
}
}
+#ifdef DEBUGGER
static uae_u32 read_dcache030_debug(uaecptr addr, uae_u32 size, uae_u32 fc, bool *cached)
{
static const uae_u32 mask[3] = { 0x000000ff, 0x0000ffff, 0xffffffff };
out &= mask[size];
return out;
}
+#endif
static bool read_dcache030_2(uaecptr addr, uae_u32 size, uae_u32 *valp)
{
return line;
}
+#ifdef DEBUGGER
static uae_u32 read_dcache040_debug(uae_u32 addr, int size, bool *cached)
{
int index;
return get_word_debug(addr);
return get_long_debug(addr);
}
+#endif
static uae_u32 read_dcache040(uae_u32 addr, int size, uae_u32 (*fetch)(uaecptr))
{
return r;
}
+#ifdef DEBUGGER
uae_u32 get_byte_cache_debug(uaecptr addr, bool *cached)
{
*cached = false;
}
return get_long_debug(addr);
}
+#endif
void check_t0_trace(void)
{
#endif
else if (!_tcsncmp (name, _T("EXPB"), 4))
end = restore_expansion_boards(chunk);
+#ifdef DEBUGGER
else if (!_tcsncmp (name, _T("DMWP"), 4))
end = restore_debug_memwatch (chunk);
+#endif
else if (!_tcsncmp(name, _T("PIC0"), 4))
end = chunk + len;
#ifdef ACTION_REPLAY
restore_ar_finish();
#endif
+#ifdef DEBUGGER
restore_debug_memwatch_finish();
+#endif
savestate_state = 0;
init_hz_normal();
audio_activate();
}
}
+#ifdef DEBUGGER
dst = save_debug_memwatch (&len, NULL);
if (dst) {
save_chunk (f, dst, len, _T("DMWP"), 0);
xfree(dst);
}
+#endif
dst = save_screenshot(0, &len);
if (dst) {
generic_soft_scsi_add(ch, ci, rc, NCR5380_OVERDRIVE, 65536, 32768, ROMTYPE_OVERDRIVE);
}
+#ifdef WITH_X86
+
// x86 bridge scsi rancho rt1000
void x86_rt1000_bput(int portnum, uae_u8 v)
{
{
generic_soft_scsi_add(ch, ci, rc, NCR5380_X86_RT1000, 0, 0, ROMTYPE_X86_RT1000);
}
+
+#endif // WITH_X86
projects / francis / winuae.git / commitdiff