if (blit_faulty)
return &blit_diag[0];
if (blit_final)
- return blit_cycle_diagram_finald;
+ return blitline ? blit_cycle_diagram_finalld : blit_cycle_diagram_finald;
return blit_diag;
}
{
if (is_bitplane_dma (hpos))
return 0;
+ if (cycle_line[hpos] == CYCLE_CPU)
+ return -1;
if (cycle_line[hpos])
return 0;
return 1;
STATIC_INLINE chipmem_agnus_wput2 (uaecptr addr, uae_u32 w)
{
+ last_custom_value1 = w;
#ifndef BLITTER_DEBUG_NO_D
- last_custom_value = w;
chipmem_agnus_wput (addr, w);
#endif
}
if (!dmaen (DMA_BLITTER))
return;
blt_info.bltcdat = chipmem_bank.wget (bltcpt);
- last_custom_value = blt_info.bltcdat;
+ last_custom_value1 = blt_info.bltcdat;
}
bltstate = BLT_work;
}
if (bltcon0 & 0x200) {
if (!dmaen (DMA_BLITTER))
return;
- last_custom_value = blt_info.bltddat;
+ last_custom_value1 = blt_info.bltddat;
chipmem_bank.wput (bltdpt, blt_info.bltddat);
}
bltstate = BLT_next;
static void decide_blitter_line (int hsync, int hpos)
{
-
+ if (blit_final && vblitsize)
+ blit_final = 0;
while (last_blitter_hpos < hpos) {
int c = channel_state (blit_cyclecounter);
for (;;) {
+ int v = canblit (last_blitter_hpos);
- if (!canblit (last_blitter_hpos)) {
+ if (!v) {
blit_misscyclecounter++;
break;
}
- if (!dmaen (DMA_BLITTER) && (c == 3 || c == 4))
+ if ((!dmaen (DMA_BLITTER) || v <= 0) && (c == 3 || c == 4)) {
+ blit_misscyclecounter++;
break;
+ }
blit_cyclecounter++;
blit_totalcyclecounter++;
// final 2 idle cycles?
- if (blit_diag == blit_cycle_diagram_finalld) {
- if (blit_cyclecounter > blit_diag[0]) {
+ if (blit_final) {
+ if (blit_cyclecounter > get_ch ()[0]) {
bltdpt = bltcpt;
blitter_done (last_blitter_hpos);
return;
/* onedot mode and no pixel = bus write access is skipped */
if (c == 4 && blitsing && blitonedot > 1) {
if (vblitsize == 0) {
- blit_diag = blit_cycle_diagram_finalld;
+ blit_final = 1;
blit_cyclecounter = 0;
}
break;
alloc_cycle_ext (last_blitter_hpos, CYCLE_BLITTER);
record_dma_blit (0x00, blt_info.bltddat, bltdpt, last_blitter_hpos);
if (vblitsize == 0) {
- blit_diag = blit_cycle_diagram_finalld;
+ blit_final = 1;
blit_cyclecounter = 0;
break;
}
-
+
}
break;
if (wd) {
alloc_cycle_ext (hpos, CYCLE_BLITTER);
record_dma_blit (0x00, d, bltdpt, hpos);
- last_custom_value = d;
+ last_custom_value1 = d;
chipmem_agnus_wput2 (bltdpt, d);
bltdpt += blit_add;
blitter_hcounter2++;
{
case 1:
blt_info.bltadat = dat = chipmem_agnus_wget (bltapt);
- last_custom_value = blt_info.bltadat;
+ last_custom_value1 = blt_info.bltadat;
addr = bltapt;
bltapt += blit_add;
reg = 0x74;
break;
case 2:
blt_info.bltbdat = dat = chipmem_agnus_wget (bltbpt);
- last_custom_value = blt_info.bltbdat;
+ last_custom_value1 = blt_info.bltbdat;
addr = bltbpt;
bltbpt += blit_add;
if (blitdesc)
break;
case 3:
blt_info.bltcdat = dat = chipmem_agnus_wget (bltcpt);
- last_custom_value = blt_info.bltcdat;
+ last_custom_value1 = blt_info.bltcdat;
addr = bltcpt;
bltcpt += blit_add;
reg = 0x70;
if (blit_faulty)
blit_faulty = -1;
bltstate = BLT_done;
+ blit_final = 0;
do_blitter (vhpos, 0);
blit_startcycles = 0;
blit_cyclecounter = 0;
blitter_nasty++;
- if (!dmaen (DMA_BLITTER) || v == 0) {
+ if (!dmaen (DMA_BLITTER) || v <= 0) {
blit_misscyclecounter++;
break;
}
break;
}
- if (blitter_vcounter1 == vblitsize && channel_pos (blit_cyclecounter - 1) == blit_diag[0] - 1) {
- if (!blit_final) {
- blitter_interrupt (last_blitter_hpos, 0);
- blit_cyclecounter = 0;
- blit_final = 1;
- }
+ if (!blit_final && blitter_vcounter1 == vblitsize && channel_pos (blit_cyclecounter - 1) == blit_diag[0] - 1) {
+ blitter_interrupt (last_blitter_hpos, 0);
+ blit_cyclecounter = 0;
+ blit_final = 1;
}
last_blitter_hpos++;
}
#ifdef BLITTER_DEBUG_NOWAIT
if (bltstate != BLT_done) {
- if (blit_diag == blit_cycle_diagram_finald)
+ if (blit_final)
write_log (L"blitter was already active! PC=%08x\n", M68K_GETPC);
}
#endif
if (dmaen (DMA_BLITPRI))
set_special (SPCFLAG_BLTNASTY);
- if (vblitsize == 0 || (blitline && hblitsize != 2)) {
- blitter_done (hpos);
- return;
- }
-
#if 0
if (M68K_GETPC >= 0x00070554 && M68K_GETPC <= 0x000706B0) {
blitter_done ();
return;
}
+ if (vblitsize == 0 || (blitline && hblitsize != 2)) {
+ blitter_done (hpos);
+ return;
+ }
+
blt_info.got_cycle = 1;
if (currprefs.immediate_blits)
cycles = 1;
cfgfile_write (f, L"cpu_model", L"%d", p->cpu_model);
if (p->fpu_model)
cfgfile_write (f, L"fpu_model", L"%d", p->fpu_model);
+ if (p->mmu_model)
+ cfgfile_write (f, L"mmu_model", L"%d", p->mmu_model);
cfgfile_write_bool (f, L"cpu_compatible", p->cpu_compatible);
cfgfile_write_bool (f, L"cpu_24bit_addressing", p->address_space_24);
/* do not reorder end */
return 1;
}
+ if (cfgfile_string (option, value, L"mmu_model", tmpbuf, sizeof tmpbuf / sizeof (TCHAR))) {
+ p->mmu_model = _tstol(tmpbuf);
+ return 1;
+ }
+
if (cfgfile_string (option, value, L"fpu_model", tmpbuf, sizeof tmpbuf / sizeof (TCHAR))) {
p->fpu_model = _tstol(tmpbuf);
return 1;
+++ /dev/null
-#include "sysconfig.h"
-#include "sysdeps.h"
-
-#include "cpu_small.h"
-
-#include "readcpu.h"
-
-struct xcpu xregs;
-
-const int xareg_byteinc[] = { 1,1,1,1,1,1,1,2 };
-const int ximm8_table[] = { 8,1,2,3,4,5,6,7 };
-
-uae_u32 xnext_iword (void)
-{
- uae_u32 r = xget_iword (0);
- xm68k_incpc (2);
- return r;
-}
-uae_u32 xnext_ilong (void)
-{
- uae_u32 r = xget_ilong (0);
- xm68k_incpc (4);
- return r;
-}
-
-uae_u32 xget_ibyte (int offset)
-{
- return xget_byte (xm68k_getpc() + offset);
-}
-uae_u32 xget_iword (int offset)
-{
- return xget_word (xm68k_getpc() + offset);
-}
-uae_u32 xget_ilong (int offset)
-{
- return xget_long (xm68k_getpc() + offset);
-}
-
-void xm68k_incpc (int offset)
-{
- xregs.pc += offset;
-}
-uaecptr xm68k_getpc(void)
-{
- return xregs.pc;
-}
-void xm68k_setpc (uaecptr pc)
-{
- xregs.pc = pc;
-}
-
-uae_u32 xget_disp_ea_020 (uae_u32 base, uae_u32 dp)
-{
- int reg = (dp >> 12) & 15;
- uae_s32 regd = xregs.regs[reg];
- if ((dp & 0x800) == 0)
- regd = (uae_s32)(uae_s16)regd;
- regd <<= (dp >> 9) & 3;
- if (dp & 0x100) {
- uae_s32 outer = 0;
- if (dp & 0x80) base = 0;
- if (dp & 0x40) regd = 0;
-
- if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16)xnext_iword();
- if ((dp & 0x30) == 0x30) base += xnext_ilong();
-
- if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16)xnext_iword();
- if ((dp & 0x3) == 0x3) outer = xnext_ilong();
-
- if ((dp & 0x4) == 0) base += regd;
- if (dp & 0x3) base = xget_long (base);
- if (dp & 0x4) base += regd;
-
- return base + outer;
- } else {
- return base + (uae_s32)((uae_s8)dp) + regd;
- }
-}
-
-uae_u32 xget_disp_ea_000 (uae_u32 base, uae_u32 dp)
-{
- int reg = (dp >> 12) & 15;
- uae_s32 regd = xregs.regs[reg];
- if ((dp & 0x800) == 0)
- regd = (uae_s32)(uae_s16)regd;
- return base + (uae_s8)dp + regd;
-
-}
-
-/*
- * Test CCR condition
- */
-int xcctrue (int cc)
-{
- uae_u32 cznv = xregs.cznv;
-
- switch (cc) {
- case 0: return 1; /* T */
- case 1: return 0; /* F */
- case 2: return (cznv & (XFLAGVAL_C | XFLAGVAL_Z)) == 0; /* !CFLG && !ZFLG HI */
- case 3: return (cznv & (XFLAGVAL_C | XFLAGVAL_Z)) != 0; /* CFLG || ZFLG LS */
- case 4: return (cznv & XFLAGVAL_C) == 0; /* !CFLG CC */
- case 5: return (cznv & XFLAGVAL_C) != 0; /* CFLG CS */
- case 6: return (cznv & XFLAGVAL_Z) == 0; /* !ZFLG NE */
- case 7: return (cznv & XFLAGVAL_Z) != 0; /* ZFLG EQ */
- case 8: return (cznv & XFLAGVAL_V) == 0; /* !VFLG VC */
- case 9: return (cznv & XFLAGVAL_V) != 0; /* VFLG VS */
- case 10: return (cznv & XFLAGVAL_N) == 0; /* !NFLG PL */
- case 11: return (cznv & XFLAGVAL_N) != 0; /* NFLG MI */
- case 12: return (((cznv << (XFLAGBIT_N - XFLAGBIT_V)) ^ cznv) & XFLAGVAL_N) == 0; /* NFLG == VFLG GE */
- case 13: return (((cznv << (XFLAGBIT_N - XFLAGBIT_V)) ^ cznv) & XFLAGVAL_N) != 0; /* NFLG != VFLG LT */
- case 14: cznv &= (XFLAGVAL_N | XFLAGVAL_Z | XFLAGVAL_V); /* ZFLG && (NFLG == VFLG) GT */
- return (((cznv << (XFLAGBIT_N - XFLAGBIT_V)) ^ cznv) & (XFLAGVAL_N | XFLAGVAL_Z)) == 0;
- case 15: cznv &= (XFLAGVAL_N | XFLAGVAL_Z | XFLAGVAL_V); /* ZFLG && (NFLG != VFLG) LE */
- return (((cznv << (XFLAGBIT_N - XFLAGBIT_V)) ^ cznv) & (XFLAGVAL_N | XFLAGVAL_Z)) != 0;
- }
- return 0;
-}
-
-xcpuop_func *xcpufunctbl[65536];
-
-void init_cpu_small(void)
-{
- struct xcputbl *tbl = xop_smalltbl_0;
- int opcode, i;
- int lvl = 5, opcnt;
-
- for (opcode = 0; opcode < 65536; opcode++)
- xcpufunctbl[opcode] = xop_illg;
- for (i = 0; tbl[i].handler != NULL; i++)
- xcpufunctbl[tbl[i].opcode] = tbl[i].handler;
-
- opcnt = 0;
- for (opcode = 0; opcode < 65536; opcode++) {
- xcpuop_func *f;
-
- if (table68k[opcode].mnemo == i_ILLG || table68k[opcode].clev > lvl)
- continue;
-
- if (table68k[opcode].handler != -1) {
- f = xcpufunctbl[table68k[opcode].handler];
- xcpufunctbl[opcode] = f;
- opcnt++;
- }
- }
- write_log ("MiniCPU initialized, %d opcodes\n", opcnt);
-}
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-#define DEBUG 1
+#define DEBUG 0
#include "sysconfig.h"
#include "sysdeps.h"
#ifdef FULLMMU
static mmu_atc_l1_array atc_l1[2];
-static mmu_atc_l1_array *current_atc;
static struct mmu_atc_line atc_l2[2][ATC_L2_SIZE];
+mmu_atc_l1_array *current_atc;
#ifdef ATC_STATS
static unsigned int mmu_atc_hits[ATC_L2_SIZE];
if (data) {
res = mmu_do_match_ttr(regs.dtt0, addr, super);
- if (res != TTR_NO_MATCH)
+ if (res == TTR_NO_MATCH)
res = mmu_do_match_ttr(regs.dtt1, addr, super);
} else {
res = mmu_do_match_ttr(regs.itt0, addr, super);
- if (res != TTR_NO_MATCH)
+ if (res == TTR_NO_MATCH)
res = mmu_do_match_ttr(regs.itt1, addr, super);
}
return res;
if ((root_des & 2) == 0)
continue; /* invalid */
- D(bug(L"ROOT: %03d U=%d W=%d UDT=%02d", root_idx,
+ D(bug(L"ROOT: %03d U=%d W=%d UDT=%02d\n", root_idx,
root_des & 8 ? 1 : 0,
root_des & 4 ? 1 : 0,
root_des & 3
if (n_pages_used == -1)
continue;
- D(bug(L" PTR: %03d U=%d W=%d UDT=%02d", ptr_idx,
+ D(bug(L" PTR: %03d U=%d W=%d UDT=%02d\n", ptr_idx,
ptr_des & 8 ? 1 : 0,
ptr_des & 4 ? 1 : 0,
ptr_des & 3
page_des = page_info[page_idx].match;
if ((page_des & MMU_PDT_MASK) == 2) {
- D(bug(L" PAGE: %03d-%03d log=%08lx INDIRECT --> addr=%08lx",
+ D(bug(L" PAGE: %03d-%03d log=%08lx INDIRECT --> addr=%08lx\n",
page_info[page_idx].start_idx,
page_info[page_idx].start_idx + page_info[page_idx].n_pages - 1,
page_info[page_idx].log,
));
} else {
- D(bug(L" PAGE: %03d-%03d log=%08lx addr=%08lx UR=%02d G=%d U1/0=%d S=%d CM=%d M=%d U=%d W=%d",
+ D(bug(L" PAGE: %03d-%03d log=%08lx addr=%08lx UR=%02d G=%d U1/0=%d S=%d CM=%d M=%d U=%d W=%d\n",
page_info[page_idx].start_idx,
page_info[page_idx].start_idx + page_info[page_idx].n_pages - 1,
page_info[page_idx].log,
for (j = 0; j < ATC_L2_SIZE; j++) {
if (atc_l2[i][j].tag == 0x8000)
continue;
- D(bug(L"ATC[%02d] G=%d TT=%d M=%d WP=%d VD=%d VI=%d tag=%08x --> phys=%08x",
+ D(bug(L"ATC[%02d] G=%d TT=%d M=%d WP=%d VD=%d VI=%d tag=%08x --> phys=%08x\n",
j, atc_l2[i][j].global, atc_l2[i][j].tt, atc_l2[i][j].modified,
atc_l2[i][j].write_protect, atc_l2[i][j].valid_data, atc_l2[i][j].valid_inst,
atc_l2[i][j].tag, atc_l2[i][j].phys));
mmu_dump_ttr(L"ITT0", regs.itt0);
mmu_dump_ttr(L"ITT1", regs.itt1);
mmu_dump_atc();
- //mmu_dump_table("SRP", regs.srp);
+#if DEBUG
+ mmu_dump_table(L"SRP", regs.srp);
+#endif
}
/* }}} */
regs.wb3_status = write ? 0x80 | ssw : 0;
if (!write)
ssw |= MMU_SSW_RW;
+ if (regs.t0 || regs.t1)
+ ssw |= MMU_SSW_CT;
regs.mmu_fault_addr = addr;
regs.mmu_ssw = ssw | MMU_SSW_ATC;
- D(bug(L"BUS ERROR: fc=%d w=%d log=%08x ssw=%04x", fc, write, addr, ssw));
+ //write_log (L"BUS ERROR: fc=%d w=%d log=%08x ssw=%04x\n", fc, write, addr, ssw);
THROW(2);
}
SAVE_EXCEPTION;
TRY(prb) {
desc = mmu_lookup_pagetable(addr, super, write);
- D(bug(L"translate: %x,%u,%u,%u -> %x", addr, super, write, data, desc));
+ D(bug(L"translate: %x,%u,%u,%u -> %x\n", addr, super, write, data, desc));
RESTORE_EXCEPTION;
}
CATCH(prb) {
l->modified = (desc & MMU_MMUSR_M) != 0;
l->write_protect = (desc & MMU_MMUSR_W) != 0;
}
+ D(bug(L"-> %08x\n", l->phys + addr));
return desc;
}
int idx = ATC_L2_INDEX(addr);
int tag = ATC_TAG(addr);
struct mmu_atc_line *l = &atc_l2[super][idx];
- uaecptr phys_addr;
if (l->tag != tag) {
restart:
mmu_fill_atc_l2(addr, super, data, write, l);
}
if (!(data ? l->valid_data : l->valid_inst)) {
- D(bug(L"MMU: non-resident page (%x,%x,%x)!", addr, regs.pc, regs.fault_pc));
+ D(bug(L"MMU: non-resident page (%x,%x,%x)!\n", addr, regs.pc, regs.fault_pc));
goto fail;
}
if (write) {
if (l->write_protect) {
- D(bug(L"MMU: write protected (via %s) %lx", l->tt ? "ttr" : "atc", addr));
+ D(bug(L"MMU: write protected (via %s) %lx\n", l->tt ? "ttr" : "atc", addr));
goto fail;
}
if (!l->modified)
goto restart;
}
*l1 = *l;
-
+#if 0 // some Atari specific stuff?
+ uaecptr phys_addr;
phys_addr = addr + l1->phys;
if ((phys_addr & 0xfff00000) == 0x00f00000) {
l1->hw = 1;
l1->bus_fault = 1;
goto fail;
}
-
+#endif
return true;
fail:
desc_addr = (desc & MMU_ROOT_PTR_ADDR_MASK) | i;
desc = phys_get_long(desc_addr);
if ((desc & 2) == 0) {
- D(bug(L"MMU: invalid root descriptor for %lx", addr));
+ D(bug(L"MMU: invalid root descriptor for %lx\n", addr));
return 0;
}
desc_addr = (desc & MMU_ROOT_PTR_ADDR_MASK) | i;
desc = phys_get_long(desc_addr);
if ((desc & 2) == 0) {
- D(bug(L"MMU: invalid ptr descriptor for %lx", addr));
+ D(bug(L"MMU: invalid ptr descriptor for %lx\n", addr));
return 0;
}
wp |= desc;
desc = phys_get_long(desc_addr);
if ((desc & 1) == 0) {
if ((desc & 2) == 0) {
- D(bug(L"MMU: invalid page descriptor log=%08lx desc=%08lx @%08lx", addr, desc, desc_addr));
+ D(bug(L"MMU: invalid page descriptor log=%08lx desc=%08lx @%08lx\n", addr, desc, desc_addr));
return desc;
}
/* indirect */
if (indirect) {
- D(bug(L"MMU: double indirect descriptor log=%lx descriptor @ %lx", addr, desc_addr));
+ D(bug(L"MMU: double indirect descriptor log=%lx descriptor @ %lx\n", addr, desc_addr));
return desc;
}
wp |= desc;
if (!mmu_fill_atc_l1(addr, super, data, 0, cl))
goto redo;
- return do_get_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl));
+ return phys_get_byte(mmu_get_real_address(addr, cl));
}
uae_u16 REGPARAM2 mmu_get_word_slow(uaecptr addr, int super, int data,
if (!mmu_fill_atc_l1(addr, super, data, 0, cl))
goto redo;
- return do_get_mem_word((uae_u16 *)mmu_get_real_address(addr, cl));
+ return phys_get_word(mmu_get_real_address(addr, cl));
}
uae_u32 REGPARAM2 mmu_get_long_slow(uaecptr addr, int super, int data,
if (!mmu_fill_atc_l1(addr, super, data, 0, cl))
goto redo;
- return do_get_mem_long((uae_u32 *)mmu_get_real_address(addr, cl));
+ return phys_get_long(mmu_get_real_address(addr, cl));
}
void REGPARAM2 mmu_put_long_unaligned(uaecptr addr, uae_u32 val, int data)
if (!mmu_fill_atc_l1(addr, super, data, 1, cl))
goto redo;
- do_put_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl), val);
+
+ phys_put_byte(mmu_get_real_address(addr, cl), val);
}
void REGPARAM2 mmu_put_word_slow(uaecptr addr, uae_u16 val, int super, int data,
if (!mmu_fill_atc_l1(addr, super, data, 1, cl))
goto redo;
- do_put_mem_word((uae_u16 *)mmu_get_real_address(addr, cl), val);
+ phys_put_word(mmu_get_real_address(addr, cl), val);
}
void REGPARAM2 mmu_put_long_slow(uaecptr addr, uae_u32 val, int super, int data,
if (!mmu_fill_atc_l1(addr, super, data, 1, cl))
goto redo;
- do_put_mem_long((uae_u32 *)mmu_get_real_address(addr, cl), val);
+ phys_put_long(mmu_get_real_address(addr, cl), val);
}
uae_u32 REGPARAM2 sfc_get_long(uaecptr addr)
mmu_flush_atc_all(true);
regs.urp = regs.srp = 0;
- regs.itt0 = regs.itt0 = 0;
- regs.dtt0 = regs.dtt0 = 0;
+ regs.itt0 = regs.itt1 = 0;
+ regs.dtt0 = regs.dtt1 = 0;
regs.mmusr = 0;
}
void REGPARAM2 mmu_set_tc(uae_u16 tc)
{
- if (regs.tcr == tc)
- return;
+// if (regs.tcr == tc)
+// return;
- regs.tcr = tc;
+// regs.tcr = tc;
regs.mmu_enabled = tc & 0x8000 ? 1 : 0;
regs.mmu_pagesize_8k = tc & 0x4000 ? 1 : 0;
mmu_flush_atc_all(true);
D(bug(L"MMU: enabled=%d page8k=%d\n", regs.mmu_enabled, regs.mmu_pagesize_8k));
+ write_log (L"MMU: enabled=%d page8k=%d\n", regs.mmu_enabled, regs.mmu_pagesize_8k);
}
void REGPARAM2 mmu_set_super(bool super)
+++ /dev/null
-#include "cpu_small.h"
-#include "cputbl_small.h"
-struct xcputbl xop_smalltbl_0[] = {
-{ xop_0_0, 0 }, /* OR */
-{ xop_10_0, 16 }, /* OR */
-{ xop_18_0, 24 }, /* OR */
-{ xop_20_0, 32 }, /* OR */
-{ xop_28_0, 40 }, /* OR */
-{ xop_30_0, 48 }, /* OR */
-{ xop_38_0, 56 }, /* OR */
-{ xop_39_0, 57 }, /* OR */
-{ xop_3c_0, 60 }, /* ORSR */
-{ xop_40_0, 64 }, /* OR */
-{ xop_50_0, 80 }, /* OR */
-{ xop_58_0, 88 }, /* OR */
-{ xop_60_0, 96 }, /* OR */
-{ xop_68_0, 104 }, /* OR */
-{ xop_70_0, 112 }, /* OR */
-{ xop_78_0, 120 }, /* OR */
-{ xop_79_0, 121 }, /* OR */
-{ xop_7c_0, 124 }, /* ORSR */
-{ xop_80_0, 128 }, /* OR */
-{ xop_90_0, 144 }, /* OR */
-{ xop_98_0, 152 }, /* OR */
-{ xop_a0_0, 160 }, /* OR */
-{ xop_a8_0, 168 }, /* OR */
-{ xop_b0_0, 176 }, /* OR */
-{ xop_b8_0, 184 }, /* OR */
-{ xop_b9_0, 185 }, /* OR */
-{ xop_d0_0, 208 }, /* CHK2 */
-{ xop_e8_0, 232 }, /* CHK2 */
-{ xop_f0_0, 240 }, /* CHK2 */
-{ xop_f8_0, 248 }, /* CHK2 */
-{ xop_f9_0, 249 }, /* CHK2 */
-{ xop_fa_0, 250 }, /* CHK2 */
-{ xop_fb_0, 251 }, /* CHK2 */
-{ xop_100_0, 256 }, /* BTST */
-{ xop_108_0, 264 }, /* MVPMR */
-{ xop_110_0, 272 }, /* BTST */
-{ xop_118_0, 280 }, /* BTST */
-{ xop_120_0, 288 }, /* BTST */
-{ xop_128_0, 296 }, /* BTST */
-{ xop_130_0, 304 }, /* BTST */
-{ xop_138_0, 312 }, /* BTST */
-{ xop_139_0, 313 }, /* BTST */
-{ xop_13a_0, 314 }, /* BTST */
-{ xop_13b_0, 315 }, /* BTST */
-{ xop_13c_0, 316 }, /* BTST */
-{ xop_140_0, 320 }, /* BCHG */
-{ xop_148_0, 328 }, /* MVPMR */
-{ xop_150_0, 336 }, /* BCHG */
-{ xop_158_0, 344 }, /* BCHG */
-{ xop_160_0, 352 }, /* BCHG */
-{ xop_168_0, 360 }, /* BCHG */
-{ xop_170_0, 368 }, /* BCHG */
-{ xop_178_0, 376 }, /* BCHG */
-{ xop_179_0, 377 }, /* BCHG */
-{ xop_17a_0, 378 }, /* BCHG */
-{ xop_17b_0, 379 }, /* BCHG */
-{ xop_180_0, 384 }, /* BCLR */
-{ xop_188_0, 392 }, /* MVPRM */
-{ xop_190_0, 400 }, /* BCLR */
-{ xop_198_0, 408 }, /* BCLR */
-{ xop_1a0_0, 416 }, /* BCLR */
-{ xop_1a8_0, 424 }, /* BCLR */
-{ xop_1b0_0, 432 }, /* BCLR */
-{ xop_1b8_0, 440 }, /* BCLR */
-{ xop_1b9_0, 441 }, /* BCLR */
-{ xop_1ba_0, 442 }, /* BCLR */
-{ xop_1bb_0, 443 }, /* BCLR */
-{ xop_1c0_0, 448 }, /* BSET */
-{ xop_1c8_0, 456 }, /* MVPRM */
-{ xop_1d0_0, 464 }, /* BSET */
-{ xop_1d8_0, 472 }, /* BSET */
-{ xop_1e0_0, 480 }, /* BSET */
-{ xop_1e8_0, 488 }, /* BSET */
-{ xop_1f0_0, 496 }, /* BSET */
-{ xop_1f8_0, 504 }, /* BSET */
-{ xop_1f9_0, 505 }, /* BSET */
-{ xop_1fa_0, 506 }, /* BSET */
-{ xop_1fb_0, 507 }, /* BSET */
-{ xop_200_0, 512 }, /* AND */
-{ xop_210_0, 528 }, /* AND */
-{ xop_218_0, 536 }, /* AND */
-{ xop_220_0, 544 }, /* AND */
-{ xop_228_0, 552 }, /* AND */
-{ xop_230_0, 560 }, /* AND */
-{ xop_238_0, 568 }, /* AND */
-{ xop_239_0, 569 }, /* AND */
-{ xop_23c_0, 572 }, /* ANDSR */
-{ xop_240_0, 576 }, /* AND */
-{ xop_250_0, 592 }, /* AND */
-{ xop_258_0, 600 }, /* AND */
-{ xop_260_0, 608 }, /* AND */
-{ xop_268_0, 616 }, /* AND */
-{ xop_270_0, 624 }, /* AND */
-{ xop_278_0, 632 }, /* AND */
-{ xop_279_0, 633 }, /* AND */
-{ xop_27c_0, 636 }, /* ANDSR */
-{ xop_280_0, 640 }, /* AND */
-{ xop_290_0, 656 }, /* AND */
-{ xop_298_0, 664 }, /* AND */
-{ xop_2a0_0, 672 }, /* AND */
-{ xop_2a8_0, 680 }, /* AND */
-{ xop_2b0_0, 688 }, /* AND */
-{ xop_2b8_0, 696 }, /* AND */
-{ xop_2b9_0, 697 }, /* AND */
-{ xop_2d0_0, 720 }, /* CHK2 */
-{ xop_2e8_0, 744 }, /* CHK2 */
-{ xop_2f0_0, 752 }, /* CHK2 */
-{ xop_2f8_0, 760 }, /* CHK2 */
-{ xop_2f9_0, 761 }, /* CHK2 */
-{ xop_2fa_0, 762 }, /* CHK2 */
-{ xop_2fb_0, 763 }, /* CHK2 */
-{ xop_400_0, 1024 }, /* SUB */
-{ xop_410_0, 1040 }, /* SUB */
-{ xop_418_0, 1048 }, /* SUB */
-{ xop_420_0, 1056 }, /* SUB */
-{ xop_428_0, 1064 }, /* SUB */
-{ xop_430_0, 1072 }, /* SUB */
-{ xop_438_0, 1080 }, /* SUB */
-{ xop_439_0, 1081 }, /* SUB */
-{ xop_440_0, 1088 }, /* SUB */
-{ xop_450_0, 1104 }, /* SUB */
-{ xop_458_0, 1112 }, /* SUB */
-{ xop_460_0, 1120 }, /* SUB */
-{ xop_468_0, 1128 }, /* SUB */
-{ xop_470_0, 1136 }, /* SUB */
-{ xop_478_0, 1144 }, /* SUB */
-{ xop_479_0, 1145 }, /* SUB */
-{ xop_480_0, 1152 }, /* SUB */
-{ xop_490_0, 1168 }, /* SUB */
-{ xop_498_0, 1176 }, /* SUB */
-{ xop_4a0_0, 1184 }, /* SUB */
-{ xop_4a8_0, 1192 }, /* SUB */
-{ xop_4b0_0, 1200 }, /* SUB */
-{ xop_4b8_0, 1208 }, /* SUB */
-{ xop_4b9_0, 1209 }, /* SUB */
-{ xop_4d0_0, 1232 }, /* CHK2 */
-{ xop_4e8_0, 1256 }, /* CHK2 */
-{ xop_4f0_0, 1264 }, /* CHK2 */
-{ xop_4f8_0, 1272 }, /* CHK2 */
-{ xop_4f9_0, 1273 }, /* CHK2 */
-{ xop_4fa_0, 1274 }, /* CHK2 */
-{ xop_4fb_0, 1275 }, /* CHK2 */
-{ xop_600_0, 1536 }, /* ADD */
-{ xop_610_0, 1552 }, /* ADD */
-{ xop_618_0, 1560 }, /* ADD */
-{ xop_620_0, 1568 }, /* ADD */
-{ xop_628_0, 1576 }, /* ADD */
-{ xop_630_0, 1584 }, /* ADD */
-{ xop_638_0, 1592 }, /* ADD */
-{ xop_639_0, 1593 }, /* ADD */
-{ xop_640_0, 1600 }, /* ADD */
-{ xop_650_0, 1616 }, /* ADD */
-{ xop_658_0, 1624 }, /* ADD */
-{ xop_660_0, 1632 }, /* ADD */
-{ xop_668_0, 1640 }, /* ADD */
-{ xop_670_0, 1648 }, /* ADD */
-{ xop_678_0, 1656 }, /* ADD */
-{ xop_679_0, 1657 }, /* ADD */
-{ xop_680_0, 1664 }, /* ADD */
-{ xop_690_0, 1680 }, /* ADD */
-{ xop_698_0, 1688 }, /* ADD */
-{ xop_6a0_0, 1696 }, /* ADD */
-{ xop_6a8_0, 1704 }, /* ADD */
-{ xop_6b0_0, 1712 }, /* ADD */
-{ xop_6b8_0, 1720 }, /* ADD */
-{ xop_6b9_0, 1721 }, /* ADD */
-{ xop_6c0_0, 1728 }, /* RTM */
-{ xop_6c8_0, 1736 }, /* RTM */
-{ xop_6d0_0, 1744 }, /* CALLM */
-{ xop_6e8_0, 1768 }, /* CALLM */
-{ xop_6f0_0, 1776 }, /* CALLM */
-{ xop_6f8_0, 1784 }, /* CALLM */
-{ xop_6f9_0, 1785 }, /* CALLM */
-{ xop_6fa_0, 1786 }, /* CALLM */
-{ xop_6fb_0, 1787 }, /* CALLM */
-{ xop_800_0, 2048 }, /* BTST */
-{ xop_810_0, 2064 }, /* BTST */
-{ xop_818_0, 2072 }, /* BTST */
-{ xop_820_0, 2080 }, /* BTST */
-{ xop_828_0, 2088 }, /* BTST */
-{ xop_830_0, 2096 }, /* BTST */
-{ xop_838_0, 2104 }, /* BTST */
-{ xop_839_0, 2105 }, /* BTST */
-{ xop_83a_0, 2106 }, /* BTST */
-{ xop_83b_0, 2107 }, /* BTST */
-{ xop_83c_0, 2108 }, /* BTST */
-{ xop_840_0, 2112 }, /* BCHG */
-{ xop_850_0, 2128 }, /* BCHG */
-{ xop_858_0, 2136 }, /* BCHG */
-{ xop_860_0, 2144 }, /* BCHG */
-{ xop_868_0, 2152 }, /* BCHG */
-{ xop_870_0, 2160 }, /* BCHG */
-{ xop_878_0, 2168 }, /* BCHG */
-{ xop_879_0, 2169 }, /* BCHG */
-{ xop_87a_0, 2170 }, /* BCHG */
-{ xop_87b_0, 2171 }, /* BCHG */
-{ xop_880_0, 2176 }, /* BCLR */
-{ xop_890_0, 2192 }, /* BCLR */
-{ xop_898_0, 2200 }, /* BCLR */
-{ xop_8a0_0, 2208 }, /* BCLR */
-{ xop_8a8_0, 2216 }, /* BCLR */
-{ xop_8b0_0, 2224 }, /* BCLR */
-{ xop_8b8_0, 2232 }, /* BCLR */
-{ xop_8b9_0, 2233 }, /* BCLR */
-{ xop_8ba_0, 2234 }, /* BCLR */
-{ xop_8bb_0, 2235 }, /* BCLR */
-{ xop_8c0_0, 2240 }, /* BSET */
-{ xop_8d0_0, 2256 }, /* BSET */
-{ xop_8d8_0, 2264 }, /* BSET */
-{ xop_8e0_0, 2272 }, /* BSET */
-{ xop_8e8_0, 2280 }, /* BSET */
-{ xop_8f0_0, 2288 }, /* BSET */
-{ xop_8f8_0, 2296 }, /* BSET */
-{ xop_8f9_0, 2297 }, /* BSET */
-{ xop_8fa_0, 2298 }, /* BSET */
-{ xop_8fb_0, 2299 }, /* BSET */
-{ xop_a00_0, 2560 }, /* EOR */
-{ xop_a10_0, 2576 }, /* EOR */
-{ xop_a18_0, 2584 }, /* EOR */
-{ xop_a20_0, 2592 }, /* EOR */
-{ xop_a28_0, 2600 }, /* EOR */
-{ xop_a30_0, 2608 }, /* EOR */
-{ xop_a38_0, 2616 }, /* EOR */
-{ xop_a39_0, 2617 }, /* EOR */
-{ xop_a3c_0, 2620 }, /* EORSR */
-{ xop_a40_0, 2624 }, /* EOR */
-{ xop_a50_0, 2640 }, /* EOR */
-{ xop_a58_0, 2648 }, /* EOR */
-{ xop_a60_0, 2656 }, /* EOR */
-{ xop_a68_0, 2664 }, /* EOR */
-{ xop_a70_0, 2672 }, /* EOR */
-{ xop_a78_0, 2680 }, /* EOR */
-{ xop_a79_0, 2681 }, /* EOR */
-{ xop_a7c_0, 2684 }, /* EORSR */
-{ xop_a80_0, 2688 }, /* EOR */
-{ xop_a90_0, 2704 }, /* EOR */
-{ xop_a98_0, 2712 }, /* EOR */
-{ xop_aa0_0, 2720 }, /* EOR */
-{ xop_aa8_0, 2728 }, /* EOR */
-{ xop_ab0_0, 2736 }, /* EOR */
-{ xop_ab8_0, 2744 }, /* EOR */
-{ xop_ab9_0, 2745 }, /* EOR */
-{ xop_ad0_0, 2768 }, /* CAS */
-{ xop_ad8_0, 2776 }, /* CAS */
-{ xop_ae0_0, 2784 }, /* CAS */
-{ xop_ae8_0, 2792 }, /* CAS */
-{ xop_af0_0, 2800 }, /* CAS */
-{ xop_af8_0, 2808 }, /* CAS */
-{ xop_af9_0, 2809 }, /* CAS */
-{ xop_c00_0, 3072 }, /* CMP */
-{ xop_c10_0, 3088 }, /* CMP */
-{ xop_c18_0, 3096 }, /* CMP */
-{ xop_c20_0, 3104 }, /* CMP */
-{ xop_c28_0, 3112 }, /* CMP */
-{ xop_c30_0, 3120 }, /* CMP */
-{ xop_c38_0, 3128 }, /* CMP */
-{ xop_c39_0, 3129 }, /* CMP */
-{ xop_c3a_0, 3130 }, /* CMP */
-{ xop_c3b_0, 3131 }, /* CMP */
-{ xop_c40_0, 3136 }, /* CMP */
-{ xop_c50_0, 3152 }, /* CMP */
-{ xop_c58_0, 3160 }, /* CMP */
-{ xop_c60_0, 3168 }, /* CMP */
-{ xop_c68_0, 3176 }, /* CMP */
-{ xop_c70_0, 3184 }, /* CMP */
-{ xop_c78_0, 3192 }, /* CMP */
-{ xop_c79_0, 3193 }, /* CMP */
-{ xop_c7a_0, 3194 }, /* CMP */
-{ xop_c7b_0, 3195 }, /* CMP */
-{ xop_c80_0, 3200 }, /* CMP */
-{ xop_c90_0, 3216 }, /* CMP */
-{ xop_c98_0, 3224 }, /* CMP */
-{ xop_ca0_0, 3232 }, /* CMP */
-{ xop_ca8_0, 3240 }, /* CMP */
-{ xop_cb0_0, 3248 }, /* CMP */
-{ xop_cb8_0, 3256 }, /* CMP */
-{ xop_cb9_0, 3257 }, /* CMP */
-{ xop_cba_0, 3258 }, /* CMP */
-{ xop_cbb_0, 3259 }, /* CMP */
-{ xop_cd0_0, 3280 }, /* CAS */
-{ xop_cd8_0, 3288 }, /* CAS */
-{ xop_ce0_0, 3296 }, /* CAS */
-{ xop_ce8_0, 3304 }, /* CAS */
-{ xop_cf0_0, 3312 }, /* CAS */
-{ xop_cf8_0, 3320 }, /* CAS */
-{ xop_cf9_0, 3321 }, /* CAS */
-{ xop_cfc_0, 3324 }, /* CAS2 */
-{ xop_e10_0, 3600 }, /* MOVES */
-{ xop_e18_0, 3608 }, /* MOVES */
-{ xop_e20_0, 3616 }, /* MOVES */
-{ xop_e28_0, 3624 }, /* MOVES */
-{ xop_e30_0, 3632 }, /* MOVES */
-{ xop_e38_0, 3640 }, /* MOVES */
-{ xop_e39_0, 3641 }, /* MOVES */
-{ xop_e50_0, 3664 }, /* MOVES */
-{ xop_e58_0, 3672 }, /* MOVES */
-{ xop_e60_0, 3680 }, /* MOVES */
-{ xop_e68_0, 3688 }, /* MOVES */
-{ xop_e70_0, 3696 }, /* MOVES */
-{ xop_e78_0, 3704 }, /* MOVES */
-{ xop_e79_0, 3705 }, /* MOVES */
-{ xop_e90_0, 3728 }, /* MOVES */
-{ xop_e98_0, 3736 }, /* MOVES */
-{ xop_ea0_0, 3744 }, /* MOVES */
-{ xop_ea8_0, 3752 }, /* MOVES */
-{ xop_eb0_0, 3760 }, /* MOVES */
-{ xop_eb8_0, 3768 }, /* MOVES */
-{ xop_eb9_0, 3769 }, /* MOVES */
-{ xop_ed0_0, 3792 }, /* CAS */
-{ xop_ed8_0, 3800 }, /* CAS */
-{ xop_ee0_0, 3808 }, /* CAS */
-{ xop_ee8_0, 3816 }, /* CAS */
-{ xop_ef0_0, 3824 }, /* CAS */
-{ xop_ef8_0, 3832 }, /* CAS */
-{ xop_ef9_0, 3833 }, /* CAS */
-{ xop_efc_0, 3836 }, /* CAS2 */
-{ xop_1000_0, 4096 }, /* MOVE */
-{ xop_1010_0, 4112 }, /* MOVE */
-{ xop_1018_0, 4120 }, /* MOVE */
-{ xop_1020_0, 4128 }, /* MOVE */
-{ xop_1028_0, 4136 }, /* MOVE */
-{ xop_1030_0, 4144 }, /* MOVE */
-{ xop_1038_0, 4152 }, /* MOVE */
-{ xop_1039_0, 4153 }, /* MOVE */
-{ xop_103a_0, 4154 }, /* MOVE */
-{ xop_103b_0, 4155 }, /* MOVE */
-{ xop_103c_0, 4156 }, /* MOVE */
-{ xop_1080_0, 4224 }, /* MOVE */
-{ xop_1090_0, 4240 }, /* MOVE */
-{ xop_1098_0, 4248 }, /* MOVE */
-{ xop_10a0_0, 4256 }, /* MOVE */
-{ xop_10a8_0, 4264 }, /* MOVE */
-{ xop_10b0_0, 4272 }, /* MOVE */
-{ xop_10b8_0, 4280 }, /* MOVE */
-{ xop_10b9_0, 4281 }, /* MOVE */
-{ xop_10ba_0, 4282 }, /* MOVE */
-{ xop_10bb_0, 4283 }, /* MOVE */
-{ xop_10bc_0, 4284 }, /* MOVE */
-{ xop_10c0_0, 4288 }, /* MOVE */
-{ xop_10d0_0, 4304 }, /* MOVE */
-{ xop_10d8_0, 4312 }, /* MOVE */
-{ xop_10e0_0, 4320 }, /* MOVE */
-{ xop_10e8_0, 4328 }, /* MOVE */
-{ xop_10f0_0, 4336 }, /* MOVE */
-{ xop_10f8_0, 4344 }, /* MOVE */
-{ xop_10f9_0, 4345 }, /* MOVE */
-{ xop_10fa_0, 4346 }, /* MOVE */
-{ xop_10fb_0, 4347 }, /* MOVE */
-{ xop_10fc_0, 4348 }, /* MOVE */
-{ xop_1100_0, 4352 }, /* MOVE */
-{ xop_1110_0, 4368 }, /* MOVE */
-{ xop_1118_0, 4376 }, /* MOVE */
-{ xop_1120_0, 4384 }, /* MOVE */
-{ xop_1128_0, 4392 }, /* MOVE */
-{ xop_1130_0, 4400 }, /* MOVE */
-{ xop_1138_0, 4408 }, /* MOVE */
-{ xop_1139_0, 4409 }, /* MOVE */
-{ xop_113a_0, 4410 }, /* MOVE */
-{ xop_113b_0, 4411 }, /* MOVE */
-{ xop_113c_0, 4412 }, /* MOVE */
-{ xop_1140_0, 4416 }, /* MOVE */
-{ xop_1150_0, 4432 }, /* MOVE */
-{ xop_1158_0, 4440 }, /* MOVE */
-{ xop_1160_0, 4448 }, /* MOVE */
-{ xop_1168_0, 4456 }, /* MOVE */
-{ xop_1170_0, 4464 }, /* MOVE */
-{ xop_1178_0, 4472 }, /* MOVE */
-{ xop_1179_0, 4473 }, /* MOVE */
-{ xop_117a_0, 4474 }, /* MOVE */
-{ xop_117b_0, 4475 }, /* MOVE */
-{ xop_117c_0, 4476 }, /* MOVE */
-{ xop_1180_0, 4480 }, /* MOVE */
-{ xop_1190_0, 4496 }, /* MOVE */
-{ xop_1198_0, 4504 }, /* MOVE */
-{ xop_11a0_0, 4512 }, /* MOVE */
-{ xop_11a8_0, 4520 }, /* MOVE */
-{ xop_11b0_0, 4528 }, /* MOVE */
-{ xop_11b8_0, 4536 }, /* MOVE */
-{ xop_11b9_0, 4537 }, /* MOVE */
-{ xop_11ba_0, 4538 }, /* MOVE */
-{ xop_11bb_0, 4539 }, /* MOVE */
-{ xop_11bc_0, 4540 }, /* MOVE */
-{ xop_11c0_0, 4544 }, /* MOVE */
-{ xop_11d0_0, 4560 }, /* MOVE */
-{ xop_11d8_0, 4568 }, /* MOVE */
-{ xop_11e0_0, 4576 }, /* MOVE */
-{ xop_11e8_0, 4584 }, /* MOVE */
-{ xop_11f0_0, 4592 }, /* MOVE */
-{ xop_11f8_0, 4600 }, /* MOVE */
-{ xop_11f9_0, 4601 }, /* MOVE */
-{ xop_11fa_0, 4602 }, /* MOVE */
-{ xop_11fb_0, 4603 }, /* MOVE */
-{ xop_11fc_0, 4604 }, /* MOVE */
-{ xop_13c0_0, 5056 }, /* MOVE */
-{ xop_13d0_0, 5072 }, /* MOVE */
-{ xop_13d8_0, 5080 }, /* MOVE */
-{ xop_13e0_0, 5088 }, /* MOVE */
-{ xop_13e8_0, 5096 }, /* MOVE */
-{ xop_13f0_0, 5104 }, /* MOVE */
-{ xop_13f8_0, 5112 }, /* MOVE */
-{ xop_13f9_0, 5113 }, /* MOVE */
-{ xop_13fa_0, 5114 }, /* MOVE */
-{ xop_13fb_0, 5115 }, /* MOVE */
-{ xop_13fc_0, 5116 }, /* MOVE */
-{ xop_2000_0, 8192 }, /* MOVE */
-{ xop_2008_0, 8200 }, /* MOVE */
-{ xop_2010_0, 8208 }, /* MOVE */
-{ xop_2018_0, 8216 }, /* MOVE */
-{ xop_2020_0, 8224 }, /* MOVE */
-{ xop_2028_0, 8232 }, /* MOVE */
-{ xop_2030_0, 8240 }, /* MOVE */
-{ xop_2038_0, 8248 }, /* MOVE */
-{ xop_2039_0, 8249 }, /* MOVE */
-{ xop_203a_0, 8250 }, /* MOVE */
-{ xop_203b_0, 8251 }, /* MOVE */
-{ xop_203c_0, 8252 }, /* MOVE */
-{ xop_2040_0, 8256 }, /* MOVEA */
-{ xop_2048_0, 8264 }, /* MOVEA */
-{ xop_2050_0, 8272 }, /* MOVEA */
-{ xop_2058_0, 8280 }, /* MOVEA */
-{ xop_2060_0, 8288 }, /* MOVEA */
-{ xop_2068_0, 8296 }, /* MOVEA */
-{ xop_2070_0, 8304 }, /* MOVEA */
-{ xop_2078_0, 8312 }, /* MOVEA */
-{ xop_2079_0, 8313 }, /* MOVEA */
-{ xop_207a_0, 8314 }, /* MOVEA */
-{ xop_207b_0, 8315 }, /* MOVEA */
-{ xop_207c_0, 8316 }, /* MOVEA */
-{ xop_2080_0, 8320 }, /* MOVE */
-{ xop_2088_0, 8328 }, /* MOVE */
-{ xop_2090_0, 8336 }, /* MOVE */
-{ xop_2098_0, 8344 }, /* MOVE */
-{ xop_20a0_0, 8352 }, /* MOVE */
-{ xop_20a8_0, 8360 }, /* MOVE */
-{ xop_20b0_0, 8368 }, /* MOVE */
-{ xop_20b8_0, 8376 }, /* MOVE */
-{ xop_20b9_0, 8377 }, /* MOVE */
-{ xop_20ba_0, 8378 }, /* MOVE */
-{ xop_20bb_0, 8379 }, /* MOVE */
-{ xop_20bc_0, 8380 }, /* MOVE */
-{ xop_20c0_0, 8384 }, /* MOVE */
-{ xop_20c8_0, 8392 }, /* MOVE */
-{ xop_20d0_0, 8400 }, /* MOVE */
-{ xop_20d8_0, 8408 }, /* MOVE */
-{ xop_20e0_0, 8416 }, /* MOVE */
-{ xop_20e8_0, 8424 }, /* MOVE */
-{ xop_20f0_0, 8432 }, /* MOVE */
-{ xop_20f8_0, 8440 }, /* MOVE */
-{ xop_20f9_0, 8441 }, /* MOVE */
-{ xop_20fa_0, 8442 }, /* MOVE */
-{ xop_20fb_0, 8443 }, /* MOVE */
-{ xop_20fc_0, 8444 }, /* MOVE */
-{ xop_2100_0, 8448 }, /* MOVE */
-{ xop_2108_0, 8456 }, /* MOVE */
-{ xop_2110_0, 8464 }, /* MOVE */
-{ xop_2118_0, 8472 }, /* MOVE */
-{ xop_2120_0, 8480 }, /* MOVE */
-{ xop_2128_0, 8488 }, /* MOVE */
-{ xop_2130_0, 8496 }, /* MOVE */
-{ xop_2138_0, 8504 }, /* MOVE */
-{ xop_2139_0, 8505 }, /* MOVE */
-{ xop_213a_0, 8506 }, /* MOVE */
-{ xop_213b_0, 8507 }, /* MOVE */
-{ xop_213c_0, 8508 }, /* MOVE */
-{ xop_2140_0, 8512 }, /* MOVE */
-{ xop_2148_0, 8520 }, /* MOVE */
-{ xop_2150_0, 8528 }, /* MOVE */
-{ xop_2158_0, 8536 }, /* MOVE */
-{ xop_2160_0, 8544 }, /* MOVE */
-{ xop_2168_0, 8552 }, /* MOVE */
-{ xop_2170_0, 8560 }, /* MOVE */
-{ xop_2178_0, 8568 }, /* MOVE */
-{ xop_2179_0, 8569 }, /* MOVE */
-{ xop_217a_0, 8570 }, /* MOVE */
-{ xop_217b_0, 8571 }, /* MOVE */
-{ xop_217c_0, 8572 }, /* MOVE */
-{ xop_2180_0, 8576 }, /* MOVE */
-{ xop_2188_0, 8584 }, /* MOVE */
-{ xop_2190_0, 8592 }, /* MOVE */
-{ xop_2198_0, 8600 }, /* MOVE */
-{ xop_21a0_0, 8608 }, /* MOVE */
-{ xop_21a8_0, 8616 }, /* MOVE */
-{ xop_21b0_0, 8624 }, /* MOVE */
-{ xop_21b8_0, 8632 }, /* MOVE */
-{ xop_21b9_0, 8633 }, /* MOVE */
-{ xop_21ba_0, 8634 }, /* MOVE */
-{ xop_21bb_0, 8635 }, /* MOVE */
-{ xop_21bc_0, 8636 }, /* MOVE */
-{ xop_21c0_0, 8640 }, /* MOVE */
-{ xop_21c8_0, 8648 }, /* MOVE */
-{ xop_21d0_0, 8656 }, /* MOVE */
-{ xop_21d8_0, 8664 }, /* MOVE */
-{ xop_21e0_0, 8672 }, /* MOVE */
-{ xop_21e8_0, 8680 }, /* MOVE */
-{ xop_21f0_0, 8688 }, /* MOVE */
-{ xop_21f8_0, 8696 }, /* MOVE */
-{ xop_21f9_0, 8697 }, /* MOVE */
-{ xop_21fa_0, 8698 }, /* MOVE */
-{ xop_21fb_0, 8699 }, /* MOVE */
-{ xop_21fc_0, 8700 }, /* MOVE */
-{ xop_23c0_0, 9152 }, /* MOVE */
-{ xop_23c8_0, 9160 }, /* MOVE */
-{ xop_23d0_0, 9168 }, /* MOVE */
-{ xop_23d8_0, 9176 }, /* MOVE */
-{ xop_23e0_0, 9184 }, /* MOVE */
-{ xop_23e8_0, 9192 }, /* MOVE */
-{ xop_23f0_0, 9200 }, /* MOVE */
-{ xop_23f8_0, 9208 }, /* MOVE */
-{ xop_23f9_0, 9209 }, /* MOVE */
-{ xop_23fa_0, 9210 }, /* MOVE */
-{ xop_23fb_0, 9211 }, /* MOVE */
-{ xop_23fc_0, 9212 }, /* MOVE */
-{ xop_3000_0, 12288 }, /* MOVE */
-{ xop_3008_0, 12296 }, /* MOVE */
-{ xop_3010_0, 12304 }, /* MOVE */
-{ xop_3018_0, 12312 }, /* MOVE */
-{ xop_3020_0, 12320 }, /* MOVE */
-{ xop_3028_0, 12328 }, /* MOVE */
-{ xop_3030_0, 12336 }, /* MOVE */
-{ xop_3038_0, 12344 }, /* MOVE */
-{ xop_3039_0, 12345 }, /* MOVE */
-{ xop_303a_0, 12346 }, /* MOVE */
-{ xop_303b_0, 12347 }, /* MOVE */
-{ xop_303c_0, 12348 }, /* MOVE */
-{ xop_3040_0, 12352 }, /* MOVEA */
-{ xop_3048_0, 12360 }, /* MOVEA */
-{ xop_3050_0, 12368 }, /* MOVEA */
-{ xop_3058_0, 12376 }, /* MOVEA */
-{ xop_3060_0, 12384 }, /* MOVEA */
-{ xop_3068_0, 12392 }, /* MOVEA */
-{ xop_3070_0, 12400 }, /* MOVEA */
-{ xop_3078_0, 12408 }, /* MOVEA */
-{ xop_3079_0, 12409 }, /* MOVEA */
-{ xop_307a_0, 12410 }, /* MOVEA */
-{ xop_307b_0, 12411 }, /* MOVEA */
-{ xop_307c_0, 12412 }, /* MOVEA */
-{ xop_3080_0, 12416 }, /* MOVE */
-{ xop_3088_0, 12424 }, /* MOVE */
-{ xop_3090_0, 12432 }, /* MOVE */
-{ xop_3098_0, 12440 }, /* MOVE */
-{ xop_30a0_0, 12448 }, /* MOVE */
-{ xop_30a8_0, 12456 }, /* MOVE */
-{ xop_30b0_0, 12464 }, /* MOVE */
-{ xop_30b8_0, 12472 }, /* MOVE */
-{ xop_30b9_0, 12473 }, /* MOVE */
-{ xop_30ba_0, 12474 }, /* MOVE */
-{ xop_30bb_0, 12475 }, /* MOVE */
-{ xop_30bc_0, 12476 }, /* MOVE */
-{ xop_30c0_0, 12480 }, /* MOVE */
-{ xop_30c8_0, 12488 }, /* MOVE */
-{ xop_30d0_0, 12496 }, /* MOVE */
-{ xop_30d8_0, 12504 }, /* MOVE */
-{ xop_30e0_0, 12512 }, /* MOVE */
-{ xop_30e8_0, 12520 }, /* MOVE */
-{ xop_30f0_0, 12528 }, /* MOVE */
-{ xop_30f8_0, 12536 }, /* MOVE */
-{ xop_30f9_0, 12537 }, /* MOVE */
-{ xop_30fa_0, 12538 }, /* MOVE */
-{ xop_30fb_0, 12539 }, /* MOVE */
-{ xop_30fc_0, 12540 }, /* MOVE */
-{ xop_3100_0, 12544 }, /* MOVE */
-{ xop_3108_0, 12552 }, /* MOVE */
-{ xop_3110_0, 12560 }, /* MOVE */
-{ xop_3118_0, 12568 }, /* MOVE */
-{ xop_3120_0, 12576 }, /* MOVE */
-{ xop_3128_0, 12584 }, /* MOVE */
-{ xop_3130_0, 12592 }, /* MOVE */
-{ xop_3138_0, 12600 }, /* MOVE */
-{ xop_3139_0, 12601 }, /* MOVE */
-{ xop_313a_0, 12602 }, /* MOVE */
-{ xop_313b_0, 12603 }, /* MOVE */
-{ xop_313c_0, 12604 }, /* MOVE */
-{ xop_3140_0, 12608 }, /* MOVE */
-{ xop_3148_0, 12616 }, /* MOVE */
-{ xop_3150_0, 12624 }, /* MOVE */
-{ xop_3158_0, 12632 }, /* MOVE */
-{ xop_3160_0, 12640 }, /* MOVE */
-{ xop_3168_0, 12648 }, /* MOVE */
-{ xop_3170_0, 12656 }, /* MOVE */
-{ xop_3178_0, 12664 }, /* MOVE */
-{ xop_3179_0, 12665 }, /* MOVE */
-{ xop_317a_0, 12666 }, /* MOVE */
-{ xop_317b_0, 12667 }, /* MOVE */
-{ xop_317c_0, 12668 }, /* MOVE */
-{ xop_3180_0, 12672 }, /* MOVE */
-{ xop_3188_0, 12680 }, /* MOVE */
-{ xop_3190_0, 12688 }, /* MOVE */
-{ xop_3198_0, 12696 }, /* MOVE */
-{ xop_31a0_0, 12704 }, /* MOVE */
-{ xop_31a8_0, 12712 }, /* MOVE */
-{ xop_31b0_0, 12720 }, /* MOVE */
-{ xop_31b8_0, 12728 }, /* MOVE */
-{ xop_31b9_0, 12729 }, /* MOVE */
-{ xop_31ba_0, 12730 }, /* MOVE */
-{ xop_31bb_0, 12731 }, /* MOVE */
-{ xop_31bc_0, 12732 }, /* MOVE */
-{ xop_31c0_0, 12736 }, /* MOVE */
-{ xop_31c8_0, 12744 }, /* MOVE */
-{ xop_31d0_0, 12752 }, /* MOVE */
-{ xop_31d8_0, 12760 }, /* MOVE */
-{ xop_31e0_0, 12768 }, /* MOVE */
-{ xop_31e8_0, 12776 }, /* MOVE */
-{ xop_31f0_0, 12784 }, /* MOVE */
-{ xop_31f8_0, 12792 }, /* MOVE */
-{ xop_31f9_0, 12793 }, /* MOVE */
-{ xop_31fa_0, 12794 }, /* MOVE */
-{ xop_31fb_0, 12795 }, /* MOVE */
-{ xop_31fc_0, 12796 }, /* MOVE */
-{ xop_33c0_0, 13248 }, /* MOVE */
-{ xop_33c8_0, 13256 }, /* MOVE */
-{ xop_33d0_0, 13264 }, /* MOVE */
-{ xop_33d8_0, 13272 }, /* MOVE */
-{ xop_33e0_0, 13280 }, /* MOVE */
-{ xop_33e8_0, 13288 }, /* MOVE */
-{ xop_33f0_0, 13296 }, /* MOVE */
-{ xop_33f8_0, 13304 }, /* MOVE */
-{ xop_33f9_0, 13305 }, /* MOVE */
-{ xop_33fa_0, 13306 }, /* MOVE */
-{ xop_33fb_0, 13307 }, /* MOVE */
-{ xop_33fc_0, 13308 }, /* MOVE */
-{ xop_4000_0, 16384 }, /* NEGX */
-{ xop_4010_0, 16400 }, /* NEGX */
-{ xop_4018_0, 16408 }, /* NEGX */
-{ xop_4020_0, 16416 }, /* NEGX */
-{ xop_4028_0, 16424 }, /* NEGX */
-{ xop_4030_0, 16432 }, /* NEGX */
-{ xop_4038_0, 16440 }, /* NEGX */
-{ xop_4039_0, 16441 }, /* NEGX */
-{ xop_4040_0, 16448 }, /* NEGX */
-{ xop_4050_0, 16464 }, /* NEGX */
-{ xop_4058_0, 16472 }, /* NEGX */
-{ xop_4060_0, 16480 }, /* NEGX */
-{ xop_4068_0, 16488 }, /* NEGX */
-{ xop_4070_0, 16496 }, /* NEGX */
-{ xop_4078_0, 16504 }, /* NEGX */
-{ xop_4079_0, 16505 }, /* NEGX */
-{ xop_4080_0, 16512 }, /* NEGX */
-{ xop_4090_0, 16528 }, /* NEGX */
-{ xop_4098_0, 16536 }, /* NEGX */
-{ xop_40a0_0, 16544 }, /* NEGX */
-{ xop_40a8_0, 16552 }, /* NEGX */
-{ xop_40b0_0, 16560 }, /* NEGX */
-{ xop_40b8_0, 16568 }, /* NEGX */
-{ xop_40b9_0, 16569 }, /* NEGX */
-{ xop_40c0_0, 16576 }, /* MVSR2 */
-{ xop_40d0_0, 16592 }, /* MVSR2 */
-{ xop_40d8_0, 16600 }, /* MVSR2 */
-{ xop_40e0_0, 16608 }, /* MVSR2 */
-{ xop_40e8_0, 16616 }, /* MVSR2 */
-{ xop_40f0_0, 16624 }, /* MVSR2 */
-{ xop_40f8_0, 16632 }, /* MVSR2 */
-{ xop_40f9_0, 16633 }, /* MVSR2 */
-{ xop_4100_0, 16640 }, /* CHK */
-{ xop_4110_0, 16656 }, /* CHK */
-{ xop_4118_0, 16664 }, /* CHK */
-{ xop_4120_0, 16672 }, /* CHK */
-{ xop_4128_0, 16680 }, /* CHK */
-{ xop_4130_0, 16688 }, /* CHK */
-{ xop_4138_0, 16696 }, /* CHK */
-{ xop_4139_0, 16697 }, /* CHK */
-{ xop_413a_0, 16698 }, /* CHK */
-{ xop_413b_0, 16699 }, /* CHK */
-{ xop_413c_0, 16700 }, /* CHK */
-{ xop_4180_0, 16768 }, /* CHK */
-{ xop_4190_0, 16784 }, /* CHK */
-{ xop_4198_0, 16792 }, /* CHK */
-{ xop_41a0_0, 16800 }, /* CHK */
-{ xop_41a8_0, 16808 }, /* CHK */
-{ xop_41b0_0, 16816 }, /* CHK */
-{ xop_41b8_0, 16824 }, /* CHK */
-{ xop_41b9_0, 16825 }, /* CHK */
-{ xop_41ba_0, 16826 }, /* CHK */
-{ xop_41bb_0, 16827 }, /* CHK */
-{ xop_41bc_0, 16828 }, /* CHK */
-{ xop_41d0_0, 16848 }, /* LEA */
-{ xop_41e8_0, 16872 }, /* LEA */
-{ xop_41f0_0, 16880 }, /* LEA */
-{ xop_41f8_0, 16888 }, /* LEA */
-{ xop_41f9_0, 16889 }, /* LEA */
-{ xop_41fa_0, 16890 }, /* LEA */
-{ xop_41fb_0, 16891 }, /* LEA */
-{ xop_4200_0, 16896 }, /* CLR */
-{ xop_4210_0, 16912 }, /* CLR */
-{ xop_4218_0, 16920 }, /* CLR */
-{ xop_4220_0, 16928 }, /* CLR */
-{ xop_4228_0, 16936 }, /* CLR */
-{ xop_4230_0, 16944 }, /* CLR */
-{ xop_4238_0, 16952 }, /* CLR */
-{ xop_4239_0, 16953 }, /* CLR */
-{ xop_4240_0, 16960 }, /* CLR */
-{ xop_4250_0, 16976 }, /* CLR */
-{ xop_4258_0, 16984 }, /* CLR */
-{ xop_4260_0, 16992 }, /* CLR */
-{ xop_4268_0, 17000 }, /* CLR */
-{ xop_4270_0, 17008 }, /* CLR */
-{ xop_4278_0, 17016 }, /* CLR */
-{ xop_4279_0, 17017 }, /* CLR */
-{ xop_4280_0, 17024 }, /* CLR */
-{ xop_4290_0, 17040 }, /* CLR */
-{ xop_4298_0, 17048 }, /* CLR */
-{ xop_42a0_0, 17056 }, /* CLR */
-{ xop_42a8_0, 17064 }, /* CLR */
-{ xop_42b0_0, 17072 }, /* CLR */
-{ xop_42b8_0, 17080 }, /* CLR */
-{ xop_42b9_0, 17081 }, /* CLR */
-{ xop_42c0_0, 17088 }, /* MVSR2 */
-{ xop_42d0_0, 17104 }, /* MVSR2 */
-{ xop_42d8_0, 17112 }, /* MVSR2 */
-{ xop_42e0_0, 17120 }, /* MVSR2 */
-{ xop_42e8_0, 17128 }, /* MVSR2 */
-{ xop_42f0_0, 17136 }, /* MVSR2 */
-{ xop_42f8_0, 17144 }, /* MVSR2 */
-{ xop_42f9_0, 17145 }, /* MVSR2 */
-{ xop_4400_0, 17408 }, /* NEG */
-{ xop_4410_0, 17424 }, /* NEG */
-{ xop_4418_0, 17432 }, /* NEG */
-{ xop_4420_0, 17440 }, /* NEG */
-{ xop_4428_0, 17448 }, /* NEG */
-{ xop_4430_0, 17456 }, /* NEG */
-{ xop_4438_0, 17464 }, /* NEG */
-{ xop_4439_0, 17465 }, /* NEG */
-{ xop_4440_0, 17472 }, /* NEG */
-{ xop_4450_0, 17488 }, /* NEG */
-{ xop_4458_0, 17496 }, /* NEG */
-{ xop_4460_0, 17504 }, /* NEG */
-{ xop_4468_0, 17512 }, /* NEG */
-{ xop_4470_0, 17520 }, /* NEG */
-{ xop_4478_0, 17528 }, /* NEG */
-{ xop_4479_0, 17529 }, /* NEG */
-{ xop_4480_0, 17536 }, /* NEG */
-{ xop_4490_0, 17552 }, /* NEG */
-{ xop_4498_0, 17560 }, /* NEG */
-{ xop_44a0_0, 17568 }, /* NEG */
-{ xop_44a8_0, 17576 }, /* NEG */
-{ xop_44b0_0, 17584 }, /* NEG */
-{ xop_44b8_0, 17592 }, /* NEG */
-{ xop_44b9_0, 17593 }, /* NEG */
-{ xop_44c0_0, 17600 }, /* MV2SR */
-{ xop_44d0_0, 17616 }, /* MV2SR */
-{ xop_44d8_0, 17624 }, /* MV2SR */
-{ xop_44e0_0, 17632 }, /* MV2SR */
-{ xop_44e8_0, 17640 }, /* MV2SR */
-{ xop_44f0_0, 17648 }, /* MV2SR */
-{ xop_44f8_0, 17656 }, /* MV2SR */
-{ xop_44f9_0, 17657 }, /* MV2SR */
-{ xop_44fa_0, 17658 }, /* MV2SR */
-{ xop_44fb_0, 17659 }, /* MV2SR */
-{ xop_44fc_0, 17660 }, /* MV2SR */
-{ xop_4600_0, 17920 }, /* NOT */
-{ xop_4610_0, 17936 }, /* NOT */
-{ xop_4618_0, 17944 }, /* NOT */
-{ xop_4620_0, 17952 }, /* NOT */
-{ xop_4628_0, 17960 }, /* NOT */
-{ xop_4630_0, 17968 }, /* NOT */
-{ xop_4638_0, 17976 }, /* NOT */
-{ xop_4639_0, 17977 }, /* NOT */
-{ xop_4640_0, 17984 }, /* NOT */
-{ xop_4650_0, 18000 }, /* NOT */
-{ xop_4658_0, 18008 }, /* NOT */
-{ xop_4660_0, 18016 }, /* NOT */
-{ xop_4668_0, 18024 }, /* NOT */
-{ xop_4670_0, 18032 }, /* NOT */
-{ xop_4678_0, 18040 }, /* NOT */
-{ xop_4679_0, 18041 }, /* NOT */
-{ xop_4680_0, 18048 }, /* NOT */
-{ xop_4690_0, 18064 }, /* NOT */
-{ xop_4698_0, 18072 }, /* NOT */
-{ xop_46a0_0, 18080 }, /* NOT */
-{ xop_46a8_0, 18088 }, /* NOT */
-{ xop_46b0_0, 18096 }, /* NOT */
-{ xop_46b8_0, 18104 }, /* NOT */
-{ xop_46b9_0, 18105 }, /* NOT */
-{ xop_46c0_0, 18112 }, /* MV2SR */
-{ xop_46d0_0, 18128 }, /* MV2SR */
-{ xop_46d8_0, 18136 }, /* MV2SR */
-{ xop_46e0_0, 18144 }, /* MV2SR */
-{ xop_46e8_0, 18152 }, /* MV2SR */
-{ xop_46f0_0, 18160 }, /* MV2SR */
-{ xop_46f8_0, 18168 }, /* MV2SR */
-{ xop_46f9_0, 18169 }, /* MV2SR */
-{ xop_46fa_0, 18170 }, /* MV2SR */
-{ xop_46fb_0, 18171 }, /* MV2SR */
-{ xop_46fc_0, 18172 }, /* MV2SR */
-{ xop_4800_0, 18432 }, /* NBCD */
-{ xop_4808_0, 18440 }, /* LINK */
-{ xop_4810_0, 18448 }, /* NBCD */
-{ xop_4818_0, 18456 }, /* NBCD */
-{ xop_4820_0, 18464 }, /* NBCD */
-{ xop_4828_0, 18472 }, /* NBCD */
-{ xop_4830_0, 18480 }, /* NBCD */
-{ xop_4838_0, 18488 }, /* NBCD */
-{ xop_4839_0, 18489 }, /* NBCD */
-{ xop_4840_0, 18496 }, /* SWAP */
-{ xop_4848_0, 18504 }, /* BKPT */
-{ xop_4850_0, 18512 }, /* PEA */
-{ xop_4868_0, 18536 }, /* PEA */
-{ xop_4870_0, 18544 }, /* PEA */
-{ xop_4878_0, 18552 }, /* PEA */
-{ xop_4879_0, 18553 }, /* PEA */
-{ xop_487a_0, 18554 }, /* PEA */
-{ xop_487b_0, 18555 }, /* PEA */
-{ xop_4880_0, 18560 }, /* EXT */
-{ xop_4890_0, 18576 }, /* MVMLE */
-{ xop_48a0_0, 18592 }, /* MVMLE */
-{ xop_48a8_0, 18600 }, /* MVMLE */
-{ xop_48b0_0, 18608 }, /* MVMLE */
-{ xop_48b8_0, 18616 }, /* MVMLE */
-{ xop_48b9_0, 18617 }, /* MVMLE */
-{ xop_48c0_0, 18624 }, /* EXT */
-{ xop_48d0_0, 18640 }, /* MVMLE */
-{ xop_48e0_0, 18656 }, /* MVMLE */
-{ xop_48e8_0, 18664 }, /* MVMLE */
-{ xop_48f0_0, 18672 }, /* MVMLE */
-{ xop_48f8_0, 18680 }, /* MVMLE */
-{ xop_48f9_0, 18681 }, /* MVMLE */
-{ xop_49c0_0, 18880 }, /* EXT */
-{ xop_4a00_0, 18944 }, /* TST */
-{ xop_4a10_0, 18960 }, /* TST */
-{ xop_4a18_0, 18968 }, /* TST */
-{ xop_4a20_0, 18976 }, /* TST */
-{ xop_4a28_0, 18984 }, /* TST */
-{ xop_4a30_0, 18992 }, /* TST */
-{ xop_4a38_0, 19000 }, /* TST */
-{ xop_4a39_0, 19001 }, /* TST */
-{ xop_4a3a_0, 19002 }, /* TST */
-{ xop_4a3b_0, 19003 }, /* TST */
-{ xop_4a3c_0, 19004 }, /* TST */
-{ xop_4a40_0, 19008 }, /* TST */
-{ xop_4a48_0, 19016 }, /* TST */
-{ xop_4a50_0, 19024 }, /* TST */
-{ xop_4a58_0, 19032 }, /* TST */
-{ xop_4a60_0, 19040 }, /* TST */
-{ xop_4a68_0, 19048 }, /* TST */
-{ xop_4a70_0, 19056 }, /* TST */
-{ xop_4a78_0, 19064 }, /* TST */
-{ xop_4a79_0, 19065 }, /* TST */
-{ xop_4a7a_0, 19066 }, /* TST */
-{ xop_4a7b_0, 19067 }, /* TST */
-{ xop_4a7c_0, 19068 }, /* TST */
-{ xop_4a80_0, 19072 }, /* TST */
-{ xop_4a88_0, 19080 }, /* TST */
-{ xop_4a90_0, 19088 }, /* TST */
-{ xop_4a98_0, 19096 }, /* TST */
-{ xop_4aa0_0, 19104 }, /* TST */
-{ xop_4aa8_0, 19112 }, /* TST */
-{ xop_4ab0_0, 19120 }, /* TST */
-{ xop_4ab8_0, 19128 }, /* TST */
-{ xop_4ab9_0, 19129 }, /* TST */
-{ xop_4aba_0, 19130 }, /* TST */
-{ xop_4abb_0, 19131 }, /* TST */
-{ xop_4abc_0, 19132 }, /* TST */
-{ xop_4ac0_0, 19136 }, /* TAS */
-{ xop_4ad0_0, 19152 }, /* TAS */
-{ xop_4ad8_0, 19160 }, /* TAS */
-{ xop_4ae0_0, 19168 }, /* TAS */
-{ xop_4ae8_0, 19176 }, /* TAS */
-{ xop_4af0_0, 19184 }, /* TAS */
-{ xop_4af8_0, 19192 }, /* TAS */
-{ xop_4af9_0, 19193 }, /* TAS */
-{ xop_4c00_0, 19456 }, /* MULL */
-{ xop_4c10_0, 19472 }, /* MULL */
-{ xop_4c18_0, 19480 }, /* MULL */
-{ xop_4c20_0, 19488 }, /* MULL */
-{ xop_4c28_0, 19496 }, /* MULL */
-{ xop_4c30_0, 19504 }, /* MULL */
-{ xop_4c38_0, 19512 }, /* MULL */
-{ xop_4c39_0, 19513 }, /* MULL */
-{ xop_4c3a_0, 19514 }, /* MULL */
-{ xop_4c3b_0, 19515 }, /* MULL */
-{ xop_4c3c_0, 19516 }, /* MULL */
-{ xop_4c40_0, 19520 }, /* DIVL */
-{ xop_4c50_0, 19536 }, /* DIVL */
-{ xop_4c58_0, 19544 }, /* DIVL */
-{ xop_4c60_0, 19552 }, /* DIVL */
-{ xop_4c68_0, 19560 }, /* DIVL */
-{ xop_4c70_0, 19568 }, /* DIVL */
-{ xop_4c78_0, 19576 }, /* DIVL */
-{ xop_4c79_0, 19577 }, /* DIVL */
-{ xop_4c7a_0, 19578 }, /* DIVL */
-{ xop_4c7b_0, 19579 }, /* DIVL */
-{ xop_4c7c_0, 19580 }, /* DIVL */
-{ xop_4c90_0, 19600 }, /* MVMEL */
-{ xop_4c98_0, 19608 }, /* MVMEL */
-{ xop_4ca8_0, 19624 }, /* MVMEL */
-{ xop_4cb0_0, 19632 }, /* MVMEL */
-{ xop_4cb8_0, 19640 }, /* MVMEL */
-{ xop_4cb9_0, 19641 }, /* MVMEL */
-{ xop_4cba_0, 19642 }, /* MVMEL */
-{ xop_4cbb_0, 19643 }, /* MVMEL */
-{ xop_4cd0_0, 19664 }, /* MVMEL */
-{ xop_4cd8_0, 19672 }, /* MVMEL */
-{ xop_4ce8_0, 19688 }, /* MVMEL */
-{ xop_4cf0_0, 19696 }, /* MVMEL */
-{ xop_4cf8_0, 19704 }, /* MVMEL */
-{ xop_4cf9_0, 19705 }, /* MVMEL */
-{ xop_4cfa_0, 19706 }, /* MVMEL */
-{ xop_4cfb_0, 19707 }, /* MVMEL */
-{ xop_4e40_0, 20032 }, /* TRAP */
-{ xop_4e50_0, 20048 }, /* LINK */
-{ xop_4e58_0, 20056 }, /* UNLK */
-{ xop_4e60_0, 20064 }, /* MVR2USP */
-{ xop_4e68_0, 20072 }, /* MVUSP2R */
-{ xop_4e70_0, 20080 }, /* RESET */
-{ xop_4e71_0, 20081 }, /* NOP */
-{ xop_4e72_0, 20082 }, /* STOP */
-{ xop_4e73_0, 20083 }, /* RTE */
-{ xop_4e74_0, 20084 }, /* RTD */
-{ xop_4e75_0, 20085 }, /* RTS */
-{ xop_4e76_0, 20086 }, /* TRAPV */
-{ xop_4e77_0, 20087 }, /* RTR */
-{ xop_4e7a_0, 20090 }, /* MOVEC2 */
-{ xop_4e7b_0, 20091 }, /* MOVE2C */
-{ xop_4e90_0, 20112 }, /* JSR */
-{ xop_4ea8_0, 20136 }, /* JSR */
-{ xop_4eb0_0, 20144 }, /* JSR */
-{ xop_4eb8_0, 20152 }, /* JSR */
-{ xop_4eb9_0, 20153 }, /* JSR */
-{ xop_4eba_0, 20154 }, /* JSR */
-{ xop_4ebb_0, 20155 }, /* JSR */
-{ xop_4ed0_0, 20176 }, /* JMP */
-{ xop_4ee8_0, 20200 }, /* JMP */
-{ xop_4ef0_0, 20208 }, /* JMP */
-{ xop_4ef8_0, 20216 }, /* JMP */
-{ xop_4ef9_0, 20217 }, /* JMP */
-{ xop_4efa_0, 20218 }, /* JMP */
-{ xop_4efb_0, 20219 }, /* JMP */
-{ xop_5000_0, 20480 }, /* ADD */
-{ xop_5010_0, 20496 }, /* ADD */
-{ xop_5018_0, 20504 }, /* ADD */
-{ xop_5020_0, 20512 }, /* ADD */
-{ xop_5028_0, 20520 }, /* ADD */
-{ xop_5030_0, 20528 }, /* ADD */
-{ xop_5038_0, 20536 }, /* ADD */
-{ xop_5039_0, 20537 }, /* ADD */
-{ xop_5040_0, 20544 }, /* ADD */
-{ xop_5048_0, 20552 }, /* ADDA */
-{ xop_5050_0, 20560 }, /* ADD */
-{ xop_5058_0, 20568 }, /* ADD */
-{ xop_5060_0, 20576 }, /* ADD */
-{ xop_5068_0, 20584 }, /* ADD */
-{ xop_5070_0, 20592 }, /* ADD */
-{ xop_5078_0, 20600 }, /* ADD */
-{ xop_5079_0, 20601 }, /* ADD */
-{ xop_5080_0, 20608 }, /* ADD */
-{ xop_5088_0, 20616 }, /* ADDA */
-{ xop_5090_0, 20624 }, /* ADD */
-{ xop_5098_0, 20632 }, /* ADD */
-{ xop_50a0_0, 20640 }, /* ADD */
-{ xop_50a8_0, 20648 }, /* ADD */
-{ xop_50b0_0, 20656 }, /* ADD */
-{ xop_50b8_0, 20664 }, /* ADD */
-{ xop_50b9_0, 20665 }, /* ADD */
-{ xop_50c0_0, 20672 }, /* Scc */
-{ xop_50c8_0, 20680 }, /* DBcc */
-{ xop_50d0_0, 20688 }, /* Scc */
-{ xop_50d8_0, 20696 }, /* Scc */
-{ xop_50e0_0, 20704 }, /* Scc */
-{ xop_50e8_0, 20712 }, /* Scc */
-{ xop_50f0_0, 20720 }, /* Scc */
-{ xop_50f8_0, 20728 }, /* Scc */
-{ xop_50f9_0, 20729 }, /* Scc */
-{ xop_50fa_0, 20730 }, /* TRAPcc */
-{ xop_50fb_0, 20731 }, /* TRAPcc */
-{ xop_50fc_0, 20732 }, /* TRAPcc */
-{ xop_5100_0, 20736 }, /* SUB */
-{ xop_5110_0, 20752 }, /* SUB */
-{ xop_5118_0, 20760 }, /* SUB */
-{ xop_5120_0, 20768 }, /* SUB */
-{ xop_5128_0, 20776 }, /* SUB */
-{ xop_5130_0, 20784 }, /* SUB */
-{ xop_5138_0, 20792 }, /* SUB */
-{ xop_5139_0, 20793 }, /* SUB */
-{ xop_5140_0, 20800 }, /* SUB */
-{ xop_5148_0, 20808 }, /* SUBA */
-{ xop_5150_0, 20816 }, /* SUB */
-{ xop_5158_0, 20824 }, /* SUB */
-{ xop_5160_0, 20832 }, /* SUB */
-{ xop_5168_0, 20840 }, /* SUB */
-{ xop_5170_0, 20848 }, /* SUB */
-{ xop_5178_0, 20856 }, /* SUB */
-{ xop_5179_0, 20857 }, /* SUB */
-{ xop_5180_0, 20864 }, /* SUB */
-{ xop_5188_0, 20872 }, /* SUBA */
-{ xop_5190_0, 20880 }, /* SUB */
-{ xop_5198_0, 20888 }, /* SUB */
-{ xop_51a0_0, 20896 }, /* SUB */
-{ xop_51a8_0, 20904 }, /* SUB */
-{ xop_51b0_0, 20912 }, /* SUB */
-{ xop_51b8_0, 20920 }, /* SUB */
-{ xop_51b9_0, 20921 }, /* SUB */
-{ xop_51c0_0, 20928 }, /* Scc */
-{ xop_51c8_0, 20936 }, /* DBcc */
-{ xop_51d0_0, 20944 }, /* Scc */
-{ xop_51d8_0, 20952 }, /* Scc */
-{ xop_51e0_0, 20960 }, /* Scc */
-{ xop_51e8_0, 20968 }, /* Scc */
-{ xop_51f0_0, 20976 }, /* Scc */
-{ xop_51f8_0, 20984 }, /* Scc */
-{ xop_51f9_0, 20985 }, /* Scc */
-{ xop_51fa_0, 20986 }, /* TRAPcc */
-{ xop_51fb_0, 20987 }, /* TRAPcc */
-{ xop_51fc_0, 20988 }, /* TRAPcc */
-{ xop_52c0_0, 21184 }, /* Scc */
-{ xop_52c8_0, 21192 }, /* DBcc */
-{ xop_52d0_0, 21200 }, /* Scc */
-{ xop_52d8_0, 21208 }, /* Scc */
-{ xop_52e0_0, 21216 }, /* Scc */
-{ xop_52e8_0, 21224 }, /* Scc */
-{ xop_52f0_0, 21232 }, /* Scc */
-{ xop_52f8_0, 21240 }, /* Scc */
-{ xop_52f9_0, 21241 }, /* Scc */
-{ xop_52fa_0, 21242 }, /* TRAPcc */
-{ xop_52fb_0, 21243 }, /* TRAPcc */
-{ xop_52fc_0, 21244 }, /* TRAPcc */
-{ xop_53c0_0, 21440 }, /* Scc */
-{ xop_53c8_0, 21448 }, /* DBcc */
-{ xop_53d0_0, 21456 }, /* Scc */
-{ xop_53d8_0, 21464 }, /* Scc */
-{ xop_53e0_0, 21472 }, /* Scc */
-{ xop_53e8_0, 21480 }, /* Scc */
-{ xop_53f0_0, 21488 }, /* Scc */
-{ xop_53f8_0, 21496 }, /* Scc */
-{ xop_53f9_0, 21497 }, /* Scc */
-{ xop_53fa_0, 21498 }, /* TRAPcc */
-{ xop_53fb_0, 21499 }, /* TRAPcc */
-{ xop_53fc_0, 21500 }, /* TRAPcc */
-{ xop_54c0_0, 21696 }, /* Scc */
-{ xop_54c8_0, 21704 }, /* DBcc */
-{ xop_54d0_0, 21712 }, /* Scc */
-{ xop_54d8_0, 21720 }, /* Scc */
-{ xop_54e0_0, 21728 }, /* Scc */
-{ xop_54e8_0, 21736 }, /* Scc */
-{ xop_54f0_0, 21744 }, /* Scc */
-{ xop_54f8_0, 21752 }, /* Scc */
-{ xop_54f9_0, 21753 }, /* Scc */
-{ xop_54fa_0, 21754 }, /* TRAPcc */
-{ xop_54fb_0, 21755 }, /* TRAPcc */
-{ xop_54fc_0, 21756 }, /* TRAPcc */
-{ xop_55c0_0, 21952 }, /* Scc */
-{ xop_55c8_0, 21960 }, /* DBcc */
-{ xop_55d0_0, 21968 }, /* Scc */
-{ xop_55d8_0, 21976 }, /* Scc */
-{ xop_55e0_0, 21984 }, /* Scc */
-{ xop_55e8_0, 21992 }, /* Scc */
-{ xop_55f0_0, 22000 }, /* Scc */
-{ xop_55f8_0, 22008 }, /* Scc */
-{ xop_55f9_0, 22009 }, /* Scc */
-{ xop_55fa_0, 22010 }, /* TRAPcc */
-{ xop_55fb_0, 22011 }, /* TRAPcc */
-{ xop_55fc_0, 22012 }, /* TRAPcc */
-{ xop_56c0_0, 22208 }, /* Scc */
-{ xop_56c8_0, 22216 }, /* DBcc */
-{ xop_56d0_0, 22224 }, /* Scc */
-{ xop_56d8_0, 22232 }, /* Scc */
-{ xop_56e0_0, 22240 }, /* Scc */
-{ xop_56e8_0, 22248 }, /* Scc */
-{ xop_56f0_0, 22256 }, /* Scc */
-{ xop_56f8_0, 22264 }, /* Scc */
-{ xop_56f9_0, 22265 }, /* Scc */
-{ xop_56fa_0, 22266 }, /* TRAPcc */
-{ xop_56fb_0, 22267 }, /* TRAPcc */
-{ xop_56fc_0, 22268 }, /* TRAPcc */
-{ xop_57c0_0, 22464 }, /* Scc */
-{ xop_57c8_0, 22472 }, /* DBcc */
-{ xop_57d0_0, 22480 }, /* Scc */
-{ xop_57d8_0, 22488 }, /* Scc */
-{ xop_57e0_0, 22496 }, /* Scc */
-{ xop_57e8_0, 22504 }, /* Scc */
-{ xop_57f0_0, 22512 }, /* Scc */
-{ xop_57f8_0, 22520 }, /* Scc */
-{ xop_57f9_0, 22521 }, /* Scc */
-{ xop_57fa_0, 22522 }, /* TRAPcc */
-{ xop_57fb_0, 22523 }, /* TRAPcc */
-{ xop_57fc_0, 22524 }, /* TRAPcc */
-{ xop_58c0_0, 22720 }, /* Scc */
-{ xop_58c8_0, 22728 }, /* DBcc */
-{ xop_58d0_0, 22736 }, /* Scc */
-{ xop_58d8_0, 22744 }, /* Scc */
-{ xop_58e0_0, 22752 }, /* Scc */
-{ xop_58e8_0, 22760 }, /* Scc */
-{ xop_58f0_0, 22768 }, /* Scc */
-{ xop_58f8_0, 22776 }, /* Scc */
-{ xop_58f9_0, 22777 }, /* Scc */
-{ xop_58fa_0, 22778 }, /* TRAPcc */
-{ xop_58fb_0, 22779 }, /* TRAPcc */
-{ xop_58fc_0, 22780 }, /* TRAPcc */
-{ xop_59c0_0, 22976 }, /* Scc */
-{ xop_59c8_0, 22984 }, /* DBcc */
-{ xop_59d0_0, 22992 }, /* Scc */
-{ xop_59d8_0, 23000 }, /* Scc */
-{ xop_59e0_0, 23008 }, /* Scc */
-{ xop_59e8_0, 23016 }, /* Scc */
-{ xop_59f0_0, 23024 }, /* Scc */
-{ xop_59f8_0, 23032 }, /* Scc */
-{ xop_59f9_0, 23033 }, /* Scc */
-{ xop_59fa_0, 23034 }, /* TRAPcc */
-{ xop_59fb_0, 23035 }, /* TRAPcc */
-{ xop_59fc_0, 23036 }, /* TRAPcc */
-{ xop_5ac0_0, 23232 }, /* Scc */
-{ xop_5ac8_0, 23240 }, /* DBcc */
-{ xop_5ad0_0, 23248 }, /* Scc */
-{ xop_5ad8_0, 23256 }, /* Scc */
-{ xop_5ae0_0, 23264 }, /* Scc */
-{ xop_5ae8_0, 23272 }, /* Scc */
-{ xop_5af0_0, 23280 }, /* Scc */
-{ xop_5af8_0, 23288 }, /* Scc */
-{ xop_5af9_0, 23289 }, /* Scc */
-{ xop_5afa_0, 23290 }, /* TRAPcc */
-{ xop_5afb_0, 23291 }, /* TRAPcc */
-{ xop_5afc_0, 23292 }, /* TRAPcc */
-{ xop_5bc0_0, 23488 }, /* Scc */
-{ xop_5bc8_0, 23496 }, /* DBcc */
-{ xop_5bd0_0, 23504 }, /* Scc */
-{ xop_5bd8_0, 23512 }, /* Scc */
-{ xop_5be0_0, 23520 }, /* Scc */
-{ xop_5be8_0, 23528 }, /* Scc */
-{ xop_5bf0_0, 23536 }, /* Scc */
-{ xop_5bf8_0, 23544 }, /* Scc */
-{ xop_5bf9_0, 23545 }, /* Scc */
-{ xop_5bfa_0, 23546 }, /* TRAPcc */
-{ xop_5bfb_0, 23547 }, /* TRAPcc */
-{ xop_5bfc_0, 23548 }, /* TRAPcc */
-{ xop_5cc0_0, 23744 }, /* Scc */
-{ xop_5cc8_0, 23752 }, /* DBcc */
-{ xop_5cd0_0, 23760 }, /* Scc */
-{ xop_5cd8_0, 23768 }, /* Scc */
-{ xop_5ce0_0, 23776 }, /* Scc */
-{ xop_5ce8_0, 23784 }, /* Scc */
-{ xop_5cf0_0, 23792 }, /* Scc */
-{ xop_5cf8_0, 23800 }, /* Scc */
-{ xop_5cf9_0, 23801 }, /* Scc */
-{ xop_5cfa_0, 23802 }, /* TRAPcc */
-{ xop_5cfb_0, 23803 }, /* TRAPcc */
-{ xop_5cfc_0, 23804 }, /* TRAPcc */
-{ xop_5dc0_0, 24000 }, /* Scc */
-{ xop_5dc8_0, 24008 }, /* DBcc */
-{ xop_5dd0_0, 24016 }, /* Scc */
-{ xop_5dd8_0, 24024 }, /* Scc */
-{ xop_5de0_0, 24032 }, /* Scc */
-{ xop_5de8_0, 24040 }, /* Scc */
-{ xop_5df0_0, 24048 }, /* Scc */
-{ xop_5df8_0, 24056 }, /* Scc */
-{ xop_5df9_0, 24057 }, /* Scc */
-{ xop_5dfa_0, 24058 }, /* TRAPcc */
-{ xop_5dfb_0, 24059 }, /* TRAPcc */
-{ xop_5dfc_0, 24060 }, /* TRAPcc */
-{ xop_5ec0_0, 24256 }, /* Scc */
-{ xop_5ec8_0, 24264 }, /* DBcc */
-{ xop_5ed0_0, 24272 }, /* Scc */
-{ xop_5ed8_0, 24280 }, /* Scc */
-{ xop_5ee0_0, 24288 }, /* Scc */
-{ xop_5ee8_0, 24296 }, /* Scc */
-{ xop_5ef0_0, 24304 }, /* Scc */
-{ xop_5ef8_0, 24312 }, /* Scc */
-{ xop_5ef9_0, 24313 }, /* Scc */
-{ xop_5efa_0, 24314 }, /* TRAPcc */
-{ xop_5efb_0, 24315 }, /* TRAPcc */
-{ xop_5efc_0, 24316 }, /* TRAPcc */
-{ xop_5fc0_0, 24512 }, /* Scc */
-{ xop_5fc8_0, 24520 }, /* DBcc */
-{ xop_5fd0_0, 24528 }, /* Scc */
-{ xop_5fd8_0, 24536 }, /* Scc */
-{ xop_5fe0_0, 24544 }, /* Scc */
-{ xop_5fe8_0, 24552 }, /* Scc */
-{ xop_5ff0_0, 24560 }, /* Scc */
-{ xop_5ff8_0, 24568 }, /* Scc */
-{ xop_5ff9_0, 24569 }, /* Scc */
-{ xop_5ffa_0, 24570 }, /* TRAPcc */
-{ xop_5ffb_0, 24571 }, /* TRAPcc */
-{ xop_5ffc_0, 24572 }, /* TRAPcc */
-{ xop_6000_0, 24576 }, /* Bcc */
-{ xop_6001_0, 24577 }, /* Bcc */
-{ xop_60ff_0, 24831 }, /* Bcc */
-{ xop_6100_0, 24832 }, /* BSR */
-{ xop_6101_0, 24833 }, /* BSR */
-{ xop_61ff_0, 25087 }, /* BSR */
-{ xop_6200_0, 25088 }, /* Bcc */
-{ xop_6201_0, 25089 }, /* Bcc */
-{ xop_62ff_0, 25343 }, /* Bcc */
-{ xop_6300_0, 25344 }, /* Bcc */
-{ xop_6301_0, 25345 }, /* Bcc */
-{ xop_63ff_0, 25599 }, /* Bcc */
-{ xop_6400_0, 25600 }, /* Bcc */
-{ xop_6401_0, 25601 }, /* Bcc */
-{ xop_64ff_0, 25855 }, /* Bcc */
-{ xop_6500_0, 25856 }, /* Bcc */
-{ xop_6501_0, 25857 }, /* Bcc */
-{ xop_65ff_0, 26111 }, /* Bcc */
-{ xop_6600_0, 26112 }, /* Bcc */
-{ xop_6601_0, 26113 }, /* Bcc */
-{ xop_66ff_0, 26367 }, /* Bcc */
-{ xop_6700_0, 26368 }, /* Bcc */
-{ xop_6701_0, 26369 }, /* Bcc */
-{ xop_67ff_0, 26623 }, /* Bcc */
-{ xop_6800_0, 26624 }, /* Bcc */
-{ xop_6801_0, 26625 }, /* Bcc */
-{ xop_68ff_0, 26879 }, /* Bcc */
-{ xop_6900_0, 26880 }, /* Bcc */
-{ xop_6901_0, 26881 }, /* Bcc */
-{ xop_69ff_0, 27135 }, /* Bcc */
-{ xop_6a00_0, 27136 }, /* Bcc */
-{ xop_6a01_0, 27137 }, /* Bcc */
-{ xop_6aff_0, 27391 }, /* Bcc */
-{ xop_6b00_0, 27392 }, /* Bcc */
-{ xop_6b01_0, 27393 }, /* Bcc */
-{ xop_6bff_0, 27647 }, /* Bcc */
-{ xop_6c00_0, 27648 }, /* Bcc */
-{ xop_6c01_0, 27649 }, /* Bcc */
-{ xop_6cff_0, 27903 }, /* Bcc */
-{ xop_6d00_0, 27904 }, /* Bcc */
-{ xop_6d01_0, 27905 }, /* Bcc */
-{ xop_6dff_0, 28159 }, /* Bcc */
-{ xop_6e00_0, 28160 }, /* Bcc */
-{ xop_6e01_0, 28161 }, /* Bcc */
-{ xop_6eff_0, 28415 }, /* Bcc */
-{ xop_6f00_0, 28416 }, /* Bcc */
-{ xop_6f01_0, 28417 }, /* Bcc */
-{ xop_6fff_0, 28671 }, /* Bcc */
-{ xop_7000_0, 28672 }, /* MOVE */
-{ xop_8000_0, 32768 }, /* OR */
-{ xop_8010_0, 32784 }, /* OR */
-{ xop_8018_0, 32792 }, /* OR */
-{ xop_8020_0, 32800 }, /* OR */
-{ xop_8028_0, 32808 }, /* OR */
-{ xop_8030_0, 32816 }, /* OR */
-{ xop_8038_0, 32824 }, /* OR */
-{ xop_8039_0, 32825 }, /* OR */
-{ xop_803a_0, 32826 }, /* OR */
-{ xop_803b_0, 32827 }, /* OR */
-{ xop_803c_0, 32828 }, /* OR */
-{ xop_8040_0, 32832 }, /* OR */
-{ xop_8050_0, 32848 }, /* OR */
-{ xop_8058_0, 32856 }, /* OR */
-{ xop_8060_0, 32864 }, /* OR */
-{ xop_8068_0, 32872 }, /* OR */
-{ xop_8070_0, 32880 }, /* OR */
-{ xop_8078_0, 32888 }, /* OR */
-{ xop_8079_0, 32889 }, /* OR */
-{ xop_807a_0, 32890 }, /* OR */
-{ xop_807b_0, 32891 }, /* OR */
-{ xop_807c_0, 32892 }, /* OR */
-{ xop_8080_0, 32896 }, /* OR */
-{ xop_8090_0, 32912 }, /* OR */
-{ xop_8098_0, 32920 }, /* OR */
-{ xop_80a0_0, 32928 }, /* OR */
-{ xop_80a8_0, 32936 }, /* OR */
-{ xop_80b0_0, 32944 }, /* OR */
-{ xop_80b8_0, 32952 }, /* OR */
-{ xop_80b9_0, 32953 }, /* OR */
-{ xop_80ba_0, 32954 }, /* OR */
-{ xop_80bb_0, 32955 }, /* OR */
-{ xop_80bc_0, 32956 }, /* OR */
-{ xop_80c0_0, 32960 }, /* DIVU */
-{ xop_80d0_0, 32976 }, /* DIVU */
-{ xop_80d8_0, 32984 }, /* DIVU */
-{ xop_80e0_0, 32992 }, /* DIVU */
-{ xop_80e8_0, 33000 }, /* DIVU */
-{ xop_80f0_0, 33008 }, /* DIVU */
-{ xop_80f8_0, 33016 }, /* DIVU */
-{ xop_80f9_0, 33017 }, /* DIVU */
-{ xop_80fa_0, 33018 }, /* DIVU */
-{ xop_80fb_0, 33019 }, /* DIVU */
-{ xop_80fc_0, 33020 }, /* DIVU */
-{ xop_8100_0, 33024 }, /* SBCD */
-{ xop_8108_0, 33032 }, /* SBCD */
-{ xop_8110_0, 33040 }, /* OR */
-{ xop_8118_0, 33048 }, /* OR */
-{ xop_8120_0, 33056 }, /* OR */
-{ xop_8128_0, 33064 }, /* OR */
-{ xop_8130_0, 33072 }, /* OR */
-{ xop_8138_0, 33080 }, /* OR */
-{ xop_8139_0, 33081 }, /* OR */
-{ xop_8140_0, 33088 }, /* PACK */
-{ xop_8148_0, 33096 }, /* PACK */
-{ xop_8150_0, 33104 }, /* OR */
-{ xop_8158_0, 33112 }, /* OR */
-{ xop_8160_0, 33120 }, /* OR */
-{ xop_8168_0, 33128 }, /* OR */
-{ xop_8170_0, 33136 }, /* OR */
-{ xop_8178_0, 33144 }, /* OR */
-{ xop_8179_0, 33145 }, /* OR */
-{ xop_8180_0, 33152 }, /* UNPK */
-{ xop_8188_0, 33160 }, /* UNPK */
-{ xop_8190_0, 33168 }, /* OR */
-{ xop_8198_0, 33176 }, /* OR */
-{ xop_81a0_0, 33184 }, /* OR */
-{ xop_81a8_0, 33192 }, /* OR */
-{ xop_81b0_0, 33200 }, /* OR */
-{ xop_81b8_0, 33208 }, /* OR */
-{ xop_81b9_0, 33209 }, /* OR */
-{ xop_81c0_0, 33216 }, /* DIVS */
-{ xop_81d0_0, 33232 }, /* DIVS */
-{ xop_81d8_0, 33240 }, /* DIVS */
-{ xop_81e0_0, 33248 }, /* DIVS */
-{ xop_81e8_0, 33256 }, /* DIVS */
-{ xop_81f0_0, 33264 }, /* DIVS */
-{ xop_81f8_0, 33272 }, /* DIVS */
-{ xop_81f9_0, 33273 }, /* DIVS */
-{ xop_81fa_0, 33274 }, /* DIVS */
-{ xop_81fb_0, 33275 }, /* DIVS */
-{ xop_81fc_0, 33276 }, /* DIVS */
-{ xop_9000_0, 36864 }, /* SUB */
-{ xop_9010_0, 36880 }, /* SUB */
-{ xop_9018_0, 36888 }, /* SUB */
-{ xop_9020_0, 36896 }, /* SUB */
-{ xop_9028_0, 36904 }, /* SUB */
-{ xop_9030_0, 36912 }, /* SUB */
-{ xop_9038_0, 36920 }, /* SUB */
-{ xop_9039_0, 36921 }, /* SUB */
-{ xop_903a_0, 36922 }, /* SUB */
-{ xop_903b_0, 36923 }, /* SUB */
-{ xop_903c_0, 36924 }, /* SUB */
-{ xop_9040_0, 36928 }, /* SUB */
-{ xop_9048_0, 36936 }, /* SUB */
-{ xop_9050_0, 36944 }, /* SUB */
-{ xop_9058_0, 36952 }, /* SUB */
-{ xop_9060_0, 36960 }, /* SUB */
-{ xop_9068_0, 36968 }, /* SUB */
-{ xop_9070_0, 36976 }, /* SUB */
-{ xop_9078_0, 36984 }, /* SUB */
-{ xop_9079_0, 36985 }, /* SUB */
-{ xop_907a_0, 36986 }, /* SUB */
-{ xop_907b_0, 36987 }, /* SUB */
-{ xop_907c_0, 36988 }, /* SUB */
-{ xop_9080_0, 36992 }, /* SUB */
-{ xop_9088_0, 37000 }, /* SUB */
-{ xop_9090_0, 37008 }, /* SUB */
-{ xop_9098_0, 37016 }, /* SUB */
-{ xop_90a0_0, 37024 }, /* SUB */
-{ xop_90a8_0, 37032 }, /* SUB */
-{ xop_90b0_0, 37040 }, /* SUB */
-{ xop_90b8_0, 37048 }, /* SUB */
-{ xop_90b9_0, 37049 }, /* SUB */
-{ xop_90ba_0, 37050 }, /* SUB */
-{ xop_90bb_0, 37051 }, /* SUB */
-{ xop_90bc_0, 37052 }, /* SUB */
-{ xop_90c0_0, 37056 }, /* SUBA */
-{ xop_90c8_0, 37064 }, /* SUBA */
-{ xop_90d0_0, 37072 }, /* SUBA */
-{ xop_90d8_0, 37080 }, /* SUBA */
-{ xop_90e0_0, 37088 }, /* SUBA */
-{ xop_90e8_0, 37096 }, /* SUBA */
-{ xop_90f0_0, 37104 }, /* SUBA */
-{ xop_90f8_0, 37112 }, /* SUBA */
-{ xop_90f9_0, 37113 }, /* SUBA */
-{ xop_90fa_0, 37114 }, /* SUBA */
-{ xop_90fb_0, 37115 }, /* SUBA */
-{ xop_90fc_0, 37116 }, /* SUBA */
-{ xop_9100_0, 37120 }, /* SUBX */
-{ xop_9108_0, 37128 }, /* SUBX */
-{ xop_9110_0, 37136 }, /* SUB */
-{ xop_9118_0, 37144 }, /* SUB */
-{ xop_9120_0, 37152 }, /* SUB */
-{ xop_9128_0, 37160 }, /* SUB */
-{ xop_9130_0, 37168 }, /* SUB */
-{ xop_9138_0, 37176 }, /* SUB */
-{ xop_9139_0, 37177 }, /* SUB */
-{ xop_9140_0, 37184 }, /* SUBX */
-{ xop_9148_0, 37192 }, /* SUBX */
-{ xop_9150_0, 37200 }, /* SUB */
-{ xop_9158_0, 37208 }, /* SUB */
-{ xop_9160_0, 37216 }, /* SUB */
-{ xop_9168_0, 37224 }, /* SUB */
-{ xop_9170_0, 37232 }, /* SUB */
-{ xop_9178_0, 37240 }, /* SUB */
-{ xop_9179_0, 37241 }, /* SUB */
-{ xop_9180_0, 37248 }, /* SUBX */
-{ xop_9188_0, 37256 }, /* SUBX */
-{ xop_9190_0, 37264 }, /* SUB */
-{ xop_9198_0, 37272 }, /* SUB */
-{ xop_91a0_0, 37280 }, /* SUB */
-{ xop_91a8_0, 37288 }, /* SUB */
-{ xop_91b0_0, 37296 }, /* SUB */
-{ xop_91b8_0, 37304 }, /* SUB */
-{ xop_91b9_0, 37305 }, /* SUB */
-{ xop_91c0_0, 37312 }, /* SUBA */
-{ xop_91c8_0, 37320 }, /* SUBA */
-{ xop_91d0_0, 37328 }, /* SUBA */
-{ xop_91d8_0, 37336 }, /* SUBA */
-{ xop_91e0_0, 37344 }, /* SUBA */
-{ xop_91e8_0, 37352 }, /* SUBA */
-{ xop_91f0_0, 37360 }, /* SUBA */
-{ xop_91f8_0, 37368 }, /* SUBA */
-{ xop_91f9_0, 37369 }, /* SUBA */
-{ xop_91fa_0, 37370 }, /* SUBA */
-{ xop_91fb_0, 37371 }, /* SUBA */
-{ xop_91fc_0, 37372 }, /* SUBA */
-{ xop_b000_0, 45056 }, /* CMP */
-{ xop_b010_0, 45072 }, /* CMP */
-{ xop_b018_0, 45080 }, /* CMP */
-{ xop_b020_0, 45088 }, /* CMP */
-{ xop_b028_0, 45096 }, /* CMP */
-{ xop_b030_0, 45104 }, /* CMP */
-{ xop_b038_0, 45112 }, /* CMP */
-{ xop_b039_0, 45113 }, /* CMP */
-{ xop_b03a_0, 45114 }, /* CMP */
-{ xop_b03b_0, 45115 }, /* CMP */
-{ xop_b03c_0, 45116 }, /* CMP */
-{ xop_b040_0, 45120 }, /* CMP */
-{ xop_b048_0, 45128 }, /* CMP */
-{ xop_b050_0, 45136 }, /* CMP */
-{ xop_b058_0, 45144 }, /* CMP */
-{ xop_b060_0, 45152 }, /* CMP */
-{ xop_b068_0, 45160 }, /* CMP */
-{ xop_b070_0, 45168 }, /* CMP */
-{ xop_b078_0, 45176 }, /* CMP */
-{ xop_b079_0, 45177 }, /* CMP */
-{ xop_b07a_0, 45178 }, /* CMP */
-{ xop_b07b_0, 45179 }, /* CMP */
-{ xop_b07c_0, 45180 }, /* CMP */
-{ xop_b080_0, 45184 }, /* CMP */
-{ xop_b088_0, 45192 }, /* CMP */
-{ xop_b090_0, 45200 }, /* CMP */
-{ xop_b098_0, 45208 }, /* CMP */
-{ xop_b0a0_0, 45216 }, /* CMP */
-{ xop_b0a8_0, 45224 }, /* CMP */
-{ xop_b0b0_0, 45232 }, /* CMP */
-{ xop_b0b8_0, 45240 }, /* CMP */
-{ xop_b0b9_0, 45241 }, /* CMP */
-{ xop_b0ba_0, 45242 }, /* CMP */
-{ xop_b0bb_0, 45243 }, /* CMP */
-{ xop_b0bc_0, 45244 }, /* CMP */
-{ xop_b0c0_0, 45248 }, /* CMPA */
-{ xop_b0c8_0, 45256 }, /* CMPA */
-{ xop_b0d0_0, 45264 }, /* CMPA */
-{ xop_b0d8_0, 45272 }, /* CMPA */
-{ xop_b0e0_0, 45280 }, /* CMPA */
-{ xop_b0e8_0, 45288 }, /* CMPA */
-{ xop_b0f0_0, 45296 }, /* CMPA */
-{ xop_b0f8_0, 45304 }, /* CMPA */
-{ xop_b0f9_0, 45305 }, /* CMPA */
-{ xop_b0fa_0, 45306 }, /* CMPA */
-{ xop_b0fb_0, 45307 }, /* CMPA */
-{ xop_b0fc_0, 45308 }, /* CMPA */
-{ xop_b100_0, 45312 }, /* EOR */
-{ xop_b108_0, 45320 }, /* CMPM */
-{ xop_b110_0, 45328 }, /* EOR */
-{ xop_b118_0, 45336 }, /* EOR */
-{ xop_b120_0, 45344 }, /* EOR */
-{ xop_b128_0, 45352 }, /* EOR */
-{ xop_b130_0, 45360 }, /* EOR */
-{ xop_b138_0, 45368 }, /* EOR */
-{ xop_b139_0, 45369 }, /* EOR */
-{ xop_b140_0, 45376 }, /* EOR */
-{ xop_b148_0, 45384 }, /* CMPM */
-{ xop_b150_0, 45392 }, /* EOR */
-{ xop_b158_0, 45400 }, /* EOR */
-{ xop_b160_0, 45408 }, /* EOR */
-{ xop_b168_0, 45416 }, /* EOR */
-{ xop_b170_0, 45424 }, /* EOR */
-{ xop_b178_0, 45432 }, /* EOR */
-{ xop_b179_0, 45433 }, /* EOR */
-{ xop_b180_0, 45440 }, /* EOR */
-{ xop_b188_0, 45448 }, /* CMPM */
-{ xop_b190_0, 45456 }, /* EOR */
-{ xop_b198_0, 45464 }, /* EOR */
-{ xop_b1a0_0, 45472 }, /* EOR */
-{ xop_b1a8_0, 45480 }, /* EOR */
-{ xop_b1b0_0, 45488 }, /* EOR */
-{ xop_b1b8_0, 45496 }, /* EOR */
-{ xop_b1b9_0, 45497 }, /* EOR */
-{ xop_b1c0_0, 45504 }, /* CMPA */
-{ xop_b1c8_0, 45512 }, /* CMPA */
-{ xop_b1d0_0, 45520 }, /* CMPA */
-{ xop_b1d8_0, 45528 }, /* CMPA */
-{ xop_b1e0_0, 45536 }, /* CMPA */
-{ xop_b1e8_0, 45544 }, /* CMPA */
-{ xop_b1f0_0, 45552 }, /* CMPA */
-{ xop_b1f8_0, 45560 }, /* CMPA */
-{ xop_b1f9_0, 45561 }, /* CMPA */
-{ xop_b1fa_0, 45562 }, /* CMPA */
-{ xop_b1fb_0, 45563 }, /* CMPA */
-{ xop_b1fc_0, 45564 }, /* CMPA */
-{ xop_c000_0, 49152 }, /* AND */
-{ xop_c010_0, 49168 }, /* AND */
-{ xop_c018_0, 49176 }, /* AND */
-{ xop_c020_0, 49184 }, /* AND */
-{ xop_c028_0, 49192 }, /* AND */
-{ xop_c030_0, 49200 }, /* AND */
-{ xop_c038_0, 49208 }, /* AND */
-{ xop_c039_0, 49209 }, /* AND */
-{ xop_c03a_0, 49210 }, /* AND */
-{ xop_c03b_0, 49211 }, /* AND */
-{ xop_c03c_0, 49212 }, /* AND */
-{ xop_c040_0, 49216 }, /* AND */
-{ xop_c050_0, 49232 }, /* AND */
-{ xop_c058_0, 49240 }, /* AND */
-{ xop_c060_0, 49248 }, /* AND */
-{ xop_c068_0, 49256 }, /* AND */
-{ xop_c070_0, 49264 }, /* AND */
-{ xop_c078_0, 49272 }, /* AND */
-{ xop_c079_0, 49273 }, /* AND */
-{ xop_c07a_0, 49274 }, /* AND */
-{ xop_c07b_0, 49275 }, /* AND */
-{ xop_c07c_0, 49276 }, /* AND */
-{ xop_c080_0, 49280 }, /* AND */
-{ xop_c090_0, 49296 }, /* AND */
-{ xop_c098_0, 49304 }, /* AND */
-{ xop_c0a0_0, 49312 }, /* AND */
-{ xop_c0a8_0, 49320 }, /* AND */
-{ xop_c0b0_0, 49328 }, /* AND */
-{ xop_c0b8_0, 49336 }, /* AND */
-{ xop_c0b9_0, 49337 }, /* AND */
-{ xop_c0ba_0, 49338 }, /* AND */
-{ xop_c0bb_0, 49339 }, /* AND */
-{ xop_c0bc_0, 49340 }, /* AND */
-{ xop_c0c0_0, 49344 }, /* MULU */
-{ xop_c0d0_0, 49360 }, /* MULU */
-{ xop_c0d8_0, 49368 }, /* MULU */
-{ xop_c0e0_0, 49376 }, /* MULU */
-{ xop_c0e8_0, 49384 }, /* MULU */
-{ xop_c0f0_0, 49392 }, /* MULU */
-{ xop_c0f8_0, 49400 }, /* MULU */
-{ xop_c0f9_0, 49401 }, /* MULU */
-{ xop_c0fa_0, 49402 }, /* MULU */
-{ xop_c0fb_0, 49403 }, /* MULU */
-{ xop_c0fc_0, 49404 }, /* MULU */
-{ xop_c100_0, 49408 }, /* ABCD */
-{ xop_c108_0, 49416 }, /* ABCD */
-{ xop_c110_0, 49424 }, /* AND */
-{ xop_c118_0, 49432 }, /* AND */
-{ xop_c120_0, 49440 }, /* AND */
-{ xop_c128_0, 49448 }, /* AND */
-{ xop_c130_0, 49456 }, /* AND */
-{ xop_c138_0, 49464 }, /* AND */
-{ xop_c139_0, 49465 }, /* AND */
-{ xop_c140_0, 49472 }, /* EXG */
-{ xop_c148_0, 49480 }, /* EXG */
-{ xop_c150_0, 49488 }, /* AND */
-{ xop_c158_0, 49496 }, /* AND */
-{ xop_c160_0, 49504 }, /* AND */
-{ xop_c168_0, 49512 }, /* AND */
-{ xop_c170_0, 49520 }, /* AND */
-{ xop_c178_0, 49528 }, /* AND */
-{ xop_c179_0, 49529 }, /* AND */
-{ xop_c188_0, 49544 }, /* EXG */
-{ xop_c190_0, 49552 }, /* AND */
-{ xop_c198_0, 49560 }, /* AND */
-{ xop_c1a0_0, 49568 }, /* AND */
-{ xop_c1a8_0, 49576 }, /* AND */
-{ xop_c1b0_0, 49584 }, /* AND */
-{ xop_c1b8_0, 49592 }, /* AND */
-{ xop_c1b9_0, 49593 }, /* AND */
-{ xop_c1c0_0, 49600 }, /* MULS */
-{ xop_c1d0_0, 49616 }, /* MULS */
-{ xop_c1d8_0, 49624 }, /* MULS */
-{ xop_c1e0_0, 49632 }, /* MULS */
-{ xop_c1e8_0, 49640 }, /* MULS */
-{ xop_c1f0_0, 49648 }, /* MULS */
-{ xop_c1f8_0, 49656 }, /* MULS */
-{ xop_c1f9_0, 49657 }, /* MULS */
-{ xop_c1fa_0, 49658 }, /* MULS */
-{ xop_c1fb_0, 49659 }, /* MULS */
-{ xop_c1fc_0, 49660 }, /* MULS */
-{ xop_d000_0, 53248 }, /* ADD */
-{ xop_d010_0, 53264 }, /* ADD */
-{ xop_d018_0, 53272 }, /* ADD */
-{ xop_d020_0, 53280 }, /* ADD */
-{ xop_d028_0, 53288 }, /* ADD */
-{ xop_d030_0, 53296 }, /* ADD */
-{ xop_d038_0, 53304 }, /* ADD */
-{ xop_d039_0, 53305 }, /* ADD */
-{ xop_d03a_0, 53306 }, /* ADD */
-{ xop_d03b_0, 53307 }, /* ADD */
-{ xop_d03c_0, 53308 }, /* ADD */
-{ xop_d040_0, 53312 }, /* ADD */
-{ xop_d048_0, 53320 }, /* ADD */
-{ xop_d050_0, 53328 }, /* ADD */
-{ xop_d058_0, 53336 }, /* ADD */
-{ xop_d060_0, 53344 }, /* ADD */
-{ xop_d068_0, 53352 }, /* ADD */
-{ xop_d070_0, 53360 }, /* ADD */
-{ xop_d078_0, 53368 }, /* ADD */
-{ xop_d079_0, 53369 }, /* ADD */
-{ xop_d07a_0, 53370 }, /* ADD */
-{ xop_d07b_0, 53371 }, /* ADD */
-{ xop_d07c_0, 53372 }, /* ADD */
-{ xop_d080_0, 53376 }, /* ADD */
-{ xop_d088_0, 53384 }, /* ADD */
-{ xop_d090_0, 53392 }, /* ADD */
-{ xop_d098_0, 53400 }, /* ADD */
-{ xop_d0a0_0, 53408 }, /* ADD */
-{ xop_d0a8_0, 53416 }, /* ADD */
-{ xop_d0b0_0, 53424 }, /* ADD */
-{ xop_d0b8_0, 53432 }, /* ADD */
-{ xop_d0b9_0, 53433 }, /* ADD */
-{ xop_d0ba_0, 53434 }, /* ADD */
-{ xop_d0bb_0, 53435 }, /* ADD */
-{ xop_d0bc_0, 53436 }, /* ADD */
-{ xop_d0c0_0, 53440 }, /* ADDA */
-{ xop_d0c8_0, 53448 }, /* ADDA */
-{ xop_d0d0_0, 53456 }, /* ADDA */
-{ xop_d0d8_0, 53464 }, /* ADDA */
-{ xop_d0e0_0, 53472 }, /* ADDA */
-{ xop_d0e8_0, 53480 }, /* ADDA */
-{ xop_d0f0_0, 53488 }, /* ADDA */
-{ xop_d0f8_0, 53496 }, /* ADDA */
-{ xop_d0f9_0, 53497 }, /* ADDA */
-{ xop_d0fa_0, 53498 }, /* ADDA */
-{ xop_d0fb_0, 53499 }, /* ADDA */
-{ xop_d0fc_0, 53500 }, /* ADDA */
-{ xop_d100_0, 53504 }, /* ADDX */
-{ xop_d108_0, 53512 }, /* ADDX */
-{ xop_d110_0, 53520 }, /* ADD */
-{ xop_d118_0, 53528 }, /* ADD */
-{ xop_d120_0, 53536 }, /* ADD */
-{ xop_d128_0, 53544 }, /* ADD */
-{ xop_d130_0, 53552 }, /* ADD */
-{ xop_d138_0, 53560 }, /* ADD */
-{ xop_d139_0, 53561 }, /* ADD */
-{ xop_d140_0, 53568 }, /* ADDX */
-{ xop_d148_0, 53576 }, /* ADDX */
-{ xop_d150_0, 53584 }, /* ADD */
-{ xop_d158_0, 53592 }, /* ADD */
-{ xop_d160_0, 53600 }, /* ADD */
-{ xop_d168_0, 53608 }, /* ADD */
-{ xop_d170_0, 53616 }, /* ADD */
-{ xop_d178_0, 53624 }, /* ADD */
-{ xop_d179_0, 53625 }, /* ADD */
-{ xop_d180_0, 53632 }, /* ADDX */
-{ xop_d188_0, 53640 }, /* ADDX */
-{ xop_d190_0, 53648 }, /* ADD */
-{ xop_d198_0, 53656 }, /* ADD */
-{ xop_d1a0_0, 53664 }, /* ADD */
-{ xop_d1a8_0, 53672 }, /* ADD */
-{ xop_d1b0_0, 53680 }, /* ADD */
-{ xop_d1b8_0, 53688 }, /* ADD */
-{ xop_d1b9_0, 53689 }, /* ADD */
-{ xop_d1c0_0, 53696 }, /* ADDA */
-{ xop_d1c8_0, 53704 }, /* ADDA */
-{ xop_d1d0_0, 53712 }, /* ADDA */
-{ xop_d1d8_0, 53720 }, /* ADDA */
-{ xop_d1e0_0, 53728 }, /* ADDA */
-{ xop_d1e8_0, 53736 }, /* ADDA */
-{ xop_d1f0_0, 53744 }, /* ADDA */
-{ xop_d1f8_0, 53752 }, /* ADDA */
-{ xop_d1f9_0, 53753 }, /* ADDA */
-{ xop_d1fa_0, 53754 }, /* ADDA */
-{ xop_d1fb_0, 53755 }, /* ADDA */
-{ xop_d1fc_0, 53756 }, /* ADDA */
-{ xop_e000_0, 57344 }, /* ASR */
-{ xop_e008_0, 57352 }, /* LSR */
-{ xop_e010_0, 57360 }, /* ROXR */
-{ xop_e018_0, 57368 }, /* ROR */
-{ xop_e020_0, 57376 }, /* ASR */
-{ xop_e028_0, 57384 }, /* LSR */
-{ xop_e030_0, 57392 }, /* ROXR */
-{ xop_e038_0, 57400 }, /* ROR */
-{ xop_e040_0, 57408 }, /* ASR */
-{ xop_e048_0, 57416 }, /* LSR */
-{ xop_e050_0, 57424 }, /* ROXR */
-{ xop_e058_0, 57432 }, /* ROR */
-{ xop_e060_0, 57440 }, /* ASR */
-{ xop_e068_0, 57448 }, /* LSR */
-{ xop_e070_0, 57456 }, /* ROXR */
-{ xop_e078_0, 57464 }, /* ROR */
-{ xop_e080_0, 57472 }, /* ASR */
-{ xop_e088_0, 57480 }, /* LSR */
-{ xop_e090_0, 57488 }, /* ROXR */
-{ xop_e098_0, 57496 }, /* ROR */
-{ xop_e0a0_0, 57504 }, /* ASR */
-{ xop_e0a8_0, 57512 }, /* LSR */
-{ xop_e0b0_0, 57520 }, /* ROXR */
-{ xop_e0b8_0, 57528 }, /* ROR */
-{ xop_e0d0_0, 57552 }, /* ASRW */
-{ xop_e0d8_0, 57560 }, /* ASRW */
-{ xop_e0e0_0, 57568 }, /* ASRW */
-{ xop_e0e8_0, 57576 }, /* ASRW */
-{ xop_e0f0_0, 57584 }, /* ASRW */
-{ xop_e0f8_0, 57592 }, /* ASRW */
-{ xop_e0f9_0, 57593 }, /* ASRW */
-{ xop_e100_0, 57600 }, /* ASL */
-{ xop_e108_0, 57608 }, /* LSL */
-{ xop_e110_0, 57616 }, /* ROXL */
-{ xop_e118_0, 57624 }, /* ROL */
-{ xop_e120_0, 57632 }, /* ASL */
-{ xop_e128_0, 57640 }, /* LSL */
-{ xop_e130_0, 57648 }, /* ROXL */
-{ xop_e138_0, 57656 }, /* ROL */
-{ xop_e140_0, 57664 }, /* ASL */
-{ xop_e148_0, 57672 }, /* LSL */
-{ xop_e150_0, 57680 }, /* ROXL */
-{ xop_e158_0, 57688 }, /* ROL */
-{ xop_e160_0, 57696 }, /* ASL */
-{ xop_e168_0, 57704 }, /* LSL */
-{ xop_e170_0, 57712 }, /* ROXL */
-{ xop_e178_0, 57720 }, /* ROL */
-{ xop_e180_0, 57728 }, /* ASL */
-{ xop_e188_0, 57736 }, /* LSL */
-{ xop_e190_0, 57744 }, /* ROXL */
-{ xop_e198_0, 57752 }, /* ROL */
-{ xop_e1a0_0, 57760 }, /* ASL */
-{ xop_e1a8_0, 57768 }, /* LSL */
-{ xop_e1b0_0, 57776 }, /* ROXL */
-{ xop_e1b8_0, 57784 }, /* ROL */
-{ xop_e1d0_0, 57808 }, /* ASLW */
-{ xop_e1d8_0, 57816 }, /* ASLW */
-{ xop_e1e0_0, 57824 }, /* ASLW */
-{ xop_e1e8_0, 57832 }, /* ASLW */
-{ xop_e1f0_0, 57840 }, /* ASLW */
-{ xop_e1f8_0, 57848 }, /* ASLW */
-{ xop_e1f9_0, 57849 }, /* ASLW */
-{ xop_e2d0_0, 58064 }, /* LSRW */
-{ xop_e2d8_0, 58072 }, /* LSRW */
-{ xop_e2e0_0, 58080 }, /* LSRW */
-{ xop_e2e8_0, 58088 }, /* LSRW */
-{ xop_e2f0_0, 58096 }, /* LSRW */
-{ xop_e2f8_0, 58104 }, /* LSRW */
-{ xop_e2f9_0, 58105 }, /* LSRW */
-{ xop_e3d0_0, 58320 }, /* LSLW */
-{ xop_e3d8_0, 58328 }, /* LSLW */
-{ xop_e3e0_0, 58336 }, /* LSLW */
-{ xop_e3e8_0, 58344 }, /* LSLW */
-{ xop_e3f0_0, 58352 }, /* LSLW */
-{ xop_e3f8_0, 58360 }, /* LSLW */
-{ xop_e3f9_0, 58361 }, /* LSLW */
-{ xop_e4d0_0, 58576 }, /* ROXRW */
-{ xop_e4d8_0, 58584 }, /* ROXRW */
-{ xop_e4e0_0, 58592 }, /* ROXRW */
-{ xop_e4e8_0, 58600 }, /* ROXRW */
-{ xop_e4f0_0, 58608 }, /* ROXRW */
-{ xop_e4f8_0, 58616 }, /* ROXRW */
-{ xop_e4f9_0, 58617 }, /* ROXRW */
-{ xop_e5d0_0, 58832 }, /* ROXLW */
-{ xop_e5d8_0, 58840 }, /* ROXLW */
-{ xop_e5e0_0, 58848 }, /* ROXLW */
-{ xop_e5e8_0, 58856 }, /* ROXLW */
-{ xop_e5f0_0, 58864 }, /* ROXLW */
-{ xop_e5f8_0, 58872 }, /* ROXLW */
-{ xop_e5f9_0, 58873 }, /* ROXLW */
-{ xop_e6d0_0, 59088 }, /* RORW */
-{ xop_e6d8_0, 59096 }, /* RORW */
-{ xop_e6e0_0, 59104 }, /* RORW */
-{ xop_e6e8_0, 59112 }, /* RORW */
-{ xop_e6f0_0, 59120 }, /* RORW */
-{ xop_e6f8_0, 59128 }, /* RORW */
-{ xop_e6f9_0, 59129 }, /* RORW */
-{ xop_e7d0_0, 59344 }, /* ROLW */
-{ xop_e7d8_0, 59352 }, /* ROLW */
-{ xop_e7e0_0, 59360 }, /* ROLW */
-{ xop_e7e8_0, 59368 }, /* ROLW */
-{ xop_e7f0_0, 59376 }, /* ROLW */
-{ xop_e7f8_0, 59384 }, /* ROLW */
-{ xop_e7f9_0, 59385 }, /* ROLW */
-{ xop_e8c0_0, 59584 }, /* BFTST */
-{ xop_e8d0_0, 59600 }, /* BFTST */
-{ xop_e8e8_0, 59624 }, /* BFTST */
-{ xop_e8f0_0, 59632 }, /* BFTST */
-{ xop_e8f8_0, 59640 }, /* BFTST */
-{ xop_e8f9_0, 59641 }, /* BFTST */
-{ xop_e8fa_0, 59642 }, /* BFTST */
-{ xop_e8fb_0, 59643 }, /* BFTST */
-{ xop_e9c0_0, 59840 }, /* BFEXTU */
-{ xop_e9d0_0, 59856 }, /* BFEXTU */
-{ xop_e9e8_0, 59880 }, /* BFEXTU */
-{ xop_e9f0_0, 59888 }, /* BFEXTU */
-{ xop_e9f8_0, 59896 }, /* BFEXTU */
-{ xop_e9f9_0, 59897 }, /* BFEXTU */
-{ xop_e9fa_0, 59898 }, /* BFEXTU */
-{ xop_e9fb_0, 59899 }, /* BFEXTU */
-{ xop_eac0_0, 60096 }, /* BFCHG */
-{ xop_ead0_0, 60112 }, /* BFCHG */
-{ xop_eae8_0, 60136 }, /* BFCHG */
-{ xop_eaf0_0, 60144 }, /* BFCHG */
-{ xop_eaf8_0, 60152 }, /* BFCHG */
-{ xop_eaf9_0, 60153 }, /* BFCHG */
-{ xop_ebc0_0, 60352 }, /* BFEXTS */
-{ xop_ebd0_0, 60368 }, /* BFEXTS */
-{ xop_ebe8_0, 60392 }, /* BFEXTS */
-{ xop_ebf0_0, 60400 }, /* BFEXTS */
-{ xop_ebf8_0, 60408 }, /* BFEXTS */
-{ xop_ebf9_0, 60409 }, /* BFEXTS */
-{ xop_ebfa_0, 60410 }, /* BFEXTS */
-{ xop_ebfb_0, 60411 }, /* BFEXTS */
-{ xop_ecc0_0, 60608 }, /* BFCLR */
-{ xop_ecd0_0, 60624 }, /* BFCLR */
-{ xop_ece8_0, 60648 }, /* BFCLR */
-{ xop_ecf0_0, 60656 }, /* BFCLR */
-{ xop_ecf8_0, 60664 }, /* BFCLR */
-{ xop_ecf9_0, 60665 }, /* BFCLR */
-{ xop_edc0_0, 60864 }, /* BFFFO */
-{ xop_edd0_0, 60880 }, /* BFFFO */
-{ xop_ede8_0, 60904 }, /* BFFFO */
-{ xop_edf0_0, 60912 }, /* BFFFO */
-{ xop_edf8_0, 60920 }, /* BFFFO */
-{ xop_edf9_0, 60921 }, /* BFFFO */
-{ xop_edfa_0, 60922 }, /* BFFFO */
-{ xop_edfb_0, 60923 }, /* BFFFO */
-{ xop_eec0_0, 61120 }, /* BFSET */
-{ xop_eed0_0, 61136 }, /* BFSET */
-{ xop_eee8_0, 61160 }, /* BFSET */
-{ xop_eef0_0, 61168 }, /* BFSET */
-{ xop_eef8_0, 61176 }, /* BFSET */
-{ xop_eef9_0, 61177 }, /* BFSET */
-{ xop_efc0_0, 61376 }, /* BFINS */
-{ xop_efd0_0, 61392 }, /* BFINS */
-{ xop_efe8_0, 61416 }, /* BFINS */
-{ xop_eff0_0, 61424 }, /* BFINS */
-{ xop_eff8_0, 61432 }, /* BFINS */
-{ xop_eff9_0, 61433 }, /* BFINS */
-{ xop_f000_0, 61440 }, /* MMUOP30A */
-{ xop_f008_0, 61448 }, /* MMUOP30A */
-{ xop_f010_0, 61456 }, /* MMUOP30A */
-{ xop_f018_0, 61464 }, /* MMUOP30A */
-{ xop_f020_0, 61472 }, /* MMUOP30A */
-{ xop_f028_0, 61480 }, /* MMUOP30A */
-{ xop_f030_0, 61488 }, /* MMUOP30A */
-{ xop_f038_0, 61496 }, /* MMUOP30A */
-{ xop_f039_0, 61497 }, /* MMUOP30A */
-{ xop_f03a_0, 61498 }, /* MMUOP30A */
-{ xop_f03b_0, 61499 }, /* MMUOP30A */
-{ xop_f200_0, 61952 }, /* FPP */
-{ xop_f208_0, 61960 }, /* FPP */
-{ xop_f210_0, 61968 }, /* FPP */
-{ xop_f218_0, 61976 }, /* FPP */
-{ xop_f220_0, 61984 }, /* FPP */
-{ xop_f228_0, 61992 }, /* FPP */
-{ xop_f230_0, 62000 }, /* FPP */
-{ xop_f238_0, 62008 }, /* FPP */
-{ xop_f239_0, 62009 }, /* FPP */
-{ xop_f23a_0, 62010 }, /* FPP */
-{ xop_f23b_0, 62011 }, /* FPP */
-{ xop_f23c_0, 62012 }, /* FPP */
-{ xop_f240_0, 62016 }, /* FScc */
-{ xop_f248_0, 62024 }, /* FDBcc */
-{ xop_f250_0, 62032 }, /* FScc */
-{ xop_f258_0, 62040 }, /* FScc */
-{ xop_f260_0, 62048 }, /* FScc */
-{ xop_f268_0, 62056 }, /* FScc */
-{ xop_f270_0, 62064 }, /* FScc */
-{ xop_f278_0, 62072 }, /* FScc */
-{ xop_f279_0, 62073 }, /* FScc */
-{ xop_f27a_0, 62074 }, /* FTRAPcc */
-{ xop_f27b_0, 62075 }, /* FTRAPcc */
-{ xop_f27c_0, 62076 }, /* FTRAPcc */
-{ xop_f280_0, 62080 }, /* FBcc */
-{ xop_f2c0_0, 62144 }, /* FBcc */
-{ xop_f310_0, 62224 }, /* FSAVE */
-{ xop_f320_0, 62240 }, /* FSAVE */
-{ xop_f328_0, 62248 }, /* FSAVE */
-{ xop_f330_0, 62256 }, /* FSAVE */
-{ xop_f338_0, 62264 }, /* FSAVE */
-{ xop_f339_0, 62265 }, /* FSAVE */
-{ xop_f350_0, 62288 }, /* FRESTORE */
-{ xop_f358_0, 62296 }, /* FRESTORE */
-{ xop_f368_0, 62312 }, /* FRESTORE */
-{ xop_f370_0, 62320 }, /* FRESTORE */
-{ xop_f378_0, 62328 }, /* FRESTORE */
-{ xop_f379_0, 62329 }, /* FRESTORE */
-{ xop_f37a_0, 62330 }, /* FRESTORE */
-{ xop_f37b_0, 62331 }, /* FRESTORE */
-{ xop_f408_0, 62472 }, /* CINVL */
-{ xop_f410_0, 62480 }, /* CINVP */
-{ xop_f418_0, 62488 }, /* CINVA */
-{ xop_f419_0, 62489 }, /* CINVA */
-{ xop_f41a_0, 62490 }, /* CINVA */
-{ xop_f41b_0, 62491 }, /* CINVA */
-{ xop_f41c_0, 62492 }, /* CINVA */
-{ xop_f41d_0, 62493 }, /* CINVA */
-{ xop_f41e_0, 62494 }, /* CINVA */
-{ xop_f41f_0, 62495 }, /* CINVA */
-{ xop_f428_0, 62504 }, /* CPUSHL */
-{ xop_f430_0, 62512 }, /* CPUSHP */
-{ xop_f438_0, 62520 }, /* CPUSHA */
-{ xop_f439_0, 62521 }, /* CPUSHA */
-{ xop_f43a_0, 62522 }, /* CPUSHA */
-{ xop_f43b_0, 62523 }, /* CPUSHA */
-{ xop_f43c_0, 62524 }, /* CPUSHA */
-{ xop_f43d_0, 62525 }, /* CPUSHA */
-{ xop_f43e_0, 62526 }, /* CPUSHA */
-{ xop_f43f_0, 62527 }, /* CPUSHA */
-{ xop_f500_0, 62720 }, /* MMUOP */
-{ xop_f600_0, 62976 }, /* MOVE16 */
-{ xop_f608_0, 62984 }, /* MOVE16 */
-{ xop_f610_0, 62992 }, /* MOVE16 */
-{ xop_f618_0, 63000 }, /* MOVE16 */
-{ xop_f620_0, 63008 }, /* MOVE16 */
-{ xop_f800_0, 63488 }, /* MMUOP30B */
-{ xop_f808_0, 63496 }, /* MMUOP30B */
-{ xop_f810_0, 63504 }, /* MMUOP30B */
-{ xop_f818_0, 63512 }, /* MMUOP30B */
-{ xop_f820_0, 63520 }, /* MMUOP30B */
-{ xop_f828_0, 63528 }, /* MMUOP30B */
-{ xop_f830_0, 63536 }, /* MMUOP30B */
-{ xop_f838_0, 63544 }, /* MMUOP30B */
-{ xop_f839_0, 63545 }, /* MMUOP30B */
-{ xop_f83a_0, 63546 }, /* MMUOP30B */
-{ xop_f83b_0, 63547 }, /* MMUOP30B */
-{ 0, 0 }};
+++ /dev/null
-extern xcpuop_func xop_0_0;
-extern xcpuop_func xop_10_0;
-extern xcpuop_func xop_18_0;
-extern xcpuop_func xop_20_0;
-extern xcpuop_func xop_28_0;
-extern xcpuop_func xop_30_0;
-extern xcpuop_func xop_38_0;
-extern xcpuop_func xop_39_0;
-extern xcpuop_func xop_3c_0;
-extern xcpuop_func xop_40_0;
-extern xcpuop_func xop_50_0;
-extern xcpuop_func xop_58_0;
-extern xcpuop_func xop_60_0;
-extern xcpuop_func xop_68_0;
-extern xcpuop_func xop_70_0;
-extern xcpuop_func xop_78_0;
-extern xcpuop_func xop_79_0;
-extern xcpuop_func xop_7c_0;
-extern xcpuop_func xop_80_0;
-extern xcpuop_func xop_90_0;
-extern xcpuop_func xop_98_0;
-extern xcpuop_func xop_a0_0;
-extern xcpuop_func xop_a8_0;
-extern xcpuop_func xop_b0_0;
-extern xcpuop_func xop_b8_0;
-extern xcpuop_func xop_b9_0;
-extern xcpuop_func xop_d0_0;
-extern xcpuop_func xop_e8_0;
-extern xcpuop_func xop_f0_0;
-extern xcpuop_func xop_f8_0;
-extern xcpuop_func xop_f9_0;
-extern xcpuop_func xop_fa_0;
-extern xcpuop_func xop_fb_0;
-extern xcpuop_func xop_100_0;
-extern xcpuop_func xop_108_0;
-extern xcpuop_func xop_110_0;
-extern xcpuop_func xop_118_0;
-extern xcpuop_func xop_120_0;
-extern xcpuop_func xop_128_0;
-extern xcpuop_func xop_130_0;
-extern xcpuop_func xop_138_0;
-extern xcpuop_func xop_139_0;
-extern xcpuop_func xop_13a_0;
-extern xcpuop_func xop_13b_0;
-extern xcpuop_func xop_13c_0;
-extern xcpuop_func xop_140_0;
-extern xcpuop_func xop_148_0;
-extern xcpuop_func xop_150_0;
-extern xcpuop_func xop_158_0;
-extern xcpuop_func xop_160_0;
-extern xcpuop_func xop_168_0;
-extern xcpuop_func xop_170_0;
-extern xcpuop_func xop_178_0;
-extern xcpuop_func xop_179_0;
-extern xcpuop_func xop_17a_0;
-extern xcpuop_func xop_17b_0;
-extern xcpuop_func xop_180_0;
-extern xcpuop_func xop_188_0;
-extern xcpuop_func xop_190_0;
-extern xcpuop_func xop_198_0;
-extern xcpuop_func xop_1a0_0;
-extern xcpuop_func xop_1a8_0;
-extern xcpuop_func xop_1b0_0;
-extern xcpuop_func xop_1b8_0;
-extern xcpuop_func xop_1b9_0;
-extern xcpuop_func xop_1ba_0;
-extern xcpuop_func xop_1bb_0;
-extern xcpuop_func xop_1c0_0;
-extern xcpuop_func xop_1c8_0;
-extern xcpuop_func xop_1d0_0;
-extern xcpuop_func xop_1d8_0;
-extern xcpuop_func xop_1e0_0;
-extern xcpuop_func xop_1e8_0;
-extern xcpuop_func xop_1f0_0;
-extern xcpuop_func xop_1f8_0;
-extern xcpuop_func xop_1f9_0;
-extern xcpuop_func xop_1fa_0;
-extern xcpuop_func xop_1fb_0;
-extern xcpuop_func xop_200_0;
-extern xcpuop_func xop_210_0;
-extern xcpuop_func xop_218_0;
-extern xcpuop_func xop_220_0;
-extern xcpuop_func xop_228_0;
-extern xcpuop_func xop_230_0;
-extern xcpuop_func xop_238_0;
-extern xcpuop_func xop_239_0;
-extern xcpuop_func xop_23c_0;
-extern xcpuop_func xop_240_0;
-extern xcpuop_func xop_250_0;
-extern xcpuop_func xop_258_0;
-extern xcpuop_func xop_260_0;
-extern xcpuop_func xop_268_0;
-extern xcpuop_func xop_270_0;
-extern xcpuop_func xop_278_0;
-extern xcpuop_func xop_279_0;
-extern xcpuop_func xop_27c_0;
-extern xcpuop_func xop_280_0;
-extern xcpuop_func xop_290_0;
-extern xcpuop_func xop_298_0;
-extern xcpuop_func xop_2a0_0;
-extern xcpuop_func xop_2a8_0;
-extern xcpuop_func xop_2b0_0;
-extern xcpuop_func xop_2b8_0;
-extern xcpuop_func xop_2b9_0;
-extern xcpuop_func xop_2d0_0;
-extern xcpuop_func xop_2e8_0;
-extern xcpuop_func xop_2f0_0;
-extern xcpuop_func xop_2f8_0;
-extern xcpuop_func xop_2f9_0;
-extern xcpuop_func xop_2fa_0;
-extern xcpuop_func xop_2fb_0;
-extern xcpuop_func xop_400_0;
-extern xcpuop_func xop_410_0;
-extern xcpuop_func xop_418_0;
-extern xcpuop_func xop_420_0;
-extern xcpuop_func xop_428_0;
-extern xcpuop_func xop_430_0;
-extern xcpuop_func xop_438_0;
-extern xcpuop_func xop_439_0;
-extern xcpuop_func xop_440_0;
-extern xcpuop_func xop_450_0;
-extern xcpuop_func xop_458_0;
-extern xcpuop_func xop_460_0;
-extern xcpuop_func xop_468_0;
-extern xcpuop_func xop_470_0;
-extern xcpuop_func xop_478_0;
-extern xcpuop_func xop_479_0;
-extern xcpuop_func xop_480_0;
-extern xcpuop_func xop_490_0;
-extern xcpuop_func xop_498_0;
-extern xcpuop_func xop_4a0_0;
-extern xcpuop_func xop_4a8_0;
-extern xcpuop_func xop_4b0_0;
-extern xcpuop_func xop_4b8_0;
-extern xcpuop_func xop_4b9_0;
-extern xcpuop_func xop_4d0_0;
-extern xcpuop_func xop_4e8_0;
-extern xcpuop_func xop_4f0_0;
-extern xcpuop_func xop_4f8_0;
-extern xcpuop_func xop_4f9_0;
-extern xcpuop_func xop_4fa_0;
-extern xcpuop_func xop_4fb_0;
-extern xcpuop_func xop_600_0;
-extern xcpuop_func xop_610_0;
-extern xcpuop_func xop_618_0;
-extern xcpuop_func xop_620_0;
-extern xcpuop_func xop_628_0;
-extern xcpuop_func xop_630_0;
-extern xcpuop_func xop_638_0;
-extern xcpuop_func xop_639_0;
-extern xcpuop_func xop_640_0;
-extern xcpuop_func xop_650_0;
-extern xcpuop_func xop_658_0;
-extern xcpuop_func xop_660_0;
-extern xcpuop_func xop_668_0;
-extern xcpuop_func xop_670_0;
-extern xcpuop_func xop_678_0;
-extern xcpuop_func xop_679_0;
-extern xcpuop_func xop_680_0;
-extern xcpuop_func xop_690_0;
-extern xcpuop_func xop_698_0;
-extern xcpuop_func xop_6a0_0;
-extern xcpuop_func xop_6a8_0;
-extern xcpuop_func xop_6b0_0;
-extern xcpuop_func xop_6b8_0;
-extern xcpuop_func xop_6b9_0;
-extern xcpuop_func xop_6c0_0;
-extern xcpuop_func xop_6c8_0;
-extern xcpuop_func xop_6d0_0;
-extern xcpuop_func xop_6e8_0;
-extern xcpuop_func xop_6f0_0;
-extern xcpuop_func xop_6f8_0;
-extern xcpuop_func xop_6f9_0;
-extern xcpuop_func xop_6fa_0;
-extern xcpuop_func xop_6fb_0;
-extern xcpuop_func xop_800_0;
-extern xcpuop_func xop_810_0;
-extern xcpuop_func xop_818_0;
-extern xcpuop_func xop_820_0;
-extern xcpuop_func xop_828_0;
-extern xcpuop_func xop_830_0;
-extern xcpuop_func xop_838_0;
-extern xcpuop_func xop_839_0;
-extern xcpuop_func xop_83a_0;
-extern xcpuop_func xop_83b_0;
-extern xcpuop_func xop_83c_0;
-extern xcpuop_func xop_840_0;
-extern xcpuop_func xop_850_0;
-extern xcpuop_func xop_858_0;
-extern xcpuop_func xop_860_0;
-extern xcpuop_func xop_868_0;
-extern xcpuop_func xop_870_0;
-extern xcpuop_func xop_878_0;
-extern xcpuop_func xop_879_0;
-extern xcpuop_func xop_87a_0;
-extern xcpuop_func xop_87b_0;
-extern xcpuop_func xop_880_0;
-extern xcpuop_func xop_890_0;
-extern xcpuop_func xop_898_0;
-extern xcpuop_func xop_8a0_0;
-extern xcpuop_func xop_8a8_0;
-extern xcpuop_func xop_8b0_0;
-extern xcpuop_func xop_8b8_0;
-extern xcpuop_func xop_8b9_0;
-extern xcpuop_func xop_8ba_0;
-extern xcpuop_func xop_8bb_0;
-extern xcpuop_func xop_8c0_0;
-extern xcpuop_func xop_8d0_0;
-extern xcpuop_func xop_8d8_0;
-extern xcpuop_func xop_8e0_0;
-extern xcpuop_func xop_8e8_0;
-extern xcpuop_func xop_8f0_0;
-extern xcpuop_func xop_8f8_0;
-extern xcpuop_func xop_8f9_0;
-extern xcpuop_func xop_8fa_0;
-extern xcpuop_func xop_8fb_0;
-extern xcpuop_func xop_a00_0;
-extern xcpuop_func xop_a10_0;
-extern xcpuop_func xop_a18_0;
-extern xcpuop_func xop_a20_0;
-extern xcpuop_func xop_a28_0;
-extern xcpuop_func xop_a30_0;
-extern xcpuop_func xop_a38_0;
-extern xcpuop_func xop_a39_0;
-extern xcpuop_func xop_a3c_0;
-extern xcpuop_func xop_a40_0;
-extern xcpuop_func xop_a50_0;
-extern xcpuop_func xop_a58_0;
-extern xcpuop_func xop_a60_0;
-extern xcpuop_func xop_a68_0;
-extern xcpuop_func xop_a70_0;
-extern xcpuop_func xop_a78_0;
-extern xcpuop_func xop_a79_0;
-extern xcpuop_func xop_a7c_0;
-extern xcpuop_func xop_a80_0;
-extern xcpuop_func xop_a90_0;
-extern xcpuop_func xop_a98_0;
-extern xcpuop_func xop_aa0_0;
-extern xcpuop_func xop_aa8_0;
-extern xcpuop_func xop_ab0_0;
-extern xcpuop_func xop_ab8_0;
-extern xcpuop_func xop_ab9_0;
-extern xcpuop_func xop_ad0_0;
-extern xcpuop_func xop_ad8_0;
-extern xcpuop_func xop_ae0_0;
-extern xcpuop_func xop_ae8_0;
-extern xcpuop_func xop_af0_0;
-extern xcpuop_func xop_af8_0;
-extern xcpuop_func xop_af9_0;
-extern xcpuop_func xop_c00_0;
-extern xcpuop_func xop_c10_0;
-extern xcpuop_func xop_c18_0;
-extern xcpuop_func xop_c20_0;
-extern xcpuop_func xop_c28_0;
-extern xcpuop_func xop_c30_0;
-extern xcpuop_func xop_c38_0;
-extern xcpuop_func xop_c39_0;
-extern xcpuop_func xop_c3a_0;
-extern xcpuop_func xop_c3b_0;
-extern xcpuop_func xop_c40_0;
-extern xcpuop_func xop_c50_0;
-extern xcpuop_func xop_c58_0;
-extern xcpuop_func xop_c60_0;
-extern xcpuop_func xop_c68_0;
-extern xcpuop_func xop_c70_0;
-extern xcpuop_func xop_c78_0;
-extern xcpuop_func xop_c79_0;
-extern xcpuop_func xop_c7a_0;
-extern xcpuop_func xop_c7b_0;
-extern xcpuop_func xop_c80_0;
-extern xcpuop_func xop_c90_0;
-extern xcpuop_func xop_c98_0;
-extern xcpuop_func xop_ca0_0;
-extern xcpuop_func xop_ca8_0;
-extern xcpuop_func xop_cb0_0;
-extern xcpuop_func xop_cb8_0;
-extern xcpuop_func xop_cb9_0;
-extern xcpuop_func xop_cba_0;
-extern xcpuop_func xop_cbb_0;
-extern xcpuop_func xop_cd0_0;
-extern xcpuop_func xop_cd8_0;
-extern xcpuop_func xop_ce0_0;
-extern xcpuop_func xop_ce8_0;
-extern xcpuop_func xop_cf0_0;
-extern xcpuop_func xop_cf8_0;
-extern xcpuop_func xop_cf9_0;
-extern xcpuop_func xop_cfc_0;
-extern xcpuop_func xop_e10_0;
-extern xcpuop_func xop_e18_0;
-extern xcpuop_func xop_e20_0;
-extern xcpuop_func xop_e28_0;
-extern xcpuop_func xop_e30_0;
-extern xcpuop_func xop_e38_0;
-extern xcpuop_func xop_e39_0;
-extern xcpuop_func xop_e50_0;
-extern xcpuop_func xop_e58_0;
-extern xcpuop_func xop_e60_0;
-extern xcpuop_func xop_e68_0;
-extern xcpuop_func xop_e70_0;
-extern xcpuop_func xop_e78_0;
-extern xcpuop_func xop_e79_0;
-extern xcpuop_func xop_e90_0;
-extern xcpuop_func xop_e98_0;
-extern xcpuop_func xop_ea0_0;
-extern xcpuop_func xop_ea8_0;
-extern xcpuop_func xop_eb0_0;
-extern xcpuop_func xop_eb8_0;
-extern xcpuop_func xop_eb9_0;
-extern xcpuop_func xop_ed0_0;
-extern xcpuop_func xop_ed8_0;
-extern xcpuop_func xop_ee0_0;
-extern xcpuop_func xop_ee8_0;
-extern xcpuop_func xop_ef0_0;
-extern xcpuop_func xop_ef8_0;
-extern xcpuop_func xop_ef9_0;
-extern xcpuop_func xop_efc_0;
-extern xcpuop_func xop_1000_0;
-extern xcpuop_func xop_1010_0;
-extern xcpuop_func xop_1018_0;
-extern xcpuop_func xop_1020_0;
-extern xcpuop_func xop_1028_0;
-extern xcpuop_func xop_1030_0;
-extern xcpuop_func xop_1038_0;
-extern xcpuop_func xop_1039_0;
-extern xcpuop_func xop_103a_0;
-extern xcpuop_func xop_103b_0;
-extern xcpuop_func xop_103c_0;
-extern xcpuop_func xop_1080_0;
-extern xcpuop_func xop_1090_0;
-extern xcpuop_func xop_1098_0;
-extern xcpuop_func xop_10a0_0;
-extern xcpuop_func xop_10a8_0;
-extern xcpuop_func xop_10b0_0;
-extern xcpuop_func xop_10b8_0;
-extern xcpuop_func xop_10b9_0;
-extern xcpuop_func xop_10ba_0;
-extern xcpuop_func xop_10bb_0;
-extern xcpuop_func xop_10bc_0;
-extern xcpuop_func xop_10c0_0;
-extern xcpuop_func xop_10d0_0;
-extern xcpuop_func xop_10d8_0;
-extern xcpuop_func xop_10e0_0;
-extern xcpuop_func xop_10e8_0;
-extern xcpuop_func xop_10f0_0;
-extern xcpuop_func xop_10f8_0;
-extern xcpuop_func xop_10f9_0;
-extern xcpuop_func xop_10fa_0;
-extern xcpuop_func xop_10fb_0;
-extern xcpuop_func xop_10fc_0;
-extern xcpuop_func xop_1100_0;
-extern xcpuop_func xop_1110_0;
-extern xcpuop_func xop_1118_0;
-extern xcpuop_func xop_1120_0;
-extern xcpuop_func xop_1128_0;
-extern xcpuop_func xop_1130_0;
-extern xcpuop_func xop_1138_0;
-extern xcpuop_func xop_1139_0;
-extern xcpuop_func xop_113a_0;
-extern xcpuop_func xop_113b_0;
-extern xcpuop_func xop_113c_0;
-extern xcpuop_func xop_1140_0;
-extern xcpuop_func xop_1150_0;
-extern xcpuop_func xop_1158_0;
-extern xcpuop_func xop_1160_0;
-extern xcpuop_func xop_1168_0;
-extern xcpuop_func xop_1170_0;
-extern xcpuop_func xop_1178_0;
-extern xcpuop_func xop_1179_0;
-extern xcpuop_func xop_117a_0;
-extern xcpuop_func xop_117b_0;
-extern xcpuop_func xop_117c_0;
-extern xcpuop_func xop_1180_0;
-extern xcpuop_func xop_1190_0;
-extern xcpuop_func xop_1198_0;
-extern xcpuop_func xop_11a0_0;
-extern xcpuop_func xop_11a8_0;
-extern xcpuop_func xop_11b0_0;
-extern xcpuop_func xop_11b8_0;
-extern xcpuop_func xop_11b9_0;
-extern xcpuop_func xop_11ba_0;
-extern xcpuop_func xop_11bb_0;
-extern xcpuop_func xop_11bc_0;
-extern xcpuop_func xop_11c0_0;
-extern xcpuop_func xop_11d0_0;
-extern xcpuop_func xop_11d8_0;
-extern xcpuop_func xop_11e0_0;
-extern xcpuop_func xop_11e8_0;
-extern xcpuop_func xop_11f0_0;
-extern xcpuop_func xop_11f8_0;
-extern xcpuop_func xop_11f9_0;
-extern xcpuop_func xop_11fa_0;
-extern xcpuop_func xop_11fb_0;
-extern xcpuop_func xop_11fc_0;
-extern xcpuop_func xop_13c0_0;
-extern xcpuop_func xop_13d0_0;
-extern xcpuop_func xop_13d8_0;
-extern xcpuop_func xop_13e0_0;
-extern xcpuop_func xop_13e8_0;
-extern xcpuop_func xop_13f0_0;
-extern xcpuop_func xop_13f8_0;
-extern xcpuop_func xop_13f9_0;
-extern xcpuop_func xop_13fa_0;
-extern xcpuop_func xop_13fb_0;
-extern xcpuop_func xop_13fc_0;
-extern xcpuop_func xop_2000_0;
-extern xcpuop_func xop_2008_0;
-extern xcpuop_func xop_2010_0;
-extern xcpuop_func xop_2018_0;
-extern xcpuop_func xop_2020_0;
-extern xcpuop_func xop_2028_0;
-extern xcpuop_func xop_2030_0;
-extern xcpuop_func xop_2038_0;
-extern xcpuop_func xop_2039_0;
-extern xcpuop_func xop_203a_0;
-extern xcpuop_func xop_203b_0;
-extern xcpuop_func xop_203c_0;
-extern xcpuop_func xop_2040_0;
-extern xcpuop_func xop_2048_0;
-extern xcpuop_func xop_2050_0;
-extern xcpuop_func xop_2058_0;
-extern xcpuop_func xop_2060_0;
-extern xcpuop_func xop_2068_0;
-extern xcpuop_func xop_2070_0;
-extern xcpuop_func xop_2078_0;
-extern xcpuop_func xop_2079_0;
-extern xcpuop_func xop_207a_0;
-extern xcpuop_func xop_207b_0;
-extern xcpuop_func xop_207c_0;
-extern xcpuop_func xop_2080_0;
-extern xcpuop_func xop_2088_0;
-extern xcpuop_func xop_2090_0;
-extern xcpuop_func xop_2098_0;
-extern xcpuop_func xop_20a0_0;
-extern xcpuop_func xop_20a8_0;
-extern xcpuop_func xop_20b0_0;
-extern xcpuop_func xop_20b8_0;
-extern xcpuop_func xop_20b9_0;
-extern xcpuop_func xop_20ba_0;
-extern xcpuop_func xop_20bb_0;
-extern xcpuop_func xop_20bc_0;
-extern xcpuop_func xop_20c0_0;
-extern xcpuop_func xop_20c8_0;
-extern xcpuop_func xop_20d0_0;
-extern xcpuop_func xop_20d8_0;
-extern xcpuop_func xop_20e0_0;
-extern xcpuop_func xop_20e8_0;
-extern xcpuop_func xop_20f0_0;
-extern xcpuop_func xop_20f8_0;
-extern xcpuop_func xop_20f9_0;
-extern xcpuop_func xop_20fa_0;
-extern xcpuop_func xop_20fb_0;
-extern xcpuop_func xop_20fc_0;
-extern xcpuop_func xop_2100_0;
-extern xcpuop_func xop_2108_0;
-extern xcpuop_func xop_2110_0;
-extern xcpuop_func xop_2118_0;
-extern xcpuop_func xop_2120_0;
-extern xcpuop_func xop_2128_0;
-extern xcpuop_func xop_2130_0;
-extern xcpuop_func xop_2138_0;
-extern xcpuop_func xop_2139_0;
-extern xcpuop_func xop_213a_0;
-extern xcpuop_func xop_213b_0;
-extern xcpuop_func xop_213c_0;
-extern xcpuop_func xop_2140_0;
-extern xcpuop_func xop_2148_0;
-extern xcpuop_func xop_2150_0;
-extern xcpuop_func xop_2158_0;
-extern xcpuop_func xop_2160_0;
-extern xcpuop_func xop_2168_0;
-extern xcpuop_func xop_2170_0;
-extern xcpuop_func xop_2178_0;
-extern xcpuop_func xop_2179_0;
-extern xcpuop_func xop_217a_0;
-extern xcpuop_func xop_217b_0;
-extern xcpuop_func xop_217c_0;
-extern xcpuop_func xop_2180_0;
-extern xcpuop_func xop_2188_0;
-extern xcpuop_func xop_2190_0;
-extern xcpuop_func xop_2198_0;
-extern xcpuop_func xop_21a0_0;
-extern xcpuop_func xop_21a8_0;
-extern xcpuop_func xop_21b0_0;
-extern xcpuop_func xop_21b8_0;
-extern xcpuop_func xop_21b9_0;
-extern xcpuop_func xop_21ba_0;
-extern xcpuop_func xop_21bb_0;
-extern xcpuop_func xop_21bc_0;
-extern xcpuop_func xop_21c0_0;
-extern xcpuop_func xop_21c8_0;
-extern xcpuop_func xop_21d0_0;
-extern xcpuop_func xop_21d8_0;
-extern xcpuop_func xop_21e0_0;
-extern xcpuop_func xop_21e8_0;
-extern xcpuop_func xop_21f0_0;
-extern xcpuop_func xop_21f8_0;
-extern xcpuop_func xop_21f9_0;
-extern xcpuop_func xop_21fa_0;
-extern xcpuop_func xop_21fb_0;
-extern xcpuop_func xop_21fc_0;
-extern xcpuop_func xop_23c0_0;
-extern xcpuop_func xop_23c8_0;
-extern xcpuop_func xop_23d0_0;
-extern xcpuop_func xop_23d8_0;
-extern xcpuop_func xop_23e0_0;
-extern xcpuop_func xop_23e8_0;
-extern xcpuop_func xop_23f0_0;
-extern xcpuop_func xop_23f8_0;
-extern xcpuop_func xop_23f9_0;
-extern xcpuop_func xop_23fa_0;
-extern xcpuop_func xop_23fb_0;
-extern xcpuop_func xop_23fc_0;
-extern xcpuop_func xop_3000_0;
-extern xcpuop_func xop_3008_0;
-extern xcpuop_func xop_3010_0;
-extern xcpuop_func xop_3018_0;
-extern xcpuop_func xop_3020_0;
-extern xcpuop_func xop_3028_0;
-extern xcpuop_func xop_3030_0;
-extern xcpuop_func xop_3038_0;
-extern xcpuop_func xop_3039_0;
-extern xcpuop_func xop_303a_0;
-extern xcpuop_func xop_303b_0;
-extern xcpuop_func xop_303c_0;
-extern xcpuop_func xop_3040_0;
-extern xcpuop_func xop_3048_0;
-extern xcpuop_func xop_3050_0;
-extern xcpuop_func xop_3058_0;
-extern xcpuop_func xop_3060_0;
-extern xcpuop_func xop_3068_0;
-extern xcpuop_func xop_3070_0;
-extern xcpuop_func xop_3078_0;
-extern xcpuop_func xop_3079_0;
-extern xcpuop_func xop_307a_0;
-extern xcpuop_func xop_307b_0;
-extern xcpuop_func xop_307c_0;
-extern xcpuop_func xop_3080_0;
-extern xcpuop_func xop_3088_0;
-extern xcpuop_func xop_3090_0;
-extern xcpuop_func xop_3098_0;
-extern xcpuop_func xop_30a0_0;
-extern xcpuop_func xop_30a8_0;
-extern xcpuop_func xop_30b0_0;
-extern xcpuop_func xop_30b8_0;
-extern xcpuop_func xop_30b9_0;
-extern xcpuop_func xop_30ba_0;
-extern xcpuop_func xop_30bb_0;
-extern xcpuop_func xop_30bc_0;
-extern xcpuop_func xop_30c0_0;
-extern xcpuop_func xop_30c8_0;
-extern xcpuop_func xop_30d0_0;
-extern xcpuop_func xop_30d8_0;
-extern xcpuop_func xop_30e0_0;
-extern xcpuop_func xop_30e8_0;
-extern xcpuop_func xop_30f0_0;
-extern xcpuop_func xop_30f8_0;
-extern xcpuop_func xop_30f9_0;
-extern xcpuop_func xop_30fa_0;
-extern xcpuop_func xop_30fb_0;
-extern xcpuop_func xop_30fc_0;
-extern xcpuop_func xop_3100_0;
-extern xcpuop_func xop_3108_0;
-extern xcpuop_func xop_3110_0;
-extern xcpuop_func xop_3118_0;
-extern xcpuop_func xop_3120_0;
-extern xcpuop_func xop_3128_0;
-extern xcpuop_func xop_3130_0;
-extern xcpuop_func xop_3138_0;
-extern xcpuop_func xop_3139_0;
-extern xcpuop_func xop_313a_0;
-extern xcpuop_func xop_313b_0;
-extern xcpuop_func xop_313c_0;
-extern xcpuop_func xop_3140_0;
-extern xcpuop_func xop_3148_0;
-extern xcpuop_func xop_3150_0;
-extern xcpuop_func xop_3158_0;
-extern xcpuop_func xop_3160_0;
-extern xcpuop_func xop_3168_0;
-extern xcpuop_func xop_3170_0;
-extern xcpuop_func xop_3178_0;
-extern xcpuop_func xop_3179_0;
-extern xcpuop_func xop_317a_0;
-extern xcpuop_func xop_317b_0;
-extern xcpuop_func xop_317c_0;
-extern xcpuop_func xop_3180_0;
-extern xcpuop_func xop_3188_0;
-extern xcpuop_func xop_3190_0;
-extern xcpuop_func xop_3198_0;
-extern xcpuop_func xop_31a0_0;
-extern xcpuop_func xop_31a8_0;
-extern xcpuop_func xop_31b0_0;
-extern xcpuop_func xop_31b8_0;
-extern xcpuop_func xop_31b9_0;
-extern xcpuop_func xop_31ba_0;
-extern xcpuop_func xop_31bb_0;
-extern xcpuop_func xop_31bc_0;
-extern xcpuop_func xop_31c0_0;
-extern xcpuop_func xop_31c8_0;
-extern xcpuop_func xop_31d0_0;
-extern xcpuop_func xop_31d8_0;
-extern xcpuop_func xop_31e0_0;
-extern xcpuop_func xop_31e8_0;
-extern xcpuop_func xop_31f0_0;
-extern xcpuop_func xop_31f8_0;
-extern xcpuop_func xop_31f9_0;
-extern xcpuop_func xop_31fa_0;
-extern xcpuop_func xop_31fb_0;
-extern xcpuop_func xop_31fc_0;
-extern xcpuop_func xop_33c0_0;
-extern xcpuop_func xop_33c8_0;
-extern xcpuop_func xop_33d0_0;
-extern xcpuop_func xop_33d8_0;
-extern xcpuop_func xop_33e0_0;
-extern xcpuop_func xop_33e8_0;
-extern xcpuop_func xop_33f0_0;
-extern xcpuop_func xop_33f8_0;
-extern xcpuop_func xop_33f9_0;
-extern xcpuop_func xop_33fa_0;
-extern xcpuop_func xop_33fb_0;
-extern xcpuop_func xop_33fc_0;
-extern xcpuop_func xop_4000_0;
-extern xcpuop_func xop_4010_0;
-extern xcpuop_func xop_4018_0;
-extern xcpuop_func xop_4020_0;
-extern xcpuop_func xop_4028_0;
-extern xcpuop_func xop_4030_0;
-extern xcpuop_func xop_4038_0;
-extern xcpuop_func xop_4039_0;
-extern xcpuop_func xop_4040_0;
-extern xcpuop_func xop_4050_0;
-extern xcpuop_func xop_4058_0;
-extern xcpuop_func xop_4060_0;
-extern xcpuop_func xop_4068_0;
-extern xcpuop_func xop_4070_0;
-extern xcpuop_func xop_4078_0;
-extern xcpuop_func xop_4079_0;
-extern xcpuop_func xop_4080_0;
-extern xcpuop_func xop_4090_0;
-extern xcpuop_func xop_4098_0;
-extern xcpuop_func xop_40a0_0;
-extern xcpuop_func xop_40a8_0;
-extern xcpuop_func xop_40b0_0;
-extern xcpuop_func xop_40b8_0;
-extern xcpuop_func xop_40b9_0;
-extern xcpuop_func xop_40c0_0;
-extern xcpuop_func xop_40d0_0;
-extern xcpuop_func xop_40d8_0;
-extern xcpuop_func xop_40e0_0;
-extern xcpuop_func xop_40e8_0;
-extern xcpuop_func xop_40f0_0;
-extern xcpuop_func xop_40f8_0;
-extern xcpuop_func xop_40f9_0;
-extern xcpuop_func xop_4100_0;
-extern xcpuop_func xop_4110_0;
-extern xcpuop_func xop_4118_0;
-extern xcpuop_func xop_4120_0;
-extern xcpuop_func xop_4128_0;
-extern xcpuop_func xop_4130_0;
-extern xcpuop_func xop_4138_0;
-extern xcpuop_func xop_4139_0;
-extern xcpuop_func xop_413a_0;
-extern xcpuop_func xop_413b_0;
-extern xcpuop_func xop_413c_0;
-extern xcpuop_func xop_4180_0;
-extern xcpuop_func xop_4190_0;
-extern xcpuop_func xop_4198_0;
-extern xcpuop_func xop_41a0_0;
-extern xcpuop_func xop_41a8_0;
-extern xcpuop_func xop_41b0_0;
-extern xcpuop_func xop_41b8_0;
-extern xcpuop_func xop_41b9_0;
-extern xcpuop_func xop_41ba_0;
-extern xcpuop_func xop_41bb_0;
-extern xcpuop_func xop_41bc_0;
-extern xcpuop_func xop_41d0_0;
-extern xcpuop_func xop_41e8_0;
-extern xcpuop_func xop_41f0_0;
-extern xcpuop_func xop_41f8_0;
-extern xcpuop_func xop_41f9_0;
-extern xcpuop_func xop_41fa_0;
-extern xcpuop_func xop_41fb_0;
-extern xcpuop_func xop_4200_0;
-extern xcpuop_func xop_4210_0;
-extern xcpuop_func xop_4218_0;
-extern xcpuop_func xop_4220_0;
-extern xcpuop_func xop_4228_0;
-extern xcpuop_func xop_4230_0;
-extern xcpuop_func xop_4238_0;
-extern xcpuop_func xop_4239_0;
-extern xcpuop_func xop_4240_0;
-extern xcpuop_func xop_4250_0;
-extern xcpuop_func xop_4258_0;
-extern xcpuop_func xop_4260_0;
-extern xcpuop_func xop_4268_0;
-extern xcpuop_func xop_4270_0;
-extern xcpuop_func xop_4278_0;
-extern xcpuop_func xop_4279_0;
-extern xcpuop_func xop_4280_0;
-extern xcpuop_func xop_4290_0;
-extern xcpuop_func xop_4298_0;
-extern xcpuop_func xop_42a0_0;
-extern xcpuop_func xop_42a8_0;
-extern xcpuop_func xop_42b0_0;
-extern xcpuop_func xop_42b8_0;
-extern xcpuop_func xop_42b9_0;
-extern xcpuop_func xop_42c0_0;
-extern xcpuop_func xop_42d0_0;
-extern xcpuop_func xop_42d8_0;
-extern xcpuop_func xop_42e0_0;
-extern xcpuop_func xop_42e8_0;
-extern xcpuop_func xop_42f0_0;
-extern xcpuop_func xop_42f8_0;
-extern xcpuop_func xop_42f9_0;
-extern xcpuop_func xop_4400_0;
-extern xcpuop_func xop_4410_0;
-extern xcpuop_func xop_4418_0;
-extern xcpuop_func xop_4420_0;
-extern xcpuop_func xop_4428_0;
-extern xcpuop_func xop_4430_0;
-extern xcpuop_func xop_4438_0;
-extern xcpuop_func xop_4439_0;
-extern xcpuop_func xop_4440_0;
-extern xcpuop_func xop_4450_0;
-extern xcpuop_func xop_4458_0;
-extern xcpuop_func xop_4460_0;
-extern xcpuop_func xop_4468_0;
-extern xcpuop_func xop_4470_0;
-extern xcpuop_func xop_4478_0;
-extern xcpuop_func xop_4479_0;
-extern xcpuop_func xop_4480_0;
-extern xcpuop_func xop_4490_0;
-extern xcpuop_func xop_4498_0;
-extern xcpuop_func xop_44a0_0;
-extern xcpuop_func xop_44a8_0;
-extern xcpuop_func xop_44b0_0;
-extern xcpuop_func xop_44b8_0;
-extern xcpuop_func xop_44b9_0;
-extern xcpuop_func xop_44c0_0;
-extern xcpuop_func xop_44d0_0;
-extern xcpuop_func xop_44d8_0;
-extern xcpuop_func xop_44e0_0;
-extern xcpuop_func xop_44e8_0;
-extern xcpuop_func xop_44f0_0;
-extern xcpuop_func xop_44f8_0;
-extern xcpuop_func xop_44f9_0;
-extern xcpuop_func xop_44fa_0;
-extern xcpuop_func xop_44fb_0;
-extern xcpuop_func xop_44fc_0;
-extern xcpuop_func xop_4600_0;
-extern xcpuop_func xop_4610_0;
-extern xcpuop_func xop_4618_0;
-extern xcpuop_func xop_4620_0;
-extern xcpuop_func xop_4628_0;
-extern xcpuop_func xop_4630_0;
-extern xcpuop_func xop_4638_0;
-extern xcpuop_func xop_4639_0;
-extern xcpuop_func xop_4640_0;
-extern xcpuop_func xop_4650_0;
-extern xcpuop_func xop_4658_0;
-extern xcpuop_func xop_4660_0;
-extern xcpuop_func xop_4668_0;
-extern xcpuop_func xop_4670_0;
-extern xcpuop_func xop_4678_0;
-extern xcpuop_func xop_4679_0;
-extern xcpuop_func xop_4680_0;
-extern xcpuop_func xop_4690_0;
-extern xcpuop_func xop_4698_0;
-extern xcpuop_func xop_46a0_0;
-extern xcpuop_func xop_46a8_0;
-extern xcpuop_func xop_46b0_0;
-extern xcpuop_func xop_46b8_0;
-extern xcpuop_func xop_46b9_0;
-extern xcpuop_func xop_46c0_0;
-extern xcpuop_func xop_46d0_0;
-extern xcpuop_func xop_46d8_0;
-extern xcpuop_func xop_46e0_0;
-extern xcpuop_func xop_46e8_0;
-extern xcpuop_func xop_46f0_0;
-extern xcpuop_func xop_46f8_0;
-extern xcpuop_func xop_46f9_0;
-extern xcpuop_func xop_46fa_0;
-extern xcpuop_func xop_46fb_0;
-extern xcpuop_func xop_46fc_0;
-extern xcpuop_func xop_4800_0;
-extern xcpuop_func xop_4808_0;
-extern xcpuop_func xop_4810_0;
-extern xcpuop_func xop_4818_0;
-extern xcpuop_func xop_4820_0;
-extern xcpuop_func xop_4828_0;
-extern xcpuop_func xop_4830_0;
-extern xcpuop_func xop_4838_0;
-extern xcpuop_func xop_4839_0;
-extern xcpuop_func xop_4840_0;
-extern xcpuop_func xop_4848_0;
-extern xcpuop_func xop_4850_0;
-extern xcpuop_func xop_4868_0;
-extern xcpuop_func xop_4870_0;
-extern xcpuop_func xop_4878_0;
-extern xcpuop_func xop_4879_0;
-extern xcpuop_func xop_487a_0;
-extern xcpuop_func xop_487b_0;
-extern xcpuop_func xop_4880_0;
-extern xcpuop_func xop_4890_0;
-extern xcpuop_func xop_48a0_0;
-extern xcpuop_func xop_48a8_0;
-extern xcpuop_func xop_48b0_0;
-extern xcpuop_func xop_48b8_0;
-extern xcpuop_func xop_48b9_0;
-extern xcpuop_func xop_48c0_0;
-extern xcpuop_func xop_48d0_0;
-extern xcpuop_func xop_48e0_0;
-extern xcpuop_func xop_48e8_0;
-extern xcpuop_func xop_48f0_0;
-extern xcpuop_func xop_48f8_0;
-extern xcpuop_func xop_48f9_0;
-extern xcpuop_func xop_49c0_0;
-extern xcpuop_func xop_4a00_0;
-extern xcpuop_func xop_4a10_0;
-extern xcpuop_func xop_4a18_0;
-extern xcpuop_func xop_4a20_0;
-extern xcpuop_func xop_4a28_0;
-extern xcpuop_func xop_4a30_0;
-extern xcpuop_func xop_4a38_0;
-extern xcpuop_func xop_4a39_0;
-extern xcpuop_func xop_4a3a_0;
-extern xcpuop_func xop_4a3b_0;
-extern xcpuop_func xop_4a3c_0;
-extern xcpuop_func xop_4a40_0;
-extern xcpuop_func xop_4a48_0;
-extern xcpuop_func xop_4a50_0;
-extern xcpuop_func xop_4a58_0;
-extern xcpuop_func xop_4a60_0;
-extern xcpuop_func xop_4a68_0;
-extern xcpuop_func xop_4a70_0;
-extern xcpuop_func xop_4a78_0;
-extern xcpuop_func xop_4a79_0;
-extern xcpuop_func xop_4a7a_0;
-extern xcpuop_func xop_4a7b_0;
-extern xcpuop_func xop_4a7c_0;
-extern xcpuop_func xop_4a80_0;
-extern xcpuop_func xop_4a88_0;
-extern xcpuop_func xop_4a90_0;
-extern xcpuop_func xop_4a98_0;
-extern xcpuop_func xop_4aa0_0;
-extern xcpuop_func xop_4aa8_0;
-extern xcpuop_func xop_4ab0_0;
-extern xcpuop_func xop_4ab8_0;
-extern xcpuop_func xop_4ab9_0;
-extern xcpuop_func xop_4aba_0;
-extern xcpuop_func xop_4abb_0;
-extern xcpuop_func xop_4abc_0;
-extern xcpuop_func xop_4ac0_0;
-extern xcpuop_func xop_4ad0_0;
-extern xcpuop_func xop_4ad8_0;
-extern xcpuop_func xop_4ae0_0;
-extern xcpuop_func xop_4ae8_0;
-extern xcpuop_func xop_4af0_0;
-extern xcpuop_func xop_4af8_0;
-extern xcpuop_func xop_4af9_0;
-extern xcpuop_func xop_4c00_0;
-extern xcpuop_func xop_4c10_0;
-extern xcpuop_func xop_4c18_0;
-extern xcpuop_func xop_4c20_0;
-extern xcpuop_func xop_4c28_0;
-extern xcpuop_func xop_4c30_0;
-extern xcpuop_func xop_4c38_0;
-extern xcpuop_func xop_4c39_0;
-extern xcpuop_func xop_4c3a_0;
-extern xcpuop_func xop_4c3b_0;
-extern xcpuop_func xop_4c3c_0;
-extern xcpuop_func xop_4c40_0;
-extern xcpuop_func xop_4c50_0;
-extern xcpuop_func xop_4c58_0;
-extern xcpuop_func xop_4c60_0;
-extern xcpuop_func xop_4c68_0;
-extern xcpuop_func xop_4c70_0;
-extern xcpuop_func xop_4c78_0;
-extern xcpuop_func xop_4c79_0;
-extern xcpuop_func xop_4c7a_0;
-extern xcpuop_func xop_4c7b_0;
-extern xcpuop_func xop_4c7c_0;
-extern xcpuop_func xop_4c90_0;
-extern xcpuop_func xop_4c98_0;
-extern xcpuop_func xop_4ca8_0;
-extern xcpuop_func xop_4cb0_0;
-extern xcpuop_func xop_4cb8_0;
-extern xcpuop_func xop_4cb9_0;
-extern xcpuop_func xop_4cba_0;
-extern xcpuop_func xop_4cbb_0;
-extern xcpuop_func xop_4cd0_0;
-extern xcpuop_func xop_4cd8_0;
-extern xcpuop_func xop_4ce8_0;
-extern xcpuop_func xop_4cf0_0;
-extern xcpuop_func xop_4cf8_0;
-extern xcpuop_func xop_4cf9_0;
-extern xcpuop_func xop_4cfa_0;
-extern xcpuop_func xop_4cfb_0;
-extern xcpuop_func xop_4e40_0;
-extern xcpuop_func xop_4e50_0;
-extern xcpuop_func xop_4e58_0;
-extern xcpuop_func xop_4e60_0;
-extern xcpuop_func xop_4e68_0;
-extern xcpuop_func xop_4e70_0;
-extern xcpuop_func xop_4e71_0;
-extern xcpuop_func xop_4e72_0;
-extern xcpuop_func xop_4e73_0;
-extern xcpuop_func xop_4e74_0;
-extern xcpuop_func xop_4e75_0;
-extern xcpuop_func xop_4e76_0;
-extern xcpuop_func xop_4e77_0;
-extern xcpuop_func xop_4e7a_0;
-extern xcpuop_func xop_4e7b_0;
-extern xcpuop_func xop_4e90_0;
-extern xcpuop_func xop_4ea8_0;
-extern xcpuop_func xop_4eb0_0;
-extern xcpuop_func xop_4eb8_0;
-extern xcpuop_func xop_4eb9_0;
-extern xcpuop_func xop_4eba_0;
-extern xcpuop_func xop_4ebb_0;
-extern xcpuop_func xop_4ed0_0;
-extern xcpuop_func xop_4ee8_0;
-extern xcpuop_func xop_4ef0_0;
-extern xcpuop_func xop_4ef8_0;
-extern xcpuop_func xop_4ef9_0;
-extern xcpuop_func xop_4efa_0;
-extern xcpuop_func xop_4efb_0;
-extern xcpuop_func xop_5000_0;
-extern xcpuop_func xop_5010_0;
-extern xcpuop_func xop_5018_0;
-extern xcpuop_func xop_5020_0;
-extern xcpuop_func xop_5028_0;
-extern xcpuop_func xop_5030_0;
-extern xcpuop_func xop_5038_0;
-extern xcpuop_func xop_5039_0;
-extern xcpuop_func xop_5040_0;
-extern xcpuop_func xop_5048_0;
-extern xcpuop_func xop_5050_0;
-extern xcpuop_func xop_5058_0;
-extern xcpuop_func xop_5060_0;
-extern xcpuop_func xop_5068_0;
-extern xcpuop_func xop_5070_0;
-extern xcpuop_func xop_5078_0;
-extern xcpuop_func xop_5079_0;
-extern xcpuop_func xop_5080_0;
-extern xcpuop_func xop_5088_0;
-extern xcpuop_func xop_5090_0;
-extern xcpuop_func xop_5098_0;
-extern xcpuop_func xop_50a0_0;
-extern xcpuop_func xop_50a8_0;
-extern xcpuop_func xop_50b0_0;
-extern xcpuop_func xop_50b8_0;
-extern xcpuop_func xop_50b9_0;
-extern xcpuop_func xop_50c0_0;
-extern xcpuop_func xop_50c8_0;
-extern xcpuop_func xop_50d0_0;
-extern xcpuop_func xop_50d8_0;
-extern xcpuop_func xop_50e0_0;
-extern xcpuop_func xop_50e8_0;
-extern xcpuop_func xop_50f0_0;
-extern xcpuop_func xop_50f8_0;
-extern xcpuop_func xop_50f9_0;
-extern xcpuop_func xop_50fa_0;
-extern xcpuop_func xop_50fb_0;
-extern xcpuop_func xop_50fc_0;
-extern xcpuop_func xop_5100_0;
-extern xcpuop_func xop_5110_0;
-extern xcpuop_func xop_5118_0;
-extern xcpuop_func xop_5120_0;
-extern xcpuop_func xop_5128_0;
-extern xcpuop_func xop_5130_0;
-extern xcpuop_func xop_5138_0;
-extern xcpuop_func xop_5139_0;
-extern xcpuop_func xop_5140_0;
-extern xcpuop_func xop_5148_0;
-extern xcpuop_func xop_5150_0;
-extern xcpuop_func xop_5158_0;
-extern xcpuop_func xop_5160_0;
-extern xcpuop_func xop_5168_0;
-extern xcpuop_func xop_5170_0;
-extern xcpuop_func xop_5178_0;
-extern xcpuop_func xop_5179_0;
-extern xcpuop_func xop_5180_0;
-extern xcpuop_func xop_5188_0;
-extern xcpuop_func xop_5190_0;
-extern xcpuop_func xop_5198_0;
-extern xcpuop_func xop_51a0_0;
-extern xcpuop_func xop_51a8_0;
-extern xcpuop_func xop_51b0_0;
-extern xcpuop_func xop_51b8_0;
-extern xcpuop_func xop_51b9_0;
-extern xcpuop_func xop_51c0_0;
-extern xcpuop_func xop_51c8_0;
-extern xcpuop_func xop_51d0_0;
-extern xcpuop_func xop_51d8_0;
-extern xcpuop_func xop_51e0_0;
-extern xcpuop_func xop_51e8_0;
-extern xcpuop_func xop_51f0_0;
-extern xcpuop_func xop_51f8_0;
-extern xcpuop_func xop_51f9_0;
-extern xcpuop_func xop_51fa_0;
-extern xcpuop_func xop_51fb_0;
-extern xcpuop_func xop_51fc_0;
-extern xcpuop_func xop_52c0_0;
-extern xcpuop_func xop_52c8_0;
-extern xcpuop_func xop_52d0_0;
-extern xcpuop_func xop_52d8_0;
-extern xcpuop_func xop_52e0_0;
-extern xcpuop_func xop_52e8_0;
-extern xcpuop_func xop_52f0_0;
-extern xcpuop_func xop_52f8_0;
-extern xcpuop_func xop_52f9_0;
-extern xcpuop_func xop_52fa_0;
-extern xcpuop_func xop_52fb_0;
-extern xcpuop_func xop_52fc_0;
-extern xcpuop_func xop_53c0_0;
-extern xcpuop_func xop_53c8_0;
-extern xcpuop_func xop_53d0_0;
-extern xcpuop_func xop_53d8_0;
-extern xcpuop_func xop_53e0_0;
-extern xcpuop_func xop_53e8_0;
-extern xcpuop_func xop_53f0_0;
-extern xcpuop_func xop_53f8_0;
-extern xcpuop_func xop_53f9_0;
-extern xcpuop_func xop_53fa_0;
-extern xcpuop_func xop_53fb_0;
-extern xcpuop_func xop_53fc_0;
-extern xcpuop_func xop_54c0_0;
-extern xcpuop_func xop_54c8_0;
-extern xcpuop_func xop_54d0_0;
-extern xcpuop_func xop_54d8_0;
-extern xcpuop_func xop_54e0_0;
-extern xcpuop_func xop_54e8_0;
-extern xcpuop_func xop_54f0_0;
-extern xcpuop_func xop_54f8_0;
-extern xcpuop_func xop_54f9_0;
-extern xcpuop_func xop_54fa_0;
-extern xcpuop_func xop_54fb_0;
-extern xcpuop_func xop_54fc_0;
-extern xcpuop_func xop_55c0_0;
-extern xcpuop_func xop_55c8_0;
-extern xcpuop_func xop_55d0_0;
-extern xcpuop_func xop_55d8_0;
-extern xcpuop_func xop_55e0_0;
-extern xcpuop_func xop_55e8_0;
-extern xcpuop_func xop_55f0_0;
-extern xcpuop_func xop_55f8_0;
-extern xcpuop_func xop_55f9_0;
-extern xcpuop_func xop_55fa_0;
-extern xcpuop_func xop_55fb_0;
-extern xcpuop_func xop_55fc_0;
-extern xcpuop_func xop_56c0_0;
-extern xcpuop_func xop_56c8_0;
-extern xcpuop_func xop_56d0_0;
-extern xcpuop_func xop_56d8_0;
-extern xcpuop_func xop_56e0_0;
-extern xcpuop_func xop_56e8_0;
-extern xcpuop_func xop_56f0_0;
-extern xcpuop_func xop_56f8_0;
-extern xcpuop_func xop_56f9_0;
-extern xcpuop_func xop_56fa_0;
-extern xcpuop_func xop_56fb_0;
-extern xcpuop_func xop_56fc_0;
-extern xcpuop_func xop_57c0_0;
-extern xcpuop_func xop_57c8_0;
-extern xcpuop_func xop_57d0_0;
-extern xcpuop_func xop_57d8_0;
-extern xcpuop_func xop_57e0_0;
-extern xcpuop_func xop_57e8_0;
-extern xcpuop_func xop_57f0_0;
-extern xcpuop_func xop_57f8_0;
-extern xcpuop_func xop_57f9_0;
-extern xcpuop_func xop_57fa_0;
-extern xcpuop_func xop_57fb_0;
-extern xcpuop_func xop_57fc_0;
-extern xcpuop_func xop_58c0_0;
-extern xcpuop_func xop_58c8_0;
-extern xcpuop_func xop_58d0_0;
-extern xcpuop_func xop_58d8_0;
-extern xcpuop_func xop_58e0_0;
-extern xcpuop_func xop_58e8_0;
-extern xcpuop_func xop_58f0_0;
-extern xcpuop_func xop_58f8_0;
-extern xcpuop_func xop_58f9_0;
-extern xcpuop_func xop_58fa_0;
-extern xcpuop_func xop_58fb_0;
-extern xcpuop_func xop_58fc_0;
-extern xcpuop_func xop_59c0_0;
-extern xcpuop_func xop_59c8_0;
-extern xcpuop_func xop_59d0_0;
-extern xcpuop_func xop_59d8_0;
-extern xcpuop_func xop_59e0_0;
-extern xcpuop_func xop_59e8_0;
-extern xcpuop_func xop_59f0_0;
-extern xcpuop_func xop_59f8_0;
-extern xcpuop_func xop_59f9_0;
-extern xcpuop_func xop_59fa_0;
-extern xcpuop_func xop_59fb_0;
-extern xcpuop_func xop_59fc_0;
-extern xcpuop_func xop_5ac0_0;
-extern xcpuop_func xop_5ac8_0;
-extern xcpuop_func xop_5ad0_0;
-extern xcpuop_func xop_5ad8_0;
-extern xcpuop_func xop_5ae0_0;
-extern xcpuop_func xop_5ae8_0;
-extern xcpuop_func xop_5af0_0;
-extern xcpuop_func xop_5af8_0;
-extern xcpuop_func xop_5af9_0;
-extern xcpuop_func xop_5afa_0;
-extern xcpuop_func xop_5afb_0;
-extern xcpuop_func xop_5afc_0;
-extern xcpuop_func xop_5bc0_0;
-extern xcpuop_func xop_5bc8_0;
-extern xcpuop_func xop_5bd0_0;
-extern xcpuop_func xop_5bd8_0;
-extern xcpuop_func xop_5be0_0;
-extern xcpuop_func xop_5be8_0;
-extern xcpuop_func xop_5bf0_0;
-extern xcpuop_func xop_5bf8_0;
-extern xcpuop_func xop_5bf9_0;
-extern xcpuop_func xop_5bfa_0;
-extern xcpuop_func xop_5bfb_0;
-extern xcpuop_func xop_5bfc_0;
-extern xcpuop_func xop_5cc0_0;
-extern xcpuop_func xop_5cc8_0;
-extern xcpuop_func xop_5cd0_0;
-extern xcpuop_func xop_5cd8_0;
-extern xcpuop_func xop_5ce0_0;
-extern xcpuop_func xop_5ce8_0;
-extern xcpuop_func xop_5cf0_0;
-extern xcpuop_func xop_5cf8_0;
-extern xcpuop_func xop_5cf9_0;
-extern xcpuop_func xop_5cfa_0;
-extern xcpuop_func xop_5cfb_0;
-extern xcpuop_func xop_5cfc_0;
-extern xcpuop_func xop_5dc0_0;
-extern xcpuop_func xop_5dc8_0;
-extern xcpuop_func xop_5dd0_0;
-extern xcpuop_func xop_5dd8_0;
-extern xcpuop_func xop_5de0_0;
-extern xcpuop_func xop_5de8_0;
-extern xcpuop_func xop_5df0_0;
-extern xcpuop_func xop_5df8_0;
-extern xcpuop_func xop_5df9_0;
-extern xcpuop_func xop_5dfa_0;
-extern xcpuop_func xop_5dfb_0;
-extern xcpuop_func xop_5dfc_0;
-extern xcpuop_func xop_5ec0_0;
-extern xcpuop_func xop_5ec8_0;
-extern xcpuop_func xop_5ed0_0;
-extern xcpuop_func xop_5ed8_0;
-extern xcpuop_func xop_5ee0_0;
-extern xcpuop_func xop_5ee8_0;
-extern xcpuop_func xop_5ef0_0;
-extern xcpuop_func xop_5ef8_0;
-extern xcpuop_func xop_5ef9_0;
-extern xcpuop_func xop_5efa_0;
-extern xcpuop_func xop_5efb_0;
-extern xcpuop_func xop_5efc_0;
-extern xcpuop_func xop_5fc0_0;
-extern xcpuop_func xop_5fc8_0;
-extern xcpuop_func xop_5fd0_0;
-extern xcpuop_func xop_5fd8_0;
-extern xcpuop_func xop_5fe0_0;
-extern xcpuop_func xop_5fe8_0;
-extern xcpuop_func xop_5ff0_0;
-extern xcpuop_func xop_5ff8_0;
-extern xcpuop_func xop_5ff9_0;
-extern xcpuop_func xop_5ffa_0;
-extern xcpuop_func xop_5ffb_0;
-extern xcpuop_func xop_5ffc_0;
-extern xcpuop_func xop_6000_0;
-extern xcpuop_func xop_6001_0;
-extern xcpuop_func xop_60ff_0;
-extern xcpuop_func xop_6100_0;
-extern xcpuop_func xop_6101_0;
-extern xcpuop_func xop_61ff_0;
-extern xcpuop_func xop_6200_0;
-extern xcpuop_func xop_6201_0;
-extern xcpuop_func xop_62ff_0;
-extern xcpuop_func xop_6300_0;
-extern xcpuop_func xop_6301_0;
-extern xcpuop_func xop_63ff_0;
-extern xcpuop_func xop_6400_0;
-extern xcpuop_func xop_6401_0;
-extern xcpuop_func xop_64ff_0;
-extern xcpuop_func xop_6500_0;
-extern xcpuop_func xop_6501_0;
-extern xcpuop_func xop_65ff_0;
-extern xcpuop_func xop_6600_0;
-extern xcpuop_func xop_6601_0;
-extern xcpuop_func xop_66ff_0;
-extern xcpuop_func xop_6700_0;
-extern xcpuop_func xop_6701_0;
-extern xcpuop_func xop_67ff_0;
-extern xcpuop_func xop_6800_0;
-extern xcpuop_func xop_6801_0;
-extern xcpuop_func xop_68ff_0;
-extern xcpuop_func xop_6900_0;
-extern xcpuop_func xop_6901_0;
-extern xcpuop_func xop_69ff_0;
-extern xcpuop_func xop_6a00_0;
-extern xcpuop_func xop_6a01_0;
-extern xcpuop_func xop_6aff_0;
-extern xcpuop_func xop_6b00_0;
-extern xcpuop_func xop_6b01_0;
-extern xcpuop_func xop_6bff_0;
-extern xcpuop_func xop_6c00_0;
-extern xcpuop_func xop_6c01_0;
-extern xcpuop_func xop_6cff_0;
-extern xcpuop_func xop_6d00_0;
-extern xcpuop_func xop_6d01_0;
-extern xcpuop_func xop_6dff_0;
-extern xcpuop_func xop_6e00_0;
-extern xcpuop_func xop_6e01_0;
-extern xcpuop_func xop_6eff_0;
-extern xcpuop_func xop_6f00_0;
-extern xcpuop_func xop_6f01_0;
-extern xcpuop_func xop_6fff_0;
-extern xcpuop_func xop_7000_0;
-extern xcpuop_func xop_8000_0;
-extern xcpuop_func xop_8010_0;
-extern xcpuop_func xop_8018_0;
-extern xcpuop_func xop_8020_0;
-extern xcpuop_func xop_8028_0;
-extern xcpuop_func xop_8030_0;
-extern xcpuop_func xop_8038_0;
-extern xcpuop_func xop_8039_0;
-extern xcpuop_func xop_803a_0;
-extern xcpuop_func xop_803b_0;
-extern xcpuop_func xop_803c_0;
-extern xcpuop_func xop_8040_0;
-extern xcpuop_func xop_8050_0;
-extern xcpuop_func xop_8058_0;
-extern xcpuop_func xop_8060_0;
-extern xcpuop_func xop_8068_0;
-extern xcpuop_func xop_8070_0;
-extern xcpuop_func xop_8078_0;
-extern xcpuop_func xop_8079_0;
-extern xcpuop_func xop_807a_0;
-extern xcpuop_func xop_807b_0;
-extern xcpuop_func xop_807c_0;
-extern xcpuop_func xop_8080_0;
-extern xcpuop_func xop_8090_0;
-extern xcpuop_func xop_8098_0;
-extern xcpuop_func xop_80a0_0;
-extern xcpuop_func xop_80a8_0;
-extern xcpuop_func xop_80b0_0;
-extern xcpuop_func xop_80b8_0;
-extern xcpuop_func xop_80b9_0;
-extern xcpuop_func xop_80ba_0;
-extern xcpuop_func xop_80bb_0;
-extern xcpuop_func xop_80bc_0;
-extern xcpuop_func xop_80c0_0;
-extern xcpuop_func xop_80d0_0;
-extern xcpuop_func xop_80d8_0;
-extern xcpuop_func xop_80e0_0;
-extern xcpuop_func xop_80e8_0;
-extern xcpuop_func xop_80f0_0;
-extern xcpuop_func xop_80f8_0;
-extern xcpuop_func xop_80f9_0;
-extern xcpuop_func xop_80fa_0;
-extern xcpuop_func xop_80fb_0;
-extern xcpuop_func xop_80fc_0;
-extern xcpuop_func xop_8100_0;
-extern xcpuop_func xop_8108_0;
-extern xcpuop_func xop_8110_0;
-extern xcpuop_func xop_8118_0;
-extern xcpuop_func xop_8120_0;
-extern xcpuop_func xop_8128_0;
-extern xcpuop_func xop_8130_0;
-extern xcpuop_func xop_8138_0;
-extern xcpuop_func xop_8139_0;
-extern xcpuop_func xop_8140_0;
-extern xcpuop_func xop_8148_0;
-extern xcpuop_func xop_8150_0;
-extern xcpuop_func xop_8158_0;
-extern xcpuop_func xop_8160_0;
-extern xcpuop_func xop_8168_0;
-extern xcpuop_func xop_8170_0;
-extern xcpuop_func xop_8178_0;
-extern xcpuop_func xop_8179_0;
-extern xcpuop_func xop_8180_0;
-extern xcpuop_func xop_8188_0;
-extern xcpuop_func xop_8190_0;
-extern xcpuop_func xop_8198_0;
-extern xcpuop_func xop_81a0_0;
-extern xcpuop_func xop_81a8_0;
-extern xcpuop_func xop_81b0_0;
-extern xcpuop_func xop_81b8_0;
-extern xcpuop_func xop_81b9_0;
-extern xcpuop_func xop_81c0_0;
-extern xcpuop_func xop_81d0_0;
-extern xcpuop_func xop_81d8_0;
-extern xcpuop_func xop_81e0_0;
-extern xcpuop_func xop_81e8_0;
-extern xcpuop_func xop_81f0_0;
-extern xcpuop_func xop_81f8_0;
-extern xcpuop_func xop_81f9_0;
-extern xcpuop_func xop_81fa_0;
-extern xcpuop_func xop_81fb_0;
-extern xcpuop_func xop_81fc_0;
-extern xcpuop_func xop_9000_0;
-extern xcpuop_func xop_9010_0;
-extern xcpuop_func xop_9018_0;
-extern xcpuop_func xop_9020_0;
-extern xcpuop_func xop_9028_0;
-extern xcpuop_func xop_9030_0;
-extern xcpuop_func xop_9038_0;
-extern xcpuop_func xop_9039_0;
-extern xcpuop_func xop_903a_0;
-extern xcpuop_func xop_903b_0;
-extern xcpuop_func xop_903c_0;
-extern xcpuop_func xop_9040_0;
-extern xcpuop_func xop_9048_0;
-extern xcpuop_func xop_9050_0;
-extern xcpuop_func xop_9058_0;
-extern xcpuop_func xop_9060_0;
-extern xcpuop_func xop_9068_0;
-extern xcpuop_func xop_9070_0;
-extern xcpuop_func xop_9078_0;
-extern xcpuop_func xop_9079_0;
-extern xcpuop_func xop_907a_0;
-extern xcpuop_func xop_907b_0;
-extern xcpuop_func xop_907c_0;
-extern xcpuop_func xop_9080_0;
-extern xcpuop_func xop_9088_0;
-extern xcpuop_func xop_9090_0;
-extern xcpuop_func xop_9098_0;
-extern xcpuop_func xop_90a0_0;
-extern xcpuop_func xop_90a8_0;
-extern xcpuop_func xop_90b0_0;
-extern xcpuop_func xop_90b8_0;
-extern xcpuop_func xop_90b9_0;
-extern xcpuop_func xop_90ba_0;
-extern xcpuop_func xop_90bb_0;
-extern xcpuop_func xop_90bc_0;
-extern xcpuop_func xop_90c0_0;
-extern xcpuop_func xop_90c8_0;
-extern xcpuop_func xop_90d0_0;
-extern xcpuop_func xop_90d8_0;
-extern xcpuop_func xop_90e0_0;
-extern xcpuop_func xop_90e8_0;
-extern xcpuop_func xop_90f0_0;
-extern xcpuop_func xop_90f8_0;
-extern xcpuop_func xop_90f9_0;
-extern xcpuop_func xop_90fa_0;
-extern xcpuop_func xop_90fb_0;
-extern xcpuop_func xop_90fc_0;
-extern xcpuop_func xop_9100_0;
-extern xcpuop_func xop_9108_0;
-extern xcpuop_func xop_9110_0;
-extern xcpuop_func xop_9118_0;
-extern xcpuop_func xop_9120_0;
-extern xcpuop_func xop_9128_0;
-extern xcpuop_func xop_9130_0;
-extern xcpuop_func xop_9138_0;
-extern xcpuop_func xop_9139_0;
-extern xcpuop_func xop_9140_0;
-extern xcpuop_func xop_9148_0;
-extern xcpuop_func xop_9150_0;
-extern xcpuop_func xop_9158_0;
-extern xcpuop_func xop_9160_0;
-extern xcpuop_func xop_9168_0;
-extern xcpuop_func xop_9170_0;
-extern xcpuop_func xop_9178_0;
-extern xcpuop_func xop_9179_0;
-extern xcpuop_func xop_9180_0;
-extern xcpuop_func xop_9188_0;
-extern xcpuop_func xop_9190_0;
-extern xcpuop_func xop_9198_0;
-extern xcpuop_func xop_91a0_0;
-extern xcpuop_func xop_91a8_0;
-extern xcpuop_func xop_91b0_0;
-extern xcpuop_func xop_91b8_0;
-extern xcpuop_func xop_91b9_0;
-extern xcpuop_func xop_91c0_0;
-extern xcpuop_func xop_91c8_0;
-extern xcpuop_func xop_91d0_0;
-extern xcpuop_func xop_91d8_0;
-extern xcpuop_func xop_91e0_0;
-extern xcpuop_func xop_91e8_0;
-extern xcpuop_func xop_91f0_0;
-extern xcpuop_func xop_91f8_0;
-extern xcpuop_func xop_91f9_0;
-extern xcpuop_func xop_91fa_0;
-extern xcpuop_func xop_91fb_0;
-extern xcpuop_func xop_91fc_0;
-extern xcpuop_func xop_b000_0;
-extern xcpuop_func xop_b010_0;
-extern xcpuop_func xop_b018_0;
-extern xcpuop_func xop_b020_0;
-extern xcpuop_func xop_b028_0;
-extern xcpuop_func xop_b030_0;
-extern xcpuop_func xop_b038_0;
-extern xcpuop_func xop_b039_0;
-extern xcpuop_func xop_b03a_0;
-extern xcpuop_func xop_b03b_0;
-extern xcpuop_func xop_b03c_0;
-extern xcpuop_func xop_b040_0;
-extern xcpuop_func xop_b048_0;
-extern xcpuop_func xop_b050_0;
-extern xcpuop_func xop_b058_0;
-extern xcpuop_func xop_b060_0;
-extern xcpuop_func xop_b068_0;
-extern xcpuop_func xop_b070_0;
-extern xcpuop_func xop_b078_0;
-extern xcpuop_func xop_b079_0;
-extern xcpuop_func xop_b07a_0;
-extern xcpuop_func xop_b07b_0;
-extern xcpuop_func xop_b07c_0;
-extern xcpuop_func xop_b080_0;
-extern xcpuop_func xop_b088_0;
-extern xcpuop_func xop_b090_0;
-extern xcpuop_func xop_b098_0;
-extern xcpuop_func xop_b0a0_0;
-extern xcpuop_func xop_b0a8_0;
-extern xcpuop_func xop_b0b0_0;
-extern xcpuop_func xop_b0b8_0;
-extern xcpuop_func xop_b0b9_0;
-extern xcpuop_func xop_b0ba_0;
-extern xcpuop_func xop_b0bb_0;
-extern xcpuop_func xop_b0bc_0;
-extern xcpuop_func xop_b0c0_0;
-extern xcpuop_func xop_b0c8_0;
-extern xcpuop_func xop_b0d0_0;
-extern xcpuop_func xop_b0d8_0;
-extern xcpuop_func xop_b0e0_0;
-extern xcpuop_func xop_b0e8_0;
-extern xcpuop_func xop_b0f0_0;
-extern xcpuop_func xop_b0f8_0;
-extern xcpuop_func xop_b0f9_0;
-extern xcpuop_func xop_b0fa_0;
-extern xcpuop_func xop_b0fb_0;
-extern xcpuop_func xop_b0fc_0;
-extern xcpuop_func xop_b100_0;
-extern xcpuop_func xop_b108_0;
-extern xcpuop_func xop_b110_0;
-extern xcpuop_func xop_b118_0;
-extern xcpuop_func xop_b120_0;
-extern xcpuop_func xop_b128_0;
-extern xcpuop_func xop_b130_0;
-extern xcpuop_func xop_b138_0;
-extern xcpuop_func xop_b139_0;
-extern xcpuop_func xop_b140_0;
-extern xcpuop_func xop_b148_0;
-extern xcpuop_func xop_b150_0;
-extern xcpuop_func xop_b158_0;
-extern xcpuop_func xop_b160_0;
-extern xcpuop_func xop_b168_0;
-extern xcpuop_func xop_b170_0;
-extern xcpuop_func xop_b178_0;
-extern xcpuop_func xop_b179_0;
-extern xcpuop_func xop_b180_0;
-extern xcpuop_func xop_b188_0;
-extern xcpuop_func xop_b190_0;
-extern xcpuop_func xop_b198_0;
-extern xcpuop_func xop_b1a0_0;
-extern xcpuop_func xop_b1a8_0;
-extern xcpuop_func xop_b1b0_0;
-extern xcpuop_func xop_b1b8_0;
-extern xcpuop_func xop_b1b9_0;
-extern xcpuop_func xop_b1c0_0;
-extern xcpuop_func xop_b1c8_0;
-extern xcpuop_func xop_b1d0_0;
-extern xcpuop_func xop_b1d8_0;
-extern xcpuop_func xop_b1e0_0;
-extern xcpuop_func xop_b1e8_0;
-extern xcpuop_func xop_b1f0_0;
-extern xcpuop_func xop_b1f8_0;
-extern xcpuop_func xop_b1f9_0;
-extern xcpuop_func xop_b1fa_0;
-extern xcpuop_func xop_b1fb_0;
-extern xcpuop_func xop_b1fc_0;
-extern xcpuop_func xop_c000_0;
-extern xcpuop_func xop_c010_0;
-extern xcpuop_func xop_c018_0;
-extern xcpuop_func xop_c020_0;
-extern xcpuop_func xop_c028_0;
-extern xcpuop_func xop_c030_0;
-extern xcpuop_func xop_c038_0;
-extern xcpuop_func xop_c039_0;
-extern xcpuop_func xop_c03a_0;
-extern xcpuop_func xop_c03b_0;
-extern xcpuop_func xop_c03c_0;
-extern xcpuop_func xop_c040_0;
-extern xcpuop_func xop_c050_0;
-extern xcpuop_func xop_c058_0;
-extern xcpuop_func xop_c060_0;
-extern xcpuop_func xop_c068_0;
-extern xcpuop_func xop_c070_0;
-extern xcpuop_func xop_c078_0;
-extern xcpuop_func xop_c079_0;
-extern xcpuop_func xop_c07a_0;
-extern xcpuop_func xop_c07b_0;
-extern xcpuop_func xop_c07c_0;
-extern xcpuop_func xop_c080_0;
-extern xcpuop_func xop_c090_0;
-extern xcpuop_func xop_c098_0;
-extern xcpuop_func xop_c0a0_0;
-extern xcpuop_func xop_c0a8_0;
-extern xcpuop_func xop_c0b0_0;
-extern xcpuop_func xop_c0b8_0;
-extern xcpuop_func xop_c0b9_0;
-extern xcpuop_func xop_c0ba_0;
-extern xcpuop_func xop_c0bb_0;
-extern xcpuop_func xop_c0bc_0;
-extern xcpuop_func xop_c0c0_0;
-extern xcpuop_func xop_c0d0_0;
-extern xcpuop_func xop_c0d8_0;
-extern xcpuop_func xop_c0e0_0;
-extern xcpuop_func xop_c0e8_0;
-extern xcpuop_func xop_c0f0_0;
-extern xcpuop_func xop_c0f8_0;
-extern xcpuop_func xop_c0f9_0;
-extern xcpuop_func xop_c0fa_0;
-extern xcpuop_func xop_c0fb_0;
-extern xcpuop_func xop_c0fc_0;
-extern xcpuop_func xop_c100_0;
-extern xcpuop_func xop_c108_0;
-extern xcpuop_func xop_c110_0;
-extern xcpuop_func xop_c118_0;
-extern xcpuop_func xop_c120_0;
-extern xcpuop_func xop_c128_0;
-extern xcpuop_func xop_c130_0;
-extern xcpuop_func xop_c138_0;
-extern xcpuop_func xop_c139_0;
-extern xcpuop_func xop_c140_0;
-extern xcpuop_func xop_c148_0;
-extern xcpuop_func xop_c150_0;
-extern xcpuop_func xop_c158_0;
-extern xcpuop_func xop_c160_0;
-extern xcpuop_func xop_c168_0;
-extern xcpuop_func xop_c170_0;
-extern xcpuop_func xop_c178_0;
-extern xcpuop_func xop_c179_0;
-extern xcpuop_func xop_c188_0;
-extern xcpuop_func xop_c190_0;
-extern xcpuop_func xop_c198_0;
-extern xcpuop_func xop_c1a0_0;
-extern xcpuop_func xop_c1a8_0;
-extern xcpuop_func xop_c1b0_0;
-extern xcpuop_func xop_c1b8_0;
-extern xcpuop_func xop_c1b9_0;
-extern xcpuop_func xop_c1c0_0;
-extern xcpuop_func xop_c1d0_0;
-extern xcpuop_func xop_c1d8_0;
-extern xcpuop_func xop_c1e0_0;
-extern xcpuop_func xop_c1e8_0;
-extern xcpuop_func xop_c1f0_0;
-extern xcpuop_func xop_c1f8_0;
-extern xcpuop_func xop_c1f9_0;
-extern xcpuop_func xop_c1fa_0;
-extern xcpuop_func xop_c1fb_0;
-extern xcpuop_func xop_c1fc_0;
-extern xcpuop_func xop_d000_0;
-extern xcpuop_func xop_d010_0;
-extern xcpuop_func xop_d018_0;
-extern xcpuop_func xop_d020_0;
-extern xcpuop_func xop_d028_0;
-extern xcpuop_func xop_d030_0;
-extern xcpuop_func xop_d038_0;
-extern xcpuop_func xop_d039_0;
-extern xcpuop_func xop_d03a_0;
-extern xcpuop_func xop_d03b_0;
-extern xcpuop_func xop_d03c_0;
-extern xcpuop_func xop_d040_0;
-extern xcpuop_func xop_d048_0;
-extern xcpuop_func xop_d050_0;
-extern xcpuop_func xop_d058_0;
-extern xcpuop_func xop_d060_0;
-extern xcpuop_func xop_d068_0;
-extern xcpuop_func xop_d070_0;
-extern xcpuop_func xop_d078_0;
-extern xcpuop_func xop_d079_0;
-extern xcpuop_func xop_d07a_0;
-extern xcpuop_func xop_d07b_0;
-extern xcpuop_func xop_d07c_0;
-extern xcpuop_func xop_d080_0;
-extern xcpuop_func xop_d088_0;
-extern xcpuop_func xop_d090_0;
-extern xcpuop_func xop_d098_0;
-extern xcpuop_func xop_d0a0_0;
-extern xcpuop_func xop_d0a8_0;
-extern xcpuop_func xop_d0b0_0;
-extern xcpuop_func xop_d0b8_0;
-extern xcpuop_func xop_d0b9_0;
-extern xcpuop_func xop_d0ba_0;
-extern xcpuop_func xop_d0bb_0;
-extern xcpuop_func xop_d0bc_0;
-extern xcpuop_func xop_d0c0_0;
-extern xcpuop_func xop_d0c8_0;
-extern xcpuop_func xop_d0d0_0;
-extern xcpuop_func xop_d0d8_0;
-extern xcpuop_func xop_d0e0_0;
-extern xcpuop_func xop_d0e8_0;
-extern xcpuop_func xop_d0f0_0;
-extern xcpuop_func xop_d0f8_0;
-extern xcpuop_func xop_d0f9_0;
-extern xcpuop_func xop_d0fa_0;
-extern xcpuop_func xop_d0fb_0;
-extern xcpuop_func xop_d0fc_0;
-extern xcpuop_func xop_d100_0;
-extern xcpuop_func xop_d108_0;
-extern xcpuop_func xop_d110_0;
-extern xcpuop_func xop_d118_0;
-extern xcpuop_func xop_d120_0;
-extern xcpuop_func xop_d128_0;
-extern xcpuop_func xop_d130_0;
-extern xcpuop_func xop_d138_0;
-extern xcpuop_func xop_d139_0;
-extern xcpuop_func xop_d140_0;
-extern xcpuop_func xop_d148_0;
-extern xcpuop_func xop_d150_0;
-extern xcpuop_func xop_d158_0;
-extern xcpuop_func xop_d160_0;
-extern xcpuop_func xop_d168_0;
-extern xcpuop_func xop_d170_0;
-extern xcpuop_func xop_d178_0;
-extern xcpuop_func xop_d179_0;
-extern xcpuop_func xop_d180_0;
-extern xcpuop_func xop_d188_0;
-extern xcpuop_func xop_d190_0;
-extern xcpuop_func xop_d198_0;
-extern xcpuop_func xop_d1a0_0;
-extern xcpuop_func xop_d1a8_0;
-extern xcpuop_func xop_d1b0_0;
-extern xcpuop_func xop_d1b8_0;
-extern xcpuop_func xop_d1b9_0;
-extern xcpuop_func xop_d1c0_0;
-extern xcpuop_func xop_d1c8_0;
-extern xcpuop_func xop_d1d0_0;
-extern xcpuop_func xop_d1d8_0;
-extern xcpuop_func xop_d1e0_0;
-extern xcpuop_func xop_d1e8_0;
-extern xcpuop_func xop_d1f0_0;
-extern xcpuop_func xop_d1f8_0;
-extern xcpuop_func xop_d1f9_0;
-extern xcpuop_func xop_d1fa_0;
-extern xcpuop_func xop_d1fb_0;
-extern xcpuop_func xop_d1fc_0;
-extern xcpuop_func xop_e000_0;
-extern xcpuop_func xop_e008_0;
-extern xcpuop_func xop_e010_0;
-extern xcpuop_func xop_e018_0;
-extern xcpuop_func xop_e020_0;
-extern xcpuop_func xop_e028_0;
-extern xcpuop_func xop_e030_0;
-extern xcpuop_func xop_e038_0;
-extern xcpuop_func xop_e040_0;
-extern xcpuop_func xop_e048_0;
-extern xcpuop_func xop_e050_0;
-extern xcpuop_func xop_e058_0;
-extern xcpuop_func xop_e060_0;
-extern xcpuop_func xop_e068_0;
-extern xcpuop_func xop_e070_0;
-extern xcpuop_func xop_e078_0;
-extern xcpuop_func xop_e080_0;
-extern xcpuop_func xop_e088_0;
-extern xcpuop_func xop_e090_0;
-extern xcpuop_func xop_e098_0;
-extern xcpuop_func xop_e0a0_0;
-extern xcpuop_func xop_e0a8_0;
-extern xcpuop_func xop_e0b0_0;
-extern xcpuop_func xop_e0b8_0;
-extern xcpuop_func xop_e0d0_0;
-extern xcpuop_func xop_e0d8_0;
-extern xcpuop_func xop_e0e0_0;
-extern xcpuop_func xop_e0e8_0;
-extern xcpuop_func xop_e0f0_0;
-extern xcpuop_func xop_e0f8_0;
-extern xcpuop_func xop_e0f9_0;
-extern xcpuop_func xop_e100_0;
-extern xcpuop_func xop_e108_0;
-extern xcpuop_func xop_e110_0;
-extern xcpuop_func xop_e118_0;
-extern xcpuop_func xop_e120_0;
-extern xcpuop_func xop_e128_0;
-extern xcpuop_func xop_e130_0;
-extern xcpuop_func xop_e138_0;
-extern xcpuop_func xop_e140_0;
-extern xcpuop_func xop_e148_0;
-extern xcpuop_func xop_e150_0;
-extern xcpuop_func xop_e158_0;
-extern xcpuop_func xop_e160_0;
-extern xcpuop_func xop_e168_0;
-extern xcpuop_func xop_e170_0;
-extern xcpuop_func xop_e178_0;
-extern xcpuop_func xop_e180_0;
-extern xcpuop_func xop_e188_0;
-extern xcpuop_func xop_e190_0;
-extern xcpuop_func xop_e198_0;
-extern xcpuop_func xop_e1a0_0;
-extern xcpuop_func xop_e1a8_0;
-extern xcpuop_func xop_e1b0_0;
-extern xcpuop_func xop_e1b8_0;
-extern xcpuop_func xop_e1d0_0;
-extern xcpuop_func xop_e1d8_0;
-extern xcpuop_func xop_e1e0_0;
-extern xcpuop_func xop_e1e8_0;
-extern xcpuop_func xop_e1f0_0;
-extern xcpuop_func xop_e1f8_0;
-extern xcpuop_func xop_e1f9_0;
-extern xcpuop_func xop_e2d0_0;
-extern xcpuop_func xop_e2d8_0;
-extern xcpuop_func xop_e2e0_0;
-extern xcpuop_func xop_e2e8_0;
-extern xcpuop_func xop_e2f0_0;
-extern xcpuop_func xop_e2f8_0;
-extern xcpuop_func xop_e2f9_0;
-extern xcpuop_func xop_e3d0_0;
-extern xcpuop_func xop_e3d8_0;
-extern xcpuop_func xop_e3e0_0;
-extern xcpuop_func xop_e3e8_0;
-extern xcpuop_func xop_e3f0_0;
-extern xcpuop_func xop_e3f8_0;
-extern xcpuop_func xop_e3f9_0;
-extern xcpuop_func xop_e4d0_0;
-extern xcpuop_func xop_e4d8_0;
-extern xcpuop_func xop_e4e0_0;
-extern xcpuop_func xop_e4e8_0;
-extern xcpuop_func xop_e4f0_0;
-extern xcpuop_func xop_e4f8_0;
-extern xcpuop_func xop_e4f9_0;
-extern xcpuop_func xop_e5d0_0;
-extern xcpuop_func xop_e5d8_0;
-extern xcpuop_func xop_e5e0_0;
-extern xcpuop_func xop_e5e8_0;
-extern xcpuop_func xop_e5f0_0;
-extern xcpuop_func xop_e5f8_0;
-extern xcpuop_func xop_e5f9_0;
-extern xcpuop_func xop_e6d0_0;
-extern xcpuop_func xop_e6d8_0;
-extern xcpuop_func xop_e6e0_0;
-extern xcpuop_func xop_e6e8_0;
-extern xcpuop_func xop_e6f0_0;
-extern xcpuop_func xop_e6f8_0;
-extern xcpuop_func xop_e6f9_0;
-extern xcpuop_func xop_e7d0_0;
-extern xcpuop_func xop_e7d8_0;
-extern xcpuop_func xop_e7e0_0;
-extern xcpuop_func xop_e7e8_0;
-extern xcpuop_func xop_e7f0_0;
-extern xcpuop_func xop_e7f8_0;
-extern xcpuop_func xop_e7f9_0;
-extern xcpuop_func xop_e8c0_0;
-extern xcpuop_func xop_e8d0_0;
-extern xcpuop_func xop_e8e8_0;
-extern xcpuop_func xop_e8f0_0;
-extern xcpuop_func xop_e8f8_0;
-extern xcpuop_func xop_e8f9_0;
-extern xcpuop_func xop_e8fa_0;
-extern xcpuop_func xop_e8fb_0;
-extern xcpuop_func xop_e9c0_0;
-extern xcpuop_func xop_e9d0_0;
-extern xcpuop_func xop_e9e8_0;
-extern xcpuop_func xop_e9f0_0;
-extern xcpuop_func xop_e9f8_0;
-extern xcpuop_func xop_e9f9_0;
-extern xcpuop_func xop_e9fa_0;
-extern xcpuop_func xop_e9fb_0;
-extern xcpuop_func xop_eac0_0;
-extern xcpuop_func xop_ead0_0;
-extern xcpuop_func xop_eae8_0;
-extern xcpuop_func xop_eaf0_0;
-extern xcpuop_func xop_eaf8_0;
-extern xcpuop_func xop_eaf9_0;
-extern xcpuop_func xop_ebc0_0;
-extern xcpuop_func xop_ebd0_0;
-extern xcpuop_func xop_ebe8_0;
-extern xcpuop_func xop_ebf0_0;
-extern xcpuop_func xop_ebf8_0;
-extern xcpuop_func xop_ebf9_0;
-extern xcpuop_func xop_ebfa_0;
-extern xcpuop_func xop_ebfb_0;
-extern xcpuop_func xop_ecc0_0;
-extern xcpuop_func xop_ecd0_0;
-extern xcpuop_func xop_ece8_0;
-extern xcpuop_func xop_ecf0_0;
-extern xcpuop_func xop_ecf8_0;
-extern xcpuop_func xop_ecf9_0;
-extern xcpuop_func xop_edc0_0;
-extern xcpuop_func xop_edd0_0;
-extern xcpuop_func xop_ede8_0;
-extern xcpuop_func xop_edf0_0;
-extern xcpuop_func xop_edf8_0;
-extern xcpuop_func xop_edf9_0;
-extern xcpuop_func xop_edfa_0;
-extern xcpuop_func xop_edfb_0;
-extern xcpuop_func xop_eec0_0;
-extern xcpuop_func xop_eed0_0;
-extern xcpuop_func xop_eee8_0;
-extern xcpuop_func xop_eef0_0;
-extern xcpuop_func xop_eef8_0;
-extern xcpuop_func xop_eef9_0;
-extern xcpuop_func xop_efc0_0;
-extern xcpuop_func xop_efd0_0;
-extern xcpuop_func xop_efe8_0;
-extern xcpuop_func xop_eff0_0;
-extern xcpuop_func xop_eff8_0;
-extern xcpuop_func xop_eff9_0;
-extern xcpuop_func xop_f000_0;
-extern xcpuop_func xop_f008_0;
-extern xcpuop_func xop_f010_0;
-extern xcpuop_func xop_f018_0;
-extern xcpuop_func xop_f020_0;
-extern xcpuop_func xop_f028_0;
-extern xcpuop_func xop_f030_0;
-extern xcpuop_func xop_f038_0;
-extern xcpuop_func xop_f039_0;
-extern xcpuop_func xop_f03a_0;
-extern xcpuop_func xop_f03b_0;
-extern xcpuop_func xop_f200_0;
-extern xcpuop_func xop_f208_0;
-extern xcpuop_func xop_f210_0;
-extern xcpuop_func xop_f218_0;
-extern xcpuop_func xop_f220_0;
-extern xcpuop_func xop_f228_0;
-extern xcpuop_func xop_f230_0;
-extern xcpuop_func xop_f238_0;
-extern xcpuop_func xop_f239_0;
-extern xcpuop_func xop_f23a_0;
-extern xcpuop_func xop_f23b_0;
-extern xcpuop_func xop_f23c_0;
-extern xcpuop_func xop_f240_0;
-extern xcpuop_func xop_f248_0;
-extern xcpuop_func xop_f250_0;
-extern xcpuop_func xop_f258_0;
-extern xcpuop_func xop_f260_0;
-extern xcpuop_func xop_f268_0;
-extern xcpuop_func xop_f270_0;
-extern xcpuop_func xop_f278_0;
-extern xcpuop_func xop_f279_0;
-extern xcpuop_func xop_f27a_0;
-extern xcpuop_func xop_f27b_0;
-extern xcpuop_func xop_f27c_0;
-extern xcpuop_func xop_f280_0;
-extern xcpuop_func xop_f2c0_0;
-extern xcpuop_func xop_f310_0;
-extern xcpuop_func xop_f320_0;
-extern xcpuop_func xop_f328_0;
-extern xcpuop_func xop_f330_0;
-extern xcpuop_func xop_f338_0;
-extern xcpuop_func xop_f339_0;
-extern xcpuop_func xop_f350_0;
-extern xcpuop_func xop_f358_0;
-extern xcpuop_func xop_f368_0;
-extern xcpuop_func xop_f370_0;
-extern xcpuop_func xop_f378_0;
-extern xcpuop_func xop_f379_0;
-extern xcpuop_func xop_f37a_0;
-extern xcpuop_func xop_f37b_0;
-extern xcpuop_func xop_f408_0;
-extern xcpuop_func xop_f410_0;
-extern xcpuop_func xop_f418_0;
-extern xcpuop_func xop_f419_0;
-extern xcpuop_func xop_f41a_0;
-extern xcpuop_func xop_f41b_0;
-extern xcpuop_func xop_f41c_0;
-extern xcpuop_func xop_f41d_0;
-extern xcpuop_func xop_f41e_0;
-extern xcpuop_func xop_f41f_0;
-extern xcpuop_func xop_f428_0;
-extern xcpuop_func xop_f430_0;
-extern xcpuop_func xop_f438_0;
-extern xcpuop_func xop_f439_0;
-extern xcpuop_func xop_f43a_0;
-extern xcpuop_func xop_f43b_0;
-extern xcpuop_func xop_f43c_0;
-extern xcpuop_func xop_f43d_0;
-extern xcpuop_func xop_f43e_0;
-extern xcpuop_func xop_f43f_0;
-extern xcpuop_func xop_f500_0;
-extern xcpuop_func xop_f600_0;
-extern xcpuop_func xop_f608_0;
-extern xcpuop_func xop_f610_0;
-extern xcpuop_func xop_f618_0;
-extern xcpuop_func xop_f620_0;
-extern xcpuop_func xop_f800_0;
-extern xcpuop_func xop_f808_0;
-extern xcpuop_func xop_f810_0;
-extern xcpuop_func xop_f818_0;
-extern xcpuop_func xop_f820_0;
-extern xcpuop_func xop_f828_0;
-extern xcpuop_func xop_f830_0;
-extern xcpuop_func xop_f838_0;
-extern xcpuop_func xop_f839_0;
-extern xcpuop_func xop_f83a_0;
-extern xcpuop_func xop_f83b_0;
*
* Copyright 1995-2002 Bernd Schmidt
* Copyright 1995 Alessandro Bissacco
- * Copyright 2000-2008 Toni Wilen
+ * Copyright 2000-2009 Toni Wilen
*/
#include "sysconfig.h"
}
#endif
-uae_u16 last_custom_value;
+uae_u16 last_custom_value1;
static unsigned int n_consecutive_skipped = 0;
static unsigned int total_skipped = 0;
switch (fm)
{
case 0:
- fetched[nr] = bplxdat[nr] = last_custom_value = chipmem_agnus_wget (p);
+ fetched[nr] = bplxdat[nr] = last_custom_value1 = chipmem_agnus_wget (p);
break;
#ifdef AGA
case 1:
fetched_aga0[nr] = chipmem_lget (p);
- last_custom_value = (uae_u16)fetched_aga0[nr];
+ last_custom_value1 = (uae_u16)fetched_aga0[nr];
break;
case 2:
fetched_aga1[nr] = chipmem_lget (p);
fetched_aga0[nr] = chipmem_lget (p + 4);
- last_custom_value = (uae_u16)fetched_aga0[nr];
+ last_custom_value1 = (uae_u16)fetched_aga0[nr];
break;
#endif
}
case COP_read1:
if (copper_cant_read (old_hpos))
continue;
- cop_state.i1 = last_custom_value = chipmem_agnus_wget (cop_state.ip);
+ cop_state.i1 = last_custom_value1 = chipmem_agnus_wget (cop_state.ip);
alloc_cycle (old_hpos, CYCLE_COPPER);
#ifdef DEBUGGER
if (debug_dma)
case COP_read2:
if (copper_cant_read (old_hpos))
continue;
- cop_state.i2 = last_custom_value = chipmem_agnus_wget (cop_state.ip);
+ cop_state.i2 = last_custom_value1 = chipmem_agnus_wget (cop_state.ip);
alloc_cycle (old_hpos, CYCLE_COPPER);
cop_state.ip += 2;
cop_state.saved_i1 = cop_state.i1;
STATIC_INLINE uae_u16 sprite_fetch (struct sprite *s, int dma, int hpos, int cycle, int mode)
{
- uae_u16 data = last_custom_value;
+ uae_u16 data = last_custom_value1;
if (dma) {
- data = last_custom_value = chipmem_agnus_wget (s->pt);
+ data = last_custom_value1 = chipmem_agnus_wget (s->pt);
alloc_cycle (hpos, CYCLE_SPRITE);
#ifdef DEBUGGER
if (debug_dma)
}
STATIC_INLINE uae_u16 sprite_fetch2 (struct sprite *s, int dma, int hpos, int cycle, int mode)
{
- uae_u16 data = last_custom_value;
+ uae_u16 data = last_custom_value1;
if (dma) {
- data = last_custom_value = chipmem_agnus_wget (s->pt);
+ data = last_custom_value1 = chipmem_agnus_wget (s->pt);
}
s->pt += 2;
return data;
ahi_hsync ();
}
- last_custom_value = 0xffff; // refresh slots should set this to 0xffff
+ last_custom_value1 = 0xffff; // refresh slots should set this to 0xffff
if (!nocustom()) {
if (!currprefs.blitter_cycle_exact && bltstate != BLT_done && dmaen (DMA_BITPLANE) && diwstate == DIW_waiting_stop) {
* last value which then changes to all ones (following read will return
* all ones)
*/
- v = last_custom_value;
+ v = last_custom_value1;
if (!noput) {
int r;
- uae_u16 old = last_custom_value;
+ uae_u16 old = last_custom_value1;
uae_u16 l = currprefs.cpu_compatible && currprefs.cpu_model == 68000 ? regs.irc : 0xffff;//last_custom_value;
decide_line (hpos);
decide_fetch (hpos);
r = custom_wput_copper (hpos, addr, l, 1);
if (currprefs.chipset_mask & CSMASK_AGA) {
v = l;
- last_custom_value = 0xffff;
+ last_custom_value1 = 0xffff;
} else {
v = old;
}
ar_custom[addr+1]=(uae_u8)(value);
#endif
#endif
- last_custom_value = value;
switch (addr) {
case 0x00E: CLXDAT (); break;
RW; /* 1F8 ? */
RW; /* 1FA ? */
fmode = RW; /* 1FC FMODE */
- last_custom_value = RW; /* 1FE ? */
+ last_custom_value1 = RW; /* 1FE ? */
DISK_restore_custom (dskpt, dsklen, dskbytr);
SW (0); /* 1F8 */
SW (0); /* 1FA */
SW (fmode); /* 1FC FMODE */
- SW (last_custom_value); /* 1FE */
+ SW (last_custom_value1); /* 1FE */
*len = dst - dstbak;
return dstbak;
#define MMU_MAP_READI_U (1 << 12)
#define MMU_MAP_READI_S (1 << 13)
-void mmu_do_hit(void)
+void mmu_do_hit (void)
{
int i;
uaecptr p;
#define BACKTRACELONGS 500
#define INSTRUCTIONLINES 17
-#define ISILLEGAL(addr) (addr < 4 || (addr > 4 && addr < ENFORCESIZE))
+#define ISILLEGAL_LONG(addr) (addr < 4 || (addr > 4 && addr < ENFORCESIZE))
+#define ISILLEGAL_WORD(addr) (addr < ENFORCESIZE)
+#define ISILLEGAL_BYTE(addr) (addr < ENFORCESIZE)
extern uae_u8 *natmem_offset;
addr &= chipmem_mask;
m = (uae_u32 *)(chipmemory + addr);
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_LONG (addr))
{
enforcer_display_hit (L"LONG READ from",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
addr &= chipmem_mask;
m = (uae_u16 *)(chipmemory + addr);
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_WORD (addr))
{
enforcer_display_hit (L"WORD READ from",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
addr -= chipmem_start & chipmem_mask;
addr &= chipmem_mask;
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_BYTE (addr))
{
enforcer_display_hit (L"BYTE READ from",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
addr &= chipmem_mask;
m = (uae_u32 *)(chipmemory + addr);
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_LONG (addr))
{
enforcer_display_hit (L"LONG WRITE to",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
addr &= chipmem_mask;
m = (uae_u16 *)(chipmemory + addr);
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_WORD (addr))
{
enforcer_display_hit (L"WORD WRITE to",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
addr -= chipmem_start & chipmem_mask;
addr &= chipmem_mask;
- if (ISILLEGAL (addr))
+ if (ISILLEGAL_BYTE (addr))
{
enforcer_display_hit (L"BYTE WRITE to",(uae_u32)(regs.pc_p - NMEM_OFFSET),addr);
if (enforcermode & 1)
#include "ersatz.h"
#include "md-fpp.h"
#include "savestate.h"
+#include "cpu_prefetch.h"
+#include "cpummu.h"
#define DEBUG_FPP 0
typedef uae_s32 tointtype;
#endif
+STATIC_INLINE uae_u32 next_ilong_fpu (void)
+{
+ if (currprefs.mmu_model)
+ return next_ilong_mmu ();
+ else if (currprefs.cpu_cycle_exact)
+ return next_ilong_020ce ();
+ else
+ return next_ilong ();
+}
+STATIC_INLINE uae_u32 next_iword_fpu (void)
+{
+ if (currprefs.mmu_model)
+ return next_iword_mmu ();
+ else if (currprefs.cpu_cycle_exact)
+ return next_iword_020ce ();
+ else
+ return next_iword ();
+}
+STATIC_INLINE void put_long_fpu (uaecptr addr, uae_u32 v)
+{
+ if (currprefs.mmu_model)
+ put_long_mmu (addr, v);
+ else if (currprefs.cpu_cycle_exact)
+ put_long_ce020 (addr, v);
+ else
+ put_long (addr, v);
+}
+STATIC_INLINE uae_u32 get_long_fpu (uaecptr addr)
+{
+ if (currprefs.mmu_model)
+ return get_long_mmu (addr);
+ else if (currprefs.cpu_cycle_exact)
+ return get_long_ce020 (addr);
+ else
+ return get_long (addr);
+}
+STATIC_INLINE void put_word_fpu (uaecptr addr, uae_u32 v)
+{
+ if (currprefs.mmu_model)
+ put_word_mmu (addr, v);
+ else if (currprefs.cpu_cycle_exact)
+ put_word_ce020 (addr, v);
+ else
+ put_word (addr, v);
+}
+STATIC_INLINE uae_u32 get_word_fpu (uaecptr addr)
+{
+ if (currprefs.mmu_model)
+ return get_word_mmu (addr);
+ else if (currprefs.cpu_cycle_exact)
+ return get_word_ce020 (addr);
+ else
+ return get_word (addr);
+}
+STATIC_INLINE void put_byte_fpu (uaecptr addr, uae_u32 v)
+{
+ if (currprefs.mmu_model)
+ put_byte_mmu (addr, v);
+ else if (currprefs.cpu_cycle_exact)
+ put_byte_ce020 (addr, v);
+ else
+ put_byte (addr, v);
+}
+STATIC_INLINE uae_u32 get_byte_fpu (uaecptr addr)
+{
+ if (currprefs.mmu_model)
+ return get_byte_mmu (addr);
+ else if (currprefs.cpu_cycle_exact)
+ return get_byte_ce020 (addr);
+ else
+ return get_byte (addr);
+}
+
static void fpu_op_illg (uae_u32 opcode, int pcoffset)
{
if ((currprefs.cpu_model == 68060 && (currprefs.fpu_model == 0 || (regs.pcr & 2)))
}
regs.s = 1;
m68k_areg (regs, 7) -= 4;
- put_long (m68k_areg (regs, 7), oldpc);
+ put_long_fpu (m68k_areg (regs, 7), oldpc);
m68k_areg (regs, 7) -= 4;
- put_long (m68k_areg (regs, 7), oldpc);
+ put_long_fpu (m68k_areg (regs, 7), oldpc);
m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0x4000 + 11 * 4);
+ put_word_fpu (m68k_areg (regs, 7), 0x4000 + 11 * 4);
m68k_areg (regs, 7) -= 4;
- put_long (m68k_areg (regs, 7), newpc);
+ put_long_fpu (m68k_areg (regs, 7), newpc);
m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), regs.sr);
+ put_word_fpu (m68k_areg (regs, 7), regs.sr);
write_log (L"68040/060 FPU disabled exception PC=%x\n", newpc);
- newpc = get_long (regs.vbr + 11 * 4);
+ newpc = get_long_fpu (regs.vbr + 11 * 4);
m68k_setpc (newpc);
set_special (SPCFLAG_END_COMPILE);
return;
ad = m68k_areg (regs, reg);
break;
case 5:
- ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword ();
+ ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 6:
- ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword ());
+ ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword_fpu ());
break;
case 7:
switch (reg) {
case 0:
- ad = (uae_s32) (uae_s16) next_iword ();
+ ad = (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 1:
- ad = next_ilong ();
+ ad = next_ilong_fpu ();
break;
case 2:
ad = m68k_getpc ();
- ad += (uae_s32) (uae_s16) next_iword ();
+ ad += (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 3:
tmppc = m68k_getpc ();
- tmp = next_iword ();
+ tmp = next_iword_fpu ();
ad = get_disp_ea_020 (tmppc, tmp);
break;
case 4:
}
switch (size) {
case 0:
- *src = (fptype) (uae_s32) get_long (ad);
+ *src = (fptype) (uae_s32) get_long_fpu (ad);
break;
case 1:
- *src = to_single (get_long (ad));
+ *src = to_single (get_long_fpu (ad));
break;
case 2:{
uae_u32 wrd1, wrd2, wrd3;
- wrd1 = get_long (ad);
+ wrd1 = get_long_fpu (ad);
ad += 4;
- wrd2 = get_long (ad);
+ wrd2 = get_long_fpu (ad);
ad += 4;
- wrd3 = get_long (ad);
+ wrd3 = get_long_fpu (ad);
*src = to_exten (wrd1, wrd2, wrd3);
}
break;
case 3:{
uae_u32 wrd1, wrd2, wrd3;
- wrd1 = get_long (ad);
+ wrd1 = get_long_fpu (ad);
ad += 4;
- wrd2 = get_long (ad);
+ wrd2 = get_long_fpu (ad);
ad += 4;
- wrd3 = get_long (ad);
+ wrd3 = get_long_fpu (ad);
*src = to_pack (wrd1, wrd2, wrd3);
}
break;
case 4:
- *src = (fptype) (uae_s16) get_word (ad);
+ *src = (fptype) (uae_s16) get_word_fpu (ad);
break;
case 5:{
uae_u32 wrd1, wrd2;
- wrd1 = get_long (ad);
+ wrd1 = get_long_fpu (ad);
ad += 4;
- wrd2 = get_long (ad);
+ wrd2 = get_long_fpu (ad);
*src = to_double (wrd1, wrd2);
}
break;
case 6:
- *src = (fptype) (uae_s8) get_byte (ad);
+ *src = (fptype) (uae_s8) get_byte_fpu (ad);
break;
default:
return 0;
ad = m68k_areg (regs, reg);
break;
case 5:
- ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword ();
+ ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 6:
- ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword ());
+ ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword_fpu ());
break;
case 7:
switch (reg) {
case 0:
- ad = (uae_s32) (uae_s16) next_iword ();
+ ad = (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 1:
- ad = next_ilong ();
+ ad = next_ilong_fpu ();
break;
case 2:
ad = m68k_getpc ();
- ad += (uae_s32) (uae_s16) next_iword ();
+ ad += (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 3:
tmppc = m68k_getpc ();
- tmp = next_iword ();
+ tmp = next_iword_fpu ();
ad = get_disp_ea_020 (tmppc, tmp);
break;
case 4:
}
switch (size) {
case 0:
- put_long (ad, (uae_u32)toint (value, -2147483648.0, 2147483647.0));
+ put_long_fpu (ad, (uae_u32)toint (value, -2147483648.0, 2147483647.0));
break;
case 1:
- put_long (ad, from_single (value));
+ put_long_fpu (ad, from_single (value));
break;
case 2:
{
uae_u32 wrd1, wrd2, wrd3;
from_exten (value, &wrd1, &wrd2, &wrd3);
- put_long (ad, wrd1);
+ put_long_fpu (ad, wrd1);
ad += 4;
- put_long (ad, wrd2);
+ put_long_fpu (ad, wrd2);
ad += 4;
- put_long (ad, wrd3);
+ put_long_fpu (ad, wrd3);
}
break;
case 3:
{
uae_u32 wrd1, wrd2, wrd3;
from_pack (value, &wrd1, &wrd2, &wrd3);
- put_long (ad, wrd1);
+ put_long_fpu (ad, wrd1);
ad += 4;
- put_long (ad, wrd2);
+ put_long_fpu (ad, wrd2);
ad += 4;
- put_long (ad, wrd3);
+ put_long_fpu (ad, wrd3);
}
break;
case 4:
- put_word (ad, (uae_s16) toint (value, -32768.0, 32767.0));
+ put_word_fpu (ad, (uae_s16) toint (value, -32768.0, 32767.0));
break;
case 5:{
uae_u32 wrd1, wrd2;
from_double (value, &wrd1, &wrd2);
- put_long (ad, wrd1);
+ put_long_fpu (ad, wrd1);
ad += 4;
- put_long (ad, wrd2);
+ put_long_fpu (ad, wrd2);
}
break;
case 6:
- put_byte (ad, (uae_s8)toint (value, -128.0, 127.0));
+ put_byte_fpu (ad, (uae_s8)toint (value, -128.0, 127.0));
break;
default:
return 0;
*ad = m68k_areg (regs, reg);
break;
case 5:
- *ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword ();
+ *ad = m68k_areg (regs, reg) + (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 6:
- *ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword ());
+ *ad = get_disp_ea_020 (m68k_areg (regs, reg), next_iword_fpu ());
break;
case 7:
switch (reg) {
case 0:
- *ad = (uae_s32) (uae_s16) next_iword ();
+ *ad = (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 1:
- *ad = next_ilong ();
+ *ad = next_ilong_fpu ();
break;
case 2:
*ad = m68k_getpc ();
- *ad += (uae_s32) (uae_s16) next_iword ();
+ *ad += (uae_s32) (uae_s16) next_iword_fpu ();
break;
case 3:
tmppc = m68k_getpc ();
- tmp = next_iword ();
+ tmp = next_iword_fpu ();
*ad = get_disp_ea_020 (tmppc, tmp);
break;
default:
if (fault_if_no_fpu (opcode, 4))
return;
- disp = (uae_s32) (uae_s16) next_iword ();
+ disp = (uae_s32) (uae_s16) next_iword_fpu ();
cc = fpp_cond (opcode, extra & 0x3f);
if (cc == -1) {
fpu_op_illg (opcode, 4);
m68k_setpc (m68k_getpc () - 4);
op_illg (opcode);
} else
- put_byte (ad, cc ? 0xff : 0x00);
+ put_byte_fpu (ad, cc ? 0xff : 0x00);
}
}
/* 12 byte 68060 IDLE frame. */
if (incr < 0) {
ad -= 4;
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
ad -= 4;
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
ad -= 4;
- put_long (ad, 0x00006000);
+ put_long_fpu (ad, 0x00006000);
} else {
- put_long (ad, 0x00006000);
+ put_long_fpu (ad, 0x00006000);
ad += 4;
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
ad += 4;
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
ad += 4;
}
} else if (currprefs.fpu_model == 68040) {
/* 4 byte 68040 IDLE frame. */
if (incr < 0) {
ad -= 4;
- put_long (ad, fpu_version << 24);
+ put_long_fpu (ad, fpu_version << 24);
} else {
- put_long (ad, fpu_version << 24);
+ put_long_fpu (ad, fpu_version << 24);
ad += 4;
}
} else { /* 68881/68882 */
int idle_size = currprefs.fpu_model == 68882 ? 0x38 : 0x18;
if (incr < 0) {
ad -= 4;
- put_long (ad, 0x70000000);
+ put_long_fpu (ad, 0x70000000);
for (i = 0; i < (idle_size - 1) / 4; i++) {
ad -= 4;
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
}
ad -= 4;
- put_long (ad, (fpu_version << 24) | (idle_size << 16));
+ put_long_fpu (ad, (fpu_version << 24) | (idle_size << 16));
} else {
- put_long (ad, (fpu_version << 24) | (idle_size << 16));
+ put_long_fpu (ad, (fpu_version << 24) | (idle_size << 16));
ad += 4;
for (i = 0; i < (idle_size - 1) / 4; i++) {
- put_long (ad, 0x00000000);
+ put_long_fpu (ad, 0x00000000);
ad += 4;
}
- put_long (ad, 0x70000000);
+ put_long_fpu (ad, 0x70000000);
ad += 4;
}
}
/* all 68060 FPU frames are 12 bytes */
if (incr < 0) {
ad -= 4;
- d = get_long (ad);
+ d = get_long_fpu (ad);
ad -= 8;
} else {
- d = get_long (ad);
+ d = get_long_fpu (ad);
ad += 4;
ad += 8;
}
if (incr < 0) {
/* @@@ This may be wrong. */
ad -= 4;
- d = get_long (ad);
+ d = get_long_fpu (ad);
if ((d & 0xff000000) != 0) { /* Not a NULL frame? */
if ((d & 0x00ff0000) == 0) { /* IDLE */
} else if ((d & 0x00ff0000) == 0x00300000) { /* UNIMP */
}
}
} else {
- d = get_long (ad);
+ d = get_long_fpu (ad);
ad += 4;
if ((d & 0xff000000) != 0) { /* Not a NULL frame? */
if ((d & 0x00ff0000) == 0) { /* IDLE */
} else { /* 68881/68882 */
if (incr < 0) {
ad -= 4;
- d = get_long (ad);
+ d = get_long_fpu (ad);
if ((d & 0xff000000) != 0) {
if ((d & 0x00ff0000) == 0x00180000)
ad -= 6 * 4;
ad -= 45 * 4;
}
} else {
- d = get_long (ad);
+ d = get_long_fpu (ad);
ad += 4;
if ((d & 0xff000000) != 0) {
if ((d & 0x00ff0000) == 0x00180000)
} else if ((opcode & 0x3f) == 0x3c) {
if ((extra & 0x2000) == 0) {
if (extra & 0x1000) {
- regs.fpcr = next_ilong ();
+ regs.fpcr = next_ilong_fpu ();
native_set_fpucw (regs.fpcr);
}
if (extra & 0x0800)
- set_fpsr (next_ilong ());
+ set_fpsr (next_ilong_fpu ());
if (extra & 0x0400)
- regs.fpiar = next_ilong ();
+ regs.fpiar = next_ilong_fpu ();
}
} else if (extra & 0x2000) {
/* FMOVEM FPP->memory */
}
ad -= incr;
if (extra & 0x1000) {
- put_long (ad, regs.fpcr & 0xffff);
+ put_long_fpu (ad, regs.fpcr & 0xffff);
ad += 4;
}
if (extra & 0x0800) {
- put_long (ad, get_fpsr());
+ put_long_fpu (ad, get_fpsr());
ad += 4;
}
if (extra & 0x0400) {
- put_long (ad, regs.fpiar);
+ put_long_fpu (ad, regs.fpiar);
ad += 4;
}
ad -= incr;
ad = ad - incr;
}
if (extra & 0x1000) {
- regs.fpcr = get_long (ad);
+ regs.fpcr = get_long_fpu (ad);
native_set_fpucw (regs.fpcr);
ad += 4;
}
if (extra & 0x0800) {
- set_fpsr(get_long (ad));
+ set_fpsr(get_long_fpu (ad));
ad += 4;
}
if (extra & 0x0400) {
- regs.fpiar = get_long (ad);
+ regs.fpiar = get_long_fpu (ad);
ad += 4;
}
if ((opcode & 0x38) == 0x18)
if (list & 0x80) {
from_exten (regs.fp[reg], &wrd1, &wrd2, &wrd3);
ad -= 4;
- put_long (ad, wrd3);
+ put_long_fpu (ad, wrd3);
ad -= 4;
- put_long (ad, wrd2);
+ put_long_fpu (ad, wrd2);
ad -= 4;
- put_long (ad, wrd1);
+ put_long_fpu (ad, wrd1);
}
list <<= 1;
}
uae_u32 wrd1, wrd2, wrd3;
if (list & 0x80) {
from_exten (regs.fp[reg], &wrd1, &wrd2, &wrd3);
- put_long (ad, wrd1);
+ put_long_fpu (ad, wrd1);
ad += 4;
- put_long (ad, wrd2);
+ put_long_fpu (ad, wrd2);
ad += 4;
- put_long (ad, wrd3);
+ put_long_fpu (ad, wrd3);
ad += 4;
}
list <<= 1;
uae_u32 wrd1, wrd2, wrd3;
if (list & 0x80) {
ad -= 4;
- wrd3 = get_long (ad);
+ wrd3 = get_long_fpu (ad);
ad -= 4;
- wrd2 = get_long (ad);
+ wrd2 = get_long_fpu (ad);
ad -= 4;
- wrd1 = get_long (ad);
+ wrd1 = get_long_fpu (ad);
regs.fp[reg] = to_exten(wrd1, wrd2, wrd3);
}
list <<= 1;
for (reg = 0; reg <= 7; reg++) {
uae_u32 wrd1, wrd2, wrd3;
if (list & 0x80) {
- wrd1 = get_long (ad);
+ wrd1 = get_long_fpu (ad);
ad += 4;
- wrd2 = get_long (ad);
+ wrd2 = get_long_fpu (ad);
ad += 4;
- wrd3 = get_long (ad);
+ wrd3 = get_long_fpu (ad);
ad += 4;
regs.fp[reg] = to_exten(wrd1, wrd2, wrd3);
}
static int optimized_flags;
+static int cpulengths[65536];
+
#define GF_APDI 1
#define GF_AD8R 2
#define GF_PC8R 4
static int endlabelno = 0;
static int need_endlabel;
-static int n_braces = 0, limit_braces;
-static int m68k_pc_offset = 0;
+static int n_braces, limit_braces;
+static int m68k_pc_offset, m68k_pc_offset_sum;
static int insn_n_cycles;
static void fpulimit (void)
if (m68k_pc_offset == 0)
return;
printf ("\tm68k_incpc (%d);\n", m68k_pc_offset);
+ m68k_pc_offset_sum += m68k_pc_offset;
m68k_pc_offset = 0;
}
}
} else if (using_mmu) {
switch (size) {
- case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = uae_mmu_get_byte (%sa);\n", name, name); break;
- case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = uae_mmu_get_word (%sa);\n", name, name); break;
- case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = uae_mmu_get_long (%sa);\n", name, name); break;
+ case sz_byte: insn_n_cycles += 4; printf ("\tuae_s8 %s = get_byte_mmu (%sa);\n", name, name); break;
+ case sz_word: insn_n_cycles += 4; printf ("\tuae_s16 %s = get_word_mmu (%sa);\n", name, name); break;
+ case sz_long: insn_n_cycles += 8; printf ("\tuae_s32 %s = get_long_mmu (%sa);\n", name, name); break;
default: abort ();
}
} else {
switch (size) {
case sz_byte:
insn_n_cycles += 4;
- printf ("\uae_mmu_put_byte (%sa,%s);\n", to, from);
+ printf ("\tput_byte_mmu (%sa,%s);\n", to, from);
break;
case sz_word:
insn_n_cycles += 4;
if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
abort ();
- printf ("\uae_mmu_put_word (%sa,%s);\n", to, from);
+ printf ("\tput_word_mmu (%sa,%s);\n", to, from);
break;
case sz_long:
insn_n_cycles += 8;
if (cpu_level < 2 && (mode == PC16 || mode == PC8r))
abort ();
- printf ("\uae_mmu_put_long (%sa,%s);\n", to, from);
+ printf ("\tput_long_mmu (%sa,%s);\n", to, from);
break;
default:
abort ();
if (using_mmu) {
if (table68k[opcode].size == sz_long) {
- strcpy (getcode, "uae_mmu_get_long (srca)");
+ strcpy (getcode, "get_long_mmu (srca)");
} else {
- strcpy (getcode, "(uae_s32)(uae_s16)uae_mmu_get_word (srca)");
+ strcpy (getcode, "(uae_s32)(uae_s16)get_word_mmu (srca)");
}
} else {
if (table68k[opcode].size == sz_long) {
if (using_mmu) {
if (table68k[opcode].size == sz_long) {
- strcpy (putcode, "uae_mmu_put_long (srca");
+ strcpy (putcode, "put_long_mmu (srca");
} else {
- strcpy (putcode, "uae_mmu_put_word (srca");
+ strcpy (putcode, "put_word_mmu (srca");
}
} else {
if (table68k[opcode].size == sz_long) {
addcycles_ce020 (1); // better than nothing...
}
start_brace ();
+ m68k_pc_offset_sum = 0;
m68k_pc_offset = 2;
switch (curi->plev) {
case 0: /* not privileged */
int old_brace_level = n_braces;
if (next_cpu_level < 0)
next_cpu_level = 0;
- printf ("\tuae_u16 newsr; uae_u32 newpc; for (;;) {\n");
genamode (Aipi, "7", sz_word, "sr", 1, 0, 0);
genamode (Aipi, "7", sz_long, "pc", 1, 0, 0);
genamode (Aipi, "7", sz_word, "format", 1, 0, 0);
- printf ("\tnewsr = sr; newpc = pc;\n");
- printf ("\tif ((format & 0xF000) == 0x0000) { break; }\n");
- printf ("\telse if ((format & 0xF000) == 0x1000) { ; }\n");
- printf ("\telse if ((format & 0xF000) == 0x2000) { m68k_areg (regs, 7) += 4; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0x4000) { m68k_areg (regs, 7) += 8; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0x8000) { m68k_areg (regs, 7) += 50; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0x7000) { m68k_areg (regs, 7) += 52; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0x9000) { m68k_areg (regs, 7) += 12; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0xa000) { m68k_areg (regs, 7) += 24; break; }\n");
- printf ("\telse if ((format & 0xF000) == 0xb000) { m68k_areg (regs, 7) += 84; break; }\n");
- printf ("\telse { Exception (14, 0); goto %s; }\n", endlabelstr);
- printf ("\tregs.sr = newsr; MakeFromSR ();\n}\n");
- pop_braces (old_brace_level);
- printf ("\tregs.sr = newsr; MakeFromSR ();\n");
- printf ("\tif (newpc & 1)\n");
- printf ("\t\texception3 (0x%04X, m68k_getpc (), newpc);\n", opcode);
- printf ("\telse\n");
- printf ("\t\tm68k_setpc (newpc);\n");
- need_endlabel = 1;
+ printf ("\tm68k_do_rte (pc, sr, format, 0x%04x);\n", opcode);
}
/* PC is set and prefetch filled. */
m68k_pc_offset = 0;
case i_MOVES: /* ignore DFC and SFC because we have no MMU */
{
int old_brace_level;
+ if (using_mmu) {
+ printf ("write_log(L\"WARNING: MOVES currently ignores MMU!\");\n");
+ }
genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
printf ("\tif (extra & 0x800)\n");
old_brace_level = n_braces;
case i_CPUSHL:
case i_CPUSHP:
case i_CPUSHA:
+ if (using_mmu)
+ printf ("\tflush_mmu(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n");
printf ("\tif (opcode & 0x80)\n");
printf ("\t\tflush_icache(m68k_areg (regs, opcode & 3), (opcode >> 6) & 3);\n");
break;
case i_PLPAW:
case i_PTESTR:
case i_PTESTW:
- genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
sync_m68k_pc ();
- printf ("\tmmu_op (opcode, extra);\n");
+ printf ("\tmmu_op (opcode, 0);\n");
break;
case i_MMUOP030:
printf ("\tuaecptr pc = m68k_getpc ();\n");
fprintf (f, "#include \"newcpu.h\"\n");
fprintf (f, "#include \"cpu_prefetch.h\"\n");
fprintf (f, "#include \"cputbl.h\"\n");
+ fprintf (f, "#include \"cpummu.h\"\n");
+
fprintf (f, "#define CPUFUNC(x) x##_ff\n"
"#define SET_CFLG_ALWAYS(flags, x) SET_CFLG(flags, x)\n"
static void generate_one_opcode (int rp)
{
- int i;
+ int idx;
uae_u16 smsk, dmsk;
long int opcode = opcode_map[rp];
int i68000 = table68k[opcode].clev > 0;
|| table68k[opcode].clev > cpu_level)
return;
- for (i = 0; lookuptab[i].name[0]; i++) {
- if (table68k[opcode].mnemo == lookuptab[i].mnemo)
+ for (idx = 0; lookuptab[idx].name[0]; idx++) {
+ if (table68k[opcode].mnemo == lookuptab[idx].mnemo)
break;
}
return;
if (opcode_next_clev[rp] != cpu_level) {
+ char *name = ua (lookuptab[idx].name);
if (generate_stbl)
- fprintf (stblfile, "{ %sCPUFUNC(op_%04lx_%d), %ld }, /* %s */\n",
+ fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d), %d, %d }, /* %s */\n",
(using_ce || using_ce020) ? "(cpuop_func*)" : "",
opcode, opcode_last_postfix[rp],
- opcode, lookuptab[i].name);
+ opcode, cpulengths[opcode], name);
+ xfree (name);
return;
}
- if (generate_stbl) {
- if (i68000)
- fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
- fprintf (stblfile, "{ %sCPUFUNC(op_%04lx_%d), %ld }, /* %s */\n",
- (using_ce || using_ce020) ? "(cpuop_func*)" : "", opcode, postfix, opcode, lookuptab[i].name);
- if (i68000)
- fprintf (stblfile, "#endif\n");
- }
fprintf (headerfile, "extern %s op_%04lx_%d_nf;\n",
(using_ce || using_ce020) ? "cpuop_func_ce" : "cpuop_func", opcode, postfix);
fprintf (headerfile, "extern %s op_%04lx_%d_ff;\n",
printf("#endif\n");
opcode_next_clev[rp] = next_cpu_level;
opcode_last_postfix[rp] = postfix;
+ cpulengths[opcode] = m68k_pc_offset_sum;
+
+ if (generate_stbl) {
+ char *name = ua (lookuptab[idx].name);
+ if (i68000)
+ fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
+ fprintf (stblfile, "{ %sCPUFUNC(op_%04x_%d), %d, %d }, /* %s */\n",
+ (using_ce || using_ce020) ? "(cpuop_func*)" : "",
+ opcode, postfix, opcode, m68k_pc_offset_sum, name);
+ if (i68000)
+ fprintf (stblfile, "#endif\n");
+ xfree (name);
+ }
}
static void generate_func (void)
using_ce = 0;
postfix2 = -1;
- for (i = 0; i < 24; i++) {
+ for (i = 0; i < 32; i++) {
postfix = i;
- if ((i >= 6 && i < 11) || (i > 12 && i < 20))
+ if ((i >= 6 && i < 11) || (i > 12 && i < 20) || (i > 23 && i < 31))
continue;
generate_stbl = 1;
- if (i == 0 || i == 11 || i == 12 || i == 20) {
+ if (i == 0 || i == 11 || i == 12 || i == 20 || i == 31) {
if (generate_stbl)
fprintf (stblfile, "#ifdef CPUEMU_%d\n", postfix);
postfix2 = postfix;
using_mmu = 0;
using_prefetch = 0;
using_ce = 0;
+ using_ce020 = 0;
+ using_mmu = 0;
cpu_level = 5 - i;
if (i == 11 || i == 12) {
cpu_level = 0;
using_ce = 1;
for (rp = 0; rp < nr_cpuop_funcs; rp++)
opcode_next_clev[rp] = 0;
- } else if (i >= 20) {
+ } else if (i >= 20 && i < 30) {
cpu_level = 25 - i;
using_ce020 = 1;
if (i == 20)
read_counts ();
+ } else if (i >= 31 && i < 40) {
+ cpu_level = 4;
+ using_mmu = 1;
+ if (i == 31)
+ read_counts ();
+ for (rp = 0; rp < nr_cpuop_funcs; rp++)
+ opcode_next_clev[rp] = 4;
}
if (generate_stbl) {
+++ /dev/null
-#include "sysconfig.h"
-#include "sysdeps.h"
-
-typedef void xcpuop_func (uae_u32);
-
-struct xcputbl {
- xcpuop_func *handler;
- uae_u16 opcode;
-};
-
-struct xcpu
-{
- uae_u32 regs[16];
- uae_u32 cznv;
- uae_u32 x;
- uae_u32 pc;
-};
-
-extern struct xcpu xregs;
-
-extern struct xcputbl xop_smalltbl_0[];
-
-extern void init_cpu_small(void);
-extern xcpuop_func *xcpufunctbl[65536];
-extern void xop_illg (uae_u32);
-
-extern uae_u32 xget_ibyte(int);
-extern uae_u32 xget_iword(int);
-extern uae_u32 xget_ilong(int);
-
-extern uae_u32 xget_byte(uaecptr);
-extern uae_u32 xget_word(uaecptr);
-extern uae_u32 xget_long(uaecptr);
-
-extern void xput_byte(uaecptr, uae_u32);
-extern void xput_word(uaecptr, uae_u32);
-extern void xput_long(uaecptr, uae_u32);
-
-extern uae_u32 xnext_iword (void);
-extern uae_u32 xnext_ilong (void);
-
-extern void xm68k_incpc(int);
-extern uaecptr xm68k_getpc(void);
-extern void xm68k_setpc(uaecptr);
-
-#define xm68k_dreg(num) (xregs.regs[(num)])
-#define xm68k_areg(num) (xregs.regs[(num + 8)])
-
-extern uae_u32 xget_disp_ea_020 (uae_u32 base, uae_u32 dp);
-extern uae_u32 xget_disp_ea_000 (uae_u32 base, uae_u32 dp);
-
-extern int xcctrue (int cc);
-
-extern const int xareg_byteinc[];
-extern const int ximm8_table[];
-
-int xmovem_index1[256];
-int xmovem_index2[256];
-int xmovem_next[256];
-
-#define XFLAGBIT_N 15
-#define XFLAGBIT_Z 14
-#define XFLAGBIT_C 8
-#define XFLAGBIT_V 0
-#define XFLAGBIT_X 8
-
-#define XFLAGVAL_N (1 << XFLAGBIT_N)
-#define XFLAGVAL_Z (1 << XFLAGBIT_Z)
-#define XFLAGVAL_C (1 << XFLAGBIT_C)
-#define XFLAGVAL_V (1 << XFLAGBIT_V)
-#define XFLAGVAL_X (1 << XFLAGBIT_X)
-
-#define XSET_ZFLG(y) (xregs.cznv = (xregs.cznv & ~XFLAGVAL_Z) | (((y) ? 1 : 0) << XFLAGBIT_Z))
-#define XSET_CFLG(y) (xregs.cznv = (xregs.cznv & ~XFLAGVAL_C) | (((y) ? 1 : 0) << XFLAGBIT_C))
-#define XSET_VFLG(y) (xregs.cznv = (xregs.cznv & ~XFLAGVAL_V) | (((y) ? 1 : 0) << XFLAGBIT_V))
-#define XSET_NFLG(y) (xregs.cznv = (xregs.cznv & ~XFLAGVAL_N) | (((y) ? 1 : 0) << XFLAGBIT_N))
-#define XSET_XFLG(y) (xregs.x = ((y) ? 1 : 0) << XFLAGBIT_X)
-
-#define XGET_ZFLG ((xregs.cznv >> XFLAGBIT_Z) & 1)
-#define XGET_CFLG ((xregs.cznv >> XFLAGBIT_C) & 1)
-#define XGET_VFLG ((xregs.cznv >> XFLAGBIT_V) & 1)
-#define XGET_NFLG ((xregs.cznv >> XFLAGBIT_N) & 1)
-#define XGET_XFLG ((xregs.x >> XFLAGBIT_X) & 1)
-
-#define XCLEAR_CZNV (xregs.cznv = 0)
-#define XGET_CZNV (xregs.cznv)
-#define XIOR_CZNV(X) (xregs.cznv |= (X))
-#define XSET_CZNV(X) (xregs.cznv = (X))
-
-#define XCOPY_CARRY (xregs.x = xregs.cznv)
-
#define bool int
#define DUNUSED(x)
#define D
+#if DEBUG
#define bug write_log
+#else
+#define bug
+#endif
#define MMUEX 0x4d4d5520
#define TRY(x) __try
#define CATCH(x) __except(GetExceptionCode() == MMUEX)
#define MMU_SSW_TM 0x0007
#define MMU_SSW_TT 0x0018
#define MMU_SSW_SIZE 0x0060
-#define MMU_SSW_SIZE_B 0x0020
-#define MMU_SSW_SIZE_W 0x0040
-#define MMU_SSW_SIZE_L 0x0000
+#define MMU_SSW_SIZE_B 0x0020
+#define MMU_SSW_SIZE_W 0x0040
+#define MMU_SSW_SIZE_L 0x0000
#define MMU_SSW_RW 0x0100
#define MMU_SSW_LK 0x0200
#define MMU_SSW_ATC 0x0400
#define MMU_SSW_MA 0x0800
+#define MMU_SSW_CT 0x2000
#define TTR_I0 4
#define TTR_I1 5
return unlikely((addr & (size - 1)) && (addr ^ (addr + size - 1)) & 0x1000);
}
-static ALWAYS_INLINE uae_u8 *mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl)
+static ALWAYS_INLINE uaecptr mmu_get_real_address(uaecptr addr, struct mmu_atc_line *cl)
+{
+ return cl->phys + addr;
+}
+
+static ALWAYS_INLINE void phys_put_long(uaecptr addr, uae_u32 l)
+{
+ put_long (addr, l);
+}
+static ALWAYS_INLINE void phys_put_word(uaecptr addr, uae_u32 w)
+{
+ put_word (addr, w);
+}
+static ALWAYS_INLINE void phys_put_byte(uaecptr addr, uae_u32 b)
+{
+ put_byte (addr, b);
+}
+static ALWAYS_INLINE uae_u32 phys_get_long(uaecptr addr)
+{
+ return get_long (addr);
+}
+static ALWAYS_INLINE uae_u32 phys_get_word(uaecptr addr)
{
- return get_real_address(cl->phys + addr);
+ return get_word (addr);
}
-static ALWAYS_INLINE uae_u8 *phys_get_real_address(uaecptr addr)
+static ALWAYS_INLINE uae_u32 phys_get_byte(uaecptr addr)
{
- return get_real_address(addr);
+ return get_byte (addr);
}
static ALWAYS_INLINE uae_u32 mmu_get_long(uaecptr addr, int data, int size)
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 0, &cl)))
- return do_get_mem_long((uae_u32 *)mmu_get_real_address(addr, cl));
+ return phys_get_long(mmu_get_real_address(addr, cl));
return mmu_get_long_slow(addr, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 0, &cl)))
- return do_get_mem_word((uae_u16 *)mmu_get_real_address(addr, cl));
+ return phys_get_word(mmu_get_real_address(addr, cl));
return mmu_get_word_slow(addr, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 0, &cl)))
- return do_get_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl));
+ return phys_get_byte(mmu_get_real_address(addr, cl));
return mmu_get_byte_slow(addr, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 1, &cl)))
- do_put_mem_long((uae_u32 *)mmu_get_real_address(addr, cl), val);
+ phys_put_long(mmu_get_real_address(addr, cl), val);
else
mmu_put_long_slow(addr, val, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 1, &cl)))
- do_put_mem_word((uae_u16 *)mmu_get_real_address(addr, cl), val);
+ phys_put_word(mmu_get_real_address(addr, cl), val);
else
mmu_put_word_slow(addr, val, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_lookup(addr, data, 1, &cl)))
- do_put_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl), val);
+ phys_put_byte(mmu_get_real_address(addr, cl), val);
else
mmu_put_byte_slow(addr, val, regs.s, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 0, &cl)))
- return do_get_mem_long((uae_u32 *)mmu_get_real_address(addr, cl));
+ return phys_get_long(mmu_get_real_address(addr, cl));
return mmu_get_long_slow(addr, super, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 0, &cl)))
- return do_get_mem_word((uae_u16 *)mmu_get_real_address(addr, cl));
+ return phys_get_word(mmu_get_real_address(addr, cl));
return mmu_get_word_slow(addr, super, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 0, &cl)))
- return do_get_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl));
+ return phys_get_byte(mmu_get_real_address(addr, cl));
return mmu_get_byte_slow(addr, super, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 1, &cl)))
- do_put_mem_long((uae_u32 *)mmu_get_real_address(addr, cl), val);
+ phys_put_long(mmu_get_real_address(addr, cl), val);
else
mmu_put_long_slow(addr, val, super, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 1, &cl)))
- do_put_mem_word((uae_u16 *)mmu_get_real_address(addr, cl), val);
+ phys_put_word(mmu_get_real_address(addr, cl), val);
else
mmu_put_word_slow(addr, val, super, data, size, cl);
}
struct mmu_atc_line *cl;
if (likely(mmu_user_lookup(addr, super, data, 1, &cl)))
- do_put_mem_byte((uae_u8 *)mmu_get_real_address(addr, cl), val);
+ phys_put_byte(mmu_get_real_address(addr, cl), val);
else
mmu_put_byte_slow(addr, val, super, data, size, cl);
}
-static ALWAYS_INLINE void phys_put_long(uaecptr addr, uae_u32 l)
-{
- put_long (addr, l);
-}
-static ALWAYS_INLINE void phys_put_word(uaecptr addr, uae_u32 w)
-{
- put_word (addr, w);
-}
-static ALWAYS_INLINE void phys_put_byte(uaecptr addr, uae_u32 b)
-{
- put_byte (addr, b);
-}
-static ALWAYS_INLINE uae_u32 phys_get_long(uaecptr addr)
-{
- return get_long (addr);
-}
-static ALWAYS_INLINE uae_u32 phys_get_word(uaecptr addr)
-{
- return get_word (addr);
-}
-static ALWAYS_INLINE uae_u32 phys_get_byte(uaecptr addr)
-{
- return get_byte (addr);
-}
-
static ALWAYS_INLINE void HWput_l(uaecptr addr, uae_u32 l)
{
put_long (addr, l);
return get_byte (addr);
}
-
+static ALWAYS_INLINE uae_u32 uae_mmu_get_ilong(uaecptr addr)
+{
+ if (unlikely(is_unaligned(addr, 4)))
+ return mmu_get_long_unaligned(addr, 0);
+ return mmu_get_long(addr, 0, sz_long);
+}
+static ALWAYS_INLINE uae_u16 uae_mmu_get_iword(uaecptr addr)
+{
+ if (unlikely(is_unaligned(addr, 2)))
+ return mmu_get_word_unaligned(addr, 0);
+ return mmu_get_word(addr, 0, sz_word);
+}
static ALWAYS_INLINE uae_u32 uae_mmu_get_long(uaecptr addr)
{
if (unlikely(is_unaligned(addr, 4)))
#define valid_address(a,w,s) phys_valid_address(a,w,s)
#endif
+
+STATIC_INLINE void put_byte_mmu (uaecptr addr, uae_u32 v)
+{
+ uae_mmu_put_byte (addr, v);
+}
+STATIC_INLINE void put_word_mmu (uaecptr addr, uae_u32 v)
+{
+ uae_mmu_put_word (addr, v);
+}
+STATIC_INLINE void put_long_mmu (uaecptr addr, uae_u32 v)
+{
+ uae_mmu_put_long (addr, v);
+}
+STATIC_INLINE uae_u32 get_byte_mmu (uaecptr addr)
+{
+ return uae_mmu_get_byte (addr);
+}
+STATIC_INLINE uae_u32 get_word_mmu (uaecptr addr)
+{
+ return uae_mmu_get_word (addr);
+}
+STATIC_INLINE uae_u32 get_long_mmu (uaecptr addr)
+{
+ return uae_mmu_get_long (addr);
+}
+STATIC_INLINE uae_u32 get_ibyte_mmu (int o)
+{
+ uae_u32 pc = m68k_getpc () + o;
+ return uae_mmu_get_iword (pc);
+}
+STATIC_INLINE uae_u32 get_iword_mmu (int o)
+{
+ uae_u32 pc = m68k_getpc () + o;
+ return uae_mmu_get_iword (pc);
+}
+STATIC_INLINE uae_u32 get_ilong_mmu (int o)
+{
+ uae_u32 pc = m68k_getpc () + o;
+ return uae_mmu_get_ilong (pc);
+}
+STATIC_INLINE uae_u32 next_iword_mmu (void)
+{
+ uae_u32 pc = m68k_getpc ();
+ m68k_incpc (2);
+ return uae_mmu_get_iword (pc);
+}
+STATIC_INLINE uae_u32 next_ilong_mmu (void)
+{
+ uae_u32 pc = m68k_getpc ();
+ m68k_incpc (4);
+ return uae_mmu_get_ilong (pc);
+}
#endif /* CPUMMU_H */
extern uae_u8 *gfxmemory;
extern uae_u32 gfxmem_mask;
extern int address_space_24;
-extern uae_u16 last_custom_value;
+extern uae_u16 last_custom_value1;
/* Default memory access functions */
struct cputbl {
cpuop_func *handler;
uae_u16 opcode;
+ int length;
};
#ifdef JIT
uae_u32 prefetch020data;
uae_u32 prefetch020addr;
- struct cache020 cacheline020[CACHELINES020];
- struct cache020 cacheline040[CACHELINES040];
} regs, lastint_regs, mmu_backup_regs;
extern void m68k_reset (int);
extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
+extern void m68k_do_rte (uae_u32 pc, uae_u16 opcode, uae_u16 sr, uae_u16 format);
extern void mmu_op (uae_u32, uae_u32);
extern void mmu_op30 (uaecptr, uae_u32, int, uaecptr);
/* 68040 */
extern const struct cputbl op_smalltbl_1_ff[];
extern const struct cputbl op_smalltbl_21_ff[];
+extern const struct cputbl op_smalltbl_31_ff[]; // MMU
/* 68030 */
extern const struct cputbl op_smalltbl_2_ff[];
extern const struct cputbl op_smalltbl_22_ff[];
#else
#define flush_icache(X) do {} while (0)
#endif
+extern void flush_mmu (uaecptr, int);
extern int movec_illg (int regno);
extern uae_u32 val_move2c (int regno);
p->fpu_model = 68060;
break;
}
+ if (p->cpu_model != 68040)
+ p->mmu_model = 0;
}
int movem_next[256];
cpuop_func *cpufunctbl[65536];
+static int cpufunclen[65536];
extern uae_u32 get_fpsr (void);
static uae_u32 tt0_030, tt1_030, tc_030;
static uae_u16 mmusr_030;
+static struct cache020 cacheline020[CACHELINES020];
+static struct cache020 cacheline040[CACHELINES040];
+
#if COUNT_INSTRS
static unsigned long int instrcount[65536];
static uae_u16 opcodenums[65536];
if (currprefs.cpu_model < 68040) {
if (regs.cacr & 0x08) { // Clear Cache
for (i = 0; i < CACHELINES020; i++)
- regs.cacheline020[i].valid = 0;
+ cacheline020[i].valid = 0;
regs.prefetch020addr = 0xff000000;
}
if (regs.cacr & 0x04) { // Clear Entry
- regs.cacheline020[(regs.caar >> 2) & 0x3f].valid = 0;
+ cacheline020[(regs.caar >> 2) & 0x3f].valid = 0;
}
#ifdef JIT
set_cache_state (regs.cacr & 1);
#endif
if (!(regs.cacr & 0x8000)) {
for (i = 0; i < CACHELINES040; i++)
- regs.cacheline040[i].valid = 0;
+ cacheline040[i].valid = 0;
regs.prefetch020addr = 0xff000000;
}
}
tbl = op_smalltbl_1_ff;
if (currprefs.cpu_cycle_exact)
tbl = op_smalltbl_21_ff;
+ if (currprefs.mmu_model)
+ tbl = op_smalltbl_31_ff;
break;
case 68030:
lvl = 3;
abort ();
}
- for (opcode = 0; opcode < 65536; opcode++)
+ for (opcode = 0; opcode < 65536; opcode++) {
cpufunctbl[opcode] = op_illg_1;
- for (i = 0; tbl[i].handler != NULL; i++)
- cpufunctbl[tbl[i].opcode] = tbl[i].handler;
+ cpufunclen[opcode] = -1;
+ }
+ for (i = 0; tbl[i].handler != NULL; i++) {
+ opcode = tbl[i].opcode;
+ cpufunctbl[opcode] = tbl[i].handler;
+ cpufunclen[opcode] = tbl[i].length;
+ }
/* hack fpu to 68000/68010 mode */
if (currprefs.fpu_model && currprefs.cpu_model < 68020) {
}
if (table68k[opcode].handler != -1) {
- f = cpufunctbl[table68k[opcode].handler];
+ int idx = table68k[opcode].handler;
+ f = cpufunctbl[idx];
if (f == op_illg_1)
abort ();
cpufunctbl[opcode] = f;
+ cpufunclen[opcode] = cpufunclen[idx];
opcnt++;
}
}
write_log (L"Building CPU, %d opcodes (%d %d %d)\n",
opcnt, lvl,
currprefs.cpu_cycle_exact ? -1 : currprefs.cpu_compatible ? 1 : 0, currprefs.address_space_24);
- write_log (L"CPU=%d, FPU=%d, JIT%s=%d.\n",
+ write_log (L"CPU=%d, FPU=%d, MMU=%d, JIT%s=%d.\n",
currprefs.cpu_model, currprefs.fpu_model,
+ currprefs.mmu_model,
currprefs.cachesize ? (currprefs.compfpu ? L"=CPU/FPU" : L"=CPU") : L"",
currprefs.cachesize);
#ifdef JIT
if ((dp & 0x3) == 0x3) outer = next_ilong_020ce ();
if ((dp & 0x4) == 0) base += regd;
- if (dp & 0x3) base = get_long (base);
+ if (dp & 0x3) base = get_long_ce020 (base);
if (dp & 0x4) base += regd;
return base + outer;
}
}
+uae_u32 REGPARAM2 get_disp_ea_040mmu (uae_u32 base, uae_u32 dp)
+{
+ int reg = (dp >> 12) & 15;
+ uae_s32 regd = regs.regs[reg];
+ if ((dp & 0x800) == 0)
+ regd = (uae_s32)(uae_s16)regd;
+ regd <<= (dp >> 9) & 3;
+ if (dp & 0x100) {
+ uae_s32 outer = 0;
+ if (dp & 0x80) base = 0;
+ if (dp & 0x40) regd = 0;
+
+ if ((dp & 0x30) == 0x20) base += (uae_s32)(uae_s16) next_iword_mmu ();
+ if ((dp & 0x30) == 0x30) base += next_ilong_mmu ();
+
+ if ((dp & 0x3) == 0x2) outer = (uae_s32)(uae_s16) next_iword_mmu ();
+ if ((dp & 0x3) == 0x3) outer = next_ilong_mmu ();
+
+ if ((dp & 0x4) == 0) base += regd;
+ if (dp & 0x3) base = get_long_mmu (base);
+ if (dp & 0x4) base += regd;
+
+ return base + outer;
+ } else {
+ return base + (uae_s32)((uae_s8)dp) + regd;
+ }
+}
+
+
uae_u32 REGPARAM3 get_disp_ea_000 (uae_u32 base, uae_u32 dp) REGPARAM
{
int i;
if (currprefs.cpu_model >= 68040) {
if (nr == 2) {
- for (i = 0 ; i < 18 ; i++) {
+ // bus error
+ if (currprefs.mmu_model) {
+
+ for (i = 0 ; i < 7 ; i++) {
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), 0);
+ }
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), regs.wb3_data);
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), regs.mmu_fault_addr);
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), regs.mmu_fault_addr);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0);
m68k_areg (regs, 7) -= 2;
put_word (m68k_areg (regs, 7), 0);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), regs.wb3_status);
+ regs.wb3_status = 0;
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), regs.mmu_ssw);
+ m68k_areg (regs, 7) -= 4;
+ put_word (m68k_areg (regs, 7), regs.mmu_fault_addr);
+
+ } else {
+
+ for (i = 0 ; i < 18 ; i++) {
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0);
+ }
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0);
+ m68k_areg (regs, 7) -= 2;
+ put_word (m68k_areg (regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */
+ m68k_areg (regs, 7) -= 4;
+ put_long (m68k_areg (regs, 7), last_addr_for_exception_3);
}
- m68k_areg (regs, 7) -= 4;
- put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
- m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0);
- m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0);
- m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0);
+
m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0x0140 | (sv ? 6 : 2)); /* SSW */
+ put_word (m68k_areg (regs, 7), 0x7000 + nr * 4);
m68k_areg (regs, 7) -= 4;
- put_long (m68k_areg (regs, 7), last_addr_for_exception_3);
+ put_long (m68k_areg (regs, 7), oldpc);
m68k_areg (regs, 7) -= 2;
- put_word (m68k_areg (regs, 7), 0x7000 + nr * 4);
+ put_word (m68k_areg (regs, 7), regs.sr);
+ goto kludge_me_do;
+
} else {
m68k_areg (regs, 7) -= 4;
put_long (m68k_areg (regs, 7), last_fault_for_exception_3);
put_word (m68k_areg (regs, 7), 0x2000 + nr * 4);
}
} else {
+ // address error
uae_u16 ssw = (sv ? 4 : 0) | (last_instructionaccess_for_exception_3 ? 2 : 1);
ssw |= last_writeaccess_for_exception_3 ? 0 : 0x40;
ssw |= 0x20;
/* 68040 only */
case 0x805: regs.mmusr = *regp; break;
/* 68040/060 */
- case 0x806: regs.urp = *regp; break;
- case 0x807: regs.srp = *regp; break;
+ case 0x806: regs.urp = *regp & 0xfffffe00; break;
+ case 0x807: regs.srp = *regp & 0xfffffe00; break;
/* 68060 only */
case 0x808:
{
set_cpu_caches ();
}
- if (currprefs.mmu_model)
+ if (currprefs.mmu_model) {
mmu_reset ();
+ mmu_set_tc (regs.tcr);
+ mmu_set_super (regs.s);
+ }
a3000_fakekick (0);
/* only (E)nable bit is zeroed when CPU is reset, A3000 SuperKickstart expects this */
void mmu_op (uae_u32 opcode, uae_u32 extra)
{
-#if MMUOP_DEBUG > 1
- write_log (L"mmu_op %04X PC=%08X\n", opcode, m68k_getpc ());
-#endif
if (currprefs.cpu_model) {
mmu_op_real (opcode, extra);
return;
}
+#if MMUOP_DEBUG > 1
+ write_log (L"mmu_op %04X PC=%08X\n", opcode, m68k_getpc ());
+#endif
if ((opcode & 0xFE0) == 0x0500) {
/* PFLUSH */
regs.mmusr = 0;
#else
+/* Aranym MMU 68040 */
+static void m68k_run_mmu040 (void)
+{
+ struct regstruct *r = ®s;
+ uae_u32 opcode;
+
+ for (;;) {
+#ifdef _WIN32
+ __try
+#endif
+ {
+ regs.fault_pc = m68k_getpc ();
+ opcode = get_iword_mmu (0);
+ count_instr (opcode);
+ do_cycles (cpu_cycles);
+ cpu_cycles = (*cpufunctbl[opcode])(opcode);
+ cpu_cycles &= cycles_mask;
+ cpu_cycles |= cycles_val;
+ if (r->spcflags) {
+ if (do_specialties (cpu_cycles))
+ return;
+ }
+#ifdef _WIN32
+ } __except (GetExceptionCode () == MMUEX) {
+ // write bus errors restart at next instruction
+ if (regs.wb3_status & 0x80) {
+// write_log (L"%08x %04x %d\n", regs.fault_pc, opcode, cpufunclen[opcode]);
+ regs.fault_pc += cpufunclen[opcode];
+ }
+ Exception (2, regs.fault_pc);
+ }
+#endif
+ }
+}
+
/* "cycle exact 68020 */
static void m68k_run_2ce (void)
{
last_fault_for_exception_3 = fault;
last_writeaccess_for_exception_3 = 0;
last_instructionaccess_for_exception_3 = 0;
- Exception (2, addr);
+ Exception (2, m68k_getpc ());
}
void m68k_go (int may_quit)
run_func = currprefs.cpu_cycle_exact && currprefs.cpu_model == 68000 ? m68k_run_1_ce :
currprefs.cpu_compatible > 0 && currprefs.cpu_model == 68000 ? m68k_run_1 :
currprefs.cpu_model >= 68020 && currprefs.cachesize ? m68k_run_2a :
+ currprefs.cpu_model == 68040 && currprefs.mmu_model ? m68k_run_mmu040 :
currprefs.cpu_model >= 68020 && currprefs.cpu_cycle_exact ? m68k_run_2ce :
currprefs.cpu_compatible ? m68k_run_2p : m68k_run_2;
}
addr &= ~3;
index = (addr >> 2) & (CACHELINES040 - 1);
tag = regs.s | (addr & ~((CACHELINES040 << 2) - 1));
- c = ®s.cacheline040[index];
+ c = &cacheline040[index];
if (c->valid && c->tag == tag) {
// cache hit
regs.prefetch020addr = addr;
addr &= ~3;
index = (addr >> 2) & (CACHELINES020 - 1);
tag = regs.s | (addr & ~((CACHELINES020 << 2) - 1));
- c = ®s.cacheline020[index];
+ c = &cacheline020[index];
if (c->valid && c->tag == tag) {
// cache hit
regs.prefetch020addr = addr;
{
do_cycles_ce (clocks * cpucycleunit);
}
+
+void m68k_do_rte (uae_u32 pc, uae_u16 sr, uae_u16 format, uae_u16 opcode)
+{
+ int f;
+
+ f = format >> 12;
+ if (f == 0) {
+ ;
+ } else if (f == 0x1) {
+ ;
+ } else if (f == 0x2) {
+ m68k_areg (regs, 7) += 4;
+ } else if (f == 0x4) {
+ m68k_areg (regs, 7) += 8;
+ } else if (f == 0x8) {
+ m68k_areg (regs, 7) += 50;
+ } else if (f == 0x7) {
+ uae_u16 ssr = get_word (m68k_areg (regs, 7) + 4);
+ if (ssr & MMU_SSW_CT) {
+ uaecptr src_a7 = m68k_areg (regs, 7) - 8;
+ uaecptr dst_a7 = m68k_areg (regs, 7) + 52;
+ put_word_mmu (dst_a7 + 0, get_word_mmu (src_a7 + 0));
+ put_long_mmu (dst_a7 + 2, get_long_mmu (src_a7 + 2));
+ // skip next word
+ put_long_mmu (dst_a7 + 8, get_long_mmu (src_a7 + 8));
+ }
+ m68k_areg (regs, 7) += 52;
+ } else if (f == 0x9) {
+ m68k_areg (regs, 7) += 12;
+ } else if (f == 0xa) {
+ m68k_areg (regs, 7) += 24;
+ } else if (f == 0xb) {
+ m68k_areg (regs, 7) += 84;
+ } else {
+ Exception (14, 0);
+ return;
+ }
+ regs.sr = sr;
+ MakeFromSR ();
+ if (pc & 1)
+ exception3 (0x4E73, m68k_getpc (), pc);
+ else
+ m68k_setpc (pc);
+}
+
+void flush_mmu (uaecptr addr, int n)
+{
+}
#define IDC_COLLISIONS 1584
#define IDC_JITENABLE 1584
#define IDC_DISASSEMBLY 1585
+#define IDC_JITENABLE2 1585
+#define IDC_MMUENABLE 1585
#define IDC_CTRLF11 1586
#define IDC_FASTCOPPER 1588
#define IDC_COLLISION0 1589
STYLE DS_LOCALEDIT | DS_SETFONT | DS_3DLOOK | DS_CONTROL | WS_CHILD\r
FONT 8, "MS Sans Serif", 0, 0, 0x0\r
BEGIN\r
- GROUPBOX "CPU",IDC_STATIC,5,1,81,142,BS_LEFT\r
- CONTROL "68000",IDC_CPU0,"Button",BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,13,16,63,10\r
- CONTROL "68010",IDC_CPU1,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,30,65,10\r
- CONTROL "68020",IDC_CPU2,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,44,63,10\r
- CONTROL "68030",IDC_CPU3,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,58,64,10\r
- CONTROL "68040",IDC_CPU4,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,72,66,10\r
- CONTROL "68060",IDC_CPU5,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,86,66,10\r
+ GROUPBOX "CPU",IDC_STATIC,5,1,81,145,BS_LEFT\r
+ CONTROL "68000",IDC_CPU0,"Button",BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,13,15,63,10\r
+ CONTROL "68010",IDC_CPU1,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,28,65,10\r
+ CONTROL "68020",IDC_CPU2,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,41,63,10\r
+ CONTROL "68030",IDC_CPU3,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,54,64,10\r
+ CONTROL "68040",IDC_CPU4,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,67,66,10\r
+ CONTROL "68060",IDC_CPU5,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,13,80,66,10\r
CONTROL "More compatible [] Emulate 68000's prefetch registers. More compatible but slower.",IDC_COMPATIBLE,\r
- "Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,10,117,73,8\r
+ "Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,10,107,73,8\r
CONTROL "JIT [] Enable just-in-time CPU emulator. Significantly increases the speed of the CPU emulation. Requires 68020 or higher CPU.",IDC_JITENABLE,\r
- "Button",BS_AUTOCHECKBOX | WS_TABSTOP,10,129,73,10\r
+ "Button",BS_AUTOCHECKBOX | WS_TABSTOP,10,119,73,10\r
GROUPBOX "CPU Emulation Speed",IDC_STATIC,90,3,205,92\r
CONTROL "Fastest possible, but maintain chipset timing",IDC_CS_HOST,\r
"Button",BS_AUTORADIOBUTTON | BS_LEFT | WS_GROUP | WS_TABSTOP,95,18,195,10\r
CONTROL "Direct",IDC_TRUST0,"Button",BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,235,194,52,10\r
CONTROL "Indirect",IDC_TRUST1,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,235,208,52,10\r
CONTROL "More compatible [] More compatible but slower FPU emulation.",IDC_COMPATIBLE_FPU,\r
- "Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,9,223,73,10\r
- GROUPBOX "FPU",IDC_STATIC,6,147,81,91,BS_LEFT\r
- CONTROL "24-bit addressing",IDC_COMPATIBLE24,"Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,10,104,73,8\r
- CONTROL "None",IDC_FPU0,"Button",BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,14,164,63,10\r
- CONTROL "68881",IDC_FPU1,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,179,63,10\r
- CONTROL "68882",IDC_FPU2,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,193,63,10\r
- CONTROL "CPU internal",IDC_FPU3,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,208,63,10\r
+ "Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,9,221,73,10\r
+ GROUPBOX "FPU",IDC_STATIC,5,147,81,90,BS_LEFT\r
+ CONTROL "24-bit addressing",IDC_COMPATIBLE24,"Button",BS_AUTOCHECKBOX | BS_LEFT | WS_GROUP | WS_TABSTOP,10,94,73,8\r
+ CONTROL "None",IDC_FPU0,"Button",BS_AUTORADIOBUTTON | WS_GROUP | WS_TABSTOP,14,161,63,10\r
+ CONTROL "68881",IDC_FPU1,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,175,63,10\r
+ CONTROL "68882",IDC_FPU2,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,188,63,10\r
+ CONTROL "CPU internal",IDC_FPU3,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,14,202,63,10\r
COMBOBOX IDC_CPU_FREQUENCY,212,119,73,75,CBS_DROPDOWN | WS_VSCROLL | WS_TABSTOP\r
RTEXT "CPU Frequency",IDC_STATIC,105,119,87,10,SS_CENTERIMAGE\r
- GROUPBOX "Cycle-exact CPU Emulation Speed",IDC_STATIC,90,99,205,44\r
+ GROUPBOX "Cycle-exact CPU Emulation Speed",IDC_STATIC,90,99,205,46\r
RTEXT "CPU",IDC_STATIC,96,77,17,10,SS_CENTERIMAGE\r
RTEXT "Chipset",IDC_STATIC,182,77,26,9,SS_CENTERIMAGE\r
RTEXT "CPU Idle",IDC_STATIC,231,60,47,9,SS_CENTERIMAGE\r
RTEXT "Cache size:",IDC_STATIC,95,167,42,10,SS_CENTERIMAGE\r
+ CONTROL "68040 MMU [] 68040 MMU emulation. Not compatible with JIT.",IDC_MMUENABLE,\r
+ "Button",BS_AUTOCHECKBOX | WS_TABSTOP,10,132,73,10\r
END\r
\r
IDD_FLOPPY DIALOGEX 0, 0, 300, 240\r
del cpuemu_0.c
del cpuemu_11.c
del cpuemu_12.c
-del cpuemu_20.c
+del cpuemu_21.c
+del cpuemu_31.c
del linetoscr.c
cd jit
#define CPUEMU_11 /* 68000+prefetch emulation */
#define CPUEMU_12 /* 68000 cycle-exact cpu&blitter */
#define CPUEMU_20 /* 68020+ "cycle-exact" + blitter */
+#define CPUEMU_31 /* 68040 Aranym MMU */
#define ACTION_REPLAY /* Action Replay 1/2/3 support */
#define PICASSO96 /* Picasso96 display card emulation */
#define UAEGFX_INTERNAL /* built-in libs:picasso96/uaegfx.card */
#define WINUAEPUBLICBETA 1
-#define WINUAEBETA L"9"
-#define WINUAEDATE MAKEBD(2009, 8, 21)
+#define WINUAEBETA L"10"
+#define WINUAEDATE MAKEBD(2009, 8, 23)
#define WINUAEEXTRA L""
#define WINUAEREV L""
return tempvsync;
if (currprefs.ntscmode)
- newh = h * 312 / 262;
+ newh = h * 50 / 60;
else
- newh = h * 262 / 312;
+ newh = h * 60 / 50;
hz = hz * dbl;
found = NULL;
}
found = NULL;
- for (cnt = 0; cnt <= abs (newh - h) && !found; cnt++) {
+ for (cnt = 0; cnt <= abs (newh - h) + 1 && !found; cnt++) {
for (i = 0; md->DisplayModes[i].depth >= 0 && !found; i++) {
struct PicassoResolution *r = &md->DisplayModes[i];
if (r->res.width == w && (r->res.height == newh + cnt || r->res.height == newh - cnt) && r->depth == d) {
ew (hDlg, IDC_FPU1, fpu);
ew (hDlg, IDC_FPU2, fpu);
ew (hDlg, IDC_FPU3, workprefs.cpu_model >= 68040);
+ ew (hDlg, IDC_MMUENABLE, workprefs.cpu_model == 68040 && workprefs.cachesize == 0);
}
static void values_to_cpudlg (HWND hDlg)
{
TCHAR cache[8] = L"";
- int cpu, idx;
+ int cpu;
SendDlgItemMessage (hDlg, IDC_SPEED, TBM_SETPOS, TRUE, workprefs.m68k_speed <= 0 ? 1 : workprefs.m68k_speed / CYCLE_UNIT );
SetDlgItemInt( hDlg, IDC_CPUTEXT, workprefs.m68k_speed <= 0 ? 1 : workprefs.m68k_speed / CYCLE_UNIT, FALSE );
CheckDlgButton (hDlg, IDC_HARDFLUSH, workprefs.comp_hardflush);
CheckDlgButton (hDlg, IDC_CONSTJUMP, workprefs.comp_constjump);
CheckDlgButton (hDlg, IDC_JITENABLE, workprefs.cachesize > 0);
+ CheckDlgButton (hDlg, IDC_MMUENABLE, workprefs.cpu_model == 68040 && workprefs.cachesize == 0 && workprefs.mmu_model == 68040);
}
workprefs.m68k_speed = IsDlgButtonChecked (hDlg, IDC_CS_HOST) ? -1
: IsDlgButtonChecked (hDlg, IDC_CS_68000) ? 0
: SendMessage (GetDlgItem (hDlg, IDC_SPEED), TBM_GETPOS, 0, 0) * CYCLE_UNIT;
+ workprefs.mmu_model = IsDlgButtonChecked (hDlg, IDC_MMUENABLE) ? 68040 : 0;
newcpu = IsDlgButtonChecked (hDlg, IDC_CPU0) ? 68000
: IsDlgButtonChecked (hDlg, IDC_CPU1) ? 68010
>
</File>
<File
- RelativePath=".\configfile.ico"
+ RelativePath="..\resources\configfile.ico"
>
</File>
<File
- RelativePath="..\resources\configfile.ico"
+ RelativePath=".\configfile.ico"
>
</File>
<File
>
</File>
<File
- RelativePath=".\file.ico"
+ RelativePath="..\resources\file.ico"
>
</File>
<File
- RelativePath="..\resources\file.ico"
+ RelativePath=".\file.ico"
>
</File>
<File
>
</File>
<File
- RelativePath="..\resources\port.ico"
+ RelativePath=".\port.ico"
>
</File>
<File
- RelativePath=".\port.ico"
+ RelativePath="..\resources\port.ico"
>
</File>
<File
RelativePath="..\..\cpuemu_20.c"
>
</File>
+ <File
+ RelativePath="..\..\cpuemu_31.c"
+ >
+ </File>
<File
RelativePath="..\..\cpummu.c"
>
+Beta 10:
+
+- and more reading of write-only register fixes, original Cardiaxx
+ loads now without extra hacks
+- yet another CPU core added, 68040 MMU emulation from Aranym
+ (Atari ST/TT/Falcon emulator) is finally enabled! (not compatible
+ with JIT, slow etc blahblah) Enforcer+Lawbreaker seems to be working.
+ Perhaps even something else that needs MMU also work..
+- blitter cycles given to CPU (bltnasty=0) didn't count as free cycles
+ for blitter idle cycles
+- blitter line mode froze if new blit was started when last 2 final
+ idle cycles were in progress
+
Beta 9:
- vsync automatic frequency switching is now optional ("autovsync")
NTSC jumping, b8 hack removed)
- added "cycle_exact" configuration entry, quick way to switch CE on/off
with uae-configuration
-- display parameters were not fully updated if CPU was "too fast" (b5)
+- wrong/missing display sometimes in "too fast" CPU modes (b5)
Beta 8:
projects / francis / winuae.git / commitdiff