_T("WarpEngineA4000"),
NULL
};
+static const TCHAR *ppc_implementations[] = {
+ _T("auto"),
+ _T("dummy"),
+ _T("pearpc"),
+ _T("qemu"),
+ NULL
+};
static const TCHAR *waitblits[] = { _T("disabled"), _T("automatic"), _T("noidleonly"), _T("always"), 0 };
static const TCHAR *autoext2[] = { _T("disabled"), _T("copy"), _T("replace"), 0 };
static const TCHAR *leds[] = { _T("power"), _T("df0"), _T("df1"), _T("df2"), _T("df3"), _T("hd"), _T("cd"), _T("fps"), _T("cpu"), _T("snd"), _T("md"), 0 };
_T("uae"),
_T("ide%d"),
_T("scsi%d"), _T("scsi%d_a2091"), _T("scsi%d_a2091-2"), _T("scsi%d_a4091"), _T("scsi%d_a4091-2"),
+ _T("scsi%d_fastlane"), _T("scsi%d_fastlane-2"),
+ _T("scsi%d_oktagon2008"), _T("scsi%d_oktagon2008-2"),
_T("scsi%d_a3000"), _T("scsi%d_a4000t"), _T("scsi%d_cdtv"), _T("scsi%d_cpuboard"),
_T("scsram"), _T("scide")
};
}
}
+static void cfgfile_write_board_rom(struct zfile *f, struct multipath *mp, struct boardromconfig *br, const TCHAR *name)
+{
+ TCHAR buf[256];
+
+ _stprintf(buf, _T("scsi_%s"), name);
+ cfgfile_dwrite_bool (f, buf, br->enabled);
+
+ for (int i = 0; i < MAX_BOARD_ROMS; i++) {
+ _stprintf(buf, _T("%s_rom_file"), name);
+ if (i == 0 || br->roms[i].romfile[0])
+ cfgfile_write_rom (f, mp, br->roms[i].romfile, buf);
+
+ if (br->roms[i].romident[0]) {
+ _stprintf(buf, _T("%s_rom"), name);
+ cfgfile_dwrite_str (f, buf, br->roms[i].romident);
+ }
+
+ if (br->roms[i].board_ram_size) {
+ _stprintf(buf, _T("%s_mem_size"), name);
+ cfgfile_write(f, buf, _T("%d"), br->roms[i].board_ram_size / 0x40000);
+ }
+ }
+}
+
+
void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
{
struct strlist *sl;
if (p->romextident[0])
cfgfile_write_str (f, _T("kickstart_ext_rom="), p->romextident);
- cfgfile_write_rom (f, &p->path_rom, p->a2091romfile, _T("a2091_rom_file"));
- if (p->a2091romfile2[0])
- cfgfile_write_rom (f, &p->path_rom, p->a2091romfile2, _T("a2091_2_rom_file"));
- cfgfile_write_rom (f, &p->path_rom, p->a4091romfile, _T("a4091_rom_file"));
- if (p->a4091romfile2[0])
- cfgfile_write_rom (f, &p->path_rom, p->a4091romfile, _T("a4091_2_rom_file"));
- if (p->a2091romident[0])
- cfgfile_dwrite_str (f, _T("a2091_rom"), p->a2091romident);
- if (p->a2091romident2[0])
- cfgfile_dwrite_str (f, _T("a2091_2_rom"), p->a2091romident2);
- if (p->a4091romident[0])
- cfgfile_dwrite_str (f, _T("a4091_rom"), p->a4091romident);
- if (p->a4091romident2[0])
- cfgfile_dwrite_str (f, _T("a4091_2_rom"), p->a4091romident2);
+ cfgfile_write_board_rom(f, &p->path_rom, &p->a2091rom, _T("a2091"));
+ cfgfile_write_board_rom(f, &p->path_rom, &p->a4091rom, _T("a4091"));
+ cfgfile_write_board_rom(f, &p->path_rom, &p->fastlanerom, _T("fastlane"));
+ cfgfile_write_board_rom(f, &p->path_rom, &p->oktagonrom, _T("oktagon2008"));
+
cfgfile_write_rom(f, &p->path_rom, p->acceleratorromfile, _T("cpuboard_rom_file"));
if (p->acceleratorromident[0])
cfgfile_dwrite_str(f, _T("cpuboard_rom"), p->acceleratorromident);
cfgfile_write_bool (f, _T("bsdsocket_emu"), p->socket_emu);
if (p->a2065name[0])
cfgfile_write_str (f, _T("a2065"), p->a2065name);
+#ifdef WITH_SLIRP
tmp[0] = 0;
for (i = 0; i < MAX_SLIRP_REDIRS; i++) {
struct slirp_redir *sr = &p->slirp_redirs[i];
cfgfile_write_str (f, _T("slirp_redir"), tmp);
}
}
+#endif
cfgfile_write_bool (f, _T("synchronize_clock"), p->tod_hack);
cfgfile_write (f, _T("maprom"), _T("0x%x"), p->maprom);
cfgfile_dwrite (f, _T("ramsey"), _T("%d"), p->cs_ramseyrev);
cfgfile_dwrite_bool (f, _T("pcmcia"), p->cs_pcmcia);
cfgfile_dwrite_bool (f, _T("scsi_cdtv"), p->cs_cdtvscsi);
- cfgfile_dwrite_bool (f, _T("scsi_a2091"), p->a2091);
- cfgfile_dwrite_bool (f, _T("scsi_a4091"), p->a4091);
cfgfile_dwrite_bool (f, _T("scsi_a3000"), p->cs_mbdmac == 1);
cfgfile_dwrite_bool (f, _T("scsi_a4000t"), p->cs_mbdmac == 2);
cfgfile_dwrite_bool (f, _T("bogomem_fast"), p->cs_slowmemisfast);
cfgfile_write (f, _T("mbresmem_size"), _T("%d"), p->mbresmem_high_size / 0x100000);
cfgfile_write (f, _T("z3mem_size"), _T("%d"), p->z3fastmem_size / 0x100000);
cfgfile_dwrite (f, _T("z3mem2_size"), _T("%d"), p->z3fastmem2_size / 0x100000);
- cfgfile_write (f, _T("z3mem_start"), _T("0x%x"), p->z3fastmem_start);
+ cfgfile_write (f, _T("z3mem_start"), _T("0x%x"), p->z3autoconfig_start);
cfgfile_write(f, _T("bogomem_size"), _T("%d"), p->bogomem_size / 0x40000);
cfgfile_dwrite_str(f, _T("cpuboard_type"), cpuboards[p->cpuboard_type]);
cfgfile_dwrite(f, _T("cpuboardmem1_size"), _T("%d"), p->cpuboardmem1_size / 0x100000);
cfgfile_write_bool (f, _T("cpu_24bit_addressing"), p->address_space_24);
/* do not reorder end */
cfgfile_dwrite_bool(f, _T("cpu_reset_pause"), p->reset_delay);
+ cfgfile_dwrite_str(f, _T("ppc_implementation"), ppc_implementations[p->ppc_implementation]);
if (p->cpu_cycle_exact) {
if (p->cpu_frequency)
ext = _tcsrchr (hdc, '_');
if (ext) {
ext++;
- if (!_tcsicmp(ext, _T("a2091")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A2091;
- if (!_tcsicmp(ext, _T("a2091-2")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A2091_2;
- if (!_tcsicmp(ext, _T("a3000")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A3000;
- if (!_tcsicmp(ext, _T("a4091")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A4091;
- if (!_tcsicmp(ext, _T("a4091-2")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A4091_2;
- if (!_tcsicmp(ext, _T("a4000t")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_A4000T;
- if (!_tcsicmp(ext, _T("cdtv")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_CDTV;
- if (!_tcsicmp(ext, _T("cpuboard")))
- hdcv = HD_CONTROLLER_TYPE_SCSI_CPUBOARD;
+ for (int i = 0; hdcontrollers[i]; i++) {
+ const TCHAR *ext2 = _tcsrchr(hdcontrollers[i], '_');
+ if (ext2) {
+ ext2++;
+ if (!_tcsicmp(ext, ext2)) {
+ hdcv = i;
+ break;
+ }
+ }
+ }
}
} else if (_tcslen (hdc) >= 6 && !_tcsncmp (hdc, _T("scsram"), 6)) {
hdcv = HD_CONTROLLER_TYPE_PCMCIA_SRAM;
return 0;
}
+static bool cfgfile_read_board_rom(const TCHAR *option, const TCHAR *value, struct multipath *mp, struct boardromconfig *br, const TCHAR *name, int mask)
+{
+ TCHAR buf[256], buf2[MAX_DPATH];
+
+ _stprintf(buf, _T("scsi_%s"), name);
+ if (cfgfile_yesno(option, value, buf, &br->enabled))
+ return true;
+ for (int i = 0; i < MAX_BOARD_ROMS; i++) {
+
+ _stprintf(buf, _T("%s_rom_file"), name);
+ if (cfgfile_path(option, value, buf, br->roms[i].romfile, MAX_DPATH / sizeof (TCHAR), mp))
+ return true;
+
+ _stprintf(buf, _T("%s_rom_file_id"), name);
+ if (cfgfile_rom (option, value, buf, br->roms[i].romfile, MAX_DPATH / sizeof (TCHAR)))
+ return true;
+
+ _stprintf(buf, _T("%s_rom"), name);
+ if (cfgfile_string (option, value, buf, buf2, sizeof buf2 / sizeof (TCHAR))) {
+ decode_rom_ident (br->roms[i].romident, sizeof(br->roms[i].romident) / sizeof (TCHAR), buf2, mask);
+ return true;
+ }
+
+ _stprintf(buf, _T("%s_mem_size"), name);
+ if (cfgfile_intval (option, value, buf, &br->roms[i].board_ram_size, 0x40000))
+ return true;
+ }
+ return false;
+}
+
static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCHAR *value)
{
int tmpval, dummyint, i;
|| cfgfile_yesno (option, value, _T("a1000ram"), &p->cs_a1000ram)
|| cfgfile_yesno (option, value, _T("pcmcia"), &p->cs_pcmcia)
|| cfgfile_yesno (option, value, _T("scsi_cdtv"), &p->cs_cdtvscsi)
- || cfgfile_yesno (option, value, _T("scsi_a4091"), &p->a4091)
- || cfgfile_yesno (option, value, _T("scsi_a2091"), &p->a2091)
|| cfgfile_yesno (option, value, _T("cia_overlay"), &p->cs_ciaoverlay)
|| cfgfile_yesno (option, value, _T("bogomem_fast"), &p->cs_slowmemisfast)
|| cfgfile_yesno (option, value, _T("ksmirror_e0"), &p->cs_ksmirror_e0)
|| cfgfile_intval (option, value, _T("z3mem_size"), &p->z3fastmem_size, 0x100000)
|| cfgfile_intval (option, value, _T("z3mem2_size"), &p->z3fastmem2_size, 0x100000)
|| cfgfile_intval (option, value, _T("megachipmem_size"), &p->z3chipmem_size, 0x100000)
- || cfgfile_intval (option, value, _T("z3mem_start"), &p->z3fastmem_start, 1)
+ || cfgfile_intval (option, value, _T("z3mem_start"), &p->z3autoconfig_start, 1)
|| cfgfile_intval (option, value, _T("bogomem_size"), &p->bogomem_size, 0x40000)
|| cfgfile_intval (option, value, _T("gfxcard_size"), &p->rtgmem_size, 0x100000)
|| cfgfile_strval(option, value, _T("gfxcard_type"), &p->rtgmem_type, rtgtype, 0)
if (cfgfile_path (option, value, _T("kickstart_rom_file"), p->romfile, sizeof p->romfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("kickstart_ext_rom_file"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("kickstart_ext_rom_file2"), p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR), &p->path_rom)
- || cfgfile_path (option, value, _T("a2091_rom_file"), p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR), &p->path_rom)
- || cfgfile_path (option, value, _T("a2091_2_rom_file"), p->a2091romfile2, sizeof p->a2091romfile2 / sizeof (TCHAR), &p->path_rom)
- || cfgfile_path (option, value, _T("a4091_rom_file"), p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR), &p->path_rom)
- || cfgfile_path (option, value, _T("a4091_2_rom_file"), p->a4091romfile2, sizeof p->a4091romfile2 / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path(option, value, _T("cpuboard_rom_file"), p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR), &p->path_rom)
|| cfgfile_path(option, value, _T("cpuboard_ext_rom_file"), p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR), &p->path_rom)
|| cfgfile_rom(option, value, _T("kickstart_rom_file_id"), p->romfile, sizeof p->romfile / sizeof(TCHAR))
|| cfgfile_rom (option, value, _T("kickstart_ext_rom_file_id"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR))
- || cfgfile_rom (option, value, _T("a2091_rom_file_id"), p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR))
- || cfgfile_rom (option, value, _T("a2091_2_rom_file_id"), p->a2091romfile2, sizeof p->a2091romfile2 / sizeof (TCHAR))
- || cfgfile_rom (option, value, _T("a4091_rom_file_id"), p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR))
- || cfgfile_rom (option, value, _T("a4091_2_rom_file_id"), p->a4091romfile2, sizeof p->a4091romfile2 / sizeof (TCHAR))
|| cfgfile_rom(option, value, _T("cpuboard_rom_file_id"), p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR))
|| cfgfile_rom(option, value, _T("cpuboard_ext_rom_file_id"), p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR))
|| cfgfile_path(option, value, _T("amax_rom_file"), p->amaxromfile, sizeof p->amaxromfile / sizeof(TCHAR))
return 1;
}
-
if (cfgfile_strval (option, value, _T("cart_internal"), &p->cart_internal, cartsmode, 0)) {
if (p->cart_internal) {
struct romdata *rd = getromdatabyid (63);
decode_rom_ident (p->romextfile, sizeof p->romextfile / sizeof (TCHAR), p->romextident, ROMTYPE_ALL_EXT);
return 1;
}
- if (cfgfile_string (option, value, _T("a2091_rom"), p->a2091romident, sizeof p->a2091romident / sizeof (TCHAR))) {
- decode_rom_ident (p->a2091romident, sizeof p->a2091romident / sizeof (TCHAR), p->a2091romident, ROMTYPE_A2091BOOT);
- return 1;
- }
- if (cfgfile_string (option, value, _T("a2091_2_rom"), p->a2091romident2, sizeof p->a2091romident2 / sizeof (TCHAR))) {
- decode_rom_ident (p->a2091romident2, sizeof p->a2091romident2 / sizeof (TCHAR), p->a2091romident2, ROMTYPE_A2091BOOT);
- return 1;
- }
- if (cfgfile_string (option, value, _T("a4091_rom"), p->a4091romident, sizeof p->a4091romident / sizeof (TCHAR))) {
- decode_rom_ident (p->a4091romident, sizeof p->a4091romident / sizeof (TCHAR), p->a4091romident, ROMTYPE_A4091BOOT);
- return 1;
- }
- if (cfgfile_string (option, value, _T("a4091_2_rom"), p->a4091romident2, sizeof p->a4091romident2 / sizeof (TCHAR))) {
- decode_rom_ident (p->a4091romident2, sizeof p->a4091romident2 / sizeof (TCHAR), p->a4091romident2, ROMTYPE_A4091BOOT);
- return 1;
- }
+
if (cfgfile_string (option, value, _T("cpuboard_rom"), p->acceleratorromident, sizeof p->acceleratorromident / sizeof (TCHAR))) {
decode_rom_ident (p->acceleratorromident, sizeof p->acceleratorromident / sizeof (TCHAR), p->acceleratorromident, ROMTYPE_CPUBOARD);
return 1;
return 1;
}
+ if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->a2091rom, _T("a2091"), ROMTYPE_A2091BOOT))
+ return 1;
+ if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->a4091rom, _T("a4091"), ROMTYPE_A4091BOOT))
+ return 1;
+ if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->fastlanerom, _T("fastlane"), ROMTYPE_FASTLANE))
+ return 1;
+ if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->oktagonrom, _T("oktagon2008"), ROMTYPE_OKTAGON))
+ return 1;
+
for (i = 0; i < 4; i++) {
_stprintf (tmpbuf, _T("floppy%d"), i);
if (cfgfile_path (option, value, tmpbuf, p->floppyslots[i].df, sizeof p->floppyslots[i].df / sizeof (TCHAR), &p->path_floppy))
return 1;
}
+ if (cfgfile_strval(option, value, _T("ppc_implementation"), &p->ppc_implementation, ppc_implementations, 0))
+ return 1;
if (cfgfile_string(option, value, _T("ppc_model"), tmpbuf, sizeof tmpbuf / sizeof(TCHAR))) {
p->ppc_mode = 0;
if (!_tcsicmp(tmpbuf, _T("automatic")))
}
}
-int cfgfile_parse_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int type)
+int cfgfile_parse_option (struct uae_prefs *p, const TCHAR *option, TCHAR *value, int type)
{
calcformula (p, value);
return 1;
}
if (type == 0 || (type & CONFIG_TYPE_HOST)) {
- if (cfgfile_parse_host (p, option, value))
+ // cfgfile_parse_host may modify the option (convert to lowercase).
+ TCHAR* writable_option = my_strdup(option);
+ if (cfgfile_parse_host (p, writable_option, value)) {
+ xfree(writable_option);
return 1;
+ }
+ xfree(writable_option);
}
if (type > 0 && (type & (CONFIG_TYPE_HARDWARE | CONFIG_TYPE_HOST)) != (CONFIG_TYPE_HARDWARE | CONFIG_TYPE_HOST))
return 1;
subst (p->path_rom.path[0], p->romfile, sizeof p->romfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile, sizeof p->romextfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR));
- subst (p->path_rom.path[0], p->a2091romfile, sizeof p->a2091romfile / sizeof (TCHAR));
- subst (p->path_rom.path[0], p->a2091romfile2, sizeof p->a2091romfile2 / sizeof (TCHAR));
- subst (p->path_rom.path[0], p->a4091romfile, sizeof p->a4091romfile / sizeof (TCHAR));
- subst (p->path_rom.path[0], p->a4091romfile2, sizeof p->a4091romfile2 / sizeof(TCHAR));
subst(p->path_rom.path[0], p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR));
subst(p->path_rom.path[0], p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR));
+ for (i = 0; i < MAX_BOARD_ROMS; i++) {
+ subst (p->path_rom.path[0], p->a2091rom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
+ subst (p->path_rom.path[0], p->a4091rom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
+ subst (p->path_rom.path[0], p->fastlanerom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
+ }
+
return 1;
}
return err;
}
-uae_u32 cfgfile_modify (uae_u32 index, TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize)
+uae_u32 cfgfile_modify (uae_u32 index, const TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize)
{
TCHAR *p;
TCHAR *argc[UAELIB_MAX_PARSE];
return ret;
}
-const TCHAR *cfgfile_read_config_value (const TCHAR *option)
+static const TCHAR *cfgfile_read_config_value (const TCHAR *option)
{
struct strlist *sl;
for (sl = currprefs.all_lines; sl; sl = sl->next) {
return dstbak;
}
+#ifdef UAE_MINI
static void default_prefs_mini (struct uae_prefs *p, int type)
{
_tcscpy (p->description, _T("UAE default A500 configuration"));
p->chipmem_size = 0x00080000;
p->bogomem_size = 0x00080000;
}
+#endif
#include "sounddep/sound.h"
p->cs_agnusrev = -1;
p->cs_deniserev = -1;
p->cs_mbdmac = 0;
- p->a2091 = 0;
- p->a4091 = 0;
p->cs_cd32c2p = p->cs_cd32cd = p->cs_cd32nvram = p->cs_cd32fmv = false;
p->cs_cdtvcd = p->cs_cdtvram = false;
p->cs_cdtvcard = 0;
p->mbresmem_high_size = 0x00000000;
p->z3fastmem_size = 0x00000000;
p->z3fastmem2_size = 0x00000000;
- p->z3fastmem_start = 0x10000000;
+ p->z3autoconfig_start = 0x10000000;
p->chipmem_size = 0x00080000;
p->bogomem_size = 0x00080000;
p->rtgmem_size = 0x00000000;
p->cs_agnusrev = -1;
p->cs_deniserev = -1;
p->cs_mbdmac = 0;
- p->a2091 = false;
- p->a4091 = false;
p->cs_cd32c2p = p->cs_cd32cd = p->cs_cd32nvram = p->cs_cd32fmv = false;
p->cs_cdtvcd = p->cs_cdtvram = p->cs_cdtvcard = false;
p->cs_ide = 0;
p->cs_resetwarning = 0;
p->cs_ciatodbug = false;
- _tcscpy (p->romfile, _T(""));
- _tcscpy (p->romextfile, _T(""));
- _tcscpy (p->a2091romfile, _T(""));
- _tcscpy (p->a2091romfile2, _T(""));
- _tcscpy (p->a4091romfile, _T(""));
- _tcscpy (p->a4091romfile2, _T(""));
- _tcscpy (p->acceleratorromfile, _T(""));
- _tcscpy (p->acceleratorextromfile, _T(""));
- _tcscpy (p->flashfile, _T(""));
- _tcscpy (p->cartfile, _T(""));
- _tcscpy (p->rtcfile, _T(""));
- _tcscpy (p->amaxromfile, _T(""));
p->prtname[0] = 0;
p->sername[0] = 0;
#include "debug.h"
#include "flashrom.h"
#include "uae.h"
-#include "ppc.h"
+#include "uae/ppc.h"
#define CPUBOARD_IO_LOG 0
#define CPUBOARD_IRQ_LOG 0
map_banks(&blizzardea_bank, b, 0x20000 >> 16, 0x20000);
write_log(_T("Blizzard/CyberStorm Z2 autoconfigured at %02X0000\n"), b);
configured = 1;
- expamem_next();
+ expamem_next (&blizzardea_bank, NULL);
return;
}
if (addr == 0x4c && !configured) {
write_log(_T("Blizzard Z2 SHUT-UP!\n"));
configured = 1;
- expamem_next();
+ expamem_next (NULL, NULL);
return;
}
}
struct romlist *rl = getromlistbyids(roms);
if (rl)
zf = read_rom(rl->rd);
- if (!zf) {
+ if (!zf && name) {
TCHAR path[MAX_DPATH];
fetch_rompath(path, sizeof path / sizeof(TCHAR));
_tcscat(path, name);
struct romlist *rl = getromlistbyids(roms);
if (!rl) {
- rd = getromlistbyidsallroms(roms);
+ rd = getromdatabyids(roms);
if (!rd)
return &expamem_null;
} else {
}
defaultromname = rd->defaultfilename;
if (rl && !isflashrom) {
- autoconfig_rom = zfile_fopen(romname, _T("rb"));
+ if (romname)
+ autoconfig_rom = zfile_fopen(romname, _T("rb"));
+ if (!autoconfig_rom && defaultromname)
+ autoconfig_rom = zfile_fopen(defaultromname, _T("rb"));
+ if (autoconfig_rom) {
+ struct romdata *rd2 = getromdatabyids(roms);
+ // Do not use image if it is not long enough (odd or even only?)
+ if (!rd2 || zfile_size(autoconfig_rom) < rd2->size) {
+ zfile_fclose(autoconfig_rom);
+ autoconfig_rom = NULL;
+ }
+ }
if (!autoconfig_rom)
autoconfig_rom = read_rom(rl->rd);
} else if (isflashrom) {
write_log (_T("ROM id %d not found for CPU board emulation\n"), roms[0]);
return &expamem_null;
}
+
protect_roms(false);
if (is_blizzard2060()) {
f0rom_size = 65536;
zfile_fclose(autoconfig_rom);
autoconfig_rom = NULL;
if (roms2[0] != -1) {
- defaultromname = _T("blizzard_scsi_kit_iv.rom");
autoconfig_rom = board_rom_open(roms2, currprefs.acceleratorextromfile);
if (!autoconfig_rom)
autoconfig_rom = board_rom_open(roms2, defaultromname);
#endif
#include "luascript.h"
#include "statusline.h"
-#include "ppc.h"
+#include "uae/ppc.h"
#define CUSTOM_DEBUG 0
#define SPRITE_DEBUG 0
currprefs.cs_a1000ram = changed_prefs.cs_a1000ram = RBB;
currprefs.cs_slowmemisfast = changed_prefs.cs_slowmemisfast = RBB;
- currprefs.a2091 = changed_prefs.a2091 = RBB;
- currprefs.a4091 = changed_prefs.a4091 = RBB;
+ currprefs.a2091rom.enabled = changed_prefs.a2091rom.enabled = RBB;
+ currprefs.a4091rom.enabled = changed_prefs.a4091rom.enabled = RBB;
currprefs.cs_cdtvscsi = changed_prefs.cs_cdtvscsi = RBB;
currprefs.cs_pcmcia = changed_prefs.cs_pcmcia = RBB;
SB (currprefs.cs_a1000ram ? 1 : 0);
SB (currprefs.cs_slowmemisfast ? 1 : 0);
- SB (currprefs.a2091 ? 1 : 0);
- SB (currprefs.a4091 ? 1 : 0);
+ SB (currprefs.a2091rom.enabled ? 1 : 0);
+ SB (currprefs.a4091rom.enabled ? 1 : 0);
SB (currprefs.cs_cdtvscsi ? 1 : 0);
SB (currprefs.cs_pcmcia ? 1 : 0);
*next = -1;
return 0xffffffff;
}
- prev = currprefs.z3fastmem_start + currprefs.z3fastmem_size;
+ prev = currprefs.z3autoconfig_start + currprefs.z3fastmem_size;
size = currprefs.z3fastmem2_size;
if (currprefs.z3fastmem_size) {
smc_free ();
smc_size = 1 << 24;
if (currprefs.z3fastmem_size)
- smc_size = currprefs.z3fastmem_start + currprefs.z3fastmem_size;
+ smc_size = currprefs.z3autoconfig_start + currprefs.z3fastmem_size;
smc_size += 4;
smc_table = xmalloc (struct smc_item, smc_size);
if (!smc_table)
}
// read one byte from expansion autoconfig ROM
-static void copyromdata(uae_u8 bustype, uaecptr rom, uae_u8 *out, int size)
+static void copyromdata(uae_u8 bustype, uaecptr rom, int offset, uae_u8 *out, int size)
{
- int offset = 0;
-
switch (bustype & 0xc0)
{
case 0x00: // nibble
get_word_debug(list + 16 + 4), get_byte_debug(list + 16 + 1),
get_long_debug(list + 16 + 6), rom_vector,
get_word_debug(list + 16 + 4), get_byte_debug(list + 16 + 1));
- if (type & 0x10) {
+ if (1 || (type & 0x10)) {
uae_u8 diagarea[32];
uae_u16 nameoffset;
uaecptr rom = addr + rom_vector;
uae_u8 config = get_byte_debug(rom);
- copyromdata(config, rom, diagarea, 16);
+ copyromdata(config, rom, 0, diagarea, 16);
nameoffset = (diagarea[8] << 8) | diagarea[9];
console_out_f(_T(" %02x %02x Size %04x Diag %04x Boot %04x Name %04x %04x %04x\n"),
diagarea[0], diagarea[1],
(diagarea[10] << 8) | diagarea[11],
(diagarea[12] << 8) | diagarea[13]);
if (nameoffset != 0 && nameoffset != 0xffff) {
- copyromdata(config, rom + nameoffset, diagarea, 32);
+ copyromdata(config, rom, nameoffset, diagarea, 32);
diagarea[31] = 0;
TCHAR *str = au((char*)diagarea);
- console_out_f(_T(" '%s'"), str);
+ console_out_f(_T(" '%s'\n"), str);
xfree(str);
}
}
uae_u16 mmu030_get_word_atc(uaecptr addr, int l, uae_u32 fc);
uae_u8 mmu030_get_byte_atc(uaecptr addr, int l, uae_u32 fc);
+void mmu030_put_atc_generic(uaecptr addr, uae_u32 val, int l, uae_u32 fc, int size, int flags);
+uae_u32 mmu030_get_atc_generic(uaecptr addr, int l, uae_u32 fc, int size, int flags, bool checkwrite);
+
void mmu030_flush_atc_fc(uae_u32 fc_base, uae_u32 fc_mask);
void mmu030_flush_atc_page(uaecptr logical_addr);
void mmu030_flush_atc_page_fc(uaecptr logical_addr, uae_u32 fc_base, uae_u32 fc_mask);
int mmu030_match_ttr(uaecptr addr, uae_u32 fc, bool write);
int mmu030_match_ttr_access(uaecptr addr, uae_u32 fc, bool write);
-int mmu030_match_lrmw_ttr(uaecptr addr, uae_u32 fc);
+int mmu030_match_lrmw_ttr_access(uaecptr addr, uae_u32 fc);
int mmu030_do_match_ttr(uae_u32 tt, TT_info masks, uaecptr addr, uae_u32 fc, bool write);
int mmu030_do_match_lrmw_ttr(uae_u32 tt, TT_info masks, uaecptr addr, uae_u32 fc);
uae_u32 uae_mmu030_get_lrmw(uaecptr addr, int size);
void uae_mmu030_put_lrmw(uaecptr addr, uae_u32 val, int size);
+void mmu030_put_generic(uaecptr addr, uae_u32 val, uae_u32 fc, int size, int accesssize, int flags);
uae_u32 mmu030_get_generic(uaecptr addr, uae_u32 fc, int size, int accesssize, int flags);
extern uae_u16 REGPARAM3 mmu030_get_word_unaligned(uaecptr addr, uae_u32 fc, int flags) REGPARAM;
#define HD_CONTROLLER_TYPE_SCSI_A2091_2 4
#define HD_CONTROLLER_TYPE_SCSI_A4091 5
#define HD_CONTROLLER_TYPE_SCSI_A4091_2 6
-#define HD_CONTROLLER_TYPE_SCSI_A3000 7
-#define HD_CONTROLLER_TYPE_SCSI_A4000T 8
-#define HD_CONTROLLER_TYPE_SCSI_CDTV 9
-#define HD_CONTROLLER_TYPE_SCSI_CPUBOARD 10
-#define HD_CONTROLLER_TYPE_PCMCIA_SRAM 11
-#define HD_CONTROLLER_TYPE_PCMCIA_IDE 12
+#define HD_CONTROLLER_TYPE_SCSI_FASTLANE 7
+#define HD_CONTROLLER_TYPE_SCSI_FASTLANE_2 8
+#define HD_CONTROLLER_TYPE_SCSI_OKTAGON 9
+#define HD_CONTROLLER_TYPE_SCSI_OKTAGON_2 10
+#define HD_CONTROLLER_TYPE_SCSI_A3000 11
+#define HD_CONTROLLER_TYPE_SCSI_A4000T 12
+#define HD_CONTROLLER_TYPE_SCSI_CDTV 13
+#define HD_CONTROLLER_TYPE_SCSI_CPUBOARD 14
+#define HD_CONTROLLER_TYPE_PCMCIA_SRAM 15
+#define HD_CONTROLLER_TYPE_PCMCIA_IDE 16
#define HD_CONTROLLER_TYPE_IDE_FIRST 1
#define HD_CONTROLLER_TYPE_IDE_LAST 1
#define HD_CONTROLLER_TYPE_SCSI_FIRST 2
-#define HD_CONTROLLER_TYPE_SCSI_LAST 10
+#define HD_CONTROLLER_TYPE_SCSI_LAST 14
#define FILESYS_VIRTUAL 0
#define FILESYS_HARDFILE 1
void getfilterrect2 (RECT *sr, RECT *dr, RECT *zr, int dst_width, int dst_height, int aw, int ah, int scale, int temp_width, int temp_height);
void getfilteroffset (float *dx, float *dy, float *mx, float *my);
-uae_u8 *getfilterbuffer (int *widthp, int *heightp, int *pitch, int *depth);
uae_u8 *getfilterbuffer3d (int *widthp, int *heightp, int *pitch, int *depth);
+
+uae_u8 *getfilterbuffer (int *widthp, int *heightp, int *pitch, int *depth);
+void freefilterbuffer(uae_u8*);
+
uae_u8 *getrtgbuffer (int *widthp, int *heightp, int *pitch, int *depth, uae_u8 *palette);
void freertgbuffer (uae_u8 *dst);
uae_u32 pc;
uae_u8 *pc_p;
uae_u8 *pc_oldp;
+ uae_u16 opcode;
uae_u32 instruction_pc;
uae_u16 irc, ir, db;
* Copyright 1995-2001 Bernd Schmidt
*/
-#ifndef OPTIONS_H
-#define OPTIONS_H
+#ifndef UAE_OPTIONS_H
+#define UAE_OPTIONS_H
#define UAEMAJOR 2
#define UAEMINOR 9
int gfx_filter_keep_autoscale_aspect;
};
+struct romconfig
+{
+ TCHAR romfile[MAX_DPATH];
+ TCHAR romident[256];
+ uae_u32 board_ram_size;
+};
+#define MAX_BOARD_ROMS 2
+struct boardromconfig
+{
+ struct romconfig roms[MAX_BOARD_ROMS];
+ bool enabled;
+};
+
+
struct uae_prefs {
struct strlist *all_lines;
bool cs_z3autoconfig;
int cs_hacks;
+ struct boardromconfig a2091rom;
+ struct boardromconfig a4091rom;
+ struct boardromconfig fastlanerom;
+ struct boardromconfig oktagonrom;
+
TCHAR romfile[MAX_DPATH];
TCHAR romident[256];
TCHAR romextfile[MAX_DPATH];
uae_u32 romextfile2addr;
TCHAR romextfile2[MAX_DPATH];
TCHAR romextident[256];
- TCHAR a2091romfile[MAX_DPATH];
- TCHAR a2091romident[256];
- TCHAR a2091romfile2[MAX_DPATH];
- TCHAR a2091romident2[256];
- bool a2091;
- TCHAR a4091romfile[MAX_DPATH];
- TCHAR a4091romident[256];
- TCHAR a4091romfile2[MAX_DPATH];
- TCHAR a4091romident2[256];
- bool a4091;
TCHAR acceleratorromfile[MAX_DPATH];
TCHAR acceleratorromident[256];
TCHAR acceleratorextromfile[MAX_DPATH];
bool picasso96_nocustom;
int picasso96_modeflags;
+ uae_u32 z3autoconfig_start;
uae_u32 z3fastmem_size, z3fastmem2_size;
- uae_u32 z3fastmem_start;
uae_u32 z3chipmem_size;
uae_u32 z3chipmem_start;
uae_u32 fastmem_size, fastmem2_size;
int cpuboard_type;
uae_u32 cpuboardmem1_size;
uae_u32 cpuboardmem2_size;
+ int ppc_implementation;
bool rtg_hardwareinterrupt;
bool rtg_hardwaresprite;
int rtgmem_type;
extern int cfgfile_save (struct uae_prefs *p, const TCHAR *filename, int);
extern void cfgfile_parse_line (struct uae_prefs *p, TCHAR *, int);
extern void cfgfile_parse_lines (struct uae_prefs *p, const TCHAR *, int);
-extern int cfgfile_parse_option (struct uae_prefs *p, TCHAR *option, TCHAR *value, int);
+extern int cfgfile_parse_option (struct uae_prefs *p, const TCHAR *option, TCHAR *value, int);
extern int cfgfile_get_description (const TCHAR *filename, TCHAR *description, TCHAR *hostlink, TCHAR *hardwarelink, int *type);
extern void cfgfile_show_usage (void);
extern int cfgfile_searchconfig(const TCHAR *in, int index, TCHAR *out, int outsize);
extern uae_u32 cfgfile_uaelib (int mode, uae_u32 name, uae_u32 dst, uae_u32 maxlen);
extern uae_u32 cfgfile_uaelib_modify (uae_u32 mode, uae_u32 parms, uae_u32 size, uae_u32 out, uae_u32 outsize);
-extern uae_u32 cfgfile_modify (uae_u32 index, TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize);
+extern uae_u32 cfgfile_modify (uae_u32 index, const TCHAR *parms, uae_u32 size, TCHAR *out, uae_u32 outsize);
extern void cfgfile_addcfgparam (TCHAR *);
extern int built_in_prefs (struct uae_prefs *p, int model, int config, int compa, int romcheck);
extern int built_in_chipset_prefs (struct uae_prefs *p);
extern int machdep_init (void);
extern void machdep_free (void);
-#endif /* OPTIONS_H */
+#endif /* UAE_OPTIONS_H */
extern int decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size);
-#define ROMTYPE_KICK 0x00000001
-#define ROMTYPE_KICKCD32 0x00000002
-#define ROMTYPE_EXTCD32 0x00000004
-#define ROMTYPE_EXTCDTV 0x00000008
-#define ROMTYPE_A2091BOOT 0x00000010
-#define ROMTYPE_A4091BOOT 0x00000020
-#define ROMTYPE_AR 0x00000040
-#define ROMTYPE_SUPERIV 0x00000080
-#define ROMTYPE_KEY 0x00000100
-#define ROMTYPE_ARCADIABIOS 0x00000200
-#define ROMTYPE_ARCADIAGAME 0x00000400
-#define ROMTYPE_HRTMON 0x00000800
-#define ROMTYPE_NORDIC 0x00001000
-#define ROMTYPE_XPOWER 0x00002000
-#define ROMTYPE_CD32CART 0x00004000
-#define ROMTYPE_SPECIALKICK 0x00008000
-#define ROMTYPE_PIV 0x00010000
-#define ROMTYPE_CPUBOARD 0x00020000
-#define ROMTYPE_CPUBOARDEXT 0x00040000
-#define ROMTYPE_MASK 0x001fffff
+#define ROMTYPE_SUB_MASK 0x000000ff
+#define ROMTYPE_GROUP_MASK 0x00ffff00
+#define ROMTYPE_MASK 0x00ffffff
+
+#define ROMTYPE_KICK 0x00000100
+#define ROMTYPE_KICKCD32 0x00000200
+#define ROMTYPE_EXTCD32 0x00000400
+#define ROMTYPE_EXTCDTV 0x00000800
+#define ROMTYPE_KEY 0x00001000
+#define ROMTYPE_ARCADIABIOS 0x00002000
+#define ROMTYPE_ARCADIAGAME 0x00004000
+#define ROMTYPE_CD32CART 0x00008000
+#define ROMTYPE_SPECIALKICK 0x00010000
+#define ROMTYPE_PIV 0x00020000
+#define ROMTYPE_CPUBOARD 0x00040000
+
+#define ROMTYPE_FREEZER 0x00080000
+#define ROMTYPE_AR 0x00080001
+#define ROMTYPE_HRTMON 0x00080002
+#define ROMTYPE_NORDIC 0x00080003
+#define ROMTYPE_XPOWER 0x00080004
+#define ROMTYPE_SUPERIV 0x00080005
+
+#define ROMTYPE_SCSI 0x00100000
+#define ROMTYPE_A2091BOOT 0x00100001
+#define ROMTYPE_A4091BOOT 0x00100002
+#define ROMTYPE_CPUBOARDEXT 0x00100003
+#define ROMTYPE_FASTLANE 0x00100004
+#define ROMTYPE_OKTAGON 0x00100005
+
+#define ROMTYPE_NONE 0x00800000
+
#define ROMTYPE_EVEN 0x02000000
#define ROMTYPE_ODD 0x04000000
#define ROMTYPE_8BIT 0x08000000
#define ROMTYPE_BYTESWAP 0x10000000
#define ROMTYPE_CD32 0x20000000
#define ROMTYPE_SCRAMBLED 0x40000000
-#define ROMTYPE_NONE 0x80000000
#define ROMTYPE_ALL_KICK (ROMTYPE_KICK | ROMTYPE_KICKCD32 | ROMTYPE_CD32)
#define ROMTYPE_ALL_EXT (ROMTYPE_EXTCD32 | ROMTYPE_EXTCDTV)
extern void getromname (const struct romdata*, TCHAR*);
extern struct romdata *getromdatabyname (const TCHAR*);
extern struct romlist *getromlistbyids (const int *ids);
-extern struct romdata *getromlistbyidsallroms (const int *ids);
+extern struct romdata *getromdatabyids (const int *ids);
extern void romwarning(const int *ids);
extern struct romlist *getromlistbyromdata (const struct romdata *rd);
extern void romlist_add (const TCHAR *path, struct romdata *rd);
if (gary_nonrange(addr) || (size > 1 && gary_nonrange(addr + size - 1))) {
if (gary_timeout)
gary_wait (addr, size, false);
- if (gary_toenb && currprefs.mmu_model)
+ if (gary_toenb)
exception2 (addr, false, size, (regs.s ? 4 : 0) | (inst ? 0 : 1));
return v;
}
int id;
void *answer;
shmpiece *x;
- bool rtgmem = ab->label && (!_tcsicmp(ab->label, _T("z3_gfx")) || !_tcsicmp(ab->label, _T("z2_gfx")));
+ bool rtgmem = (ab->flags & ABFLAG_RTG) != 0;
static int recurse;
ab->startmask = ab->start;
struct scsi_data *sd = (struct scsi_data*)req->dev->handle;
if (sd->data_len < 0) {
lsi_command_complete(req, sd->status, 0);
- }
- else if (sd->data_len) {
+ } else if (sd->data_len) {
lsi_transfer_data(req, sd->data_len);
- }
- else {
+ } else {
if (sd->direction > 0)
scsi_emulate_cmd(sd);
lsi_command_complete(req, sd->status, 0);
w &= 0xffff;
addr &= ncr->board_mask;
if (!ncr->configured) {
- uae_u32 value;
switch (addr)
{
case 0x44:
- // yes, this could be much better..
- if (expamem_z3hack(&currprefs)) {
- if (ncr == &ncr_we) {
- // warp engine needs to be first
- value = 0x10000000;
- } else {
- value = gfxmem_bank.start + ((currprefs.rtgmem_size + 0xffffff) & ~0xffffff);
- if (value < 0x10000000) {
- value = 0x10000000;
- if (value < z3fastmem_bank.start + currprefs.z3fastmem_size)
- value = z3fastmem_bank.start + currprefs.z3fastmem_size;
- if (value < z3fastmem2_bank.start + currprefs.z3fastmem2_size)
- value = z3fastmem2_bank.start + currprefs.z3fastmem2_size;
- }
- }
- if (value < 0x40000000 && max_z3fastmem >= 0x41000000)
- value = 0x40000000;
- if (ncr == &ncr_a4091_2)
- value += 16 * 1024 * 1024;
- value >>= 16;
- chipmem_wput (regs.regs[11] + 0x20, value);
- chipmem_wput (regs.regs[11] + 0x28, value);
- } else {
- ncr->expamem_hi = w & 0xff00;
- value = ncr->expamem_hi | (ncr->expamem_lo >> 4);
- }
- map_banks (ncr->bank, value, BOARD_SIZE >> 16, 0);
+ map_banks (ncr->bank, expamem_z3_pointer >> 16, BOARD_SIZE >> 16, 0);
ncr->board_mask = 0x00ffffff;
- write_log (_T("%s Z3 autoconfigured at %04X0000\n"), ncr->name, value);
ncr->configured = 1;
- expamem_next();
+ expamem_next (ncr->bank, NULL);
break;
}
return;
switch (addr)
{
case 0x4c:
- write_log (_T("A4091 AUTOCONFIG SHUT-UP!\n"));
ncr->configured = 1;
- expamem_next ();
+ expamem_shutup(ncr->bank);
break;
case 0x48:
ncr->expamem_lo = b & 0xff;
struct ncr_state *ncr = &ncr_we;
struct zfile *z = NULL;
+ xfree(ncr->rom);
+ ncr->rom = NULL;
+
roms[0] = 93;
roms[1] = -1;
struct ncr_state *ncr = ncra4091[devnum];
int roms[3];
+ xfree(ncr->rom);
+ ncr->rom = NULL;
+
if (!ncr->enabled && devnum > 0)
return &expamem_null;
ncr->io_start = A4091_IO_OFFSET;
ncr->io_end = A4091_IO_END;
- struct zfile *z = read_rom_name (devnum && currprefs.a4091romfile2[0] ? currprefs.a4091romfile2 : currprefs.a4091romfile);
+ ncr710_init ();
+ ncr710_reset_board(ncr);
+
+ struct zfile *z = read_rom_name (devnum && currprefs.a4091rom.roms[1].romfile[0] ? currprefs.a4091rom.roms[1].romfile : currprefs.a4091rom.roms[0].romfile);
if (!z) {
struct romlist *rl = getromlistbyids(roms);
if (rl) {
for (int i = 0; i < A4091_ROM_SIZE; i++) {
uae_u8 b;
zfile_fread (&b, 1, 1, z);
- ncr->rom[i * 4 + 0] = b;
- ncr->rom[i * 4 + 2] = b << 4;
+ ncr->rom[i * 4 + 0] = b | 0x0f;
+ ncr->rom[i * 4 + 2] = (b << 4) | 0x0f;
if (i < 0x20) {
ncr->acmemory[i * 4 + 0] = b;
} else if (i >= 0x40 && i < 0x60) {
romwarning (roms);
}
- ncr710_init ();
- ncr710_reset_board(ncr);
-
return ncr == &ncr_a4091 ? &ncr_bank_a4091 : &ncr_bank_a4091_2;
}
if (changed_prefs.cpu_model >= 68020)
size = 0x10000000;
z3size = ((changed_prefs.z3fastmem_size + align) & ~align) + ((changed_prefs.z3fastmem2_size + align) & ~align) + ((changed_prefs.z3chipmem_size + align) & ~align);
- if (currprefs.a4091)
+ if (currprefs.a4091rom.enabled)
othersize += 2 * 16 * 1024 * 1024;
+ if (currprefs.fastlanerom.enabled)
+ othersize += 2 * 32 * 1024 * 1024;
totalsize = size + z3size + z3rtgmem_size + othersize;
while (totalsize > size64) {
int change = lowmem ();
}
z3offset = 0;
- if ((changed_prefs.z3fastmem_start == 0x10000000 || changed_prefs.z3fastmem_start == 0x40000000) && !changed_prefs.force_0x10000000_z3 && !cpuboard_blizzardram(&changed_prefs)) {
- if (natmem_size > 0x40000000 && natmem_size - 0x40000000 >= (totalsize - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align)) && changed_prefs.z3chipmem_size <= 512 * 1024 * 1024) {
- changed_prefs.z3fastmem_start = currprefs.z3fastmem_start = 0x40000000;
+ if ((changed_prefs.z3autoconfig_start == 0x10000000 || changed_prefs.z3autoconfig_start == 0x40000000) && !changed_prefs.force_0x10000000_z3 && !cpuboard_blizzardram(&changed_prefs)) {
+ if (1 && natmem_size > 0x40000000 && natmem_size - 0x40000000 >= (totalsize - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align)) && changed_prefs.z3chipmem_size <= 512 * 1024 * 1024) {
+ changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = 0x40000000;
z3offset += 0x40000000 - 0x10000000 - ((changed_prefs.z3chipmem_size + align) & ~align);
if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000)
z3offset += 0x01000000;
} else {
- changed_prefs.z3fastmem_start = currprefs.z3fastmem_start = 0x10000000;
+ changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = 0x10000000;
}
}
gfxmem_lget, gfxmem_wget, gfxmem_bget,
gfxmem_lput, gfxmem_wput, gfxmem_bput,
gfxmem_xlate, gfxmem_check, NULL, NULL, _T("RTG RAM"),
- dummy_lgeti, dummy_wgeti, ABFLAG_RAM
+ dummy_lgeti, dummy_wgeti, ABFLAG_RAM | ABFLAG_RTG
};
/* Call this function first, near the beginning of code flow
#define IDC_HDF_ADDFSRES 1384
#define IDC_ROMFILE 1390
#define IDC_KEYFILE 1391
-#define IDC_A2091ROMFILE 1391
+#define IDC_SCSIROMSELECT 1391
#define IDC_KICKCHOOSER 1392
#define IDC_KEYCHOOSER 1393
-#define IDC_A2091ROMCHOOSER 1393
#define IDC_ROMFILE2 1394
#define IDC_ROMCHOOSER2 1395
#define IDC_FLASHCHOOSER 1396
#define IDC_SAVE 1400
#define IDC_LOAD 1401
#define IDC_RTCCHOOSER 1401
-#define IDC_A4091ROMCHOOSER 1402
+#define IDC_SCSIROMCHOOSER 1402
#define IDC_DELETE 1403
#define IDC_CPUBOARDROMCHOOSER 1403
#define IDC_CONFIGLIST 1404
-#define IDC_CPUBOARDEXTROMCHOOSER 1404
#define IDC_EDITNAME 1405
#define IDC_EDITDESCRIPTION 1406
#define IDC_QUICKSAVE 1408
#define IDC_EXIT 1410
#define IDC_EDITPATH 1410
#define IDC_RTCFILE 1411
-#define IDC_A4091ROMFILE 1412
-#define IDC_CPUBOARDEXTROMFILE 1413
+#define IDC_SCSIROMFILE 1412
#define IDC_CPUBOARDROMFILE 1414
#define IDC_HDF_RDB 1500
#define IDC_HFSIZE 1501
#define IDC_CS_DMAC2 1769
#define IDC_CS_A4091 1770
#define IDC_CS_CDTVSCSI 1771
-#define IDC_CS_A4092 1771
#define IDC_CS_CD32FMV 1771
#define IDC_CS_SCSIMODE 1772
#define IDC_DF0ENABLE 1773
LTEXT "Real Time Clock file",IDC_STATIC,12,174,313,15,SS_CENTERIMAGE
EDITTEXT IDC_RTCFILE,12,191,361,12,ES_AUTOHSCROLL
PUSHBUTTON "...",IDC_RTCCHOOSER,376,189,10,15
- COMBOBOX IDC_A2091ROMFILE,12,223,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | CBS_SORT | WS_VSCROLL | WS_TABSTOP
- PUSHBUTTON "...",IDC_A2091ROMCHOOSER,187,221,10,15
- LTEXT "A590/A2091 SCSI ROM file:",IDC_STATIC,12,207,170,15,SS_CENTERIMAGE
- LTEXT "Accelerator board SCSI ROM file:",IDC_STATIC,202,240,170,15,SS_CENTERIMAGE
- COMBOBOX IDC_A4091ROMFILE,202,223,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | CBS_SORT | WS_VSCROLL | WS_TABSTOP
- PUSHBUTTON "...",IDC_A4091ROMCHOOSER,376,221,10,15
+ COMBOBOX IDC_SCSIROMSELECT,12,223,171,75,CBS_DROPDOWNLIST | CBS_AUTOHSCROLL | WS_VSCROLL | WS_TABSTOP
+ LTEXT "SCSI ROM file:",IDC_STATIC,12,207,170,15,SS_CENTERIMAGE
+ COMBOBOX IDC_SCSIROMFILE,202,223,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | WS_VSCROLL | WS_TABSTOP
+ PUSHBUTTON "...",IDC_SCSIROMCHOOSER,376,221,10,15
LTEXT "Accelerator board ROM file:",IDC_STATIC,12,240,170,15,SS_CENTERIMAGE
- LTEXT "A4091 SCSI ROM file:",IDC_STATIC,202,207,170,15,SS_CENTERIMAGE
- COMBOBOX IDC_CPUBOARDROMFILE,12,256,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | CBS_SORT | WS_VSCROLL | WS_TABSTOP
- COMBOBOX IDC_CPUBOARDEXTROMFILE,202,256,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | CBS_SORT | WS_VSCROLL | WS_TABSTOP
+ COMBOBOX IDC_CPUBOARDROMFILE,12,256,171,75,CBS_DROPDOWN | CBS_AUTOHSCROLL | WS_VSCROLL | WS_TABSTOP
PUSHBUTTON "...",IDC_CPUBOARDROMCHOOSER,187,255,10,15
- PUSHBUTTON "...",IDC_CPUBOARDEXTROMCHOOSER,376,255,10,15
END
IDD_DISPLAY DIALOGEX 0, 0, 396, 298
#define WITH_TABLETLIBRARY
#define WITH_UAENET_PCAP
#define WITH_PPC
+#define WITH_QEMU_CPU
+#define WITH_PEARPC_CPU
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2014, 8, 20)
+#define WINUAEDATE MAKEBD(2014, 8, 29)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
#include "zarchive.h"
#include "gfxboard.h"
#include "win32_uaenet.h"
-#include "ppc.h"
+#include "uae/ppc.h"
#ifdef RETROPLATFORM
#include "rp.h"
#endif
}
}
+static int scsiromselected;
+struct scsiromselect
+{
+ TCHAR *name;
+ int mask;
+};
+static struct scsiromselect scsiromdata[] =
+{
+ { workprefs.a2091rom.roms[0].romfile, ROMTYPE_A2091BOOT | ROMTYPE_NONE },
+ { workprefs.a4091rom.roms[0].romfile, ROMTYPE_A4091BOOT },
+ { workprefs.fastlanerom.roms[0].romfile, ROMTYPE_FASTLANE },
+ { workprefs.oktagonrom.roms[0].romfile, ROMTYPE_OKTAGON },
+ { workprefs.acceleratorextromfile, ROMTYPE_CPUBOARDEXT },
+ { NULL, 0 }
+};
+
#define Error(x) MessageBox (NULL, (x), _T("WinUAE Error"), MB_OK)
wstring WIN32GUI_LoadUIString (DWORD id)
53, 54, 55, 56, -1, -1, // A590/A2091
57, 58, -1, -1, // A4091
+ 102, -1, -1, // Fastlane
+ 103, -1, -1, // Oktagon
18, -1, 19, -1, 74, 23, -1, -1, // CD32 FMV
91, -1, -2, // Picasso IV
p1 = _T("A500 Boot ROM 1.2\0A500 Boot ROM 1.3\0A500+\0A600\0A1000\0A1200\0A3000\0A4000\0A4000T\0")
_T("CD32\0CDTV\0Arcadia Multi Select\0")
- _T("A590/A2091 SCSI\0A4091 SCSI\0")
+ _T("A590/A2091 SCSI\0A4091 SCSI\0Fastlane\0Oktagon 2008\0")
_T("CD32 Full Motion Video\0")
_T("Picasso IV\0")
_tcscpy (workprefs.cartfile, full_path);
fullpath (workprefs.cartfile, MAX_DPATH);
break;
- case IDC_A2091ROMFILE:
- _tcscpy (workprefs.a2091romfile, full_path);
- fullpath (workprefs.a2091romfile, MAX_DPATH);
- break;
- case IDC_A4091ROMFILE:
- _tcscpy (workprefs.a4091romfile, full_path);
- fullpath (workprefs.a4091romfile, MAX_DPATH);
+ case IDC_SCSIROMFILE:
+ {
+ int val = SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_GETCURSEL, 0, 0L);
+ if (val != CB_ERR) {
+ _tcscpy (scsiromdata[val].name, full_path);
+ fullpath (scsiromdata[val].name, MAX_DPATH);
+ }
break;
+ }
case IDC_CPUBOARDROMFILE:
_tcscpy(workprefs.acceleratorromfile, full_path);
fullpath(workprefs.acceleratorromfile, MAX_DPATH);
break;
- case IDC_CPUBOARDEXTROMFILE:
- _tcscpy(workprefs.acceleratorextromfile, full_path);
- fullpath(workprefs.acceleratorextromfile, MAX_DPATH);
- break;
case IDC_STATEREC_PLAY:
case IDC_STATEREC_RECORD:
case IDC_STATEREC_SAVE:
_T("A2091 2nd:%s"),
_T("A4091:%s"),
_T("A4091 2nd:%s"),
+ _T("Fastlane:%s"),
+ _T("Fastlane 2nd:%s"),
+ _T("Oktagon:%s"),
+ _T("Oktagon 2nd:%s"),
_T("A3000:%s"),
_T("A4000T:%s"),
_T("CDTV:%s"),
rtgz3size = gfxboard_is_z3 (workprefs.rtgmem_type) ? workprefs.rtgmem_size : 0;
size = ((workprefs.z3fastmem_size + sizealign) & ~sizealign) + ((workprefs.z3fastmem2_size + sizealign) & ~sizealign) +
((rtgz3size + sizealign) & ~sizealign);
- if (currprefs.a4091)
+ if (currprefs.a4091rom.enabled)
size += 2 * 16 * 1024 * 1024;
if (changed_prefs.mbresmem_high_size == 128 * 1024 * 1024 && (size || workprefs.z3chipmem_size))
size += 16 * 1024 * 1024;
CheckDlgButton (hDlg, IDC_SCSIDEVICE, workprefs.scsi == 1);
CheckDlgButton (hDlg, IDC_SANA2, workprefs.sana2);
CheckDlgButton (hDlg, IDC_A2065, workprefs.a2065name[0] ? 1 : 0);
- CheckDlgButton (hDlg, IDC_CS_A2091, workprefs.a2091);
- CheckDlgButton(hDlg, IDC_CS_A4091, workprefs.a4091);
+ CheckDlgButton (hDlg, IDC_CS_A2091, workprefs.a2091rom.enabled);
+ CheckDlgButton(hDlg, IDC_CS_A4091, workprefs.a4091rom.enabled);
CheckDlgButton(hDlg, IDC_CS_CD32FMV, workprefs.cs_cd32fmv);
CheckDlgButton(hDlg, IDC_CS_SCSIMODE, workprefs.scsi == 2);
SendDlgItemMessage (hDlg, IDC_RTG_BUFFERCNT, CB_SETCURSEL, workprefs.gfx_apmode[1].gfx_backbuffers == 0 ? 0 : workprefs.gfx_apmode[1].gfx_backbuffers - 1, 0);
workprefs.catweasel = ischecked (hDlg, IDC_CATWEASEL) ? -1 : 0;
break;
case IDC_CS_A2091:
- workprefs.a2091 = ischecked (hDlg, IDC_CS_A2091) ? 1 : 0;
+ workprefs.a2091rom.enabled = ischecked (hDlg, IDC_CS_A2091) ? 1 : 0;
break;
case IDC_CS_A4091:
- workprefs.a4091 = ischecked(hDlg, IDC_CS_A4091) ? 1 : 0;
+ workprefs.a4091rom.enabled = ischecked(hDlg, IDC_CS_A4091) ? 1 : 0;
break;
case IDC_CS_CD32FMV:
workprefs.cs_cd32fmv = ischecked(hDlg, IDC_CS_CD32FMV) ? 1 : 0;
return FALSE;
}
-static void addromfiles (UAEREG *fkey, HWND hDlg, DWORD d, TCHAR *path, int type)
+static void addromfiles (UAEREG *fkey, HWND hDlg, DWORD d, const TCHAR *path, int type)
{
int idx;
TCHAR tmp[MAX_DPATH];
}
if (idx2 >= 0) {
struct romdata *rd = getromdatabyidgroup (idx2, group, subitem);
- if (rd && (rd->type & type)) {
+ if (rd && ((rd->type & ROMTYPE_GROUP_MASK) & (type & ROMTYPE_GROUP_MASK)) && (rd->type & ROMTYPE_SUB_MASK) == (type & ROMTYPE_SUB_MASK)) {
getromname (rd, tmp);
if (SendDlgItemMessage (hDlg, d, CB_FINDSTRING, (WPARAM)-1, (LPARAM)tmp) < 0)
SendDlgItemMessage(hDlg, d, CB_ADDSTRING, 0, (LPARAM)tmp);
static void values_from_kickstartdlg (HWND hDlg)
{
- getromfile (hDlg, IDC_ROMFILE, workprefs.romfile, sizeof (workprefs.romfile) / sizeof (TCHAR));
- getromfile (hDlg, IDC_ROMFILE2, workprefs.romextfile, sizeof (workprefs.romextfile) / sizeof (TCHAR));
- getromfile (hDlg, IDC_CARTFILE, workprefs.cartfile, sizeof (workprefs.cartfile) / sizeof (TCHAR));
- getromfile (hDlg, IDC_A2091ROMFILE, workprefs.a2091romfile, sizeof (workprefs.a2091romfile) / sizeof (TCHAR));
- getromfile (hDlg, IDC_A4091ROMFILE, workprefs.a4091romfile, sizeof (workprefs.a4091romfile) / sizeof (TCHAR));
+ getromfile(hDlg, IDC_ROMFILE, workprefs.romfile, sizeof (workprefs.romfile) / sizeof (TCHAR));
+ getromfile(hDlg, IDC_ROMFILE2, workprefs.romextfile, sizeof (workprefs.romextfile) / sizeof (TCHAR));
+ getromfile(hDlg, IDC_CARTFILE, workprefs.cartfile, sizeof (workprefs.cartfile) / sizeof (TCHAR));
+ getromfile(hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name, MAX_DPATH / sizeof (TCHAR));
getromfile(hDlg, IDC_CPUBOARDROMFILE, workprefs.acceleratorromfile, sizeof(workprefs.acceleratorromfile) / sizeof(TCHAR));
- getromfile(hDlg, IDC_CPUBOARDEXTROMFILE, workprefs.acceleratorextromfile, sizeof(workprefs.acceleratorextromfile) / sizeof(TCHAR));
}
static void values_to_kickstartdlg (HWND hDlg)
addromfiles (fkey, hDlg, IDC_ROMFILE2, workprefs.romextfile,
ROMTYPE_EXTCD32 | ROMTYPE_EXTCDTV | ROMTYPE_ARCADIABIOS);
addromfiles (fkey, hDlg, IDC_CARTFILE, workprefs.cartfile,
- ROMTYPE_AR | ROMTYPE_SUPERIV | ROMTYPE_NORDIC | ROMTYPE_XPOWER | ROMTYPE_ARCADIAGAME | ROMTYPE_HRTMON | ROMTYPE_CD32CART);
- addromfiles (fkey, hDlg, IDC_A2091ROMFILE, workprefs.a2091romfile,
- ROMTYPE_A2091BOOT | ROMTYPE_NONE);
- addromfiles (fkey, hDlg, IDC_A4091ROMFILE, workprefs.a4091romfile,
- ROMTYPE_A4091BOOT);
+ ROMTYPE_FREEZER | ROMTYPE_ARCADIAGAME | ROMTYPE_CD32CART);
+ addromfiles (fkey, hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name,
+ scsiromdata[scsiromselected].mask);
addromfiles(fkey, hDlg, IDC_CPUBOARDROMFILE, workprefs.acceleratorromfile,
ROMTYPE_CPUBOARD);
- addromfiles(fkey, hDlg, IDC_CPUBOARDEXTROMFILE, workprefs.acceleratorextromfile,
- ROMTYPE_CPUBOARDEXT);
regclosetree(fkey);
SetDlgItemText(hDlg, IDC_FLASHFILE, workprefs.flashfile);
SetDlgItemText(hDlg, IDC_RTCFILE, workprefs.rtcfile);
CheckDlgButton(hDlg, IDC_KICKSHIFTER, workprefs.kickshifter);
CheckDlgButton(hDlg, IDC_MAPROM, workprefs.maprom);
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_SETCURSEL, scsiromselected, 0);
}
static void init_kickstart (HWND hDlg)
ew (hDlg, IDC_CARTCHOOSER), FALSE);
ew (hDlg, IDC_FLASHCHOOSER), FALSE);
#endif
- ew (hDlg, IDC_A4091ROMCHOOSER, workprefs.a4091);
- ew (hDlg, IDC_A4091ROMFILE, workprefs.a4091);
- ew (hDlg, IDC_A2091ROMCHOOSER, workprefs.a2091);
- ew (hDlg, IDC_A2091ROMFILE, workprefs.a2091);
ew(hDlg, IDC_CPUBOARDROMFILE, workprefs.cpuboard_type != 0);
- ew(hDlg, IDC_CPUBOARDEXTROMFILE, workprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || workprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI);
+
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_RESETCONTENT, 0, 0);
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091"));
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)_T("A4091"));
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)_T("Fastlane"));
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)_T("Oktagon 2008"));
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard SCSI Kit IV"));
+
+ int found = -1;
+ for (int i = 0; scsiromdata[i].name; i++) {
+ if (scsiromdata[i].name[0]) {
+ if (found == -1)
+ found = i;
+ else
+ found = -2;
+ }
+ }
+ if (found >= 0) {
+ scsiromselected = found;
+ SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_SETCURSEL, scsiromselected, 0);
+ }
+
if (!regexiststree(NULL, _T("DetectedROMs")))
scan_roms (NULL, rp_isactive () ? 0 : 1);
+
+
}
static void kickstartfilebuttons (HWND hDlg, WPARAM wParam, TCHAR *path)
DiskSelection(hDlg, IDC_CARTFILE, 6, &workprefs, path);
values_to_kickstartdlg (hDlg);
break;
- case IDC_A2091ROMCHOOSER:
- DiskSelection(hDlg, IDC_A2091ROMFILE, 6, &workprefs, path);
+ case IDC_SCSIROMCHOOSER:
+ DiskSelection(hDlg, IDC_SCSIROMCHOOSER, 6, &workprefs, path);
values_to_kickstartdlg (hDlg);
break;
- case IDC_A4091ROMCHOOSER:
- DiskSelection(hDlg, IDC_A4091ROMFILE, 6, &workprefs, path);
- values_to_kickstartdlg(hDlg);
- break;
case IDC_CPUBOARDROMCHOOSER:
DiskSelection(hDlg, IDC_CPUBOARDROMFILE, 6, &workprefs, path);
values_to_kickstartdlg(hDlg);
break;
- case IDC_CPUBOARDEXTROMCHOOSER:
- DiskSelection(hDlg, IDC_CPUBOARDEXTROMFILE, 6, &workprefs, path);
- values_to_kickstartdlg(hDlg);
- break;
}
}
static INT_PTR CALLBACK KickstartDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARAM lParam)
{
static int recursive;
+ int val;
TCHAR tmp[MAX_DPATH];
switch (msg)
{
case WM_INITDIALOG:
{
- int ids[] = { IDC_ROMFILE, IDC_ROMFILE2, IDC_CARTFILE, IDC_A2091ROMFILE, IDC_A4091ROMFILE, IDC_CPUBOARDROMFILE, IDC_CPUBOARDEXTROMFILE, -1 };
+ int ids[] = { IDC_ROMFILE, IDC_ROMFILE2, IDC_CARTFILE, IDC_SCSIROMFILE, IDC_CPUBOARDROMFILE, -1 };
pages[KICKSTART_ID] = hDlg;
currentpage = KICKSTART_ID;
init_kickstart (hDlg);
case IDC_ROMFILE:
case IDC_ROMFILE2:
case IDC_CARTFILE:
- case IDC_A2091ROMFILE:
- case IDC_A4091ROMFILE:
+ case IDC_SCSIROMFILE:
case IDC_CPUBOARDROMFILE:
- case IDC_CPUBOARDEXTROMFILE:
values_from_kickstartdlg (hDlg);
break;
+ case IDC_SCSIROMSELECT:
+ val = SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_GETCURSEL, 0, 0L);
+ if (val != CB_ERR) {
+ UAEREG *fkey = regcreatetree (NULL, _T("DetectedROMs"));
+ scsiromselected = val;
+ addromfiles (fkey, hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name,
+ scsiromdata[scsiromselected].mask);
+ regclosetree(fkey);
+ }
+ break;
}
}
kickstartfilebuttons (hDlg, wParam, NULL);
BOOL cpu_based_enable = FALSE;
ew (hDlg, IDC_SPEED, !workprefs.cpu_cycle_exact);
- ew (hDlg, IDC_COMPATIBLE24, workprefs.cpu_model == 68020);
+ ew (hDlg, IDC_COMPATIBLE24, workprefs.cpu_model <= 68020);
//ew (hDlg, IDC_CS_HOST, !workprefs.cpu_cycle_exact);
//ew (hDlg, IDC_CS_68000, !workprefs.cpu_cycle_exact);
//ew (hDlg, IDC_CS_ADJUSTABLE, !workprefs.cpu_cycle_exact);
static void values_from_cpudlg (HWND hDlg)
{
- int newcpu, newfpu, newtrust, oldcache, jitena, idx;
+ int newcpu, oldcpu, newfpu, newtrust, oldcache, jitena, idx;
static int cachesize_prev, trust_prev;
workprefs.cpu_compatible = workprefs.cpu_cycle_exact | (ischecked (hDlg, IDC_COMPATIBLE) ? 1 : 0);
: ischecked (hDlg, IDC_FPU3) ? 3 : 0;
/* When switching away from 68000, disable 24 bit addressing. */
+ oldcpu = workprefs.cpu_model;
if (workprefs.cpu_model != newcpu && newcpu <= 68010)
newfpu = 0;
workprefs.cpu_model = newcpu;
workprefs.fpu_model = newfpu == 0 ? 0 : (newfpu == 2 ? 68882 : 68881);
if (workprefs.cpu_compatible || workprefs.cpu_cycle_exact)
workprefs.fpu_model = 0;
- workprefs.address_space_24 = 1;
-// if (newcpu == 0 && workprefs.cpu_cycle_exact)
-// workprefs.m68k_speed = 0;
+ if (newcpu != oldcpu)
+ workprefs.address_space_24 = 1;
break;
case 68020:
workprefs.fpu_model = newfpu == 0 ? 0 : (newfpu == 2 ? 68882 : 68881);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091 #2 SCSI"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4091 SCSI"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4091 #2 SCSI"));
+ SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Fastlane SCSI"));
+ SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Fastlane #2 SCSI"));
+ SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Oktagon 2008 SCSI"));
+ SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Oktagon 2008 #2 SCSI"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A3000 SCSI"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4000T SCSI"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("CDTV SCSI"));
case WM_INITDIALOG:
recursive++;
if (current_cddlg.ci.controller_type == HD_CONTROLLER_TYPE_UAE)
- current_cddlg.ci.controller_type = (workprefs.a2091 || workprefs.a4091 || workprefs.cs_cdtvscsi || (workprefs.cs_mbdmac & 3)) ? HD_CONTROLLER_TYPE_SCSI_AUTO : HD_CONTROLLER_TYPE_IDE_AUTO;
+ current_cddlg.ci.controller_type = (workprefs.a2091rom.enabled || workprefs.a4091rom.enabled || workprefs.cs_cdtvscsi || (workprefs.cs_mbdmac & 3)) ? HD_CONTROLLER_TYPE_SCSI_AUTO : HD_CONTROLLER_TYPE_IDE_AUTO;
inithdcontroller(hDlg, current_cddlg.ci.controller_type, UAEDEV_CD);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_SETCURSEL, current_cddlg.ci.controller_unit, 0);
InitializeListView (hDlg);
-1,
IDD_INPUT, IDC_INPUTDEVICE, IDC_INPUTLIST, IDC_INPUTAMIGA,
-1,
- IDD_KICKSTART, IDC_ROMFILE, IDC_ROMFILE2, IDC_CARTFILE, IDC_FLASHFILE, IDC_RTCFILE, IDC_A2091ROMFILE, IDC_A4091ROMFILE, IDC_CPUBOARDROMFILE, IDC_CPUBOARDEXTROMFILE,
+ IDD_KICKSTART, IDC_ROMFILE, IDC_ROMFILE2, IDC_CARTFILE, IDC_FLASHFILE, IDC_RTCFILE, IDC_SCSIROMSELECT, IDC_SCSIROMFILE, IDC_CPUBOARDROMFILE,
-1,
IDD_LOADSAVE, IDC_CONFIGTREE, IDC_EDITNAME, IDC_EDITDESCRIPTION, IDC_CONFIGLINK, IDC_EDITPATH,
-1,
<OmitFramePointers>true</OmitFramePointers>
<WholeProgramOptimization>false</WholeProgramOptimization>
<AdditionalIncludeDirectories>..\..\include;..\..;..\;..\resources;..\osdep;..\sounddep;..\..\prowizard\include;..\..\slirp;..\..\ppc\pearpc;:%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
- <PreprocessorDefinitions>WINVER=0x0500;NDEBUG;_WIN32_IE=0x0700;WIN32;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+ <PreprocessorDefinitions>WINVER=0x0500;NDEBUG;_WIN32_IE=0x0700;WIN32;UAE;WINUAE;%(PreprocessorDefinitions)</PreprocessorDefinitions>
<StringPooling>true</StringPooling>
<ExceptionHandling>Sync</ExceptionHandling>
<BasicRuntimeChecks>Default</BasicRuntimeChecks>
<OmitFramePointers>false</OmitFramePointers>
<WholeProgramOptimization>false</WholeProgramOptimization>
<AdditionalIncludeDirectories>..\..\include;..\..;..\;..\resources;..\osdep;..\sounddep;..\..\prowizard\include;..\..\slirp;..\..\ppc\pearpc;%(AdditionalIncludeDirectories)</AdditionalIncludeDirectories>
- <PreprocessorDefinitions>WINVER=0x0500;_WIN32_IE=0x0700;WIN32;%(PreprocessorDefinitions)</PreprocessorDefinitions>
+ <PreprocessorDefinitions>WINVER=0x0500;_WIN32_IE=0x0700;WIN32;UAE;WINUAE;%(PreprocessorDefinitions)</PreprocessorDefinitions>
<StringPooling>true</StringPooling>
<ExceptionHandling>Sync</ExceptionHandling>
<BasicRuntimeChecks>Default</BasicRuntimeChecks>
<ClCompile Include="..\..\cpuemu_33.cpp" />
<ClCompile Include="..\..\cpuemu_40.cpp" />
<ClCompile Include="..\..\cpummu30.cpp" />
+ <ClCompile Include="..\..\dlopen.cpp" />
<ClCompile Include="..\..\ethernet.cpp" />
<ClCompile Include="..\..\events.cpp" />
<ClCompile Include="..\..\flashrom.cpp" />
<ClCompile Include="..\..\hrtmon.rom.cpp" />
<ClCompile Include="..\..\inputrecord.cpp" />
<ClCompile Include="..\..\isofs.cpp" />
+ <ClCompile Include="..\..\logging.cpp" />
<ClCompile Include="..\..\luascript.cpp" />
<ClCompile Include="..\..\ncr9x_scsi.cpp" />
<ClCompile Include="..\..\newcpu_common.cpp" />
<Filter Include="ppc">
<UniqueIdentifier>{a238ed36-3d5f-4fd0-afd7-a34029119da7}</UniqueIdentifier>
</Filter>
+ <Filter Include="ppc\pearpc">
+ <UniqueIdentifier>{f8cdc857-41a2-400a-a2e1-9a9eb3ac9d04}</UniqueIdentifier>
+ </Filter>
</ItemGroup>
<ItemGroup>
<ClCompile Include="..\ahidsound_dsonly.cpp">
<ClCompile Include="..\..\ppc\ppc.cpp">
<Filter>ppc</Filter>
</ClCompile>
+ <ClCompile Include="..\..\cpuemu_40.cpp">
+ <Filter>common</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\harddisk.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\chdcdrom.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\chdglue.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\corealloc.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\windows\wintime.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\archivers\chd\windows\winwork.cpp">
+ <Filter>unpackers\chd</Filter>
+ </ClCompile>
<ClCompile Include="..\..\ppc\ppcd.cpp">
<Filter>ppc</Filter>
</ClCompile>
- <ClCompile Include="..\..\cpuemu_40.cpp">
+ <ClCompile Include="..\..\dlopen.cpp">
+ <Filter>common</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\logging.cpp">
<Filter>common</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\uaeglue.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_alu.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_cpu.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_dec.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_exc.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_fpu.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_mmu.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_opc.cpp">
- <Filter>ppc</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
<ClCompile Include="..\..\ppc\pearpc\cpu\cpu_generic\ppc_vec.cpp">
- <Filter>ppc</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\harddisk.cpp">
- <Filter>unpackers\chd</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\chdcdrom.cpp">
- <Filter>unpackers\chd</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\chdglue.cpp">
- <Filter>unpackers\chd</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\corealloc.cpp">
- <Filter>unpackers\chd</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\windows\wintime.cpp">
- <Filter>unpackers\chd</Filter>
- </ClCompile>
- <ClCompile Include="..\..\archivers\chd\windows\winwork.cpp">
- <Filter>unpackers\chd</Filter>
+ <Filter>ppc\pearpc</Filter>
</ClCompile>
</ItemGroup>
<ItemGroup>
return NULL;
}
-#define NEXT_ROM_ID 102
+#define NEXT_ROM_ID 104
static struct romheader romheaders[] = {
{ _T("Freezer Cartridges"), 1 },
ALTROMPN(92, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0xa6023f20, 0xdfb048d6, 0xbdc03587, 0x241e8121, 0x26aba603, 0xd69b0238)
ALTROMPN(92, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x9635a9cd, 0x47578b27, 0xc4ba6e54, 0x891930dd, 0xcb4b6a45, 0x5d6b31b2)
{ _T("Blizzard SCSI Kit IV ROM"), 8, 5, 8, 5, _T("BSCSIIV\0"), 32768, 94, 0, 0, ROMTYPE_CPUBOARDEXT, 0, 0, NULL,
- 0xf53a0fca, 0xefe17ca5,0x88c44a7f,0x0f8c62be,0x20f23278,0xcfe06727 },
+ 0xf53a0fca, 0xefe17ca5,0x88c44a7f,0x0f8c62be,0x20f23278,0xcfe06727, NULL, _T("blizzard_scsi_kit_iv.rom") },
+ { _T("Fastlane ROM"), 8, 5, 8, 5, _T("FASTLANE\0"), 20788, 102, 0, 0, ROMTYPE_FASTLANE, 0, 0, NULL,
+ 0xe4f485a5, 0x20bf7de5,0x05e45d0a,0xc411cfd2,0x806d0fd8,0xe46276de, NULL, _T("fastlanez3.rom") },
+ { _T("Oktagon 2008 ROM"), 6, 12, 6, 12, _T("OKTAGON\0"), 32768, 103, 0, 0, ROMTYPE_OKTAGON, 0, 0, NULL,
+ 0xbb0d2f6a, 0x56c441fa,0x37d19339,0x3081b2e8,0xceae823b,0xc7e97e49, NULL, _T("oktagon2008.rom") },
{ _T("Warp Engine A4000 ROM"), 0, 0, 0, 0, _T("WARPENGINE\0WARPENGINEA4000\0"), 32768, 93, 0, 0, ROMTYPE_CPUBOARD, 0, 0, NULL,
0x4deb574a, 0x6e6c95ff,0xe8448391,0xd36c5b68,0xc9065cb0,0x702a7d27 },
return NULL;
}
-struct romdata *getromlistbyidsallroms (const int *ids)
+struct romdata *getromdatabyids (const int *ids)
{
struct romdata *rd;
int i;
_tcscat (tmp2, _T("- "));
_tcscat (tmp2, tmp1);
_tcscat (tmp2, _T("\n"));
- if (rd->type & (ROMTYPE_A2091BOOT | ROMTYPE_A4091BOOT | ROMTYPE_CPUBOARDEXT | ROMTYPE_CPUBOARD | ROMTYPE_CD32CART))
+ if (rd->type & (ROMTYPE_SCSI | ROMTYPE_CPUBOARD | ROMTYPE_CD32CART))
exp++;
}
i++;
projects / francis / winuae.git / commitdiff