fr->secs = drv->num_secs;
fr->heads = 2;
fr->disk_changed = drv->dskchange || fr->img == NULL;
+ if (currprefs.floppyslots[i].dfxtype == DRV_PC_ONLY_80) {
+ if (fr->cyls < 80) {
+ // 360k in 80 track drive
+ fr->rate = FLOPPY_RATE_300K;
+ } else {
+ if (drv->num_secs > 14)
+ fr->rate = FLOPPY_RATE_500K; // 1.4M
+ else
+ fr->rate = FLOPPY_RATE_250K; // 720K
+ }
+ } else {
+ fr->rate = FLOPPY_RATE_300K;
+ }
return true;
}
return false;
TCHAR diskname[110];
};
+#define FLOPPY_RATE_500K 0
+#define FLOPPY_RATE_300K 1
+#define FLOPPY_RATE_250K 2
+#define FLOPPY_RATE_1M 3
+
struct floppy_reserved
{
int num;
int secs;
int drive_cyls;
bool disk_changed;
+ int rate;
};
void disk_reserved_setinfo(int num, int cyl, int head, int motor);
bool disk_reserved_getinfo(int num, struct floppy_reserved *fr);
static int floppy_delay_hsync;
static bool floppy_did_reset;
static bool floppy_irq;
+static uae_u8 floppy_rate;
#define PC_SEEK_DELAY 50
floppy_did_reset = true;
}
+static void floppy_hardreset(void)
+{
+ floppy_rate = FLOPPY_RATE_300K;
+ floppy_reset();
+}
+
+
static void do_floppy_irq2(void)
{
write_log(_T("floppy%d irq (enable=%d)\n"), floppy_num, (floppy_dpc & 8) != 0);
return -1;
}
+static bool floppy_valid_rate(struct floppy_reserved *fr)
+{
+ return fr->rate == floppy_rate;
+}
+
static void floppy_do_cmd(struct x86_bridge *xb)
{
uae_u8 cmd = floppy_cmd[0];
int cyl = pcf->cyl;
bool nodata = false;
if (valid_floppy) {
- if (fr.img && pcf->cyl != floppy_cmd[2]) {
+ if (!floppy_valid_rate(&fr)) {
+ nodata = true;
+ } else if (fr.img && pcf->cyl != floppy_cmd[2]) {
floppy_status[0] |= 0x40; // abnormal termination
floppy_status[2] |= 0x20; // wrong cylinder
} else if (fr.img) {
case 10:
write_log(_T("Floppy read ID\n"));
- if (!valid_floppy || !fr.img) {
+ if (!valid_floppy || !fr.img || !floppy_valid_rate(&fr)) {
floppy_status[0] |= 0x40; // abnormal termination
floppy_status[1] |= 0x04; // no data
}
case 0x3f7: // configuration control
if (xb->type >= TYPE_2286) {
write_log(_T("FDC Control Register %02x\n"), v);
+ floppy_rate = v & 3;
+ } else {
+ floppy_rate = FLOPPY_RATE_300K;
}
break;
}
}
inittiming();
+ floppy_hardreset();
}
int is_x86_cpu(struct uae_prefs *p)