a2065_config ();
}
-addrbank *a2065_init (void)
+addrbank *a2065_init (int devnum)
{
configured = 0;
return a2065_config ();
b &= ~(1 | 2);
wd->gdmac.cntr = b;
break;
+ case 0x68: // bank
+ if (b != 0)
+ write_log(_T("bank %02x\n"), b);
+ break;
case 0x70: // ACR
wd->gdmac.addr &= 0x0000ffff;
wd->gdmac.addr |= (b & 0xff) << 16;
}
}
-int a2091_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int a2091_add_scsi_unit(int ch, struct uaedev_config_info *ci)
{
- struct wd_state *wd = wda2091[devnum];
+ struct wd_state *wd = wda2091[ci->controller_type_unit];
if (ci->type == UAEDEV_CD)
return add_scsi_cd(wd->scsis, ch, ci->device_emu_unit);
return add_scsi_hd(wd->scsis, ch, NULL, ci, 1);
}
-int gvp_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int gvp_add_scsi_unit(int ch, struct uaedev_config_info *ci)
{
- struct wd_state *wd = gvpscsi[devnum];
+ struct wd_state *wd = gvpscsi[ci->controller_type_unit];
if (ci->type == UAEDEV_CD)
return add_scsi_cd(wd->scsis, ch, ci->device_emu_unit);
struct wd_state *wd = wda2091[devnum];
int roms[6];
int slotsize;
- struct romlist *rl;
if (devnum > 0 && !wd->enabled)
return &expamem_null;
wd->rom = xcalloc (uae_u8, slotsize);
wd->rom_size = 16384;
wd->rom_mask = wd->rom_size - 1;
- if (_tcscmp (currprefs.a2091rom.roms[0].romfile, _T(":NOROM"))) {
- const TCHAR *romname = devnum && currprefs.a2091rom.roms[1].romfile[0] ? currprefs.a2091rom.roms[1].romfile : currprefs.a2091rom.roms[0].romfile;
- struct zfile *z = read_rom_name (romname);
- if (!z) {
- rl = getromlistbyids (roms, romname);
- if (rl) {
- z = read_rom (rl->rd);
- }
- }
+ if (is_device_rom(&currprefs, devnum, ROMTYPE_A2091)) {
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_A2091, roms);
if (z) {
write_log (_T("A590/A2091 BOOT ROM '%s'\n"), zfile_getname (z));
wd->rom_size = zfile_size (z);
gvp_reset_device(&wd_gvp_2);
}
-static const uae_u8 gvp_scsi_i_autoconfig[16] = { 0xd1, 0x09, 0x00, 0x00, 0x07, 0xe1, 0xee, 0xee, 0xee, 0xee, 0x80, 0x00 };
+static const uae_u8 gvp_scsi_i_autoconfig[16] = { 0xd1, 0x02, 0x00, 0x00, 0x07, 0xe1, 0xee, 0xee, 0xee, 0xee, 0x80, 0x00 };
static const uae_u8 gvp_scsi_ii_autoconfig[16] = { 0xd1, 0x0b, 0x00, 0x00, 0x07, 0xe1, 0xee, 0xee, 0xee, 0xee, 0x80, 0x00 };
-addrbank *gvp_init(int devnum, bool series2)
+static bool is_gvp_accelerator(void)
+{
+ return currprefs.cpuboard_type == BOARD_GVP_A530 ||
+ currprefs.cpuboard_type == BOARD_GVP_GFORCE_030;
+}
+
+static addrbank *gvp_init(int devnum, bool series2)
{
struct wd_state *wd = gvpscsi[devnum];
int roms[6];
- struct romlist *rl;
- struct boardromconfig *brc = series2 ? &currprefs.gvps2rom : &currprefs.gvps1rom;
+ bool isscsi = true;
if (devnum > 0 && !wd->enabled && currprefs.cpuboard_type != BOARD_GVP_A530)
return &expamem_null;
wd->rombankswitcher = 0;
memset(wd->dmacmemory, 0xff, sizeof wd->dmacmemory);
wd->gdmac.series2 = series2;
- wd->gdmac.version = GVP_SERIESII;
- wd->gdmac.addr_mask = 0x00ffffff;
- if (currprefs.cpuboard_type == BOARD_GVP_A530) {
- wd->gdmac.version = GVP_A530_SCSI;
- wd->gdmac.addr_mask = 0x01ffffff;
- }
roms[0] = 109;
roms[1] = 110;
memset(wd->rom, 0xff, wd->rom_size);
wd->rom_mask = 32768 - 1;
- if (_tcscmp (brc->roms[0].romfile, _T(":NOROM"))) {
- const TCHAR *romname = devnum && brc->roms[1].romfile[0] ? brc->roms[1].romfile : brc->roms[0].romfile;
- struct zfile *z = read_rom_name(romname);
- if (!z) {
- rl = getromlistbyids(roms, romname);
- if (rl) {
- z = read_rom(rl->rd);
- }
- }
+ if (is_device_rom(&currprefs, devnum, series2 ? ROMTYPE_GVPS2 : ROMTYPE_GVPS1)) {
+ struct zfile *z = read_device_rom(&currprefs, devnum, series2 ? ROMTYPE_GVPS2 : ROMTYPE_GVPS1, roms);
if (z) {
write_log(_T("GVP BOOT ROM '%s'\n"), zfile_getname(z));
int size = zfile_size(z);
wd->rombankswitcher = 1;
}
} else {
- romwarning(roms);
+ isscsi = false;
+ if (!is_gvp_accelerator())
+ romwarning(roms);
}
}
+ wd->gdmac.version = GVP_SERIESII;
+ wd->gdmac.addr_mask = 0x00ffffff;
+ if (currprefs.cpuboard_type == BOARD_GVP_A530) {
+ wd->gdmac.version = isscsi ? GVP_A530_SCSI : GVP_A530;
+ wd->gdmac.addr_mask = 0x01ffffff;
+ } else if (currprefs.cpuboard_type == BOARD_GVP_GFORCE_030) {
+ wd->gdmac.version = isscsi ? GVP_GFORCE_030_SCSI : GVP_GFORCE_030;
+ wd->gdmac.addr_mask = 0x01ffffff;
+ }
+
for (int i = 0; i < 16; i++) {
uae_u8 b = wd->gdmac.series2 ? gvp_scsi_ii_autoconfig[i] : gvp_scsi_i_autoconfig[i];
ew(wd, i * 4, b);
return wd == &wd_gvp ? &gvp_bank : &gvp_2_bank;
}
+addrbank *gvp_init_s1(int devnum)
+{
+ return gvp_init(devnum, false);
+}
+addrbank *gvp_init_s2(int devnum)
+{
+ return gvp_init(devnum, true);
+}
+addrbank *gvp_init_accelerator(int devnum)
+{
+ return gvp_init(1, true);
+}
+
uae_u8 *save_scsi_dmac (int wdtype, int *len, uae_u8 *dstptr)
{
struct wd_state *wd = wdscsi[wdtype];
#include "custom.h"
#include "memory.h"
#include "newcpu.h"
+#include "rommgr.h"
static const int data_scramble[8] = { 3, 2, 4, 5, 7, 6, 0, 1 };
static const int addr_scramble[16] = { 14, 12, 2, 10, 15, 13, 1, 0, 7, 6, 5, 4, 8, 9, 11, 3 };
{
struct zfile *z = NULL;
- if (!currprefs.amaxromfile[0])
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) < 0)
return;
amax_reset ();
- if (_tcscmp (currprefs.amaxromfile, _T(":NOROM")))
- z = zfile_fopen (currprefs.amaxromfile, _T("rb"), ZFD_NORMAL);
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0)
+ z = read_device_rom(&currprefs, 0, ROMTYPE_AMAX, NULL);
if (z) {
zfile_fseek (z, 0, SEEK_END);
amax_rom_size = zfile_ftell (z);
zfile_fseek (z, 0, SEEK_SET);
} else {
- write_log (_T("AMAX: failed to load rom '%s'\n"), currprefs.amaxromfile);
+ write_log (_T("AMAX: failed to load rom\n"));
amax_rom_size = 262144;
}
rom = xcalloc (uae_u8, amax_rom_size);
zfile_fread (rom, amax_rom_size, 1, z);
zfile_fclose (z);
}
- write_log (_T("AMAX: '%s' loaded, %d bytes\n"), currprefs.amaxromfile, amax_rom_size);
+ write_log (_T("AMAX: loaded, %d bytes\n"), amax_rom_size);
}
-
-
configured = 0;
}
-addrbank *cdtv_init (void)
+addrbank *cdtv_init (int devnum)
{
close_unit ();
if (!thread_alive) {
if (!currprefs.cs_cdtvcd) {
changed_prefs.cs_cdtvcd = changed_prefs.cs_cdtvram = true;
currprefs.cs_cdtvcd = currprefs.cs_cdtvram = true;
- cdtv_init ();
+ cdtv_init (0);
}
restore_u32 ();
{
if (!currprefs.cs_cdtvcd || currprefs.cs_cdtvcr)
return;
- cdtv_init ();
+ cdtv_init (0);
get_toc ();
write_comm_pipe_u32 (&requests, 0x0104, 1);
if (cd_playing) {
#include "options.h"
#include "uae.h"
#include "audio.h"
-#include "autoconf.h"
#include "events.h"
#include "custom.h"
#include "inputdevice.h"
#include "gfxfilter.h"
#include "savestate.h"
#include "memory.h"
+#include "autoconf.h"
#include "rommgr.h"
#include "gui.h"
#include "newcpu.h"
static const TCHAR *cpuboards[] = {
_T("none"),
_T("Blizzard1230IV"),
- _T("Blizzard1230IV+SCSI"),
_T("Blizzard1260"),
- _T("Blizzard1260+SCSI"),
_T("Blizzard2060"),
_T("CyberStormMK1"),
_T("CyberStormMK2"),
_T("A3001SII"),
_T("Apollo"),
_T("GVPA530"),
+ _T("GVPGFORCE030"),
NULL
};
static const TCHAR *ppc_implementations[] = {
static const TCHAR *leds[] = { _T("power"), _T("df0"), _T("df1"), _T("df2"), _T("df3"), _T("hd"), _T("cd"), _T("fps"), _T("cpu"), _T("snd"), _T("md"), 0 };
static const int leds_order[] = { 3, 6, 7, 8, 9, 4, 5, 2, 1, 0, 9 };
static const TCHAR *lacer[] = { _T("off"), _T("i"), _T("p"), 0 };
+
static const TCHAR *hdcontrollers[] = {
_T("uae"),
_T("ide%d"),
_T("ide%d_mainboard"),
- _T("ide%d_a3001"),
- _T("ide%d_alfa"), _T("ide%d_alfa-2"),
- _T("ide%d_apollo"), _T("ide%d_apollo-2"),
- _T("ide%d_masoboshi"), _T("ide%d_masoboshi-2"),
- //_T("ide%d_adide"), _T("ide%d_adide-2"),
_T("scsi%d"),
- _T("scsi%d_a2091"), _T("scsi%d_a2091-2"),
- _T("scsi%d_gvp"), _T("scsi%d_gvp-2"),
- _T("scsi%d_a4091"), _T("scsi%d_a4091-2"),
- _T("scsi%d_fastlane"), _T("scsi%d_fastlane-2"),
- _T("scsi%d_oktagon2008"), _T("scsi%d_oktagon2008-2"),
- _T("scsi%d_apollo"), _T("scsi%d_apollo-2"),
- _T("scsi%d_masoboshi"), _T("scsi%d_masoboshi-2"),
_T("scsi%d_a3000"),
_T("scsi%d_a4000t"),
_T("scsi%d_cdtv"),
- _T("scsi%d_cpuboard"),
_T("scsram"),
_T("scide")
} else {
str1 = cfgfile_put_multipath (&p->path_hardfile, ci->rootdir);
}
- _stprintf(hdcs, hdcontrollers[ci->controller_type], ci->controller_unit);
+ int ct = ci->controller_type;
+ if (ct >= HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST && ct <= HD_CONTROLLER_TYPE_SCSI_LAST) {
+ _stprintf(hdcs, _T("scsi%d_%s"), ci->controller_unit, expansionroms[ct - HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST].name);
+ } else if (ct >= HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST && ct <= HD_CONTROLLER_TYPE_IDE_LAST) {
+ _stprintf(hdcs, _T("ide%d_%s"), ci->controller_unit, expansionroms[ct - HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST].name);
+ } else if (ct >= HD_CONTROLLER_TYPE_SCSI_FIRST && ct < HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST) {
+ _stprintf(hdcs, hdcontrollers[ct - HD_CONTROLLER_EXPANSION_MAX], ci->controller_unit);
+ } else if (ct >= HD_CONTROLLER_TYPE_PCMCIA_SRAM && ct <= HD_CONTROLLER_TYPE_PCMCIA_IDE) {
+ _stprintf(hdcs, hdcontrollers[ct - 2 * HD_CONTROLLER_EXPANSION_MAX], ci->controller_unit);
+ } else {
+ _stprintf(hdcs, hdcontrollers[ct], ci->controller_unit);
+ }
+ if (ci->controller_type_unit > 0)
+ _stprintf(hdcs + _tcslen(hdcs), _T("-%d"), ci->controller_type_unit);
str1b = cfgfile_escape (str1, _T(":,"), true);
str2b = cfgfile_escape (str2, _T(":,"), true);
}
}
-static void cfgfile_write_board_rom(struct zfile *f, struct multipath *mp, struct boardromconfig *br, const TCHAR *name)
+static void cfgfile_write_board_rom(struct zfile *f, struct multipath *mp, struct boardromconfig *br)
{
TCHAR buf[256];
-
+ const TCHAR *name;
+ const struct expansionromtype *ert;
+
+ if (br->device_type == 0)
+ return;
+ ert = get_device_expansion_rom(br->device_type);
+ if (!ert)
+ return;
for (int i = 0; i < MAX_BOARD_ROMS; i++) {
- _stprintf(buf, _T("%s_rom_file"), name);
- if (i == 0 || br->roms[i].romfile[0])
+ name = ert->name;
+ if (i == 0 || _tcslen(br->roms[i].romfile)) {
+ _stprintf(buf, _T("%s%s_rom_file"), name, i ? _T("_ext") : _T(""));
cfgfile_write_rom (f, mp, br->roms[i].romfile, buf);
-
- if (br->roms[i].romident[0]) {
- _stprintf(buf, _T("%s_rom"), name);
- cfgfile_dwrite_str (f, buf, br->roms[i].romident);
- }
-
- if (br->roms[i].board_ram_size) {
- _stprintf(buf, _T("%s_mem_size"), name);
- cfgfile_write(f, buf, _T("%d"), br->roms[i].board_ram_size / 0x40000);
+ if (br->roms[i].romident[0]) {
+ _stprintf(buf, _T("%s%s_rom"), name, i ? _T("_ext") : _T(""));
+ cfgfile_dwrite_str (f, buf, br->roms[i].romident);
+ }
+ if (br->roms[i].board_ram_size) {
+ _stprintf(buf, _T("%s%s_mem_size"), name, i ? _T("_ext") : _T(""));
+ cfgfile_write(f, buf, _T("%d"), br->roms[i].board_ram_size / 0x40000);
+ }
}
}
}
-
void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
{
struct strlist *sl;
if (p->romextident[0])
cfgfile_write_str (f, _T("kickstart_ext_rom="), p->romextident);
- cfgfile_write_board_rom(f, &p->path_rom, &p->a2091rom, _T("a2091"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->gvps1rom, _T("gvp1"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->gvps2rom, _T("gvp"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->a4091rom, _T("a4091"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->fastlanerom, _T("fastlane"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->oktagonrom, _T("oktagon2008"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->alfrom, _T("alfapower"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->alfplusrom, _T("alfapowerplus"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->apollorom, _T("apollo"));
- cfgfile_write_board_rom(f, &p->path_rom, &p->masoboshirom, _T("masoboshi"));
-
- cfgfile_write_rom(f, &p->path_rom, p->acceleratorromfile, _T("cpuboard_rom_file"));
- if (p->acceleratorromident[0])
- cfgfile_dwrite_str(f, _T("cpuboard_rom"), p->acceleratorromident);
- cfgfile_write_rom(f, &p->path_rom, p->acceleratorextromfile, _T("cpuboard_ext_rom_file"));
- if (p->acceleratorextromident[0])
- cfgfile_dwrite_str(f, _T("cpuboard_ext_rom"), p->acceleratorextromident);
+ for (int i = 0; i < MAX_EXPANSION_BOARDS; i++) {
+ cfgfile_write_board_rom(f, &p->path_rom, &p->expansionboard[i]);
+ }
cfgfile_write_path (f, &p->path_rom, _T("flash_file"), p->flashfile);
cfgfile_write_path (f, &p->path_rom, _T("cart_file"), p->cartfile);
cfgfile_write_path (f, &p->path_rom, _T("rtc_file"), p->rtcfile);
if (p->cartident[0])
cfgfile_write_str (f, _T("cart"), p->cartident);
- if (p->amaxromfile[0])
- cfgfile_write_path (f, &p->path_rom, _T("amax_rom_file"), p->amaxromfile);
cfgfile_dwrite_path (f, &p->path_rom, _T("picassoiv_rom_file"), p->picassoivromfile);
cfgfile_write_bool (f, _T("kickshifter"), p->kickshifter);
cfgfile_dwrite (f, _T("fastmem2_size_k"), _T("%d"), p->fastmem2_size / 1024);
else
cfgfile_dwrite (f, _T("fastmem2_size"), _T("%d"), p->fastmem2_size / 0x100000);
+ cfgfile_write (f, _T("mem25bit_size"), _T("%d"), p->mem25bit_size / 0x100000);
cfgfile_write (f, _T("a3000mem_size"), _T("%d"), p->mbresmem_low_size / 0x100000);
cfgfile_write (f, _T("mbresmem_size"), _T("%d"), p->mbresmem_high_size / 0x100000);
cfgfile_write (f, _T("z3mem_size"), _T("%d"), p->z3fastmem_size / 0x100000);
p->custom_memory_sizes[num] = size;
}
-static void get_filesys_controller (const TCHAR *hdc, int *type, int *num)
+static void get_filesys_controller (const TCHAR *hdc, int *type, int *typenum, int *num)
{
int hdcv = HD_CONTROLLER_TYPE_UAE;
int hdunit = 0;
+ int idx = 0;
if(_tcslen (hdc) >= 4 && !_tcsncmp (hdc, _T("ide"), 3)) {
hdcv = HD_CONTROLLER_TYPE_IDE_AUTO;
hdunit = hdc[3] - '0';
hdunit = 0;
}
if (hdcv > HD_CONTROLLER_TYPE_UAE) {
+ bool found = false;
const TCHAR *ext = _tcsrchr (hdc, '_');
if (ext) {
ext++;
+ int len = _tcslen(ext);
+ if (len > 2 && ext[len - 2] == '-' && ext[len - 1] >= '2' && ext[len - 1] <= '9') {
+ idx = ext[len - 1] - '1';
+ len -= 2;
+ }
for (int i = 0; hdcontrollers[i]; i++) {
const TCHAR *ext2 = _tcsrchr(hdcontrollers[i], '_');
if (ext2) {
ext2++;
- if (!_tcsicmp(ext, ext2) && hdc[0] == hdcontrollers[i][0]) {
- hdcv = i;
+ if (_tcslen(ext2) == len && !_tcsnicmp(ext, ext2, len) && hdc[0] == hdcontrollers[i][0]) {
+ if (hdcv == HD_CONTROLLER_TYPE_IDE_AUTO) {
+ hdcv = i;
+ } else {
+ hdcv = i + HD_CONTROLLER_EXPANSION_MAX;
+ }
+ found = true;
break;
}
}
}
+ if (!found) {
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *ert = &expansionroms[i];
+ if (_tcslen(ert->name) == len && !_tcsnicmp(ext, ert->name, len)) {
+ if (hdcv == HD_CONTROLLER_TYPE_IDE_AUTO) {
+ hdcv = HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST + i;
+ } else {
+ hdcv = HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST + i;
+ }
+ break;
+ }
+ }
+
+ }
}
} else if (_tcslen (hdc) >= 6 && !_tcsncmp (hdc, _T("scsram"), 6)) {
hdcv = HD_CONTROLLER_TYPE_PCMCIA_SRAM;
} else if (_tcslen (hdc) >= 5 && !_tcsncmp (hdc, _T("scide"), 6)) {
hdcv = HD_CONTROLLER_TYPE_PCMCIA_IDE;
}
+ if (idx > 1)
+ idx = 1;
*type = hdcv;
+ *typenum = idx;
*num = hdunit;
}
if (!_tcsicmp (key, _T("unit")))
uci->unit = v;
if (!_tcsicmp (key, _T("controller")))
- get_filesys_controller (val, &uci->controller_type, &uci->controller_unit);
+ get_filesys_controller (val, &uci->controller_type, &uci->controller_type_unit, &uci->controller_unit);
if (!_tcsicmp (key, _T("flags")))
uci->flags = v;
if (!_tcsicmp (key, _T("priority")))
memset (&hfd, 0, sizeof hfd);
hfd.ci.readonly = true;
hfd.ci.blocksize = 512;
- if (hdf_open (&hfd, uci->rootdir)) {
+ if (hdf_open (&hfd, uci->rootdir) > 0) {
parse_geo (tname, uci, &hfd, false);
hdf_close (&hfd);
} else {
TCHAR *tmpp2 = _tcschr (tmpp, ',');
if (tmpp2)
*tmpp2++ = 0;
- get_filesys_controller (tmpp, &uci.controller_type, &uci.controller_unit);
+ get_filesys_controller (tmpp, &uci.controller_type, &uci.controller_type_unit, &uci.controller_unit);
if (tmpp2) {
if (getintval2 (&tmpp2, &uci.highcyl, ',')) {
getintval (&tmpp2, &uci.pcyls, '/');
} else if (!_tcscmp (s, _T("filesys"))) {
_tcscpy (uci->filesys, value);
} else if (!_tcscmp (s, _T("controller"))) {
- get_filesys_controller (value, &uci->controller_type, &uci->controller_unit);
+ get_filesys_controller (value, &uci->controller_type, &uci->controller_type_unit, &uci->controller_unit);
}
}
}
return 0;
}
-bool cfgfile_board_enabled(struct boardromconfig *br)
+bool cfgfile_board_enabled(struct uae_prefs *p, int romtype)
{
- for (int i = 0; i < MAX_BOARD_ROMS; i++) {
- if (br->roms[i].romfile[0])
- return true;
- }
- return false;
+ int idx;
+ struct boardromconfig *brc = get_device_rom(p, romtype, &idx);
+ if (!brc)
+ return false;
+ return brc->roms[idx].romfile[0] != 0;
}
-static bool cfgfile_read_board_rom(const TCHAR *option, const TCHAR *value, struct multipath *mp, struct boardromconfig *br, const TCHAR *name, int mask)
+static bool cfgfile_read_board_rom(struct uae_prefs *p, const TCHAR *option, const TCHAR *value, struct multipath *mp)
{
- TCHAR buf[256], buf2[MAX_DPATH];
+ TCHAR buf[256], buf2[MAX_DPATH], buf3[MAX_DPATH];
bool dummy;
+ int val;
+ const struct expansionromtype *ert;
- _stprintf(buf, _T("scsi_%s"), name);
- if (cfgfile_yesno(option, value, buf, &dummy))
- return true;
- for (int i = 0; i < MAX_BOARD_ROMS; i++) {
+ for (int i = 0; expansionroms[i].name; i++) {
+ struct boardromconfig *brc;
+ int idx;
+ ert = &expansionroms[i];
- _stprintf(buf, _T("%s_rom_file"), name);
- if (cfgfile_path(option, value, buf, br->roms[i].romfile, MAX_DPATH / sizeof (TCHAR), mp))
+ _stprintf(buf, _T("scsi_%s"), ert->name);
+ if (cfgfile_yesno(option, value, buf, &dummy)) {
return true;
+ }
- _stprintf(buf, _T("%s_rom_file_id"), name);
- if (cfgfile_rom (option, value, buf, br->roms[i].romfile, MAX_DPATH / sizeof (TCHAR)))
+ _stprintf(buf, _T("%s_rom_file"), ert->name);
+ if (cfgfile_path(option, value, buf, buf2, MAX_DPATH / sizeof (TCHAR), mp)) {
+ if (buf2[0]) {
+ brc = get_device_rom_new(p, ert->romtype, &idx);
+ _tcscpy(brc->roms[idx].romfile, buf2);
+ }
return true;
+ }
- _stprintf(buf, _T("%s_rom"), name);
+ _stprintf(buf, _T("%s_rom_file_id"), ert->name);
+ if (cfgfile_rom (option, value, buf, buf2, MAX_DPATH / sizeof (TCHAR))) {
+ if (buf2[0]) {
+ brc = get_device_rom_new(p, ert->romtype, &idx);
+ _tcscpy(brc->roms[idx].romfile, buf2);
+ }
+ return true;
+ }
+
+ _stprintf(buf, _T("%s_rom"), ert->name);
if (cfgfile_string (option, value, buf, buf2, sizeof buf2 / sizeof (TCHAR))) {
- decode_rom_ident (br->roms[i].romident, sizeof(br->roms[i].romident) / sizeof (TCHAR), buf2, mask);
+ if (buf2[0]) {
+ decode_rom_ident (buf3, sizeof(buf3) / sizeof (TCHAR), buf2, ert->romtype);
+ if (buf3[0]) {
+ brc = get_device_rom_new(p, ert->romtype, &idx);
+ _tcscpy(brc->roms[idx].romident, buf3);
+ }
+ }
return true;
}
- _stprintf(buf, _T("%s_mem_size"), name);
- if (cfgfile_intval (option, value, buf, &br->roms[i].board_ram_size, 0x40000))
+ _stprintf(buf, _T("%s_mem_size"), ert->name);
+ if (cfgfile_intval (option, value, buf, &val, 0x40000)) {
+ if (val) {
+ brc = get_device_rom_new(p, ert->romtype, &idx);
+ brc->roms[idx].board_ram_size = val;
+ }
return true;
+ }
}
return false;
}
|| cfgfile_intval(option, value, _T("fastmem_size_k"), &p->fastmem_size, 1024)
|| cfgfile_intval (option, value, _T("fastmem2_size"), &p->fastmem2_size, 0x100000)
|| cfgfile_intval (option, value, _T("fastmem2_size_k"), &p->fastmem2_size, 1024)
+ || cfgfile_intval (option, value, _T("mem25bit_size"), &p->mem25bit_size, 0x100000)
|| cfgfile_intval (option, value, _T("a3000mem_size"), &p->mbresmem_low_size, 0x100000)
|| cfgfile_intval (option, value, _T("mbresmem_size"), &p->mbresmem_high_size, 0x100000)
|| cfgfile_intval (option, value, _T("z3mem_size"), &p->z3fastmem_size, 0x100000)
if (cfgfile_path (option, value, _T("kickstart_rom_file"), p->romfile, sizeof p->romfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("kickstart_ext_rom_file"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("kickstart_ext_rom_file2"), p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR), &p->path_rom)
- || cfgfile_path(option, value, _T("cpuboard_rom_file"), p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR), &p->path_rom)
- || cfgfile_path(option, value, _T("cpuboard_ext_rom_file"), p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR), &p->path_rom)
|| cfgfile_rom(option, value, _T("kickstart_rom_file_id"), p->romfile, sizeof p->romfile / sizeof(TCHAR))
|| cfgfile_rom (option, value, _T("kickstart_ext_rom_file_id"), p->romextfile, sizeof p->romextfile / sizeof (TCHAR))
- || cfgfile_rom(option, value, _T("cpuboard_rom_file_id"), p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR))
- || cfgfile_rom(option, value, _T("cpuboard_ext_rom_file_id"), p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR))
- || cfgfile_path(option, value, _T("amax_rom_file"), p->amaxromfile, sizeof p->amaxromfile / sizeof(TCHAR))
|| cfgfile_path (option, value, _T("flash_file"), p->flashfile, sizeof p->flashfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("cart_file"), p->cartfile, sizeof p->cartfile / sizeof (TCHAR), &p->path_rom)
|| cfgfile_path (option, value, _T("rtc_file"), p->rtcfile, sizeof p->rtcfile / sizeof (TCHAR), &p->path_rom)
return 1;
}
- if (cfgfile_string (option, value, _T("cpuboard_rom"), p->acceleratorromident, sizeof p->acceleratorromident / sizeof (TCHAR))) {
- decode_rom_ident (p->acceleratorromident, sizeof p->acceleratorromident / sizeof (TCHAR), p->acceleratorromident, ROMTYPE_CPUBOARD);
- return 1;
- }
- if (cfgfile_string (option, value, _T("cpuboard_ext_rom"), p->acceleratorextromident, sizeof p->acceleratorextromident / sizeof (TCHAR))) {
- decode_rom_ident (p->acceleratorextromident, sizeof p->acceleratorextromident / sizeof (TCHAR), p->acceleratorextromident, ROMTYPE_CPUBOARDEXT);
- return 1;
- }
if (cfgfile_string (option, value, _T("cart"), p->cartident, sizeof p->cartident / sizeof (TCHAR))) {
decode_rom_ident (p->cartfile, sizeof p->cartfile / sizeof (TCHAR), p->cartident, ROMTYPE_ALL_CART);
return 1;
}
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->a2091rom, _T("a2091"), ROMTYPE_A2091))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->gvps1rom, _T("gvp1"), ROMTYPE_GVPS1))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->gvps2rom, _T("gvp"), ROMTYPE_GVPS2))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->a4091rom, _T("a4091"), ROMTYPE_A4091))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->fastlanerom, _T("fastlane"), ROMTYPE_FASTLANE))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->oktagonrom, _T("oktagon2008"), ROMTYPE_OKTAGON))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->alfrom, _T("alfapower"), ROMTYPE_ALFA))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->alfplusrom, _T("alfapowerplus"), ROMTYPE_ALFAPLUS))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->apollorom, _T("apollo"), ROMTYPE_APOLLO))
- return 1;
- if (cfgfile_read_board_rom(option, value, &p->path_rom, &p->masoboshirom, _T("masoboshi"), ROMTYPE_MASOBOSHI))
+ if (cfgfile_read_board_rom(p, option, value, &p->path_rom))
return 1;
for (i = 0; i < 4; i++) {
static void subst (TCHAR *p, TCHAR *f, int n)
{
+ if (_tcslen(p) == 0 || _tcslen(f) == 0)
+ return;
TCHAR *str = cfgfile_subst_path (UNEXPANDED, p, f);
_tcsncpy (f, str, n - 1);
f[n - 1] = '\0';
subst (p->path_rom.path[0], p->romfile, sizeof p->romfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile, sizeof p->romextfile / sizeof (TCHAR));
subst (p->path_rom.path[0], p->romextfile2, sizeof p->romextfile2 / sizeof (TCHAR));
- subst(p->path_rom.path[0], p->acceleratorromfile, sizeof p->acceleratorromfile / sizeof(TCHAR));
- subst(p->path_rom.path[0], p->acceleratorextromfile, sizeof p->acceleratorextromfile / sizeof(TCHAR));
- for (i = 0; i < MAX_BOARD_ROMS; i++) {
- subst(p->path_rom.path[0], p->a2091rom.roms[i].romfile, MAX_DPATH / sizeof(TCHAR));
- subst(p->path_rom.path[0], p->gvps1rom.roms[i].romfile, MAX_DPATH / sizeof(TCHAR));
- subst(p->path_rom.path[0], p->gvps2rom.roms[i].romfile, MAX_DPATH / sizeof(TCHAR));
- subst(p->path_rom.path[0], p->a4091rom.roms[i].romfile, MAX_DPATH / sizeof(TCHAR));
- subst(p->path_rom.path[0], p->fastlanerom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
- subst(p->path_rom.path[0], p->alfrom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
- subst(p->path_rom.path[0], p->alfplusrom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
- subst(p->path_rom.path[0], p->masoboshirom.roms[i].romfile, MAX_DPATH / sizeof (TCHAR));
+ for (i = 0; i < MAX_EXPANSION_BOARDS; i++) {
+ for (int j = 0; j < MAX_BOARD_ROMS; j++) {
+ subst(p->path_rom.path[0], p->expansionboard[i].roms[j].romfile, MAX_DPATH / sizeof(TCHAR));
+ }
}
return 1;
p->fastmem_size = 0x00000000;
p->fastmem2_size = 0x00000000;
+ p->mem25bit_size = 0x00000000;
p->mbresmem_low_size = 0x00000000;
p->mbresmem_high_size = 0x00000000;
p->z3fastmem_size = 0x00000000;
p->chipmem_size = 0x00080000;
p->bogomem_size = 0x00080000;
p->fastmem_size = 0x00000000;
+ p->mem25bit_size = 0x00000000;
p->mbresmem_low_size = 0x00000000;
p->mbresmem_high_size = 0x00000000;
p->z3fastmem_size = 0x00000000;
break;
}
set_68020_compa (p, compa, 0);
+ set_device_rom(p, NULL, ROMTYPE_CPUBOARD);
+ set_device_rom(p, NULL, ROMTYPE_CPUBOARDEXT);
return configure_rom (p, roms, romcheck);
}
switch(p->cpuboard_type)
{
- case BOARD_BLIZZARD_1230_IV_SCSI:
- roms2[0] = 94;
case BOARD_BLIZZARD_1230_IV:
roms[0] = 89;
break;
- case BOARD_BLIZZARD_1260_SCSI:
- roms2[0] = 94;
case BOARD_BLIZZARD_1260:
roms[0] = 90;
break;
roms[0] = p->cpu_model == 68040 ? 99 : 100;
break;
}
- p->acceleratorromfile[0] = 0;
- p->acceleratorextromfile[0] = 0;
if (!configure_rom(p, roms, 0))
return 0;
if (!configure_rom(p, roms2, 0))
#include "inputrecord.h"
#include "autoconf.h"
#include "uae/ppc.h"
+#include "rommgr.h"
#define CIAA_DEBUG_R 0
#define CIAA_DEBUG_W 0
handle_cd32_joystick_cia (ciaapra, ciaadra);
dongle_cia_write (0, reg, val);
#ifdef AMAX
- if (currprefs.amaxromfile[0])
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0)
amax_bfe001_write (val, ciaadra);
#endif
break;
static bool is_blizzard(void)
{
- return currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI ||
- currprefs.cpuboard_type == BOARD_BLIZZARD_1260 || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI;
+ return currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260;
}
static bool is_blizzard2060(void)
{
v = cpuboard_ncr710_io_bget(addr);
} else if (is_blizzard2060() && addr >= BLIZZARD_2060_SCSI_OFFSET) {
v = cpuboard_ncr9x_scsi_get(addr);
- } else if ((currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
- v = cpuboard_ncr9x_scsi_get(addr);
+ } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260) {
+ if (addr & BLIZZARD_SCSI_KIT_SCSI_OFFSET)
+ v = cpuboard_ncr9x_scsi_get(addr);
+ else
+ v = blizzardea_bank.baseaddr[addr];
} else if (is_csmk1()) {
if (addr >= CYBERSTORM_MK1_SCSI_OFFSET) {
v = cpuboard_ncr9x_scsi_get(addr);
cpuboard_ncr710_io_bput(addr, b);
} else if (is_blizzard2060() && addr >= BLIZZARD_2060_SCSI_OFFSET) {
cpuboard_ncr9x_scsi_put(addr, b);
- } else if ((currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
+ } else if ((currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
cpuboard_ncr9x_scsi_put(addr, b);
} else if (is_csmk1()) {
if (addr >= CYBERSTORM_MK1_SCSI_OFFSET) {
return;
if (!(a2630_io & 2))
map_banks(&blizzardf0_bank, 0xf80000 >> 16, f0rom_size >> 16, 0);
+ if (mem25bit_bank.allocated)
+ map_banks(&chipmem_bank, (mem25bit_bank.start + mem25bit_bank.allocated) >> 16, (1024 * 1024) >> 16, 0);
+ else
+ map_banks(&chipmem_bank, 0x01000000 >> 16, (1024 * 1024) >> 16, 0);
+
}
void cpuboard_clear(void)
return true;
}
+bool cpuboard_32bit(struct uae_prefs *p)
+{
+ int b = cpuboard_memorytype(p);
+ return b == BOARD_MEMORY_HIGHMEM ||
+ b == BOARD_MEMORY_BLIZZARD_12xx ||
+ b == BOARD_MEMORY_BLIZZARD_PPC ||
+ b == BOARD_MEMORY_Z3 ||
+ b == BOARD_MEMORY_25BITMEM;
+}
+
int cpuboard_memorytype(struct uae_prefs *p)
{
switch (p->cpuboard_type)
case BOARD_DKB1200: // ??
case BOARD_APOLLO:
return BOARD_MEMORY_HIGHMEM;
+ case BOARD_GVP_GFORCE_030:
case BOARD_A2630:
+ return BOARD_MEMORY_25BITMEM;
case BOARD_GVP_A530:
return BOARD_MEMORY_Z2;
case BOARD_BLIZZARD_1230_IV:
- case BOARD_BLIZZARD_1230_IV_SCSI:
case BOARD_BLIZZARD_1260:
- case BOARD_BLIZZARD_1260_SCSI:
return BOARD_MEMORY_BLIZZARD_12xx;
case BOARD_BLIZZARDPPC:
return BOARD_MEMORY_BLIZZARD_PPC;
return 128 * 1024 * 1024;
case BOARD_MEMORY_Z2:
return 8 * 1024 * 1024;
+ case BOARD_MEMORY_25BITMEM:
+ return 128 * 1024 * 1024;
default:
return 0;
}
}
}
-addrbank *cpuboard_autoconfig_init(void)
+addrbank *cpuboard_autoconfig_init(int devnum)
{
struct zfile *autoconfig_rom = NULL;
+ struct boardromconfig *brc, *brc2;
int roms[3], roms2[3];
bool autoconf = true;
bool autoconf_stop = false;
const TCHAR *defaultromname = NULL;
- const TCHAR *romname = currprefs.acceleratorromfile;
+ const TCHAR *romname = NULL;
bool isflashrom = false;
struct romdata *rd = NULL;
+ int idx, idx2;
+ brc = get_device_rom(&currprefs, ROMTYPE_CPUBOARD, &idx);
+ brc2 = get_device_rom(&currprefs, ROMTYPE_CPUBOARDEXT, &idx2);
+ if (brc)
+ romname = brc->roms[idx].romfile;
+
roms[0] = -1;
roms[1] = -1;
roms[2] = -1;
roms[1] = 106;
break;
case BOARD_GVP_A530:
+ case BOARD_GVP_GFORCE_030:
return &expamem_null;
case BOARD_APOLLO:
roms[0] = 119;
case BOARD_A3001_I:
case BOARD_A3001_II:
return &expamem_null;
- case BOARD_BLIZZARD_1230_IV_SCSI:
- roms2[0] = 94;
case BOARD_BLIZZARD_1230_IV:
roms[0] = 89;
+ if (brc2)
+ roms2[0] = 94;
break;
- case BOARD_BLIZZARD_1260_SCSI:
- roms2[0] = 94;
case BOARD_BLIZZARD_1260:
roms[0] = 90;
+ if (brc2)
+ roms2[0] = 94;
break;
case BOARD_BLIZZARD_2060:
roms[0] = 92;
struct romlist *rl = NULL;
if (roms[0] >= 0) {
- getromlistbyids(roms, romname);
+ rl = getromlistbyids(roms, romname);
if (!rl) {
rd = getromdatabyids(roms);
if (!rd)
zfile_fclose(autoconfig_rom);
autoconfig_rom = NULL;
if (roms2[0] != -1) {
- autoconfig_rom = board_rom_open(roms2, currprefs.acceleratorextromfile);
+ if (brc2)
+ autoconfig_rom = board_rom_open(roms2, brc2->roms[idx2].romfile);
if (!autoconfig_rom)
autoconfig_rom = board_rom_open(roms2, defaultromname);
if (autoconfig_rom) {
#include "threaddep/thread.h"
#include "luascript.h"
#include "devices.h"
+#include "rommgr.h"
#define CUSTOM_DEBUG 0
#define SPRITE_DEBUG 0
SB (currprefs.cs_a1000ram ? 1 : 0);
SB (currprefs.cs_slowmemisfast ? 1 : 0);
- SB (cfgfile_board_enabled(&currprefs.a2091rom) ? 1 : 0);
- SB (cfgfile_board_enabled(&currprefs.a4091rom) ? 1 : 0);
+ SB (cfgfile_board_enabled(&currprefs, ROMTYPE_A2091) ? 1 : 0);
+ SB (cfgfile_board_enabled(&currprefs, ROMTYPE_A4091) ? 1 : 0);
SB (currprefs.cs_cdtvscsi ? 1 : 0);
SB (currprefs.cs_pcmcia ? 1 : 0);
CIA_reset ();
gayle_reset (0);
apolloscsi_reset();
+ ncr5380scsi_reset();
#ifdef A2091
a2091_reset ();
gvp_reset ();
#ifdef NCR9X
ncr9x_rethink();
#endif
+ ncr80_rethink();
#ifdef WITH_TOCCATA
sndboard_rethink();
#endif
a3000scsi_free ();
#endif
apolloscsi_free();
+ ncr5380scsi_free();
#ifdef NCR
ncr710_free();
ncr_free();
#endif
#include "fsdb.h"
#include "statusline.h"
+#include "rommgr.h"
#undef CATWEASEL
static void setamax (void)
{
#ifdef AMAX
- if (currprefs.amaxromfile[0]) {
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0) {
/* Put A-Max as last drive in drive chain */
int j;
for (j = 0; j < MAX_FLOPPY_DRIVES; j++)
write_log (_T("%08X %02X->%02X %s drvmask=%x"), M68K_GETPC, prev_data, data, tobin(data), selected ^ 15);
#ifdef AMAX
- if (currprefs.amaxromfile[0]) {
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0) {
for (dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) {
drive *drv = floppy + dr;
if (drv->amax)
drv2->writtento = 1;
}
#ifdef AMAX
- if (currprefs.amaxromfile[0])
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0)
amax_diskwrite (w);
#endif
}
break;
}
if (dr == 4) {
- if (!currprefs.amaxromfile[0]) {
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) <= 0) {
write_log (_T("disk %s DMA started, drvmask=%x motormask=%x PC=%08x\n"),
dskdmaen == DSKDMA_WRITE ? _T("write") : _T("read"), selected ^ 15, motormask, M68K_GETPC);
}
uae_u16 w = chipmem_wget_indirect (dskpt + i * 2);
drv->bigmfmbuf[pos >> 4] = w;
#ifdef AMAX
- if (currprefs.amaxromfile[0])
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0)
amax_diskwrite (w);
#endif
pos += 16;
if (dskdmaen == DSKDMA_WRITE) {
uae_u16 w = chipmem_wget_indirect (dskpt);
#ifdef AMAX
- if (currprefs.amaxromfile[0]) {
+ if (is_device_rom(&currprefs, 0, ROMTYPE_AMAX) > 0) {
amax_diskwrite (w);
if (w) {
for (int i = 0; i < 16; i++) {
#include "uae.h"
#include "memory.h"
#include "rommgr.h"
-#include "autoconf.h"
#include "custom.h"
#include "newcpu.h"
#include "savestate.h"
#include "cd32_fmv.h"
#include "ncr_scsi.h"
#include "ncr9x_scsi.h"
+#include "scsi.h"
#include "debug.h"
#include "gayle.h"
#include "idecontrollers.h"
#include "cpuboard.h"
#include "sndboard.h"
#include "uae/ppc.h"
+#include "autoconf.h"
#define EXP_DEBUG 0
-#define MAX_EXPANSION_BOARDS 11
+#define MAX_EXPANSION_BOARD_SPACE 16
/* ********************************************************** */
/* 00 / 02 */
/* ********************************************************** */
-static addrbank* (*card_init[MAX_EXPANSION_BOARDS]) (void);
-static addrbank* (*card_map[MAX_EXPANSION_BOARDS]) (void);
-static const TCHAR *card_name[MAX_EXPANSION_BOARDS];
-static int card_flags[MAX_EXPANSION_BOARDS];
+static addrbank* (*card_init[MAX_EXPANSION_BOARD_SPACE])(int);
+static addrbank* (*card_map[MAX_EXPANSION_BOARD_SPACE])(void);
+static const TCHAR *card_name[MAX_EXPANSION_BOARD_SPACE];
+static int card_flags[MAX_EXPANSION_BOARD_SPACE];
static int ecard, cardno, z3num;
static addrbank *expamem_bank_current;
uae_u32 expamem_z3_pointer_old;
expamem_bank.name = card_name[ecard] ? card_name[ecard] : _T("None");
- ab = (*card_init[ecard]) ();
+ ab = (*card_init[ecard])(0);
expamem_z3_size = 0;
if (ab == &expamem_none) {
expamem_init_clear();
return cd32_fmv_init (expamem_z2_pointer);
}
-static addrbank *expamem_init_cd32fmv (void)
+static addrbank *expamem_init_cd32fmv (int devnum)
{
int ids[] = { 23, -1 };
struct romlist *rl = getromlistbyids (ids, NULL);
return &catweasel_bank;
}
-static addrbank *expamem_init_catweasel (void)
+static addrbank *expamem_init_catweasel (int devnum)
{
uae_u8 productid = cwc.type >= CATWEASEL_TYPE_MK3 ? 66 : 200;
uae_u16 vendorid = cwc.type >= CATWEASEL_TYPE_MK3 ? 4626 : 5001;
static const uae_u8 a2630_autoconfig[] = { 0xe7, 0x51, 0x40, 0x00, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
-static addrbank *expamem_init_fastcard_2 (int boardnum)
+static addrbank *expamem_init_fastcard(int boardnum)
{
- uae_u16 mid;
+ uae_u16 mid = 0;
uae_u8 pid;
- uae_u8 type = add_memory | zorroII | (cfgfile_board_enabled(&currprefs.a2091rom) && !boardnum ? chainedconfig : 0);
+ uae_u8 type = add_memory | zorroII;
int allocated = boardnum ? fastmem2_bank.allocated : fastmem_bank.allocated;
uae_u32 serial = 1;
type |= a2630_autoconfig[0] & ~7;
expamem_write(0, type);
return NULL;
- } else if (cfgfile_board_enabled(&currprefs.a2091rom) || currprefs.uae_hide) {
- pid = commodore_a2091_ram;
- mid = commodore;
- serial = 0;
- } else if (cfgfile_board_enabled(&currprefs.gvps1rom) || cfgfile_board_enabled(&currprefs.gvps2rom) || currprefs.cpuboard_type == BOARD_A3001_I || currprefs.cpuboard_type == BOARD_A3001_II) {
- pid = 10;
- mid = 2017;
- serial = 0;
- } else if (cfgfile_board_enabled(&currprefs.alfrom) || cfgfile_board_enabled(&currprefs.alfplusrom)) {
- pid = 8;
- mid = 2092;
- serial = 0;
- } else if (cfgfile_board_enabled(&currprefs.apollorom)) {
- pid = 0;
- mid = 8738;
- serial = 0;
- } else if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- pid = 3;
- mid = 2157;
- serial = 0;
- } else {
+ }
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *erc = &expansionroms[i];
+ if (erc->zorro == 2 && cfgfile_board_enabled(&currprefs, erc->romtype) && erc->memory_mid) {
+ mid = erc->memory_mid;
+ pid = erc->memory_pid;
+ serial = erc->memory_serial;
+ type |= chainedconfig;
+ break;
+ }
+ }
+ if (!mid) {
pid = currprefs.maprom && !currprefs.cpuboard_type ? 1 : 81;
mid = uae_id;
}
{
return expamem_map_fastcard_2 (1);
}
-static addrbank *expamem_init_fastcard(void)
-{
- return expamem_init_fastcard_2 (0);
-}
-static addrbank *expamem_init_fastcard2(void)
-{
- return expamem_init_fastcard_2 (1);
-}
/* ********************************************************** */
#define FILESYS_BOOTPOINT 0x01e6
#define FILESYS_DIAGAREA 0x2000
-static addrbank* expamem_init_filesys (void)
+static addrbank* expamem_init_filesys (int devnum)
{
/* struct DiagArea - the size has to be large enough to store several device ROMTags */
uae_u8 diagarea[] = { 0x90, 0x00, /* da_Config, da_Flags */
map_banks (bank, start >> 16, size >> 16, allocated);
return NULL;
}
-static addrbank *expamem_init_z3fastmem (void)
+static addrbank *expamem_init_z3fastmem (int devnum)
{
return expamem_init_z3fastmem_2 (&z3fastmem_bank, z3fastmem_bank.start, currprefs.z3fastmem_size, z3fastmem_bank.allocated);
}
-static addrbank *expamem_init_z3fastmem2(void)
+static addrbank *expamem_init_z3fastmem2(int devnum)
{
return expamem_init_z3fastmem_2 (&z3fastmem2_bank, z3fastmem2_bank.start, currprefs.z3fastmem2_size, z3fastmem2_bank.allocated);
}
expamem_write (0x40, 0x00); /* Ctrl/Statusreg.*/
return NULL;
}
-static addrbank *expamem_init_gfxcard_z3(void)
+static addrbank *expamem_init_gfxcard_z3(int devnum)
{
return expamem_init_gfxcard (true);
}
-static addrbank *expamem_init_gfxcard_z2 (void)
+static addrbank *expamem_init_gfxcard_z2 (int devnum)
{
return expamem_init_gfxcard (false);
}
return v;
}
-static addrbank *expamem_init_masoboshi(void)
-{
- return masoboshi_init (0);
-}
-static addrbank *expamem_init_masoboshi_2(void)
-{
- return masoboshi_init (1);
-}
-static addrbank *expamem_init_alf(void)
-{
- return alf_init (0);
-}
-static addrbank *expamem_init_alf_2(void)
-{
- return alf_init (1);
-}
-static addrbank *expamem_init_apollo(void)
-{
- return apollo_init (0);
-}
-static addrbank *expamem_init_apollo_2(void)
-{
- return apollo_init (1);
-}
-static addrbank *expamem_init_apollo_cpu(void)
-{
- return apollo_init (-1);
-}
-#ifdef WITH_TOCCATA
-static addrbank *expamem_init_toccata(void)
-{
- return sndboard_init();
-}
-#endif
-#ifdef A2065
-static addrbank *expamem_init_a2065(void)
-{
- return a2065_init ();
-}
-#endif
-#ifdef CDTV
-static addrbank *expamem_init_cdtv(void)
-{
- return cdtv_init ();
-}
-#endif
-#ifdef A2091
-static addrbank *expamem_init_a2091(void)
-{
- return a2091_init (0);
-}
-static addrbank *expamem_init_a2091_2(void)
-{
- return a2091_init (1);
-}
-#endif
-#ifdef A2091
-static addrbank *expamem_init_gvp_s1(void)
-{
- return gvp_init(0, false);
-}
-static addrbank *expamem_init_gvp_s1_2(void)
-{
- return gvp_init(1, false);
-}
-static addrbank *expamem_init_gvp_s2(void)
-{
- return gvp_init(0, true);
-}
-static addrbank *expamem_init_gvp_s2_2(void)
-{
- return gvp_init(1, true);
-}
-#endif
-#ifdef NCR
-static addrbank *expamem_init_a4091(void)
-{
- return ncr710_a4091_autoconfig_init (0);
-}
-static addrbank *expamem_init_a4091_2(void)
-{
- return ncr710_a4091_autoconfig_init (1);
-}
-static addrbank *expamem_init_fastlane(void)
-{
- return ncr_fastlane_autoconfig_init (0);
-}
-static addrbank *expamem_init_fastlane_2(void)
-{
- return ncr_fastlane_autoconfig_init (1);
-}
-static addrbank *expamem_init_oktagon(void)
-{
- return ncr_oktagon_autoconfig_init (0);
-}
-static addrbank *expamem_init_oktagon_2(void)
-{
- return ncr_oktagon_autoconfig_init (1);
-}
-static addrbank *expamem_init_a3001_rom(void)
-{
- return gvp_ide_rom_autoconfig_init();
-}
-static addrbank *expamem_init_a3001_ide(void)
-{
- return gvp_ide_controller_autoconfig_init();
-}
-static addrbank *expamem_init_warpengine(void)
-{
- return ncr710_warpengine_autoconfig_init();
-}
-static addrbank *expamem_init_dkb1200(void)
-{
- return ncr_dkb_autoconfig_init();
-}
-#endif
-#ifdef GFXBOARD
-static addrbank *expamem_init_gfxboard_memory(void)
-{
- return gfxboard_init_memory ();
-}
-#endif
-#ifdef GFXBOARD
-static addrbank *expamem_init_gfxboard_registers(void)
-{
- return gfxboard_init_registers ();
-}
-#endif
-
void expamem_reset (void)
{
int do_mount = 1;
if (fastmem2_bank.baseaddr != NULL && (fastmem2_bank.allocated <= 262144 || currprefs.chipmem_size <= 2 * 1024 * 1024)) {
card_flags[cardno] = 0;
card_name[cardno] = _T("Z2Fast2");
- card_init[cardno] = expamem_init_fastcard2;
+ card_init[cardno] = expamem_init_fastcard;
card_map[cardno++] = expamem_map_fastcard2;
}
} else {
if (currprefs.cpuboard_type == BOARD_A3001_I) {
card_flags[cardno] = 0;
card_name[cardno] = _T("A3001 IDE");
- card_init[cardno] = expamem_init_a3001_rom;
+ card_init[cardno] = gvp_ide_rom_autoconfig_init;
card_map[cardno++] = NULL;
} else if (currprefs.cpuboard_type == BOARD_A3001_II) {
card_flags[cardno] = 0;
card_name[cardno] = _T("A3001 BOOT");
- card_init[cardno] = expamem_init_a3001_rom;
+ card_init[cardno] = gvp_ide_rom_autoconfig_init;
card_map[cardno++] = NULL;
card_flags[cardno] = 0;
card_name[cardno] = _T("A3001 IDE");
- card_init[cardno] = expamem_init_a3001_ide;
+ card_init[cardno] = gvp_ide_controller_autoconfig_init;
card_map[cardno++] = NULL;
}
if (currprefs.cpuboard_type == BOARD_GVP_A530) {
card_flags[cardno] = 1;
card_name[cardno] = _T("GVP A530");
- card_init[cardno] = expamem_init_gvp_s2_2;
+ card_init[cardno] = gvp_init_accelerator;
card_map[cardno++] = NULL;
}
if (currprefs.cpuboard_type == BOARD_APOLLO) {
card_name[cardno] = _T("Apollo");
- card_init[cardno] = expamem_init_apollo_cpu;
+ card_init[cardno] = apollo_init_cpu;
card_map[cardno++] = NULL;
}
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.a2091rom)) {
- card_flags[cardno] = 0;
- card_name[cardno] = _T("A2091");
- card_init[cardno] = expamem_init_a2091;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("A2091 #2");
- card_init[cardno] = expamem_init_a2091_2;
- card_map[cardno++] = NULL;
- }
-#endif
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.gvps2rom)) {
- card_flags[cardno] = 0;
- card_name[cardno] = _T("GVP SII");
- card_init[cardno] = expamem_init_gvp_s2;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("GVP SII #2");
- card_init[cardno] = expamem_init_gvp_s2_2;
- card_map[cardno++] = NULL;
- }
- if (cfgfile_board_enabled(&currprefs.gvps1rom)) {
- card_flags[cardno] = 0;
- card_name[cardno] = _T("GVP SI");
- card_init[cardno] = expamem_init_gvp_s1;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("GVP SI #2");
- card_init[cardno] = expamem_init_gvp_s1_2;
- card_map[cardno++] = NULL;
- }
-#endif
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.oktagonrom)) {
- card_name[cardno] = _T("Oktagon 2008");
- card_init[cardno] = expamem_init_oktagon;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("Oktagon 2008 #2");
- card_init[cardno] = expamem_init_oktagon_2;
- card_map[cardno++] = NULL;
- }
-#endif
- if (cfgfile_board_enabled(&currprefs.alfrom) || cfgfile_board_enabled(&currprefs.alfplusrom)) {
- card_name[cardno] = _T("ALF");
- card_init[cardno] = expamem_init_alf;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("ALF #2");
- card_init[cardno] = expamem_init_alf_2;
- card_map[cardno++] = NULL;
- }
- if (cfgfile_board_enabled(&currprefs.apollorom)) {
- card_name[cardno] = _T("Apollo");
- card_init[cardno] = expamem_init_apollo;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("Apollo #2");
- card_init[cardno] = expamem_init_apollo_2;
- card_map[cardno++] = NULL;
- }
- if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- card_name[cardno] = _T("Masoboshi");
- card_init[cardno] = expamem_init_masoboshi;
- card_map[cardno++] = NULL;
- card_name[cardno] = _T("Masoboshi #2");
- card_init[cardno] = expamem_init_masoboshi_2;
- card_map[cardno++] = NULL;
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *erc = &expansionroms[i];
+ if (erc->zorro == 2 && cfgfile_board_enabled(&currprefs, erc->romtype)) {
+ card_flags[cardno] = 0;
+ card_name[cardno] = erc->name;
+ card_init[cardno] = erc->init;
+ card_map[cardno++] = NULL;
+ }
}
+
#ifdef CDTV
if (currprefs.cs_cdtvcd && !currprefs.cs_cdtvcr) {
card_flags[cardno] = 0;
card_name[cardno] = _T("CDTV DMAC");
- card_init[cardno] = expamem_init_cdtv;
+ card_init[cardno] = cdtv_init;
card_map[cardno++] = NULL;
}
#endif
if (currprefs.a2065name[0]) {
card_flags[cardno] = 0;
card_name[cardno] = _T("A2065");
- card_init[cardno] = expamem_init_a2065;
+ card_init[cardno] = a2065_init;
card_map[cardno++] = NULL;
}
#endif
if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && !gfxboard_is_z3 (currprefs.rtgmem_type)) {
card_flags[cardno] = 4;
card_name[cardno] = _T("Gfxboard VRAM Zorro II");
- card_init[cardno] = expamem_init_gfxboard_memory;
+ card_init[cardno] = gfxboard_init_memory;
card_map[cardno++] = NULL;
if (gfxboard_num_boards (currprefs.rtgmem_type) == 3) {
card_flags[cardno] = 0;
if (gfxboard_is_registers (currprefs.rtgmem_type)) {
card_flags[cardno] = 0;
card_name[cardno] = _T ("Gfxboard Registers");
- card_init[cardno] = expamem_init_gfxboard_registers;
+ card_init[cardno] = gfxboard_init_registers;
card_map[cardno++] = NULL;
}
}
if (currprefs.sound_toccata) {
card_flags[cardno] = 0;
card_name[cardno] = _T("Toccata");
- card_init[cardno] = expamem_init_toccata;
+ card_init[cardno] = sndboard_init;
card_map[cardno++] = NULL;
}
#endif
if (currprefs.cpuboard_type == BOARD_WARPENGINE_A4000) {
card_flags[cardno] = 1;
card_name[cardno] = _T("Warp Engine");
- card_init[cardno] = expamem_init_warpengine;
+ card_init[cardno] = ncr710_warpengine_autoconfig_init;
card_map[cardno++] = NULL;
}
if (currprefs.cpuboard_type == BOARD_DKB1200) {
card_name[cardno] = _T("DKB SCSI");
- card_init[cardno] = expamem_init_dkb1200;
+ card_init[cardno] = ncr_dkb_autoconfig_init;
card_map[cardno++] = NULL;
}
if (z3fastmem_bank.baseaddr != NULL) {
if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_is_z3 (currprefs.rtgmem_type)) {
card_flags[cardno] = 4 | 1;
card_name[cardno] = _T ("Gfxboard VRAM Zorro III");
- card_init[cardno] = expamem_init_gfxboard_memory;
+ card_init[cardno] = gfxboard_init_memory;
card_map[cardno++] = NULL;
card_flags[cardno] = 1;
card_name[cardno] = _T ("Gfxboard Registers");
- card_init[cardno] = expamem_init_gfxboard_registers;
+ card_init[cardno] = gfxboard_init_registers;
card_map[cardno++] = NULL;
}
#endif
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.a4091rom)) {
- card_flags[cardno] = 1;
- card_name[cardno] = _T("A4091");
- card_init[cardno] = expamem_init_a4091;
- card_map[cardno++] = NULL;
- card_flags[cardno] = 1;
- card_name[cardno] = _T("A4091 #2");
- card_init[cardno] = expamem_init_a4091_2;
- card_map[cardno++] = NULL;
- }
- if (cfgfile_board_enabled(&currprefs.fastlanerom)) {
- card_flags[cardno] = 1;
- card_name[cardno] = _T("Fastlane");
- card_init[cardno] = expamem_init_fastlane;
- card_map[cardno++] = NULL;
- card_flags[cardno] = 1;
- card_name[cardno] = _T("Fastlane #2");
- card_init[cardno] = expamem_init_fastlane_2;
- card_map[cardno++] = NULL;
+
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *erc = &expansionroms[i];
+ if (erc->zorro == 3 && cfgfile_board_enabled(&currprefs, erc->romtype)) {
+ card_flags[cardno] = 0;
+ card_name[cardno] = erc->name;
+ card_init[cardno] = erc->init;
+ card_map[cardno++] = NULL;
+ }
}
-#endif
+
}
expamem_z3_pointer = 0;
}
#endif /* SAVESTATE */
+
+int add_cpuboard_unit(int unit, struct uaedev_config_info *uci);
+
+const struct expansionromtype expansionroms[] = {
+ {
+ _T("cpuboard"), _T("Accelerator board"),
+ NULL, add_cpuboard_unit, ROMTYPE_CPUBOARD, 0, 0,
+ EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE
+ },
+ {
+ _T("cpuboard_ext"), _T("Blizzard SCSI Kit IV"),
+ NULL, NULL, ROMTYPE_CPUBOARDEXT, ROMTYPE_CPUBOARD, 0,
+ EXPANSIONTYPE_SCSI
+ },
+ {
+ _T("a2091"), _T("A590/A2091"),
+ a2091_init, a2091_add_scsi_unit, ROMTYPE_A2091 | ROMTYPE_NONE, 0, 2,
+ EXPANSIONTYPE_SCSI, commodore, commodore_a2091_ram, 0
+ },
+ {
+ _T("a4091"), _T("A4091"),
+ ncr710_a4091_autoconfig_init, a4091_add_scsi_unit, ROMTYPE_A4091, 0, 3,
+ EXPANSIONTYPE_SCSI
+ },
+ {
+ _T("fastlane"), _T("Fastlane"),
+ ncr_fastlane_autoconfig_init, fastlane_add_scsi_unit, ROMTYPE_FASTLANE, 0, 3,
+ EXPANSIONTYPE_SCSI
+ },
+ {
+ _T("oktagon2008"), _T("Oktagon 2008"),
+ ncr_oktagon_autoconfig_init, oktagon_add_scsi_unit, ROMTYPE_OKTAGON, 0, 2,
+ EXPANSIONTYPE_SCSI
+ },
+ {
+ _T("gvp1"), _T("GVP Series I"),
+ gvp_init_s1, gvp_add_scsi_unit, ROMTYPE_GVPS1 | ROMTYPE_NONE, 0, 2,
+ EXPANSIONTYPE_SCSI, 2017, 10, 0
+ },
+ {
+ _T("gvp"), _T("GVP Series II"),
+ gvp_init_s2, gvp_add_scsi_unit, ROMTYPE_GVPS2 | ROMTYPE_NONE, 0, 2,
+ EXPANSIONTYPE_SCSI, 2017, 10, 0
+ },
+ {
+ _T("amax"), _T("AMAX ROM dongle"),
+ NULL, NULL, ROMTYPE_AMAX | ROMTYPE_NONE, 0, 0 },
+ {
+ _T("alfapower"), _T("AlfaPower/AT-Bus 2008"),
+ alf_init, alf_add_ide_unit, ROMTYPE_ALFA, 0, 2,
+ EXPANSIONTYPE_IDE, 2092, 8, 0
+ },
+ {
+ _T("alfapowerplus"), _T("AlfaPower Plus"),
+ alf_init, alf_add_ide_unit, ROMTYPE_ALFAPLUS, 0, 2,
+ EXPANSIONTYPE_IDE, 2092, 8, 0
+ },
+ {
+ _T("apollo"), _T("Apollo"),
+ apollo_init, apollo_add_scsi_unit, ROMTYPE_APOLLO, 0, 2,
+ EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE, 8738, 0, 0
+ },
+ {
+ _T("masoboshi"), _T("Masoboshi"),
+ masoboshi_init, masoboshi_add_scsi_unit, ROMTYPE_MASOBOSHI | ROMTYPE_NONE, 0, 2,
+ EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE, 2157, 3, 0
+ },
+ {
+ _T("suprabytesync"), _T("SupraDrive 500XP"),
+ supra_init, supra_add_scsi_unit, ROMTYPE_SUPRA | ROMTYPE_NONE, 0, 2,
+ EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE, 1056, 9, 0
+ },
+ {
+ NULL
+ }
+};
#include "uaenative.h"
#include "tabletlibrary.h"
#include "cpuboard.h"
+#include "rommgr.h"
#ifdef RETROPLATFORM
#include "rp.h"
#endif
} else if (uci->ci.type == UAEDEV_HDF) {
ui->hf.ci.readonly = true;
ui->hf.ci.blocksize = uci->ci.blocksize;
- if (!hdf_open (&ui->hf, uci->ci.rootdir)) {
+ int err = hdf_open (&ui->hf, uci->ci.rootdir);
+ if (err <= 0) {
mi->ismedia = false;
mi->ismounted = true;
+ mi->error = err;
if (uci->ci.reserved == 0 && uci->ci.sectors == 0 && uci->ci.surfaces == 0) {
if (ui->hf.flags & 1)
return FILESYS_HARDDRIVE;
ui->hf.unitnum = nr;
ui->volname = 0;
if (ui->hf.ci.rootdir[0]) {
- if (!hdf_open (&ui->hf) && !c.readonly) {
+ if (hdf_open (&ui->hf) <= 0 && !c.readonly) {
write_log (_T("Attempting to open '%s' in read-only mode.\n"), ui->hf.ci.rootdir);
ui->hf.ci.readonly = c.readonly = true;
- if (hdf_open (&ui->hf)) {
+ if (hdf_open (&ui->hf) > 0) {
error_log (_T("'%s' opened in read-only mode.\n"), ui->hf.ci.rootdir);
}
}
allocuci (p, nr, idx, -1);
}
-static bool add_cpuboard_scsi_unit(int unit, struct uaedev_config_info *uci)
+int add_cpuboard_unit(int unit, struct uaedev_config_info *uci)
{
bool added = false;
#ifdef NCR
blizzardppc_add_scsi_unit(unit, uci);
added = true;
} else if (currprefs.cpuboard_type == BOARD_BLIZZARD_2060 ||
- currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI ||
- currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI ||
currprefs.cpuboard_type == BOARD_CSMK1 ||
currprefs.cpuboard_type == BOARD_CSMK2) {
cpuboard_ncr9x_add_scsi_unit(unit, uci);
added = true;
+ } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV ||
+ currprefs.cpuboard_type == BOARD_BLIZZARD_1260) {
+ if (cfgfile_board_enabled(&currprefs, ROMTYPE_CPUBOARDEXT)) {
+ cpuboard_ncr9x_add_scsi_unit(unit, uci);
+ added = true;
+ }
}
#endif
if (currprefs.cpuboard_type == BOARD_APOLLO) {
- apollo_add_scsi_unit(unit, uci, 0);
+ apollo_add_scsi_unit(unit, uci);
added = true;
} else if (currprefs.cpuboard_type == BOARD_GVP_A530) {
- gvp_add_scsi_unit(unit, uci, 1);
+ gvp_add_scsi_unit(unit, uci);
+ added = true;
+ } else if (currprefs.cpuboard_type == BOARD_A3001_I || currprefs.cpuboard_type == BOARD_A3001_II) {
+ gvp_add_ide_unit(unit, uci);
added = true;
}
return added;
gayle_add_ide_unit(unit, uci);
added = true;
}
- } else if (type == HD_CONTROLLER_TYPE_IDE_GVP) {
- if (currprefs.cpuboard_type == BOARD_A3001_I || currprefs.cpuboard_type == BOARD_A3001_II) {
- gvp_add_ide_unit(unit, uci);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_ALFA) {
- if (cfgfile_board_enabled(&currprefs.alfrom) || cfgfile_board_enabled(&currprefs.alfplusrom)) {
- alf_add_ide_unit(unit, uci, 0);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_ALFA_2) {
- if (cfgfile_board_enabled(&currprefs.alfrom) || cfgfile_board_enabled(&currprefs.alfplusrom)) {
- alf_add_ide_unit(unit, uci, 1);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_APOLLO) {
- if (cfgfile_board_enabled(&currprefs.apollorom)) {
- apollo_add_ide_unit(unit, uci, 0);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_APOLLO_2) {
- if (cfgfile_board_enabled(&currprefs.apollorom)) {
- apollo_add_ide_unit(unit, uci, 1);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_MASOBOSHI) {
- if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- masoboshi_add_ide_unit(unit, uci, 0);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_IDE_MASOBOSHI_2) {
- if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- masoboshi_add_ide_unit(unit, uci, 1);
- added = true;
+ } else if (type >= HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST && type <= HD_CONTROLLER_TYPE_IDE_LAST) {
+ for (int i = 0; expansionroms[i].name; i++) {
+ if (i == type - HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST) {
+ const struct expansionromtype *ert = &expansionroms[i];
+ if ((ert->deviceflags & 2) && cfgfile_board_enabled(&currprefs, ert->romtype)) {
+ if (ert->add)
+ ert->add(unit, uci);
+ added = true;
+ }
+ }
}
}
return added;
added = true;
}
#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_CPUBOARD) {
- added = add_cpuboard_scsi_unit(unit, uci);
} else if (type == HD_CONTROLLER_TYPE_SCSI_CDTV) {
#ifdef CDTV
if (currprefs.cs_cdtvscsi) {
added = true;
}
#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_A2091) {
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.a2091rom)) {
- a2091_add_scsi_unit(unit, uci, 0);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_A2091_2) {
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.a2091rom)) {
- a2091_add_scsi_unit(unit, uci, 1);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_GVP) {
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.gvps2rom) || cfgfile_board_enabled(&currprefs.gvps1rom)) {
- gvp_add_scsi_unit(unit, uci, 0);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_GVP) {
-#ifdef A2091
- if (cfgfile_board_enabled(&currprefs.gvps2rom) || cfgfile_board_enabled(&currprefs.gvps1rom)) {
- gvp_add_scsi_unit(unit, uci, 1);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_A4091) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.a4091rom)) {
- a4091_add_scsi_unit (unit, uci, 0);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_A4091_2) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.a4091rom)) {
- a4091_add_scsi_unit (unit, uci, 1);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_FASTLANE) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.fastlanerom)) {
- fastlane_add_scsi_unit (unit, uci, 0);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_FASTLANE_2) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.fastlanerom)) {
- fastlane_add_scsi_unit (unit, uci, 1);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_OKTAGON) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.oktagonrom)) {
- oktagon_add_scsi_unit (unit, uci, 0);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_OKTAGON_2) {
-#ifdef NCR
- if (cfgfile_board_enabled(&currprefs.oktagonrom)) {
- oktagon_add_scsi_unit (unit, uci, 1);
- added = true;
- }
-#endif
- } else if (type == HD_CONTROLLER_TYPE_SCSI_APOLLO) {
- if (cfgfile_board_enabled(&currprefs.apollorom)) {
- apollo_add_scsi_unit(unit, uci, 0);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_SCSI_APOLLO_2) {
- if (cfgfile_board_enabled(&currprefs.apollorom)) {
- apollo_add_scsi_unit(unit, uci, 1);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_SCSI_MASOBOSHI) {
- if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- masoboshi_add_scsi_unit(unit, uci, 0);
- added = true;
- }
- } else if (type == HD_CONTROLLER_TYPE_SCSI_MASOBOSHI_2) {
- if (cfgfile_board_enabled(&currprefs.masoboshirom)) {
- masoboshi_add_scsi_unit(unit, uci, 1);
- added = true;
+ } else if (type >= HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST && type <= HD_CONTROLLER_TYPE_SCSI_LAST) {
+ for (int i = 0; expansionroms[i].name; i++) {
+ if (i == type - HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST) {
+ const struct expansionromtype *ert = &expansionroms[i];
+ if ((ert->deviceflags & 1) && cfgfile_board_enabled(&currprefs, ert->romtype)) {
+ if (ert->add)
+ ert->add(unit, uci);
+ added = true;
+ }
+ }
}
}
return added;
}
}
memcpy (&hfd->ci, &hfd->delayedci, sizeof (struct uaedev_config_info));
- if (!hdf_open (hfd)) {
+ if (hdf_open (hfd) <= 0) {
write_log (_T("HARDFILE: '%s' failed to open\n"), hfd->ci.rootdir);
return 0;
}
pl(rdb, 0, 0x5244534b);
pl(rdb, 1, 64);
pl(rdb, 2, 0); // chksum
- pl(rdb, 3, 0); // hostid
+ pl(rdb, 3, 7); // hostid
pl(rdb, 4, 512); // blockbytes
pl(rdb, 5, 0); // flags
pl(rdb, 6, -1); // badblock
int hdf_hd_open (struct hd_hardfiledata *hfd)
{
struct uaedev_config_info *ci = &hfd->hfd.ci;
- if (!hdf_open (&hfd->hfd))
+ if (hdf_open (&hfd->hfd) <= 0)
return 0;
if (ci->pcyls && ci->pheads && ci->psecs) {
hfd->cyls = ci->pcyls;
int hdf_open (struct hardfiledata *hfd, const TCHAR *pname)
{
+ int ret;
uae_u8 tmp[512], tmp2[512];
uae_u32 v;
}
}
#endif
- if (!hdf_open_target (hfd, pname))
- return 0;
+ ret = hdf_open_target (hfd, pname);
+ if (ret <= 0)
+ return ret;
if (hdf_read_target (hfd, tmp, 0, 512) != 512)
goto nonvhd;
v = gl (tmp + 8); // features
bootblock[1] = dostype >> 16;
bootblock[2] = dostype >> 8;
bootblock[3] = dostype >> 0;
- if (hdf_open (&hfd, name)) {
+ if (hdf_open (&hfd, name) > 0) {
vhd_write (&hfd, bootblock, 0, 512);
hdf_close (&hfd);
}
* (c) 2006 - 2015 Toni Wilen
*/
-#define IDE_LOG 0
+#define IDE_LOG 2
#include "sysconfig.h"
#include "sysdeps.h"
return true;
}
+bool ide_drq_check(struct ide_hdf *idep)
+{
+ for (int i = 0; i < 2; i++) {
+ struct ide_hdf *ide = i == 0 ? idep : idep->pair;
+ if (ide) {
+ if (ide->regs.ide_status & IDE_STATUS_DRQ)
+ return true;
+ }
+ }
+ return false;
+}
+
bool ide_interrupt_check(struct ide_hdf *idep)
{
bool irq = false;
} else if (addr >= 0xf000 && addr <= 0xf007) {
v = masoboshi_ncr9x_scsi_get(addr, board == &masoboshi_board[0] ? 0 : 1);
} else if (addr == 0xf040) {
- v = board->irq ? 2 : 0;
+ v = 0;
+ if (ide_drq_check(board->ide))
+ v |= 2;
+ if (ide_interrupt_check(board->ide)) {
+ v |= 1;
+ }
v |= masoboshi_ncr9x_scsi_get(addr, board == &masoboshi_board[0] ? 0 : 1);
} else if (addr == 0xf047) {
v = board->state;
static const uae_u8 gvp_ide2_controller_autoconfig[16] = { 0xc1, 0x0b, 0x00, 0x00, 0x07, 0xe1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
static const uae_u8 gvp_ide1_controller_autoconfig[16] = { 0xd1, 0x08, 0x00, 0x00, 0x07, 0xe1, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 };
-addrbank *gvp_ide_rom_autoconfig_init(void)
+addrbank *gvp_ide_rom_autoconfig_init(int devnum)
{
struct ide_board *ide = &gvp_ide_rom_board;
int roms[2];
ide->rom = xcalloc(uae_u8, ide->rom_size);
memset(ide->rom, 0xff, ide->rom_size);
ide->rom_mask = ide->rom_size - 1;
- const TCHAR *romname = currprefs.acceleratorromfile;
- struct zfile *z = read_rom_name(romname);
- if (!z) {
- rl = getromlistbyids(roms, romname);
- if (rl) {
- z = read_rom(rl->rd);
+ int index;
+ struct boardromconfig *brc = get_device_rom(&currprefs, ROMTYPE_CPUBOARD, &index);
+ struct zfile *z = NULL;
+ if (brc) {
+ const TCHAR *romname = brc->roms[index].romfile;
+ z = read_rom_name(romname);
+ if (!z) {
+ rl = getromlistbyids(roms, romname);
+ if (rl) {
+ z = read_rom(rl->rd);
+ }
}
}
if (z) {
return ide->bank;
}
-addrbank *gvp_ide_controller_autoconfig_init(void)
+addrbank *gvp_ide_controller_autoconfig_init(int devnum)
{
struct ide_board *ide = &gvp_ide_controller_board;
{
struct ide_board *ide = &alf_board[devnum];
int roms[2];
- struct romlist *rl;
- bool alfplus = cfgfile_board_enabled(&currprefs.alfplusrom);
+ bool alfplus = cfgfile_board_enabled(&currprefs, ROMTYPE_ALFAPLUS);
if (devnum > 0 && !ide->enabled)
return &expamem_null;
ide->rom = xcalloc(uae_u8, ide->rom_size);
memset(ide->rom, 0xff, ide->rom_size);
ide->rom_mask = ide->rom_size - 1;
- const TCHAR *romname = alfplus ? currprefs.alfplusrom.roms[0].romfile : currprefs.alfrom.roms[0].romfile;
- struct zfile *z = read_rom_name(romname);
- if (!z) {
- rl = getromlistbyids(roms, romname);
- if (rl) {
- z = read_rom(rl->rd);
- }
- }
+
+ struct zfile *z = read_device_rom(&currprefs, devnum, alfplus ? ROMTYPE_ALFAPLUS : ROMTYPE_ALFA, roms);
for (int i = 0; i < 16; i++) {
uae_u8 b = alfplus ? alfplus_autoconfig[i] : alf_autoconfig[i];
ew(ide, i * 4, b);
return ide->bank;
}
-int alf_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int alf_add_ide_unit(int ch, struct uaedev_config_info *ci)
{
struct ide_hdf *ide;
- ide = add_ide_unit (&idecontroller_drive[(ALF_IDE + devnum) * 2], 2, ch, ci);
+ ide = add_ide_unit (&idecontroller_drive[(ALF_IDE + ci->controller_type_unit) * 2], 2, ch, ci);
if (ide == NULL)
return 0;
return 1;
{
struct ide_board *ide;
int roms[2];
- struct romlist *rl;
const uae_u8 *autoconfig;
bool cpuboard = false;
+ struct zfile *z = NULL;
if (devnum < 0) {
cpuboard = true;
autoconfig = apollo_autoconfig_cpuboard_060;
else
autoconfig = apollo_autoconfig_cpuboard;
- }
- const TCHAR *romname = cpuboard ? currprefs.acceleratorromfile : currprefs.apollorom.roms[0].romfile;
- struct zfile *z = read_rom_name(romname);
- if (!z) {
- rl = getromlistbyids(roms, romname);
- if (rl) {
- z = read_rom(rl->rd);
- }
+ z = read_device_rom(&currprefs, devnum, ROMTYPE_CPUBOARD, roms);
+ } else {
+ z = read_device_rom(&currprefs, devnum, ROMTYPE_APOLLO, roms);
}
for (int i = 0; i < 16; i++) {
uae_u8 b = autoconfig[i];
}
return ide->bank;
}
+addrbank *apollo_init_cpu(int devnum)
+{
+ return apollo_init(-1);
+}
-int apollo_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int apollo_add_ide_unit(int ch, struct uaedev_config_info *ci)
{
struct ide_hdf *ide;
- ide = add_ide_unit (&idecontroller_drive[(APOLLO_IDE + devnum) * 2], 2, ch, ci);
+ ide = add_ide_unit (&idecontroller_drive[(APOLLO_IDE + ci->controller_type_unit) * 2], 2, ch, ci);
if (ide == NULL)
return 0;
return 1;
{
struct ide_board *ide;
int roms[2];
- struct romlist *rl;
ide = &masoboshi_board[devnum];
if (devnum > 0 && !ide->enabled)
memset(ide->rom, 0xff, ide->rom_size);
memset(ide->acmemory, 0xff, sizeof ide->acmemory);
ide->rom_mask = ide->rom_size - 1;
- if (_tcscmp (currprefs.masoboshirom.roms[0].romfile, _T(":NOROM"))) {
- const TCHAR *romname = currprefs.masoboshirom.roms[0].romfile;
- struct zfile *z = read_rom_name(romname);
- if (!z) {
- rl = getromlistbyids(roms, romname);
- if (rl) {
- z = read_rom(rl->rd);
- }
- }
+ if (is_device_rom(&currprefs, devnum, ROMTYPE_MASOBOSHI)) {
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_MASOBOSHI, roms);
if (z) {
int len = zfile_size(z);
write_log(_T("Masoboshi BOOT ROM '%s' %d\n"), zfile_getname(z), len);
return ide->bank;
}
-int masoboshi_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int masoboshi_add_ide_unit(int ch, struct uaedev_config_info *ci)
{
struct ide_hdf *ide;
- ide = add_ide_unit (&idecontroller_drive[(MASOBOSHI_IDE + devnum) * 2], 2, ch, ci);
+ ide = add_ide_unit (&idecontroller_drive[(MASOBOSHI_IDE + ci->controller_type_unit) * 2], 2, ch, ci);
if (ide == NULL)
return 0;
return 1;
#ifdef A2065
-extern addrbank *a2065_init (void);
+extern addrbank *a2065_init (int);
extern void a2065_free (void);
extern void a2065_reset (void);
extern void a2065_hsync_handler (void);
extern void a2091_free(void);
extern void a2091_reset (void);
-extern addrbank *gvp_init(int devnum, bool series2);
+extern addrbank *gvp_init_s1(int devnum);
+extern addrbank *gvp_init_s2(int devnum);
+extern addrbank *gvp_init_accelerator(int devnum);
extern void gvp_free(void);
extern void gvp_reset (void);
#define WD33C93 _T("WD33C93")
-extern int a2091_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
-extern int gvp_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
+extern int a2091_add_scsi_unit(int ch, struct uaedev_config_info *ci);
+extern int gvp_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern int a3000_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern int add_wd_scsi_hd (struct wd_state *wd, int ch, struct hd_hardfiledata *hfd, struct uaedev_config_info *ci, int scsi_level);
uae_s64 size;
bool ismounted;
bool ismedia;
+ int error;
int nrcyls;
TCHAR rootdir[MAX_DPATH];
};
extern void uaegfx_install_code (uaecptr);
extern uae_u32 emulib_target_getcpurate (uae_u32, uae_u32*);
+
+
+typedef addrbank*(*DEVICE_INIT)(int);
+typedef int(*DEVICE_ADD)(int, struct uaedev_config_info*);
+#define EXPANSIONTYPE_SCSI 1
+#define EXPANSIONTYPE_IDE 2
+struct expansionromtype
+{
+ const TCHAR *name;
+ const TCHAR *friendlyname;
+ DEVICE_INIT init;
+ DEVICE_ADD add;
+ int romtype;
+ int parentromtype;
+ int zorro;
+ int deviceflags;
+ int memory_mid, memory_pid;
+ uae_u32 memory_serial;
+};
+extern const struct expansionromtype expansionroms[];
extern addrbank dmac_bank;
-extern addrbank *cdtv_init (void);
+extern addrbank *cdtv_init (int);
extern void cdtv_free (void);
extern void CDTV_hsync_handler(void);
extern void cdtv_check_banks (void);
-extern addrbank *cpuboard_autoconfig_init(void);
+extern addrbank *cpuboard_autoconfig_init(int);
extern bool cpuboard_maprom(void);
extern void cpuboard_map(void);
extern void cpuboard_reset(void);
extern void cpuboard_rethink(void);
extern int cpuboard_memorytype(struct uae_prefs *p);
extern int cpuboard_maxmemory(struct uae_prefs *p);
+extern bool cpuboard_32bit(struct uae_prefs *p);
extern bool cpuboard_jitdirectompatible(struct uae_prefs *p);
extern bool is_ppc_cpu(struct uae_prefs *);
extern void cpuboard_io_special_write(uaecptr addr, uae_u32 val);
#define BOARD_MEMORY_HIGHMEM 3
#define BOARD_MEMORY_BLIZZARD_12xx 4
#define BOARD_MEMORY_BLIZZARD_PPC 5
+#define BOARD_MEMORY_25BITMEM 6
#define BOARD_BLIZZARD_1230_IV 1
-#define BOARD_BLIZZARD_1230_IV_SCSI 2
-#define BOARD_BLIZZARD_1260 3
-#define BOARD_BLIZZARD_1260_SCSI 4
-#define BOARD_BLIZZARD_2060 5
-#define BOARD_CSMK1 6
-#define BOARD_CSMK2 7
-#define BOARD_CSMK3 8
-#define BOARD_CSPPC 9
-#define BOARD_BLIZZARDPPC 10
-#define BOARD_WARPENGINE_A4000 11
-#define BOARD_TEKMAGIC 12
-#define BOARD_A2630 13
-#define BOARD_DKB1200 14
-#define BOARD_FUSIONFORTY 15
-#define BOARD_A3001_I 16
-#define BOARD_A3001_II 17
-#define BOARD_APOLLO 18
-#define BOARD_GVP_A530 19
+#define BOARD_BLIZZARD_1260 2
+#define BOARD_BLIZZARD_2060 3
+#define BOARD_CSMK1 4
+#define BOARD_CSMK2 5
+#define BOARD_CSMK3 6
+#define BOARD_CSPPC 7
+#define BOARD_BLIZZARDPPC 8
+#define BOARD_WARPENGINE_A4000 9
+#define BOARD_TEKMAGIC 10
+#define BOARD_A2630 11
+#define BOARD_DKB1200 12
+#define BOARD_FUSIONFORTY 13
+#define BOARD_A3001_I 14
+#define BOARD_A3001_II 15
+#define BOARD_APOLLO 16
+#define BOARD_GVP_A530 17
+#define BOARD_GVP_GFORCE_030 18
+
int ansi_version;
};
+#define HD_CONTROLLER_EXPANSION_MAX 30
+
#define HD_CONTROLLER_TYPE_UAE 0
-#define HD_CONTROLLER_TYPE_IDE_AUTO 1
-#define HD_CONTROLLER_TYPE_IDE_MB 2
-#define HD_CONTROLLER_TYPE_IDE_GVP 3
-#define HD_CONTROLLER_TYPE_IDE_ALFA 4
-#define HD_CONTROLLER_TYPE_IDE_ALFA_2 5
-#define HD_CONTROLLER_TYPE_IDE_APOLLO 6
-#define HD_CONTROLLER_TYPE_IDE_APOLLO_2 7
-#define HD_CONTROLLER_TYPE_IDE_MASOBOSHI 8
-#define HD_CONTROLLER_TYPE_IDE_MASOBOSHI_2 9
-#define HD_CONTROLLER_TYPE_SCSI_AUTO 10
-#define HD_CONTROLLER_TYPE_SCSI_A2091 11
-#define HD_CONTROLLER_TYPE_SCSI_A2091_2 12
-#define HD_CONTROLLER_TYPE_SCSI_GVP 13
-#define HD_CONTROLLER_TYPE_SCSI_GVP_2 14
-#define HD_CONTROLLER_TYPE_SCSI_A4091 15
-#define HD_CONTROLLER_TYPE_SCSI_A4091_2 16
-#define HD_CONTROLLER_TYPE_SCSI_FASTLANE 17
-#define HD_CONTROLLER_TYPE_SCSI_FASTLANE_2 18
-#define HD_CONTROLLER_TYPE_SCSI_OKTAGON 19
-#define HD_CONTROLLER_TYPE_SCSI_OKTAGON_2 20
-#define HD_CONTROLLER_TYPE_SCSI_APOLLO 21
-#define HD_CONTROLLER_TYPE_SCSI_APOLLO_2 22
-#define HD_CONTROLLER_TYPE_SCSI_MASOBOSHI 23
-#define HD_CONTROLLER_TYPE_SCSI_MASOBOSHI_2 24
-#define HD_CONTROLLER_TYPE_SCSI_A3000 25
-#define HD_CONTROLLER_TYPE_SCSI_A4000T 26
-#define HD_CONTROLLER_TYPE_SCSI_CDTV 27
-#define HD_CONTROLLER_TYPE_SCSI_CPUBOARD 28
-#define HD_CONTROLLER_TYPE_PCMCIA_SRAM 29
-#define HD_CONTROLLER_TYPE_PCMCIA_IDE 30
-
-#define HD_CONTROLLER_TYPE_IDE_FIRST 1
-#define HD_CONTROLLER_TYPE_IDE_LAST 9
-#define HD_CONTROLLER_TYPE_SCSI_FIRST 10
-#define HD_CONTROLLER_TYPE_SCSI_LAST 28
+#define HD_CONTROLLER_TYPE_IDE_AUTO (HD_CONTROLLER_TYPE_UAE + 1)
+#define HD_CONTROLLER_TYPE_IDE_FIRST (HD_CONTROLLER_TYPE_IDE_AUTO)
+#define HD_CONTROLLER_TYPE_IDE_MB (HD_CONTROLLER_TYPE_IDE_FIRST + 1)
+#define HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST (HD_CONTROLLER_TYPE_IDE_MB + 1)
+#define HD_CONTROLLER_TYPE_IDE_LAST (HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST + HD_CONTROLLER_EXPANSION_MAX - 1)
+
+#define HD_CONTROLLER_TYPE_SCSI_AUTO (HD_CONTROLLER_TYPE_IDE_LAST + 1)
+#define HD_CONTROLLER_TYPE_SCSI_FIRST (HD_CONTROLLER_TYPE_SCSI_AUTO)
+#define HD_CONTROLLER_TYPE_SCSI_A3000 (HD_CONTROLLER_TYPE_SCSI_FIRST + 1)
+#define HD_CONTROLLER_TYPE_SCSI_A4000T (HD_CONTROLLER_TYPE_SCSI_A3000 + 1)
+#define HD_CONTROLLER_TYPE_SCSI_CDTV (HD_CONTROLLER_TYPE_SCSI_A4000T + 1)
+#define HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST (HD_CONTROLLER_TYPE_SCSI_CDTV + 1)
+#define HD_CONTROLLER_TYPE_SCSI_LAST (HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST + HD_CONTROLLER_EXPANSION_MAX - 1)
+
+#define HD_CONTROLLER_TYPE_PCMCIA_SRAM (HD_CONTROLLER_TYPE_SCSI_LAST + 1)
+#define HD_CONTROLLER_TYPE_PCMCIA_IDE (HD_CONTROLLER_TYPE_PCMCIA_SRAM + 1)
#define FILESYS_VIRTUAL 0
#define FILESYS_HARDFILE 1
extern addrbank gfxboard_bank_memory;
extern addrbank gfxboard_bank_registers;
-extern addrbank *gfxboard_init_memory (void);
-extern addrbank *gfxboard_init_memory_p4_z2(void);
-extern addrbank *gfxboard_init_registers(void);
+extern addrbank *gfxboard_init_memory (int);
+extern addrbank *gfxboard_init_memory_p4_z2(int);
+extern addrbank *gfxboard_init_registers(int);
extern void gfxboard_free (void);
extern void gfxboard_reset (void);
extern void gfxboard_vsync_handler (void);
uae_u16 ide_get_data (struct ide_hdf *ide);
bool ide_interrupt_check(struct ide_hdf *ide);
+bool ide_drq_check(struct ide_hdf *ide);
bool ide_isdrive(struct ide_hdf *ide);
void ide_initialize(struct ide_hdf **idetable, int chpair);
struct ide_hdf *add_ide_unit (struct ide_hdf **idetable, int max, int ch, struct uaedev_config_info *ci);
void idecontroller_hsync(void);
int gvp_add_ide_unit(int ch, struct uaedev_config_info *ci);
-addrbank *gvp_ide_rom_autoconfig_init(void);
-addrbank *gvp_ide_controller_autoconfig_init(void);
+addrbank *gvp_ide_rom_autoconfig_init(int devnum);
+addrbank *gvp_ide_controller_autoconfig_init(int devnum);
-int alf_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum);
-addrbank *alf_init(int);
+int alf_add_ide_unit(int ch, struct uaedev_config_info *ci);
+addrbank *alf_init(int devnum);
-int apollo_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum);
-addrbank *apollo_init(int);
+int apollo_add_ide_unit(int ch, struct uaedev_config_info *ci);
+addrbank *apollo_init(int devnum);
+addrbank *apollo_init_cpu(int devnum);
-int masoboshi_add_ide_unit(int ch, struct uaedev_config_info *ci, int devnum);
-addrbank *masoboshi_init(int);
+int masoboshi_add_ide_unit(int ch, struct uaedev_config_info *ci);
+addrbank *masoboshi_init(int devnum);
uae_u32 REGPARAM3 apollo_ide_lget (uaecptr addr) REGPARAM;
uae_u32 REGPARAM3 apollo_ide_wget (uaecptr addr) REGPARAM;
extern addrbank z3fastmem_bank;
extern addrbank z3fastmem2_bank;
extern addrbank z3chipmem_bank;
+extern addrbank mem25bit_bank;
extern addrbank a3000lmem_bank;
extern addrbank a3000hmem_bank;
extern addrbank extendedkickmem_bank;
extern int cpuboard_ncr9x_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern int cpuboard_dkb_add_scsi_unit(int ch, struct uaedev_config_info *ci);
-extern int fastlane_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
-extern int oktagon_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
-extern int masoboshi_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
+extern int fastlane_add_scsi_unit(int ch, struct uaedev_config_info *ci);
+extern int oktagon_add_scsi_unit(int ch, struct uaedev_config_info *ci);
+extern int masoboshi_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern addrbank *ncr_fastlane_autoconfig_init(int devnum);
extern addrbank *ncr_oktagon_autoconfig_init(int devnum);
-extern addrbank *ncr_dkb_autoconfig_init(void);
+extern addrbank *ncr_dkb_autoconfig_init(int devnum);
extern void cpuboard_ncr9x_scsi_put(uaecptr, uae_u32);
extern uae_u32 cpuboard_ncr9x_scsi_get(uaecptr);
extern void ncr710_init(void);
extern addrbank *ncr710_a4091_autoconfig_init(int devnum);
-extern addrbank *ncr710_warpengine_autoconfig_init(void);
+extern addrbank *ncr710_warpengine_autoconfig_init(int devnum);
extern void ncr710_free(void);
extern void ncr710_reset(void);
extern void ncr_rethink(void);
extern int tekmagic_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern int cyberstorm_add_scsi_unit(int ch, struct uaedev_config_info *ci);
extern int blizzardppc_add_scsi_unit(int ch, struct uaedev_config_info *ci);
-extern int a4091_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
+extern int a4091_add_scsi_unit(int ch, struct uaedev_config_info *ci);
int reserved;
int blocksize;
int controller_type;
+ int controller_type_unit;
int controller_unit;
// zero if default
int pcyls, pheads, psecs;
int gfx_filter_keep_autoscale_aspect;
};
+#define MAX_EXPANSION_BOARDS 4
struct romconfig
{
TCHAR romfile[MAX_DPATH];
#define MAX_BOARD_ROMS 2
struct boardromconfig
{
+ int device_type;
+ int device_num;
struct romconfig roms[MAX_BOARD_ROMS];
};
bool cs_1mchipjumper;
int cs_hacks;
- struct boardromconfig a2091rom;
- struct boardromconfig a4091rom;
- struct boardromconfig fastlanerom;
- struct boardromconfig oktagonrom;
- struct boardromconfig gvps1rom;
- struct boardromconfig gvps2rom;
- struct boardromconfig alfrom;
- struct boardromconfig alfplusrom;
- struct boardromconfig apollorom;
- struct boardromconfig masoboshirom;
+ struct boardromconfig expansionboard[MAX_EXPANSION_BOARDS];
TCHAR romfile[MAX_DPATH];
TCHAR romident[256];
uae_u32 romextfile2addr;
TCHAR romextfile2[MAX_DPATH];
TCHAR romextident[256];
- TCHAR acceleratorromfile[MAX_DPATH];
- TCHAR acceleratorromident[256];
- TCHAR acceleratorextromfile[MAX_DPATH];
- TCHAR acceleratorextromident[256];
TCHAR flashfile[MAX_DPATH];
TCHAR rtcfile[MAX_DPATH];
TCHAR cartfile[MAX_DPATH];
TCHAR pci_devices[256];
TCHAR prtname[256];
TCHAR sername[256];
- TCHAR amaxromfile[MAX_DPATH];
TCHAR a2065name[MAX_DPATH];
TCHAR picassoivromfile[MAX_DPATH];
struct cdslot cdslots[MAX_TOTAL_SCSI_DEVICES];
uae_u32 bogomem_size;
uae_u32 mbresmem_low_size;
uae_u32 mbresmem_high_size;
+ uae_u32 mem25bit_size;
uae_u32 rtgmem_size;
int cpuboard_type;
uae_u32 cpuboardmem1_size;
extern void fixup_prefs_dimensions (struct uae_prefs *prefs);
extern void fixup_prefs (struct uae_prefs *prefs);
extern void fixup_cpu (struct uae_prefs *prefs);
-extern bool cfgfile_board_enabled(struct boardromconfig *br);
+bool cfgfile_board_enabled(struct uae_prefs *p, int romtype);
extern void check_prefs_changed_custom (void);
extern void check_prefs_changed_cpu (void);
#define ROMTYPE_ALFAPLUS 0x0010000a
#define ROMTYPE_APOLLO 0x0010000b
#define ROMTYPE_MASOBOSHI 0x0010000c
+#define ROMTYPE_SUPRA 0x0010000d
#define ROMTYPE_QUAD 0x01000000
#define ROMTYPE_EVEN 0x02000000
extern int romlist_count (void);
extern struct romlist *romlist_getit (void);
extern int configure_rom (struct uae_prefs *p, const int *rom, int msg);
-
+int is_device_rom(struct uae_prefs *p, int devnum, int romtype);
+struct zfile *read_device_rom(struct uae_prefs *p, int devnum, int romtype, int *roms);
+struct boardromconfig *get_device_rom(struct uae_prefs *p, int romtype, int *index);
+void set_device_rom(struct uae_prefs *p, const TCHAR *path, int romtype);
+const struct expansionromtype *get_device_expansion_rom(int romtype);
+const struct expansionromtype *get_unit_expansion_rom(int hdunit);
+struct boardromconfig *get_device_rom_new(struct uae_prefs *p, int romtype, int *index);
+void clear_device_rom(struct uae_prefs *p, int romtype);
return y ## _lget(& ## z, addr); \
}
+void ncr80_rethink(void);
void apollo_scsi_bput(uaecptr addr, uae_u8 v);
uae_u8 apollo_scsi_bget(uaecptr addr);
-int apollo_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum);
+int apollo_add_scsi_unit(int ch, struct uaedev_config_info *ci);
void apolloscsi_free(void);
void apolloscsi_reset(void);
+
+void ncr5380scsi_free(void);
+void ncr5380scsi_reset(void);
+
+addrbank *supra_init(int devnum);
+int supra_add_scsi_unit(int ch, struct uaedev_config_info *ci);
+
-addrbank *sndboard_init(void);
+addrbank *sndboard_init(int);
void sndboard_free(void);
void sndboard_hsync(void);
void sndboard_vsync(void);
if (p->cpu_frequency == 1000000)
p->cpu_frequency = 0;
+ if (p->cpu_model >= 68020 && p->cpuboard_type && cpuboard_32bit(p)) {
+ error_log (_T("24-bit address space is not supported with selected accelerator board configuration."));
+ p->address_space_24 = 0;
+ }
if (p->cpu_model >= 68040 && p->address_space_24) {
error_log (_T("24-bit address space is not supported with 68040/060 configurations."));
p->address_space_24 = 0;
p->mbresmem_high_size = p->cpuboardmem1_size;
} else if (cpuboard_memorytype(p) == BOARD_MEMORY_Z2) {
p->fastmem2_size = p->cpuboardmem1_size;
+ } else if (cpuboard_memorytype(p) == BOARD_MEMORY_25BITMEM) {
+ p->mem25bit_size = p->cpuboardmem1_size;
}
if (((p->chipmem_size & (p->chipmem_size - 1)) != 0 && p->chipmem_size != 0x180000)
p->chipmem_size = 0x200000;
err = 1;
}
+ if (p->mem25bit_size > 128 * 1024 * 1024 || (p->mem25bit_size & 0xfffff)) {
+ p->mem25bit_size = 0;
+ error_log (_T("Unsupported 25bit RAM size"));
+ }
if (p->mbresmem_low_size > 0x04000000 || (p->mbresmem_low_size & 0xfffff)) {
p->mbresmem_low_size = 0;
error_log (_T("Unsupported Mainboard RAM size"));
uae_u8 ce_banktype[65536];
uae_u8 ce_cachable[65536];
-static size_t bootrom_filepos, chip_filepos, bogo_filepos, a3000lmem_filepos, a3000hmem_filepos;
+static size_t bootrom_filepos, chip_filepos, bogo_filepos, a3000lmem_filepos, a3000hmem_filepos, mem25bit_filepos;
/* Set if we notice during initialization that settings changed,
and we must clear all memory to prevent bogus contents from confusing
MEMORY_FUNCTIONS(a3000lmem);
MEMORY_FUNCTIONS(a3000hmem);
+/* 25bit memory (0x10000000) */
+
+MEMORY_FUNCTIONS(mem25bit);
+
+
/* Kick memory */
uae_u16 kickstart_version;
cardmem_lget, cardmem_wget, ABFLAG_RAM
};
+addrbank mem25bit_bank = {
+ mem25bit_lget, mem25bit_wget, mem25bit_bget,
+ mem25bit_lput, mem25bit_wput, mem25bit_bput,
+ mem25bit_xlate, mem25bit_check, NULL, _T("25bitmem"), _T("25bit memory"),
+ mem25bit_lget, mem25bit_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+};
+
addrbank a3000lmem_bank = {
a3000lmem_lget, a3000lmem_wget, a3000lmem_bget,
a3000lmem_lput, a3000lmem_wput, a3000lmem_bput,
need_hardreset = true;
}
}
+ if (mem25bit_bank.allocated != currprefs.mem25bit_size) {
+ mapped_free (&mem25bit_bank);
+
+ mem25bit_bank.allocated = currprefs.mem25bit_size;
+ mem25bit_bank.mask = mem25bit_bank.allocated - 1;
+ mem25bit_bank.start = 0x01000000;
+ if (mem25bit_bank.allocated) {
+ if (!mapped_malloc (&mem25bit_bank)) {
+ write_log (_T("Out of memory for 25 bit memory.\n"));
+ mem25bit_bank.allocated = 0;
+ }
+ }
+ need_hardreset = true;
+ }
if (a3000lmem_bank.allocated != currprefs.mbresmem_low_size) {
mapped_free (&a3000lmem_bank);
restore_ram (chip_filepos, chipmem_bank.baseaddr);
if (bogomem_bank.allocated > 0)
restore_ram (bogo_filepos, bogomem_bank.baseaddr);
+ if (mem25bit_bank.allocated > 0)
+ restore_ram (mem25bit_filepos, mem25bit_bank.baseaddr);
if (a3000lmem_bank.allocated > 0)
restore_ram (a3000lmem_filepos, a3000lmem_bank.baseaddr);
if (a3000hmem_bank.allocated > 0)
memset (ce_cachable + (z3fastmem2_bank.start >> 16), 1 | 2, currprefs.z3fastmem2_size >> 16);
memset (ce_cachable + (a3000hmem_bank.start >> 16), 1 | 2, currprefs.mbresmem_high_size >> 16);
memset (ce_cachable + (a3000lmem_bank.start >> 16), 1 | 2, currprefs.mbresmem_low_size >> 16);
+ memset (ce_cachable + (mem25bit_bank.start >> 16), 1 | 2, currprefs.mem25bit_size >> 16);
if (&get_mem_bank (0) == &chipmem_bank) {
for (i = 0; i < (0x200000 >> 16); i++) {
memset (chipmem_bank.baseaddr, 0, chipmem_bank.allocated);
if (bogomem_bank.baseaddr)
memset (bogomem_bank.baseaddr, 0, bogomem_bank.allocated);
+ if (mem25bit_bank.baseaddr)
+ memset (mem25bit_bank.baseaddr, 0, mem25bit_bank.allocated);
if (a3000lmem_bank.baseaddr)
memset (a3000lmem_bank.baseaddr, 0, a3000lmem_bank.allocated);
if (a3000hmem_bank.baseaddr)
a3000scsi_reset ();
#endif
+ if (mem25bit_bank.baseaddr)
+ map_banks (&mem25bit_bank, mem25bit_bank.start >> 16, mem25bit_bank.allocated >> 16, 0);
if (a3000lmem_bank.baseaddr)
map_banks (&a3000lmem_bank, a3000lmem_bank.start >> 16, a3000lmem_bank.allocated >> 16, 0);
if (a3000hmem_bank.baseaddr)
extendedkickmem2_bank.allocated = 0;
extendedkickmem_type = 0;
chipmem_bank.baseaddr = 0;
+ mem25bit_bank.allocated = mem25bit_bank.allocated = 0;
a3000lmem_bank.allocated = a3000hmem_bank.allocated = 0;
a3000lmem_bank.baseaddr = a3000hmem_bank.baseaddr = NULL;
bogomem_bank.baseaddr = NULL;
void memory_cleanup (void)
{
+ mapped_free (&mem25bit_bank);
mapped_free (&a3000lmem_bank);
mapped_free (&a3000hmem_bank);
mapped_free (&bogomem_bank);
bogomem_bank.baseaddr = NULL;
kickmem_bank.baseaddr = NULL;
+ mem25bit_bank.baseaddr = NULL;
a3000lmem_bank.baseaddr = a3000hmem_bank.baseaddr = NULL;
a1000_bootrom = NULL;
a1000_kickstart_mode = 0;
return bogomem_bank.baseaddr;
}
+uae_u8 *save_mem25bitram (int *len)
+{
+ *len = mem25bit_bank.allocated;
+ return mem25bit_bank.baseaddr;
+}
+
uae_u8 *save_a3000lram (int *len)
{
*len = a3000lmem_bank.allocated;
int rom_start, rom_end, rom_offset;
int io_start, io_end;
addrbank *bank;
- bool chipirq, boardirq;
+ bool chipirq, boardirq, intena;
void (*irq_func)(struct ncr9x_state*);
int led;
uaecptr dma_ptr;
int dma_cnt;
- int state;
- int state2;
- int state3;
+ uae_u8 states[16];
uae_u8 data;
bool data_valid;
static void set_irq2(struct ncr9x_state *ncr)
{
if (ncr->chipirq && !ncr->boardirq) {
- ncr->boardirq= true;
+ ncr->boardirq = true;
ncr9x_rethink();
}
+ if (!ncr->chipirq && ncr->boardirq) {
+ ncr->boardirq = false;
+ }
}
static void set_irq2_dkb1200(struct ncr9x_state *ncr)
{
- if (!(ncr->state & 0x40))
+ if (!(ncr->states[0] & 0x40))
ncr->boardirq = false;
- if (ncr->chipirq && !ncr->boardirq && (ncr->state & 0x40)) {
- ncr->boardirq= true;
+ if (ncr->chipirq && !ncr->boardirq && (ncr->states[0] & 0x40)) {
+ ncr->boardirq = true;
ncr9x_rethink();
}
}
static void set_irq2_oktagon(struct ncr9x_state *ncr)
{
- if (!(ncr->state & 0x80))
+ if (!(ncr->states[0] & 0x80))
ncr->boardirq = false;
- if (ncr->chipirq && !ncr->boardirq && (ncr->state & 0x80)) {
+ if (ncr->chipirq && !ncr->boardirq && (ncr->states[0] & 0x80)) {
ncr->boardirq = true;
ncr9x_rethink();
}
static void set_irq2_fastlane(struct ncr9x_state *ncr)
{
- if (!ncr->chipirq || !(ncr->state & FLSC_PB_ESI)) {
- ncr->state |= FLSC_HB_MINT;
+ if (!ncr->chipirq || !(ncr->states[0] & FLSC_PB_ESI)) {
+ ncr->states[0] |= FLSC_HB_MINT;
ncr->boardirq = false;
return;
}
- ncr->state |= FLSC_HB_CREQ;
- ncr->state &= ~FLSC_HB_MINT;
- if (ncr->state & FLSC_PB_ESI) {
+ ncr->states[0] |= FLSC_HB_CREQ;
+ ncr->states[0] &= ~FLSC_HB_MINT;
+ if (ncr->states[0] & FLSC_PB_ESI) {
if (!ncr->boardirq) {
ncr->boardirq = true;
ncr9x_rethink();
static void set_irq2_masoboshi(struct ncr9x_state *ncr)
{
- if (ncr->chipirq && !ncr->boardirq) {
- ncr->state2 |= 2;
+ if (!ncr->intena || !ncr->chipirq)
+ ncr->boardirq = false;
+ if (ncr->chipirq && ncr->intena) {
ncr->boardirq = true;
+ ncr9x_rethink();
#if NCR_DEBUG > 1
write_log(_T("MASOBOSHI IRQ\n"));
#endif
- ncr9x_rethink();
}
}
{
struct ncr9x_state *ncr = (struct ncr9x_state*)irq;
ncr->chipirq = true;
+#if NCR_DEBUG > 1
+ write_log(_T("NCR9X +IRQ\n"));
+#endif
ncr->irq_func(ncr);
}
void esp_irq_lower(qemu_irq irq)
{
struct ncr9x_state *ncr = (struct ncr9x_state*)irq;
ncr->chipirq = false;
- ncr->boardirq = false;
+#if NCR_DEBUG > 1
+ write_log(_T("NCR9X -IRQ\n"));
+#endif
ncr->irq_func(ncr);
}
static int fastlane_dma_read(void *opaque, uint8_t *buf, int len)
{
struct ncr9x_state *ncr = (struct ncr9x_state*)opaque;
- if (!(ncr->state & FLSC_PB_DMA_WRITE)) {
+ if (!(ncr->states[0] & FLSC_PB_DMA_WRITE)) {
write_log(_T("fastlane_dma_read mismatched direction!\n"));
return -1;
}
static int fastlane_dma_write(void *opaque, uint8_t *buf, int len)
{
struct ncr9x_state *ncr = (struct ncr9x_state*)opaque;
- if (ncr->state & FLSC_PB_DMA_WRITE) {
+ if (ncr->states[0] & FLSC_PB_DMA_WRITE) {
write_log(_T("fastlane_dma_write mismatched direction!\n"));
return -1;
}
addr &= ncr->board_mask;
if (ncr == &ncr_masoboshi_scsi[0] || ncr == &ncr_masoboshi_scsi[1]) {
- if (addr >= 0xf04c && addr < 0xf04f) {
+ if (addr >= 0xf040 && addr < 0xf048) {
+ if (addr == 0xf040)
+ ncr->states[8] = 0;
+ if (addr == 0xf047) {
+ // dma start
+ if (val & 0x80)
+ ncr->states[8] = 0x80;
+ }
+ write_log(_T("MASOBOSHI DMA %08x = %02X %08x\n"), addr, val, M68K_GETPC);
+ return;
+ }
+
+ if (addr >= 0xf04c && addr < 0xf050) {
int shift = (addr - 0xf04c) * 8;
uae_u32 mask = 0xff << shift;
ncr->dma_ptr &= ~mask;
ncr->dma_ptr |= val << shift;
ncr->dma_ptr &= 0xffffff;
+ if (addr == 0xf04f)
+ write_log(_T("MASOBOSHI DMA PTR = %08x\n"), ncr->dma_ptr, M68K_GETPC);
return;
}
- if (addr >= 0xf040 && addr <= 0xf047) {
- if (addr == 0xf047) {
+
+ if (addr >= 0xf000 && addr <= 0xf007) {
+ ncr->states[addr - 0xf000] = val;
+ if (addr == 0xf000) {
+ ncr->boardirq = false;
+ set_irq2_masoboshi(ncr);
+ }
+ if (addr == 0xf007) {
+ ncr->intena = true;
+ ncr9x_rethink();
+ }
+#if 0
+ if (addr == 0xf047) { // dma start
if (val & 0x80)
- ncr->state3 = 0x80;
+ ncr->states[2] = 0x80;
}
if (addr == 0xf040) {
- ncr->state3 = 0;
+ ncr->states[2] = 0;
}
+#endif
+ write_log(_T("MASOBOSHI IO %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC);
return;
}
- if (addr == 0xf007) {
- ncr->state = val;
- }
- if (addr == 0xf000) {
- ncr->state2 &= ~2;
- }
- if (addr == 0xf004) {
- ncr->state2 &= ~1;
- }
if (addr >= MASOBOSHI_DMA_START && addr < MASOBOSHI_DMA_END) {
if (esp_reg_read(ncr->devobject.lsistate, ESP_RSTAT) & STAT_TC) {
#if NCR_DEBUG > 2
return;
}
if (addr == MASOBOSHI_ESP_ADDR + 3 * 2 && val == 0x02)
- ncr->state |= 0x80;
+ ncr->states[0] |= 0x80;
reg_shift = 1;
addr &= 0x3f;
esp_dma_enable(ncr->devobject.lsistate, 1);
return;
} else if (addr == OKTAGON_INTENA) {
- ncr->state = val;
+ ncr->states[0] = val;
set_irq2_oktagon(ncr);
return;
}
} else if (ncr == &ncr_fastlane_scsi[0] || ncr == &ncr_fastlane_scsi[1]) {
if (addr >= FASTLANE_HARDBITS) {
if (addr == FASTLANE_HARDBITS) {
- int oldstate = ncr->state;
- ncr->state = val;
- if (!(oldstate & FLSC_PB_ENABLE_DMA) && (ncr->state & FLSC_PB_ENABLE_DMA))
+ int oldstate = ncr->states[0];
+ ncr->states[0] = val;
+ if (!(oldstate & FLSC_PB_ENABLE_DMA) && (ncr->states[0] & FLSC_PB_ENABLE_DMA))
esp_dma_enable(ncr->devobject.lsistate, 1);
- else if ((oldstate & FLSC_PB_ENABLE_DMA) && !(ncr->state & FLSC_PB_ENABLE_DMA))
+ else if ((oldstate & FLSC_PB_ENABLE_DMA) && !(ncr->states[0] & FLSC_PB_ENABLE_DMA))
esp_dma_enable(ncr->devobject.lsistate, 0);
set_irq2_fastlane(ncr);
} else if (addr == FASTLANE_RESETDMA) {
ncr->dma_ptr &= ~(0xff << (addr * 8));
ncr->dma_ptr |= (val & 0xff) << (addr * 8);
ncr->dma_cnt--;
- if (ncr->dma_cnt == 0 && (ncr->state & FLSC_PB_ENABLE_DMA))
+ if (ncr->dma_cnt == 0 && (ncr->states[0] & FLSC_PB_ENABLE_DMA))
esp_dma_enable(ncr->devobject.lsistate, 1);
return;
}
ncr->led = val;
return;
}
- } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) {
+ } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260) {
+ if (!cfgfile_board_enabled(&currprefs, ROMTYPE_CPUBOARDEXT))
+ return;
if (addr >= BLIZZARD_SCSI_KIT_DMA_OFFSET) {
addr &= 0x18000;
if (addr == 0x18000) {
}
} else if (currprefs.cpuboard_type == BOARD_DKB1200) {
if (addr == 0x10100) {
- ncr->state = val;
+ ncr->states[0] = val;
esp_dma_enable(ncr->devobject.lsistate, 1);
//write_log(_T("DKB IO PUT %02x %08x\n"), val & 0xff, M68K_GETPC);
return;
esp_reg_write(ncr->devobject.lsistate, (addr), val);
}
-
-static int perse = 0;
-
uae_u32 ncr9x_io_bget(struct ncr9x_state *ncr, uaecptr addr)
{
- uae_u8 v;
+ uae_u8 v = 0xff;
int reg_shift = 2;
addr &= ncr->board_mask;
if (ncr == &ncr_masoboshi_scsi[0] || ncr == &ncr_masoboshi_scsi[1]) {
- if (addr == MASOBOSHI_ESP_ADDR + 3 * 2 && (ncr->state & 0x80))
+ if (addr == MASOBOSHI_ESP_ADDR + 3 * 2 && (ncr->states[0] & 0x80))
return 2;
- if (ncr->state & 0x80)
- ncr->state &= ~0x80;
+ if (ncr->states[0] & 0x80)
+ ncr->states[0] &= ~0x80;
if (addr == 0xf040) {
- return ncr->state3;
+ v = ncr->states[8];
+ return v;
}
- if (addr == 0xf000) {
- if (esp_reg_read(ncr->devobject.lsistate, ESP_RSTAT) & STAT_TC) {
- if (perse)
- activate_debugger();
- ncr->state2 |= 1; // dma complete
+ if (addr >= 0xf04c && addr < 0xf050) {
+ int shift = (addr - 0xf04c) * 8;
+ uae_u32 mask = 0xff << shift;
+ if (addr == 0xf04f)
+ write_log(_T("MASOBOSHI DMA PTR READ = %08x\n"), ncr->dma_ptr, M68K_GETPC);
+ return ncr->dma_ptr >> shift;
+ }
+ if (addr >= 0xf048 && addr < 0xf04c) {
+ write_log(_T("MASOBOSHI DMA %08X GET %02x %08x\n"), addr, v, M68K_GETPC);
+ return v;
+ }
+ if (addr >= 0xf000 && addr <= 0xf007) {
+ int idx = addr - 0xf000;
+ if (addr == 0xf000) {
+ ncr->states[0] &= ~3;
+ if (esp_dreq(&ncr->devobject)) {
+ write_log(_T("DREQ\n"));
+ ncr->states[0] |= 2; // dma data waiting
+ }
+ if (ncr->chipirq) {
+ ncr->states[0] |= 1; // scsi interrupt
+ }
}
- return ncr->state2 & 0x7f;
+ v = ncr->states[idx];
+ write_log(_T("MASOBOSHI IO %08X GET %02x %08x\n"), addr, v, M68K_GETPC);
+ return v;
}
+#if 0
if (addr == 0xf007) {
- v = ncr->state;
+ v = ncr->states[0];
}
+#endif
if (addr >= MASOBOSHI_DMA_START && addr < MASOBOSHI_DMA_END) {
esp_dma_enable(ncr->devobject.lsistate, 1);
v = ncr->data;
ncr->data_valid = false;
return v;
} else if (addr == OKTAGON_INTENA) {
- return ncr->state;
+ return ncr->states[0];
}
if (addr < OKTAGON_ESP_ADDR || addr >= OKTAGON_ESP_ADDR + 0x100)
return 0xff;
} else if (ncr == &ncr_fastlane_scsi[0] || ncr == &ncr_fastlane_scsi[1]) {
if (addr >= FASTLANE_HARDBITS) {
if (addr == FASTLANE_HARDBITS) {
- uae_u8 v = ncr->state;
+ uae_u8 v = ncr->states[0];
v &= ~(FLSC_HB_DISABLED | FLSC_HB_BUSID6 | FLSC_HB_SEAGATE | FLSC_HB_SLOW | FLSC_HB_SYNCHRON);
return v;
}
} else if (addr >= BLIZZARD_2060_LED_OFFSET) {
return ncr->led;
}
- } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) {
+ } else if (currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260) {
+ if (!cfgfile_board_enabled(&currprefs, ROMTYPE_CPUBOARDEXT))
+ return 0;
if (addr >= BLIZZARD_SCSI_KIT_DMA_OFFSET)
return 0;
} else if (currprefs.cpuboard_type == BOARD_CSMK1) {
return v;
}
-
static void REGPARAM2 ncr9x_lput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 l)
{
#ifdef JIT
}
}
-
static void REGPARAM2 ncr9x_wput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 w)
{
#ifdef JIT
{
int roms[2];
struct ncr9x_state *ncr = &ncr_fastlane_scsi[devnum];
- const TCHAR *romname;
xfree(ncr->rom);
ncr->rom = NULL;
ncr9x_init ();
ncr9x_reset_board(ncr);
- romname = devnum && currprefs.fastlanerom.roms[1].romfile[0] ? currprefs.fastlanerom.roms[1].romfile : currprefs.fastlanerom.roms[0].romfile;
- struct zfile *z = read_rom_name (romname);
- if (!z) {
- struct romlist *rl = getromlistbyids(roms, romname);
- if (rl) {
- struct romdata *rd = rl->rd;
- z = read_rom (rd);
- }
- }
-
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_FASTLANE, roms);
ncr->rom = xcalloc (uae_u8, FASTLANE_ROM_SIZE * 4);
if (z) {
// memory board at offset 0x100
{
int roms[2];
struct ncr9x_state *ncr = &ncr_oktagon2008_scsi[devnum];
- const TCHAR *romname;
xfree(ncr->rom);
ncr->rom = NULL;
ncr9x_init ();
ncr9x_reset_board(ncr);
- romname = devnum && currprefs.oktagonrom.roms[1].romfile[0] ? currprefs.oktagonrom.roms[1].romfile : currprefs.oktagonrom.roms[0].romfile;
- struct zfile *z = read_rom_name (romname);
- if (!z) {
- struct romlist *rl = getromlistbyids(roms, romname);
- if (rl) {
- struct romdata *rd = rl->rd;
- z = read_rom (rd);
- }
- }
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_OKTAGON, roms);
ncr->rom = xcalloc (uae_u8, OKTAGON_ROM_SIZE * 6);
if (z) {
// memory board at offset 0x100
}
-addrbank *ncr_dkb_autoconfig_init(void)
+addrbank *ncr_dkb_autoconfig_init(int devnum)
{
int roms[2];
struct ncr9x_state *ncr = &ncr_dkb1200_scsi;
- const TCHAR *romname;
xfree(ncr->rom);
ncr->rom = NULL;
ncr9x_init ();
ncr9x_reset_board(ncr);
- romname = currprefs.acceleratorromfile;
-
- struct zfile *z = read_rom_name (romname);
- if (!z) {
- struct romlist *rl = getromlistbyids(roms, romname);
- if (rl) {
- struct romdata *rd = rl->rd;
- z = read_rom (rd);
+ int idx;
+ struct boardromconfig *brc = get_device_rom(&currprefs, ROMTYPE_CPUBOARD, &idx);
+ struct zfile *z = NULL;
+ if (brc) {
+ const TCHAR *romname = brc->roms[idx].romfile;
+ z = read_rom_name (romname);
+ if (!z) {
+ struct romlist *rl = getromlistbyids(roms, romname);
+ if (rl) {
+ struct romdata *rd = rl->rd;
+ z = read_rom (rd);
+ }
}
}
ncr->rom = xcalloc (uae_u8, DKB_ROM_SIZE * 2);
return ncr9x_add_scsi_unit(&ncr_dkb1200_scsi, ch, ci);
}
-int fastlane_add_scsi_unit (int ch, struct uaedev_config_info *ci, int devnum)
+int fastlane_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
- return ncr9x_add_scsi_unit(&ncr_fastlane_scsi[devnum], ch, ci);
+ return ncr9x_add_scsi_unit(&ncr_fastlane_scsi[ci->controller_type_unit], ch, ci);
}
-int oktagon_add_scsi_unit (int ch, struct uaedev_config_info *ci, int devnum)
+int oktagon_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
- return ncr9x_add_scsi_unit(&ncr_oktagon2008_scsi[devnum], ch, ci);
+ return ncr9x_add_scsi_unit(&ncr_oktagon2008_scsi[ci->controller_type_unit], ch, ci);
}
-int masoboshi_add_scsi_unit (int ch, struct uaedev_config_info *ci, int devnum)
+int masoboshi_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
- return ncr9x_add_scsi_unit(&ncr_masoboshi_scsi[devnum], ch, ci);
+ return ncr9x_add_scsi_unit(&ncr_masoboshi_scsi[ci->controller_type_unit], ch, ci);
}
};
#define WARP_ENGINE_ROM_SIZE 32768
-addrbank *ncr710_warpengine_autoconfig_init(void)
+addrbank *ncr710_warpengine_autoconfig_init(int devnum)
{
int roms[2];
struct ncr_state *ncr = &ncr_we;
{
struct ncr_state *ncr = ncra4091[devnum];
int roms[3];
- const TCHAR *romname;
xfree(ncr->rom);
ncr->rom = NULL;
ncr710_init ();
ncr710_reset_board(ncr);
- romname = devnum && currprefs.a4091rom.roms[1].romfile[0] ? currprefs.a4091rom.roms[1].romfile : currprefs.a4091rom.roms[0].romfile;
- struct zfile *z = read_rom_name (romname);
- if (!z) {
- struct romlist *rl = getromlistbyids(roms, romname);
- if (rl) {
- struct romdata *rd = rl->rd;
- z = read_rom (rd);
- }
- }
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_A4091, roms);
if (z) {
write_log (_T("%s BOOT ROM '%s'\n"), ncr->name, zfile_getname (z));
ncr->rom = xmalloc (uae_u8, A4091_ROM_SIZE * 4);
return ncr_add_scsi_unit(&ncr_cpuboard, ch, ci);
}
-int a4091_add_scsi_unit (int ch, struct uaedev_config_info *ci, int devnum)
+int a4091_add_scsi_unit (int ch, struct uaedev_config_info *ci)
{
- return ncr_add_scsi_unit(ncra4091[devnum], ch, ci);
+ return ncr_add_scsi_unit(ncra4091[ci->controller_type_unit], ch, ci);
}
int cyberstorm_add_scsi_unit(int ch, struct uaedev_config_info *ci)
int i;
struct uae_driveinfo *udi = NULL, tmpudi;
TCHAR *name = my_strdup (pname);
+ int ret = 0;
hfd->flags = 0;
hfd->drive_empty = 0;
}
}
- if (h == INVALID_HANDLE_VALUE)
+ if (h == INVALID_HANDLE_VALUE) {
+ DWORD err = GetLastError ();
+ if (err == ERROR_WRITE_PROTECT)
+ ret = -2;
+ if (err == ERROR_SHARING_VIOLATION)
+ ret = -1;
goto end;
+ }
if (!DeviceIoControl (h, FSCTL_ALLOW_EXTENDED_DASD_IO, NULL, 0, NULL, 0, &r, NULL))
write_log (_T("WARNING: '%s' FSCTL_ALLOW_EXTENDED_DASD_IO returned %d\n"), name, GetLastError ());
hfd->handle_valid = HDF_HANDLE_ZFILE;
}
} else {
- write_log (_T("HDF '%s' failed to open. error = %d\n"), name, GetLastError ());
+ DWORD err = GetLastError ();
+ if (err == ERROR_WRITE_PROTECT)
+ ret = -2;
+ if (err == ERROR_SHARING_VIOLATION)
+ ret = -1;
+ write_log (_T("HDF '%s' failed to open. error = %d\n"), name, ret);
}
}
if (hfd->handle_valid || hfd->drive_empty) {
end:
hdf_close (hfd);
xfree (name);
- return 0;
+ return ret;
}
static void freehandle (struct hardfilehandle *h)
//write_log (_T("trying to open '%s' de=%d hv=%d\n"), hfd->emptyname, hfd->drive_empty, hfd->handle_valid);
r = hdf_open (hfd, hfd->emptyname);
//write_log (_T("=%d\n"), r);
- if (!r)
+ if (r <= 0)
return;
*reopen = 1;
if (hfd->drive_empty < 0)
#include "autoconf.h"
#include "gfxboard.h"
#include "cpuboard.h"
+#include "rommgr.h"
#include "win32.h"
#if defined(NATMEM_OFFSET)
if (changed_prefs.cpu_model >= 68020)
size = 0x10000000;
z3size = ((changed_prefs.z3fastmem_size + align) & ~align) + ((changed_prefs.z3fastmem2_size + align) & ~align) + ((changed_prefs.z3chipmem_size + align) & ~align);
- if (cfgfile_board_enabled(&currprefs.a4091rom))
+ if (cfgfile_board_enabled(&currprefs, ROMTYPE_A4091))
othersize += 2 * 16 * 1024 * 1024;
- if (cfgfile_board_enabled(&currprefs.fastlanerom))
+ if (cfgfile_board_enabled(&currprefs, ROMTYPE_FASTLANE))
othersize += 2 * 32 * 1024 * 1024;
totalsize = size + z3size + z3rtgmem_size + othersize;
while (totalsize > size64) {
} else if (!_tcscmp(shmids[shmid].name, _T("csmk1_maprom"))) {
shmaddr = natmem_offset + 0x07f80000;
got = TRUE;
+ } else if (!_tcscmp(shmids[shmid].name, _T("25bitram"))) {
+ shmaddr = natmem_offset + 0x01000000;
+ got = TRUE;
} else if (!_tcscmp(shmids[shmid].name, _T("ramsey_high"))) {
shmaddr = natmem_offset + 0x08000000;
got = TRUE;
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("7")
+#define WINUAEBETA _T("8")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2015, 2, 1)
+#define WINUAEDATE MAKEBD(2015, 2, 8)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
}
static int scsiromselected;
-struct scsiromselect
-{
- const TCHAR *device;
- TCHAR *name;
- int mask;
-};
-static const struct scsiromselect scsiromdata[] =
-{
- { _T("A590/A2091"), workprefs.a2091rom.roms[0].romfile, ROMTYPE_A2091 | ROMTYPE_NONE },
- { _T("GVP Series I"), workprefs.gvps1rom.roms[0].romfile, ROMTYPE_GVPS1 | ROMTYPE_NONE },
- { _T("GVP Series II"), workprefs.gvps2rom.roms[0].romfile, ROMTYPE_GVPS2 | ROMTYPE_NONE },
- { _T("A4091"), workprefs.a4091rom.roms[0].romfile, ROMTYPE_A4091 },
- { _T("Fastlane"), workprefs.fastlanerom.roms[0].romfile, ROMTYPE_FASTLANE },
- { _T("Oktagon 2008"), workprefs.oktagonrom.roms[0].romfile, ROMTYPE_OKTAGON },
- { _T("Blizzard SCSI Kit IV"), workprefs.acceleratorextromfile, ROMTYPE_CPUBOARDEXT },
- { _T("AMAX"), workprefs.amaxromfile, ROMTYPE_AMAX | ROMTYPE_NONE },
- { _T("AlfaPower/AT-Bus 2008"), workprefs.alfrom.roms[0].romfile, ROMTYPE_ALFA },
- { _T("AlfaPower Plus"), workprefs.alfplusrom.roms[0].romfile, ROMTYPE_ALFAPLUS },
- { _T("Apollo SCSI/IDE"), workprefs.apollorom.roms[0].romfile, ROMTYPE_APOLLO },
- { _T("Masoboshi SCSI/IDE"), workprefs.masoboshirom.roms[0].romfile, ROMTYPE_MASOBOSHI | ROMTYPE_NONE },
- { NULL, 0 }
-};
#define Error(x) MessageBox (NULL, (x), _T("WinUAE Error"), MB_OK)
#define MAX_MBH_MEM 8
#define MIN_CB_MEM 0
#define MAX_CB_MEM_Z2 4
+#define MAX_CB_MEM_16M 5
#define MAX_CB_MEM_128M 8
#define MAX_CB_MEM_256M 9
103, -1, -1, // Oktagon
117, -1, -1, // alf
118, -1, -1, // alf+
- 120, -1, -2, // masoboshi
+ 120, -1, -1, // masoboshi
+ 121, -1, -2, // supradrive
18, -1, 19, -1, 74, 23, -1, -1, // CD32 FMV
91, -1, -2, // Picasso IV
105, 106, -1, -1, // A2630
119, -1, -1, // Apollo 1240/1260
110, -1, -1, // GVP A530
+ 110, -1, -1, // GVP G-Force 030
114, -1, -1, // A3001
89, -1, -1, // 1230-IV
89, -1, 94, -1, -1, // 1230-IV SCSI
_T("CD32\0CDTV\0CDTV-CR\0Arcadia Multi Select\0")
_T("A590/A2091 SCSI/XT\0GVP Series I SCSI\0GVP Series II SCSI\0A4091 SCSI\0Fastlane SCSI\0Oktagon 2008 SCSI\0")
- _T("AlfaPower/AT-BUS 508/2008 SCSI\0AlfaPower Plus SCSI\0Masoboshi MC-702 IDE/SCSI\0")
+ _T("AlfaPower/AT-BUS 508/2008 SCSI\0AlfaPower Plus SCSI\0Masoboshi MC-702 IDE/SCSI\0SupraDrive 500XP SCSI\0")
_T("CD32 Full Motion Video\0")
_T("Picasso IV\0")
_T("A2620/A2630\0")
_T("Apollo 1240/1260+SCSI\0")
_T("GVP A530\0")
+ _T("GVP G-FORCE 030\0")
_T("GVP A3001 Series I\0")
_T("Blizzard 1230-IV\0Blizzard 1260\0")
_T("Blizzard 1230-IV/SCSI\0Blizzard 1260/SCSI\0")
{
int val = SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_GETCURSEL, 0, 0L);
if (val != CB_ERR) {
- _tcscpy (scsiromdata[val].name, full_path);
- fullpath (scsiromdata[val].name, MAX_DPATH);
+ int index;
+ struct boardromconfig *brc;
+ brc = get_device_rom_new(&workprefs, expansionroms[scsiromselected].romtype, &index);
+ _tcscpy (brc->roms[index].romfile, full_path);
+ fullpath (brc->roms[index].romfile, MAX_DPATH);
}
break;
}
case IDC_CPUBOARDROMFILE:
- _tcscpy(workprefs.acceleratorromfile, full_path);
- fullpath(workprefs.acceleratorromfile, MAX_DPATH);
+ {
+ int index;
+ struct boardromconfig *brc = get_device_rom_new(&workprefs, ROMTYPE_CPUBOARD, &index);
+ _tcscpy(brc->roms[index].romfile, full_path);
+ fullpath(brc->roms[index].romfile, MAX_DPATH);
break;
+ }
case IDC_STATEREC_PLAY:
case IDC_STATEREC_RECORD:
case IDC_STATEREC_SAVE:
ctype = ci->controller_type;
if (ctype >= HD_CONTROLLER_TYPE_IDE_FIRST && ctype <= HD_CONTROLLER_TYPE_IDE_LAST) {
+ const struct expansionromtype *ert = get_unit_expansion_rom(ctype);
const TCHAR *idedevs[] = {
_T("IDE:%d"),
- _T("MB IDE:%d"),
- _T("GVP IDE:%d"),
- _T("Alfa:%d"),
- _T("Alfa 2nd:%d"),
- _T("Apollo:%d"),
- _T("Apollo 2nd:%d"),
- _T("Masoboshi:%d"),
- _T("Masoboshi 2nd:%d")
+ _T("A600/A1200/A4000:%d"),
};
_stprintf (blocksize_str, _T("%d"), ci->blocksize);
- _stprintf (devname_str, idedevs[ctype - HD_CONTROLLER_TYPE_IDE_FIRST], ci->controller_unit);
+ if (ert) {
+ _stprintf (devname_str, _T("%s:%d"), ert->friendlyname, ci->controller_unit);
+ } else {
+ _stprintf (devname_str, idedevs[ctype - HD_CONTROLLER_TYPE_IDE_FIRST], ci->controller_unit);
+ }
harddisktype (volname_str, ci);
_tcscpy (bootpri_str, _T("n/a"));
} else if (ctype >= HD_CONTROLLER_TYPE_SCSI_FIRST && ctype <= HD_CONTROLLER_TYPE_SCSI_LAST) {
TCHAR sid[8];
+ const struct expansionromtype *ert = get_unit_expansion_rom(ctype);
const TCHAR *scsidevs[] = {
_T("SCSI:%s"),
- _T("A2091:%s"),
- _T("A2091 2nd:%s"),
- _T("GVP: %s"),
- _T("GVP 2nd: %s"),
- _T("A4091:%s"),
- _T("A4091 2nd:%s"),
- _T("Fastlane:%s"),
- _T("Fastlane 2nd:%s"),
- _T("Oktagon:%s"),
- _T("Oktagon 2nd:%s"),
- _T("Apollo:%s"),
- _T("Apollo 2nd:%s"),
- _T("Masoboshi:%s"),
- _T("Masoboshi 2nd:%s"),
_T("A3000:%s"),
_T("A4000T:%s"),
_T("CDTV:%s"),
- _T("Accelerator SCSI:%s")
};
- if (ci->controller_unit == 7 && (ctype == HD_CONTROLLER_TYPE_SCSI_A2091 || ctype == HD_CONTROLLER_TYPE_SCSI_A2091_2))
+ if (ci->controller_unit == 7 && ert && !_tcscmp(ert->name, _T("a2091")))
_tcscpy(sid, _T("XT"));
else
_stprintf(sid, _T("%d"), ci->controller_unit);
_stprintf (blocksize_str, _T("%d"), ci->blocksize);
- _stprintf (devname_str, scsidevs[ctype - HD_CONTROLLER_TYPE_SCSI_FIRST], sid);
+ if (ert) {
+ _stprintf (devname_str, _T("%s:%s"), ert->friendlyname, sid);
+ } else {
+ _stprintf (devname_str, scsidevs[ctype - HD_CONTROLLER_TYPE_SCSI_FIRST], sid);
+ }
harddisktype (volname_str, ci);
_tcscpy (bootpri_str, _T("n/a"));
} else if (ctype == HD_CONTROLLER_TYPE_PCMCIA_SRAM) {
_tcscpy (blocksize_str, _T("n/a"));
- _tcscpy(devname_str, _T("SRAM:0"));
+ _tcscpy(devname_str, _T("PCMCIA SRAM:0"));
_tcscpy (volname_str, _T("PCMCIA"));
_tcscpy (bootpri_str, _T("n/a"));
} else if (ctype == HD_CONTROLLER_TYPE_PCMCIA_IDE) {
_tcscpy (blocksize_str, _T("n/a"));
- _tcscpy(devname_str, _T("IDE:0"));
+ _tcscpy(devname_str, _T("PCMCIA IDE:0"));
_tcscpy (volname_str, _T("PCMCIA"));
_tcscpy (bootpri_str, _T("n/a"));
} else if (type == FILESYS_HARDFILE) {
lvstruct.mask = LVIF_TEXT | LVIF_PARAM;
lvstruct.pszText = mi.ismedia == false ? _T("E") : (nosize && mi.size >= 0 ? _T("X") : (mi.ismounted ? _T("*") : _T(" ")));
+ if (mi.error == -1)
+ lvstruct.pszText = _T("?");
+ else if (mi.error == -2)
+ lvstruct.pszText = _T("!");
if (ci->controller_type != HD_CONTROLLER_TYPE_UAE && mi.ismedia)
lvstruct.pszText = _T(" ");
lvstruct.lParam = 0;
rtgz3size = gfxboard_is_z3 (workprefs.rtgmem_type) ? workprefs.rtgmem_size : 0;
size = ((workprefs.z3fastmem_size + sizealign) & ~sizealign) + ((workprefs.z3fastmem2_size + sizealign) & ~sizealign) +
((rtgz3size + sizealign) & ~sizealign);
- if (cfgfile_board_enabled(&currprefs.a4091rom))
+ if (cfgfile_board_enabled(&currprefs, ROMTYPE_A4091))
size += 2 * 16 * 1024 * 1024;
if (changed_prefs.mbresmem_high_size >= 128 * 1024 * 1024 && (size || workprefs.z3chipmem_size))
size += (changed_prefs.mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
}
if (maxmem <= 8 * 1024 * 1024)
SendDlgItemMessage (hDlg, IDC_CPUBOARDMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CB_MEM, MAX_CB_MEM_Z2));
+ else if (maxmem <= 16 * 1024 * 1024)
+ SendDlgItemMessage (hDlg, IDC_CPUBOARDMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CB_MEM, MAX_CB_MEM_16M));
else if (maxmem <= 128 * 1024 * 1024)
SendDlgItemMessage (hDlg, IDC_CPUBOARDMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CB_MEM, MAX_CB_MEM_128M));
else
if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_Z2) {
workprefs.fastmem2_size = workprefs.cpuboardmem1_size;
}
+ if (cpuboard_memorytype(&workprefs) == BOARD_MEMORY_25BITMEM) {
+ workprefs.mem25bit_size = workprefs.cpuboardmem1_size;
+ }
+ if (workprefs.cpuboard_type == 0)
+ workprefs.mem25bit_size = 0;
mem_size = 0;
switch (workprefs.fastmem_size) {
SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_RESETCONTENT, 0, 0);
SendDlgItemMessage (hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("-"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1230 IV"));
- SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1230 IV + SCSI"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1260"));
- SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 1260 + SCSI"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Blizzard 2060"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm MK I"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("CyberStorm MK II"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("GVP A3001 Series II"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Apollo 1240/1260"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("GVP A530"));
+ SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("GVP G-Force 030"));
setcpuboardmemsize(hDlg);
case WM_USER:
TCHAR tmp[MAX_DPATH];
TCHAR tmp2[MAX_DPATH];
TCHAR seltmp[MAX_DPATH];
- struct romdata *rdx;
+ struct romdata *rdx = NULL;
- rdx = scan_single_rom (path);
SendDlgItemMessage(hDlg, d, CB_RESETCONTENT, 0, 0);
SendDlgItemMessage(hDlg, d, CB_ADDSTRING, 0, (LPARAM)_T(""));
+ if (path)
+ rdx = scan_single_rom (path);
idx = 0;
seltmp[0] = 0;
for (;fkey;) {
static void values_from_kickstartdlg (HWND hDlg)
{
+ int index;
+ struct boardromconfig *brc;
+ TCHAR tmp[MAX_DPATH];
+
getromfile(hDlg, IDC_ROMFILE, workprefs.romfile, sizeof (workprefs.romfile) / sizeof (TCHAR));
getromfile(hDlg, IDC_ROMFILE2, workprefs.romextfile, sizeof (workprefs.romextfile) / sizeof (TCHAR));
getromfile(hDlg, IDC_CARTFILE, workprefs.cartfile, sizeof (workprefs.cartfile) / sizeof (TCHAR));
- getromfile(hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name, MAX_DPATH / sizeof (TCHAR));
- getromfile(hDlg, IDC_CPUBOARDROMFILE, workprefs.acceleratorromfile, sizeof(workprefs.acceleratorromfile) / sizeof(TCHAR));
+
+ getromfile(hDlg, IDC_SCSIROMFILE, tmp, MAX_DPATH / sizeof (TCHAR));
+ if (tmp[0]) {
+ brc = get_device_rom_new(&workprefs, expansionroms[scsiromselected].romtype, &index);
+ getromfile(hDlg, IDC_SCSIROMFILE, brc->roms[index].romfile, MAX_DPATH / sizeof (TCHAR));
+ } else {
+ clear_device_rom(&workprefs, expansionroms[scsiromselected].romtype);
+ }
+ getromfile(hDlg, IDC_CPUBOARDROMFILE, tmp, sizeof(brc->roms[index].romfile) / sizeof(TCHAR));
+ if (tmp[0]) {
+ brc = get_device_rom_new(&workprefs, ROMTYPE_CPUBOARD, &index);
+ getromfile(hDlg, IDC_CPUBOARDROMFILE, brc->roms[index].romfile, sizeof(brc->roms[index].romfile) / sizeof(TCHAR));
+ } else {
+ clear_device_rom(&workprefs, ROMTYPE_CPUBOARD);
+ }
}
static void values_to_kickstartdlg (HWND hDlg)
{
UAEREG *fkey;
+ int index;
+ struct boardromconfig *brc;
fkey = regcreatetree (NULL, _T("DetectedROMs"));
+
load_keyring(&workprefs, NULL);
+
addromfiles (fkey, hDlg, IDC_ROMFILE, workprefs.romfile,
ROMTYPE_KICK | ROMTYPE_KICKCD32, 0);
addromfiles (fkey, hDlg, IDC_ROMFILE2, workprefs.romextfile,
ROMTYPE_EXTCD32 | ROMTYPE_EXTCDTV | ROMTYPE_ARCADIABIOS, 0);
addromfiles (fkey, hDlg, IDC_CARTFILE, workprefs.cartfile,
ROMTYPE_FREEZER | ROMTYPE_ARCADIAGAME | ROMTYPE_CD32CART, 0);
- addromfiles (fkey, hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name,
- scsiromdata[scsiromselected].mask, 0);
- addromfiles(fkey, hDlg, IDC_CPUBOARDROMFILE, workprefs.acceleratorromfile,
+
+ brc = get_device_rom(&workprefs, expansionroms[scsiromselected].romtype, &index);
+ addromfiles (fkey, hDlg, IDC_SCSIROMFILE, brc ? brc->roms[index].romfile : NULL,
+ expansionroms[scsiromselected].romtype, 0);
+
+ brc = get_device_rom(&workprefs, ROMTYPE_CPUBOARD, &index);
+ addromfiles(fkey, hDlg, IDC_CPUBOARDROMFILE, brc ? brc->roms[index].romfile : NULL,
ROMTYPE_CPUBOARD, ROMTYPE_GVPS2);
+
regclosetree(fkey);
SetDlgItemText(hDlg, IDC_FLASHFILE, workprefs.flashfile);
ew(hDlg, IDC_CPUBOARDROMFILE, workprefs.cpuboard_type != 0);
SendDlgItemMessage(hDlg, IDC_SCSIROMSELECT, CB_RESETCONTENT, 0, 0);
- for (int i = 0; scsiromdata[i].device; i++)
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)scsiromdata[i].device);
+ for (int i = 0; expansionroms[i].name; i++) {
+ SendDlgItemMessage(hDlg, IDC_SCSIROMSELECT, CB_ADDSTRING, 0, (LPARAM)expansionroms[i].friendlyname);
+ }
int found = -1;
- for (int i = 0; scsiromdata[i].name; i++) {
- if (scsiromdata[i].name[0]) {
+ for (int i = 0; expansionroms[i].name; i++) {
+ int romtype = expansionroms[i].romtype;
+ if (cfgfile_board_enabled(&workprefs, romtype)) {
if (found == -1)
found = i;
else
case IDC_SCSIROMSELECT:
val = SendDlgItemMessage (hDlg, IDC_SCSIROMSELECT, CB_GETCURSEL, 0, 0L);
if (val != CB_ERR) {
+ int index;
+ struct boardromconfig *brc;
UAEREG *fkey = regcreatetree (NULL, _T("DetectedROMs"));
scsiromselected = val;
- addromfiles (fkey, hDlg, IDC_SCSIROMFILE, scsiromdata[scsiromselected].name,
- scsiromdata[scsiromselected].mask, 0);
+ brc = get_device_rom(&workprefs, expansionroms[scsiromselected].romtype, &index);
+ addromfiles (fkey, hDlg, IDC_SCSIROMFILE, brc ? brc->roms[index].romfile : NULL,
+ expansionroms[scsiromselected].romtype, 0);
regclosetree(fkey);
}
break;
memset (&hfd, 0, sizeof hfd);
hfd.ci.readonly = true;
hfd.ci.blocksize = 512;
- if (hdf_open (&hfd, current_hfdlg.ci.rootdir)) {
+ if (hdf_open (&hfd, current_hfdlg.ci.rootdir) > 0) {
for (i = 0; i < 16; i++) {
hdf_read_rdb (&hfd, id, i * 512, 512);
if (i == 0 && !memcmp (id + 2, "CIS", 3)) {
return current_hfdlg.ci.sectors == 0 && current_hfdlg.ci.surfaces == 0 && current_hfdlg.ci.reserved == 0;
}
+static int hdmenutable[256];
+
+static void gui_add_string(int *table, HWND hDlg, int item, int id, const TCHAR *str)
+{
+ while (*table >= 0)
+ table++;
+ *table++ = id;
+ *table = -1;
+ SendDlgItemMessage(hDlg, item, CB_ADDSTRING, 0, (LPARAM)str);
+}
+static void gui_set_string_cursor(int *table, HWND hDlg, int item, int id)
+{
+ int idx = 0;
+ while (*table >= 0) {
+ if (*table == id) {
+ SendDlgItemMessage(hDlg, item, CB_SETCURSEL, idx, 0);
+ return;
+ }
+ idx++;
+ table++;
+ }
+}
+static int gui_get_string_cursor(int *table, HWND hDlg, int item)
+{
+ int posn = SendDlgItemMessage (hDlg, item, CB_GETCURSEL, 0, 0);
+ if (posn < 0)
+ return CB_ERR;
+ return table[posn];
+}
+
static void sethardfile (HWND hDlg)
{
bool rdb = is_hdf_rdb ();
hide (hDlg, IDC_HDF_AUTOBOOT, !disables);
hide (hDlg, IDC_HDF_DONOTMOUNT, !disables);
ew (hDlg, IDC_HARDFILE_BOOTPRI, disables);
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_SETCURSEL, current_hfdlg.ci.controller_type, 0);
+ gui_set_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER, current_hfdlg.ci.controller_type);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_SETCURSEL, current_hfdlg.ci.controller_unit, 0);
}
static void inithdcontroller (HWND hDlg, int ctype, int devtype)
{
+ hdmenutable[0] = -1;
+
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_RESETCONTENT, 0, 0);
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("UAE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("IDE (Auto)"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Gayle/A4000 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("GVP A3001 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("AlfaPower/AT-Bus 2008 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("AlfaPower/AT-Bus 2008 #2 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Apollo IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Apollo #2 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Masoboshi IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Masoboshi #2 IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("SCSI (Auto)"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091 #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("GVP SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("GVP #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4091 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4091 #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Fastlane SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Fastlane #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Oktagon 2008 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Oktagon 2008 #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Apollo SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Apollo #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Masoboshi SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Masoboshi #2 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A3000 SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A4000T SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("CDTV SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Accelerator board SCSI"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("PCMCIA SRAM"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("PCMCIA IDE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_SETCURSEL, ctype, 0);
+
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_UAE, _T("UAE"));
+
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, 0, _T(""));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_IDE_AUTO, _T("IDE (Auto)"));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_IDE_MB, _T("A600/A1200/A4000"));
+
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *erc = &expansionroms[i];
+ if (erc->deviceflags & EXPANSIONTYPE_IDE)
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST + i, erc->friendlyname);
+ }
+
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, 0, _T(""));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_SCSI_AUTO, _T("SCSI (Auto)"));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_SCSI_A3000, _T("A3000"));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_SCSI_A4000T, _T("A4000T"));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_SCSI_CDTV, _T("CDTV"));
+
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *erc = &expansionroms[i];
+ if (erc->deviceflags & EXPANSIONTYPE_SCSI)
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST + i, erc->friendlyname);
+ }
+
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, 0, _T(""));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_PCMCIA_SRAM, _T("PCMCIA SRAM"));
+ gui_add_string(hdmenutable, hDlg, IDC_HDF_CONTROLLER, HD_CONTROLLER_TYPE_PCMCIA_IDE, _T("PCMCIA IDE"));
+
+ gui_set_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER, ctype);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_RESETCONTENT, 0, 0);
if (ctype >= HD_CONTROLLER_TYPE_IDE_FIRST && ctype <= HD_CONTROLLER_TYPE_SCSI_LAST) {
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("4"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("5"));
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("6"));
- if (devtype == UAEDEV_HDF && (ctype == HD_CONTROLLER_TYPE_SCSI_A2091 || ctype == HD_CONTROLLER_TYPE_SCSI_A2091_2))
+ const struct expansionromtype *ert = get_unit_expansion_rom(ctype);
+ if (devtype == UAEDEV_HDF && ert && !_tcscmp(ert->name, _T("a2091")))
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("XT"));
}
ew(hDlg, IDC_HDF_CONTROLLER_UNIT, TRUE);
hfd.ci.blocksize = blocksize;
current_hfdlg.size = 0;
current_hfdlg.dostype = 0;
- if (hdf_open (&hfd, current_hfdlg.ci.rootdir)) {
+ if (hdf_open (&hfd, current_hfdlg.ci.rootdir) > 0) {
open = true;
for (i = 0; i < 16; i++) {
hdf_read (&hfd, id, i * 512, 512);
EndDialog (hDlg, 0);
break;
case IDC_HDF_CONTROLLER:
- posn = SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_GETCURSEL, 0, 0);
+ posn = gui_get_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER);
if (posn != CB_ERR) {
current_tapedlg.ci.controller_type = posn;
inithdcontroller(hDlg, current_tapedlg.ci.controller_type, UAEDEV_TAPE);
case WM_INITDIALOG:
recursive++;
if (current_cddlg.ci.controller_type == HD_CONTROLLER_TYPE_UAE)
- current_cddlg.ci.controller_type = (cfgfile_board_enabled(&workprefs.a2091rom) ||
- cfgfile_board_enabled(&workprefs.gvps2rom) || cfgfile_board_enabled(&workprefs.a4091rom) ||
+ current_cddlg.ci.controller_type = (cfgfile_board_enabled(&workprefs, ROMTYPE_A2091) ||
+ cfgfile_board_enabled(&workprefs, ROMTYPE_GVPS2) || cfgfile_board_enabled(&workprefs, ROMTYPE_A4091) ||
workprefs.cs_cdtvscsi ||
(workprefs.cs_mbdmac & 3)) ? HD_CONTROLLER_TYPE_SCSI_AUTO : HD_CONTROLLER_TYPE_IDE_AUTO;
inithdcontroller(hDlg, current_cddlg.ci.controller_type, UAEDEV_CD);
EndDialog (hDlg, 0);
break;
case IDC_HDF_CONTROLLER:
- posn = SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_GETCURSEL, 0, 0);
+ posn = gui_get_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER);
if (posn != CB_ERR) {
current_cddlg.ci.controller_type = posn;
inithdcontroller(hDlg, current_cddlg.ci.controller_type, UAEDEV_CD);
}
break;
case IDC_HDF_CONTROLLER:
- posn = SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_GETCURSEL, 0, 0);
+ posn = gui_get_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER);
if (posn != CB_ERR) {
current_hfdlg.ci.controller_type = posn;
inithdcontroller(hDlg, current_hfdlg.ci.controller_type, UAEDEV_HDF);
}
if (index >= 0) {
SendDlgItemMessage (hDlg, IDC_HARDDRIVE, CB_SETCURSEL, index, 0);
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_SETCURSEL, current_hfdlg.ci.controller_type, 0);
+ gui_set_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER, current_hfdlg.ci.controller_type);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_SETCURSEL, current_hfdlg.ci.controller_unit, 0);
}
recursive--;
SetDlgItemText (hDlg, IDC_HDFINFO, _T(""));
SetDlgItemText (hDlg, IDC_HDFINFO2, _T(""));
updatehdfinfo (hDlg, true, true);
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_SETCURSEL, current_hfdlg.ci.controller_type, 0);
+ gui_set_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER, current_hfdlg.ci.controller_type);
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_SETCURSEL, current_hfdlg.ci.controller_unit, 0);
CheckDlgButton(hDlg, IDC_HDF_RW, !current_hfdlg.ci.readonly);
_tcscpy (current_hfdlg.ci.rootdir, hdf_getnameharddrive ((int)posn, 4, ¤t_hfdlg.ci.blocksize, NULL));
}
}
} else if (LOWORD (wParam) == IDC_HDF_CONTROLLER) {
- posn = SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER, CB_GETCURSEL, 0, 0);
+ posn = gui_get_string_cursor(hdmenutable, hDlg, IDC_HDF_CONTROLLER);
if (posn != CB_ERR && current_hfdlg.ci.controller_type != posn) {
current_hfdlg.ci.controller_type = posn;
current_hfdlg.forcedcylinders = 0;
* http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR53C9X.txt
*/
+#define TYPE_ESP "esp"
+//#define ESP(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP)
+#define ESP(obj) (ESPState*)obj->lsistate
+
static void esp_raise_irq(ESPState *s)
{
if (!(s->rregs[ESP_RSTAT] & STAT_INT)) {
}
}
+bool esp_dreq(DeviceState *dev)
+{
+ ESPState *s = ESP(dev);
+ return s->dma_cb != NULL;
+}
+
static int handle_ti(ESPState *s)
{
uint32_t dmalen, minlen;
};
#endif
-#define TYPE_ESP "esp"
-//#define ESP(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP)
-#define ESP(obj) (ESPState*)obj->lsistate
-
typedef struct {
/*< private >*/
SysBusDevice parent_obj;
{
DPRINTF("Reset\n");
s->carry = 0;
- memset (s, 0, sizeof(LSIState710));
-
s->msg_action = 0;
s->msg_len = 0;
s->waiting = 0;
s->dbc = 0;
s->temp = 0;
s->scratch = 0;
- s->istat = 0;
+ // reset bit does not reset
+ s->istat &= 0x40;
s->dcmd = 0x40;
s->dstat = LSI_DSTAT_DFE;
s->dien = 0;
-// s->sist0 = 0;
-// s->sist1 = 0;
s->sien0 = 0;
-// s->sien1 = 0;
s->ctest2 = LSI_CTEST2_DACK;
s->ctest3 = 0;
s->ctest4 = 0;
lsi_execute_script(s);
}
if (val & LSI_ISTAT_RST) {
- ;//qdev_reset_all(DEVICE(s));
+ lsi_soft_reset(s);
}
break;
case 0x22: /* CTEST8 */
{
LSIState710 *s = LSI53C895A(dev);
+ memset (s, 0, sizeof(LSIState710));
lsi_soft_reset(s);
s->bus.privdata = privdata;
}
void esp_transfer_data(SCSIRequest *req, uint32_t len);
void esp_scsi_init(DeviceState *dev, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write);
void esp_scsi_reset(DeviceState *dev, void *privdata);
+bool esp_dreq(DeviceState *dev);
+
#endif
#include "options.h"
#include "uae.h"
#include "gui.h"
-#include "rommgr.h"
#include "memory.h"
+#include "rommgr.h"
#include "zfile.h"
#include "crc32.h"
#include "fsdb.h"
#include "autoconf.h"
+#include "filesys.h"
#define SAVE_ROM 0
return NULL;
}
-#define NEXT_ROM_ID 121
+#define NEXT_ROM_ID 122
static struct romheader romheaders[] = {
{ _T("Freezer Cartridges"), 1 },
0x00000000, 0, 0, 0, 0, 0 },
{ _T("A4091 ROM 40.13"), 40, 13, 40, 13, _T("A4091\0"), 32768, 58, 0, 0, ROMTYPE_A4091, 0, 0, _T("391592-02"),
0x54cb9e85, 0x3CE66919,0xF6FD6797,0x4923A12D,0x91B730F1,0xFFB4A7BA },
+ { _T("SupraDrive AMAB6"), 3, 8, 3, 8, _T("SUPRA\0"), 16384, 121, 0, 0, ROMTYPE_SUPRA, 0, 0, _T("AMAB6"),
+ 0xf40bd349, 0x82168556,0x07525067,0xe9263431,0x1fb9c347,0xe737f247 },
{ _T("Blizzard 1230-IV ROM"), 0, 0, 0, 0, _T("B1230\0"), 32768, 89, 0, 0, ROMTYPE_CPUBOARD, 0, 0, NULL,
0x3078dbdc, 0x4d3e7fd0,0xa1a4c3ae,0xe17c5de3,0xcbe1af03,0x447aff92 },
if (rd->type & (ROMTYPE_CD32CART | ROMTYPE_ARCADIAGAME | ROMTYPE_HRTMON | ROMTYPE_XPOWER | ROMTYPE_NORDIC | ROMTYPE_AR | ROMTYPE_SUPERIV))
_tcscpy (p->cartfile, path);
if (rd->type & ROMTYPE_CPUBOARD)
- _tcscpy (p->acceleratorromfile, path);
+ set_device_rom(p, path, ROMTYPE_CPUBOARD);
if (rd->type & ROMTYPE_CPUBOARDEXT)
- _tcscpy (p->acceleratorextromfile, path);
+ set_device_rom(p, path, ROMTYPE_CPUBOARDEXT);
return 1;
}
+
+void set_device_rom(struct uae_prefs *p, const TCHAR *path, int romtype)
+{
+ int idx;
+ const struct expansionromtype *ert = get_device_expansion_rom(romtype);
+ if (path == NULL) {
+ struct boardromconfig *brc = get_device_rom(p, romtype, &idx);
+ if (brc) {
+ brc->roms[idx].romfile[0] = 0;
+ brc->roms[idx].romident[0] = 0;
+ }
+ } else {
+ struct boardromconfig *brc = get_device_rom_new(p, romtype, &idx);
+ _tcscpy(brc->roms[idx].romfile, path);
+ }
+}
+
+const struct expansionromtype *get_unit_expansion_rom(int hdunit)
+{
+ if (hdunit >= HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST && hdunit <= HD_CONTROLLER_TYPE_SCSI_LAST)
+ return &expansionroms[hdunit - HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST];
+ if (hdunit >= HD_CONTROLLER_TYPE_IDE_EXPANSION_FIRST && hdunit <= HD_CONTROLLER_TYPE_IDE_LAST)
+ return &expansionroms[hdunit - HD_CONTROLLER_TYPE_SCSI_EXPANSION_FIRST];
+ return NULL;
+}
+
+const struct expansionromtype *get_device_expansion_rom(int romtype)
+{
+ for (int i = 0; expansionroms[i].name; i++) {
+ const struct expansionromtype *ert = &expansionroms[i];
+ if ((ert->romtype & ROMTYPE_MASK) == (romtype & ROMTYPE_MASK))
+ return ert;
+ }
+ return NULL;
+}
+
+struct boardromconfig *get_device_rom_new(struct uae_prefs *p, int romtype, int *index)
+{
+ int idx2;
+ static struct boardromconfig fake;
+ const struct expansionromtype *ert = get_device_expansion_rom(romtype);
+ if (!ert) {
+ *index = 0;
+ return &fake;
+ }
+ *index = ert->parentromtype ? 1 : 0;
+ struct boardromconfig *brc = get_device_rom(p, ert->parentromtype ? ert->parentromtype : romtype, &idx2);
+ if (!brc) {
+ for (int i = 0; i < MAX_EXPANSION_BOARDS; i++) {
+ brc = &p->expansionboard[i];
+ if (brc->device_type == 0)
+ continue;
+ int ok = 0;
+ for (int j = 0; j < MAX_BOARD_ROMS; j++) {
+ if (!brc->roms[j].romfile[0] && !brc->roms[j].romident[0] && !brc->roms[j].board_ram_size)
+ ok++;
+ }
+ if (ok == MAX_BOARD_ROMS)
+ memset(brc, 0, sizeof boardromconfig);
+ }
+ for (int i = 0; i < MAX_EXPANSION_BOARDS; i++) {
+ brc = &p->expansionboard[i];
+ if (brc->device_type == 0) {
+ memset(brc, 0, sizeof boardromconfig);
+ brc->device_type = romtype;
+ return brc;
+ }
+ }
+ return &fake;
+ }
+ return brc;
+}
+
+void clear_device_rom(struct uae_prefs *p, int romtype)
+{
+ int index;
+ struct boardromconfig *brc = get_device_rom(p, romtype, &index);
+ if (!brc)
+ return;
+ memset(&brc->roms[index], 0, sizeof(struct romconfig));
+}
+
+struct boardromconfig *get_device_rom(struct uae_prefs *p, int romtype, int *index)
+{
+ const struct expansionromtype *ert = get_device_expansion_rom(romtype);
+ if (!ert) {
+ *index = 0;
+ return NULL;
+ }
+ int parentrom = ert->parentromtype ? ert->parentromtype : romtype;
+ *index = ert->parentromtype ? 1 : 0;
+ for (int i = 0; i < MAX_EXPANSION_BOARDS; i++) {
+ struct boardromconfig *brc = &p->expansionboard[i];
+ if ((brc->device_type & ROMTYPE_MASK) == (parentrom & ROMTYPE_MASK))
+ return brc;
+ }
+ return NULL;
+}
+
+struct zfile *read_device_rom(struct uae_prefs *p, int devnum, int romtype, int *roms)
+{
+ int idx;
+ if (devnum)
+ return NULL;
+ struct boardromconfig *brc = get_device_rom(p, romtype, &idx);
+ if (brc) {
+ const TCHAR *romname = brc->roms[idx].romfile;
+ struct zfile *z = read_rom_name (romname);
+ if (!z) {
+ struct romlist *rl = getromlistbyids(roms, romname);
+ if (rl) {
+ struct romdata *rd = rl->rd;
+ z = read_rom (rd);
+ }
+ }
+ return z;
+ }
+ return NULL;
+}
+
+int is_device_rom(struct uae_prefs *p, int devnum, int romtype)
+{
+ int idx;
+ if (devnum)
+ return 0;
+ struct boardromconfig *brc = get_device_rom(p, romtype, &idx);
+ if (brc) {
+ const TCHAR *romname = brc->roms[idx].romfile;
+ if (_tcslen(romname) == 0)
+ return -1;
+ if (!_tcsicmp(romname, _T(":NOROM")))
+ return 0;
+ return 1;
+ }
+ return 0;
+}
#include "sysdeps.h"
#include "options.h"
-#include "scsi.h"
#include "filesys.h"
#include "blkdev.h"
#include "zfile.h"
#include "debug.h"
+#include "memory.h"
+#include "scsi.h"
+#include "autoconf.h"
+#include "rommgr.h"
+#include "newcpu.h"
+#include "custom.h"
#define SCSI_EMU_DEBUG 0
#define RAW_SCSI_DEBUG 0
+#define NCR5380_DEBUG 0
+
+#define NCR5380_SUPRA 1
extern int log_scsiemu;
}
}
-
// raw scsi
#define SCSI_IO_BUSY 0x80
int io;
int bus_phase;
bool atn;
+ bool ack;
+ bool use_ack;
uae_u8 data;
int initiator_id, target_id;
struct scsi_data *device[8];
struct scsi_data *target;
};
+struct ncr5380_scsi
+{
+ uae_u8 regs[8];
+ struct raw_scsi rscsi;
+ bool irq;
+ bool enabled;
+ bool configured;
+ uae_u8 acmemory[128];
+ uae_u8 *rom;
+ int board_mask;
+ int board_size;
+ addrbank *bank;
+ int type;
+ int dma_direction;
+};
+
void raw_scsi_reset(struct raw_scsi *rs)
{
rs->target = NULL;
static int getbit(uae_u8 v)
{
- for (int i = 0; i < 8; i++) {
+ for (int i = 7; i >= 0; i--) {
if ((1 << i) & v)
return i;
}
return -1;
}
+void raw_scsi_set_ack(struct raw_scsi *rs, bool ack)
+{
+ rs->ack = ack;
+}
+
void raw_scsi_set_signal_phase(struct raw_scsi *rs, bool busy, bool select, bool atn)
{
switch (rs->bus_phase)
case SCSI_SIGNAL_PHASE_FREE:
if (busy && !select) {
rs->bus_phase = SCSI_SIGNAL_PHASE_ARBIT;
+ rs->initiator_id = getbit(rs->data);
+ write_log(_T("raw_scsi: arbitration initiator id %d\n"), rs->initiator_id);
+ } else if (!busy && select) {
+ rs->initiator_id = getbit(rs->data);
+ rs->bus_phase = SCSI_SIGNAL_PHASE_SELECT_1;
+ raw_scsi_set_signal_phase(rs, busy, select, atn);
}
break;
case SCSI_SIGNAL_PHASE_ARBIT:
uae_u8 v = rs->io;
if (rs->bus_phase >= 0)
v |= rs->bus_phase;
+ if (rs->ack)
+ v &= ~SCSI_IO_REQ;
return v;
}
case SCSI_SIGNAL_PHASE_STATUS:
#if RAW_SCSI_DEBUG
write_log(_T("raw_scsi: status byte read %02x\n"), sd->status);
+#endif
+ v = sd->status;
+ sd->status = 0;
+ rs->bus_phase = SCSI_SIGNAL_PHASE_MESSAGE_IN;
+ break;
+ case SCSI_SIGNAL_PHASE_MESSAGE_IN:
+#if RAW_SCSI_DEBUG
+ write_log(_T("raw_scsi: message byte read %02x\n"), sd->status);
#endif
v = sd->status;
bus_free(rs);
rs->data = data;
switch (rs->bus_phase)
{
- case SCSI_SIGNAL_PHASE_ARBIT:
- rs->initiator_id = getbit(data);
- write_log(_T("raw_scsi: arbitration initiator id %d\n"), rs->initiator_id);
- break;
case SCSI_SIGNAL_PHASE_SELECT_1:
+ case SCSI_SIGNAL_PHASE_FREE:
break;
case SCSI_SIGNAL_PHASE_COMMAND:
sd->cmd[sd->offset++] = data;
}
}
+// APOLLO SOFTSCSI
+
struct apollo_soft_scsi
{
bool enabled;
(v & 32) != 0,
false);
} else if (bank == 0x400 && (addr & 1)) {
- raw_scsi_set_signal_phase(rs, true, false, false);
raw_scsi_put_data(rs, v);
+ raw_scsi_set_signal_phase(rs, true, false, false);
}
//write_log(_T("apollo scsi put %04x = %02x\n"), addr, v);
}
return v;
}
-int apollo_add_scsi_unit(int ch, struct uaedev_config_info *ci, int devnum)
+int apollo_add_scsi_unit(int ch, struct uaedev_config_info *ci)
{
- struct raw_scsi *rs = &apolloscsi[devnum].rscsi;
+ struct raw_scsi *rs = &apolloscsi[ci->controller_type_unit].rscsi;
raw_scsi_reset(rs);
if (ci->type == UAEDEV_CD)
return add_scsi_cd(rs->device, ch, ci->device_emu_unit);
{
raw_scsi_reset(&apolloscsi[0].rscsi);
raw_scsi_reset(&apolloscsi[1].rscsi);
-}
\ No newline at end of file
+}
+
+
+static struct ncr5380_scsi suprascsi[2];
+
+static struct ncr5380_scsi *ncr5380devices[] =
+{
+ &suprascsi[0],
+ &suprascsi[1],
+ NULL
+};
+
+// NCR 53C80
+
+void ncr80_rethink(void)
+{
+ for (int i = 0; ncr5380devices[i]; i++) {
+ if (ncr5380devices[i]->irq) {
+ INTREQ_0(0x8000 | 0x0008);
+ return;
+ }
+ }
+}
+static void ncr5380_set_irq(struct ncr5380_scsi *scsi)
+{
+ scsi->irq = true;
+ scsi->regs[5] |= 1 << 4;
+ ncr80_rethink();
+}
+
+static void ncr5380_check_phase(struct ncr5380_scsi *scsi)
+{
+ if (!(scsi->regs[2] & 2))
+ return;
+ if (scsi->regs[2] & 0x40)
+ return;
+ if (scsi->rscsi.bus_phase != (scsi->regs[3] & 7)) {
+ scsi->regs[5] |= 0x80; // end of dma
+ scsi->regs[3] |= 0x80;
+ ncr5380_set_irq(scsi);
+ }
+}
+
+
+uae_u8 ncr5380_bget(struct ncr5380_scsi *scsi, int reg)
+{
+ reg &= 7;
+ uae_u8 v = scsi->regs[reg];
+ struct raw_scsi *r = &scsi->rscsi;
+ switch(reg)
+ {
+ case 4:
+ {
+ uae_u8 t = raw_scsi_get_signal_phase(r);
+ v = 0;
+ if (t & SCSI_IO_BUSY)
+ v |= 1 << 6;
+ if (t & SCSI_IO_REQ)
+ v |= 1 << 5;
+ if (t & SCSI_IO_SEL)
+ v |= 1 << 1;
+ if (r->bus_phase >= 0)
+ v |= r->bus_phase << 2;
+ }
+ break;
+ case 5:
+ {
+ uae_u8 t = raw_scsi_get_signal_phase(r);
+ v &= (0x80 | 0x40 | 0x20 | 0x04);
+ if (t & SCSI_IO_ATN)
+ v |= 1 << 1;
+ if (r->bus_phase == (scsi->regs[3] & 7)) {
+ v |= 1 << 3;
+ }
+ if (scsi->irq) {
+ v |= 1 << 4;
+ }
+ if (t & SCSI_IO_REQ) {
+ v |= 1 << 6;
+ }
+ }
+ break;
+ case 0:
+ case 6:
+ v = raw_scsi_get_data(r);
+ break;
+ case 7:
+ scsi->irq = false;
+ break;
+ }
+ ncr5380_check_phase(scsi);
+ return v;
+}
+void ncr5380_bput(struct ncr5380_scsi *scsi, int reg, uae_u8 v)
+{
+ struct raw_scsi *r = &scsi->rscsi;
+ reg &= 7;
+ uae_u8 old = scsi->regs[reg];
+ scsi->regs[reg] = v;
+ switch(reg)
+ {
+ case 0:
+ raw_scsi_put_data(r, v);
+ break;
+ case 1:
+ scsi->regs[reg] &= ~((1 << 5) | (1 << 6));
+ scsi->regs[reg] |= old & ((1 << 5) | (1 << 6)); // AIP, LA
+ if (!(v & 0x40)) {
+ raw_scsi_set_signal_phase(r,
+ (v & (1 << 3)) != 0,
+ (v & (1 << 2)) != 0,
+ (v & (1 << 1)) != 0);
+ raw_scsi_set_ack(r, (v & (1 << 4)) != 0);
+ }
+ if (v & 0x80) { // RST
+ scsi->irq = true;
+ memset(scsi->regs, 0, sizeof scsi->regs);
+ scsi->regs[reg] = 0x80;
+ }
+ break;
+ case 2:
+ if ((v & 1) && !(old & 1)) { // Arbitrate
+ raw_scsi_set_signal_phase(r, true, false, false);
+ scsi->regs[1] |= 1 << 6; // AIP
+ } else if (!(v & 1) && (old & 1)) {
+ scsi->regs[1] &= ~(1 << 6);
+ }
+ if (!(v & 2)) {
+ scsi->regs[2] &= ~(0x80 | 0x40);
+ scsi->dma_direction = 0;
+ }
+ break;
+ case 5:
+ scsi->regs[reg] = old;
+#if NCR5380_DEBUG
+ write_log(_T("DMA send\n"));
+#endif
+ break;
+ case 6:
+ scsi->dma_direction = 1;
+#if NCR5380_DEBUG
+ write_log(_T("DMA target recv\n"));
+#endif
+ break;
+ case 7:
+ scsi->dma_direction = -1;
+#if NCR5380_DEBUG
+ write_log(_T("DMA initiator recv\n"));
+#endif
+ break;
+ }
+ ncr5380_check_phase(scsi);
+}
+
+static void ew(struct ncr5380_scsi *scsi, int addr, uae_u32 value)
+{
+ addr &= 0xffff;
+ if (addr == 00 || addr == 02 || addr == 0x40 || addr == 0x42) {
+ scsi->acmemory[addr] = (value & 0xf0);
+ scsi->acmemory[addr + 2] = (value & 0x0f) << 4;
+ } else {
+ scsi->acmemory[addr] = ~(value & 0xf0);
+ scsi->acmemory[addr + 2] = ~((value & 0x0f) << 4);
+ }
+}
+
+static int suprareg(struct ncr5380_scsi *ncr, uaecptr addr, bool write)
+{
+ int reg = (addr & 0x1f) >> 1;
+ if (addr & 0x20) {
+ if (!write)
+ reg = 6;
+ else
+ reg = 0;
+ if (!(ncr->regs[2] & 2))
+ cpu_halt(6);
+ }
+ return reg;
+}
+
+static uae_u32 ncr80_bget2(struct ncr5380_scsi *ncr, uaecptr addr)
+{
+ int reg = -1;
+ uae_u32 v = 0;
+
+ addr &= ncr->board_mask;
+
+ if (ncr->type == NCR5380_SUPRA) {
+
+ if (addr & 1) {
+ v = 0xff;
+ } else if (addr & 0x8000) {
+ v = ncr->rom[addr & 0x7fff];
+ } else {
+ reg = suprareg(ncr, addr, false);
+ if (reg >= 0)
+ v = ncr5380_bget(ncr, reg);
+ }
+ }
+
+#if NCR5380_DEBUG > 1
+ if (addr < 0x8000)
+ write_log(_T("GET %08x %02x %d %08x\n"), addr, v, reg, M68K_GETPC);
+#endif
+
+ return v;
+}
+
+static void ncr80_bput2(struct ncr5380_scsi *ncr, uaecptr addr, uae_u32 val)
+{
+ int reg = -1;
+ addr &= ncr->board_mask;
+
+ if (!(addr & 0x8001)) {
+ reg = suprareg(ncr, addr, true);
+ if (reg >= 0)
+ ncr5380_bput(ncr, reg, val);
+ }
+#if NCR5380_DEBUG > 1
+ write_log(_T("PUT %08x %02x %d %08x\n"), addr, val, reg, M68K_GETPC);
+#endif
+}
+
+static uae_u32 REGPARAM2 ncr80_lget(struct ncr5380_scsi *ncr, uaecptr addr)
+{
+ uae_u32 v;
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ addr &= ncr->board_mask;
+ v = ncr80_bget2(ncr, addr + 0) << 24;
+ v |= ncr80_bget2(ncr, addr + 1) << 16;
+ v |= ncr80_bget2(ncr, addr + 2) << 8;
+ v |= ncr80_bget2(ncr, addr + 3) << 0;
+ return v;
+}
+
+static uae_u32 REGPARAM2 ncr80_wget(struct ncr5380_scsi *ncr, uaecptr addr)
+{
+ uae_u32 v;
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ addr &= ncr->board_mask;
+ v = ncr80_bget2(ncr, addr) << 8;
+ v |= ncr80_bget2(ncr, addr + 1);
+ return v;
+}
+
+static uae_u32 REGPARAM2 ncr80_bget(struct ncr5380_scsi *ncr, uaecptr addr)
+{
+ uae_u32 v;
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ addr &= ncr->board_mask;
+ if (!ncr->configured) {
+ addr &= 65535;
+ if (addr >= sizeof ncr->acmemory)
+ return 0;
+ return ncr->acmemory[addr];
+ }
+ v = ncr80_bget2(ncr, addr);
+ return v;
+}
+
+static void REGPARAM2 ncr80_lput(struct ncr5380_scsi *ncr, uaecptr addr, uae_u32 l)
+{
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ addr &= ncr->board_mask;
+ ncr80_bput2(ncr, addr + 0, l >> 24);
+ ncr80_bput2(ncr, addr + 1, l >> 16);
+ ncr80_bput2(ncr, addr + 2, l >> 8);
+ ncr80_bput2(ncr, addr + 3, l >> 0);
+}
+
+static void REGPARAM2 ncr80_wput(struct ncr5380_scsi *ncr, uaecptr addr, uae_u32 w)
+{
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ w &= 0xffff;
+ addr &= ncr->board_mask;
+ if (!ncr->configured) {
+ return;
+ }
+ ncr80_bput2(ncr, addr, w >> 8);
+ ncr80_bput2(ncr, addr + 1, w);
+}
+
+static void REGPARAM2 ncr80_bput(struct ncr5380_scsi *ncr, uaecptr addr, uae_u32 b)
+{
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ b &= 0xff;
+ addr &= ncr->board_mask;
+ if (!ncr->configured) {
+ addr &= 65535;
+ switch (addr)
+ {
+ case 0x48:
+ map_banks (ncr->bank, expamem_z2_pointer >> 16, ncr->board_size >> 16, 0);
+ ncr->configured = 1;
+ expamem_next (ncr->bank, NULL);
+ break;
+ case 0x4c:
+ ncr->configured = 1;
+ expamem_shutup(ncr->bank);
+ break;
+ }
+ return;
+ }
+ ncr80_bput2(ncr, addr, b);
+}
+
+
+SCSI_MEMORY_FUNCTIONS(ncr_supra, ncr80, suprascsi[0]);
+SCSI_MEMORY_FUNCTIONS(ncr2_supra, ncr80, suprascsi[1]);
+DECLARE_MEMORY_FUNCTIONS(ncr_supra)
+static addrbank ncr_bank_supra = {
+ ncr_supra_lget, ncr_supra_wget, ncr_supra_bget,
+ ncr_supra_lput, ncr_supra_wput, ncr_supra_bput,
+ default_xlate, default_check, NULL, NULL, _T("Supra"),
+ dummy_lgeti, dummy_wgeti, ABFLAG_IO
+};
+
+#define SUPRA_ROM_OFFSET 0x8000
+
+static const uae_u8 supra_autoconfig[16] = { 0xd1, 13, 0x00, 0x00, 0x04, 0x20, 0x00, 0x00, 0x00, 0x00, SUPRA_ROM_OFFSET >> 8, SUPRA_ROM_OFFSET & 0xff };
+
+addrbank *supra_init(int devnum)
+{
+ struct ncr5380_scsi *scsi = &suprascsi[devnum];
+ int roms[2];
+
+ if (devnum > 0 && !scsi->enabled)
+ return &expamem_null;
+
+ roms[0] = 121;
+ roms[1] = -1;
+
+ memset(scsi->acmemory, 0xff, sizeof scsi->acmemory);
+
+ scsi->board_size = 65536;
+ scsi->board_mask = scsi->board_size - 1;
+ scsi->bank = &ncr_bank_supra;
+ scsi->rom = xcalloc(uae_u8, 2 * 16384);
+ scsi->type = NCR5380_SUPRA;
+ memset(scsi->rom, 0xff, 2 * 16384);
+
+ struct zfile *z = read_device_rom(&currprefs, devnum, ROMTYPE_SUPRA, roms);
+ for (int i = 0; i < 16; i++) {
+ uae_u8 b = supra_autoconfig[i];
+ ew(scsi, i * 4, b);
+ }
+ if (z) {
+ write_log(_T("SUPRA BOOT ROM '%s'\n"), zfile_getname(z));
+ for (int i = 0; i < 16384; i++) {
+ uae_u8 b;
+ zfile_fread(&b, 1, 1, z);
+ scsi->rom[i * 2 + 0] = b;
+ }
+ zfile_fclose(z);
+ } else {
+ romwarning(roms);
+ }
+ return scsi->bank;
+}
+
+int supra_add_scsi_unit(int ch, struct uaedev_config_info *ci)
+{
+ struct raw_scsi *rs = &suprascsi[ci->controller_type_unit].rscsi;
+ raw_scsi_reset(rs);
+ if (ci->type == UAEDEV_CD)
+ return add_scsi_cd(rs->device, ch, ci->device_emu_unit);
+ else if (ci->type == UAEDEV_TAPE)
+ return add_scsi_tape(rs->device, ch, ci->rootdir, ci->readonly);
+ else
+ return add_scsi_hd(rs->device, ch, NULL, ci, 1);
+ return 0;
+}
+
+void ncr5380scsi_free(void)
+{
+ for (int i = 0; ncr5380devices[i]; i++) {
+ struct raw_scsi *rs = &ncr5380devices[i]->rscsi;
+ for (int j = 0; j < 8; j++) {
+ free_scsi (rs->device[j]);
+ rs->device[j] = NULL;
+ }
+ }
+}
+
+void ncr5380scsi_reset(void)
+{
+ for (int i = 0; ncr5380devices[i]; i++) {
+ raw_scsi_reset(&ncr5380devices[i]->rscsi);
+ }
+}
#include "options.h"
#include "filesys.h"
-#include "scsi.h"
#include "blkdev.h"
#include "zfile.h"
#include "memory.h"
+#include "scsi.h"
#include "threaddep/thread.h"
#include "a2091.h"
#include "fsdb.h"
}
}
-addrbank *sndboard_init(void)
+addrbank *sndboard_init(int devnum)
{
memset(ad1848_regs, 0, sizeof ad1848_regs);
ad1848_regs[2] = 0x80;
projects / francis / winuae.git / commitdiff