static uae_u16 cregs[256];
uae_u16 intena, intreq;
+static uae_u16 intena2, intreq2;
uae_u16 dmacon;
uae_u16 adkcon; /* used by audio code */
uae_u16 last_custom_value;
}
return lvl;
}
- uae_u16 imask = intreq & intena;
- if (!(imask && (intena & 0x4000)))
+ uae_u16 imask = intreq2 & intena2;
+ if (!(imask && (intena2 & 0x4000)))
return -1;
if (imask & (0x4000 | 0x2000)) // 13 14
return 6;
devices_rethink();
}
-static void intreq_checks(uae_u16 old)
+static void intreq_checks(uae_u16 oldreq, uae_u16 newreq)
{
- if ((old & 0x0800) && !(intreq & 0x0800)) {
+ if ((oldreq & 0x0800) && !(newreq & 0x0800)) {
serial_rbf_clear();
}
}
static void doint_delay_do_ext(uae_u32 v)
{
- uae_u16 old = intreq;
+ uae_u16 old = intreq2;
setclr(&intreq, (1 << v) | 0x8000);
- intreq_checks(old);
+ setclr(&intreq2, (1 << v) | 0x8000);
+ intreq_checks(old, intreq2);
doint();
}
static void doint_delay_do_intreq(uae_u32 v)
{
- uae_u16 old = intreq;
- setclr(&intreq, v);
- intreq_checks(old);
+ uae_u16 old = intreq2;
+ setclr(&intreq2, v);
+ intreq_checks(old, intreq2);
doint();
}
static void doint_delay_do_intena(uae_u32 v)
{
+ setclr(&intena2, v);
+
doint();
}
{
uae_u16 old = intreq;
setclr(&intreq, v);
- intreq_checks(old);
+ intreq2 = intreq;
+ intreq_checks(old, intreq);
doint();
}
{
uae_u16 old = intreq;
setclr(&intreq, v);
- intreq_checks(old);
+ intreq2 = intreq;
+ intreq_checks(old, intreq);
}
bool INTREQ_0(uae_u16 v)
uae_u16 old = intreq;
setclr(&intreq, v);
- //write_log("%04x %04x -> %04x %08x\n", v, old, intreq, M68K_GETPC);
-
- intreq_checks(old);
-
if (old != intreq) {
doint_delay_intreq(v);
}
}
}
#ifdef DEBUGGER
- if (debug_copper && !cop_state.ignore_next) {
+ if (debug_copper && cop_state.ignore_next <= 0) {
uaecptr next = 0xffffffff;
if (reg == 0x88) {
next = cop1lc;
// Wait finished, request IR1.
case COP_wait:
{
+ if (copper_cant_read(hpos, CYCLE_PIPE_COPPER | 0x04)) {
+ goto next;
+ }
#ifdef DEBUGGER
if (debug_dma)
record_dma_event(DMA_EVENT_COPPERWAKE, hpos, vpos);
if (debug_copper)
record_copper(cop_state.ip - 4, 0xffffffff, cop_state.ir[0], cop_state.ir[1], hpos, vpos);
#endif
- if (copper_cant_read(hpos, CYCLE_PIPE_COPPER | 0x04)) {
- goto next;
- }
-
cop_state.state = COP_read1;
}
break;
if (!coppercomp(hpos, false)) {
cop_state.ignore_next = 1;
-
-#ifdef DEBUGGER
- if (debug_dma && cop_state.ignore_next > 0)
- record_dma_event(DMA_EVENT_COPPERSKIP, hpos, vpos);
- if (debug_copper)
- record_copper(cop_state.ip - 4, 0xffffffff, cop_state.ir[0], cop_state.ir[1], hpos, vpos);
-#endif
-
} else {
cop_state.ignore_next = -1;
}
+#ifdef DEBUGGER
+ if (debug_dma && cop_state.ignore_next > 0)
+ record_dma_event(DMA_EVENT_COPPERSKIP, hpos, vpos);
+ if (debug_copper)
+ record_copper(cop_state.ip - 4, 0xffffffff, cop_state.ir[0], cop_state.ir[1], hpos, vpos);
+#endif
+
cop_state.state = COP_read1;
break;
// after CPU mode changes
intreq = intreq | 0x8000;
intena = intena | 0x8000;
+ intreq2 = intreq;
+ intena2 = intena;
}
memset(spr, 0, sizeof spr);
dmacon = 0;
- intreq = 0;
- intena = 0;
+ intreq = intreq2 = 0;
+ intena = intena2 = 0;
copcon = 0;
DSKLEN (0, 0);
bitplane_dma_change(dmacon);
vdiw_change(vdiwstate == diw_states::DIW_waiting_stop);
+ intreq2 = intreq;
+ intena2 = intena;
+
current_colors.extra = 0;
if (isbrdblank(-1, bplcon0, bplcon3)) {
current_colors.extra |= 1 << CE_BORDERBLANK;
#endif
}
+void record_dma_ipl(int hpos, int vpos)
+{
+ struct dma_rec *dr;
+
+ if (!dma_record[0])
+ return;
+ if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
+ return;
+ dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+ dr->intlev = regs.intmask;
+ dr->ipl = regs.ipl_pin;
+}
+
void record_dma_event(uae_u32 evt, int hpos, int vpos)
{
struct dma_rec *dr;
return;
dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
dr->evt |= evt;
+ dr->ipl = regs.ipl_pin;
+}
+
+void record_dma_event_data(uae_u32 evt, int hpos, int vpos, uae_u32 data)
+{
+ struct dma_rec *dr;
+
+ if (!dma_record[0])
+ return;
+ if (hpos >= NR_DMA_REC_HPOS || vpos >= NR_DMA_REC_VPOS)
+ return;
+ dr = &dma_record[dma_record_toggle][vpos * NR_DMA_REC_HPOS + hpos];
+ dr->evt |= evt;
+ dr->evtdata = data;
+ dr->evtdataset = true;
+ dr->ipl = regs.ipl_pin;
}
void record_dma_replace(int hpos, int vpos, int type, int extra)
dr->type = type;
dr->extra = extra;
dr->intlev = regs.intmask;
+ dr->ipl = regs.ipl_pin;
dr->size = 2;
last_dma_rec = dr;
debug_mark_refreshed(dr->addr);
dr->type = type;
dr->extra = extra;
dr->intlev = regs.intmask;
+ dr->ipl = regs.ipl_pin;
+
last_dma_rec = dr;
debug_mark_refreshed(dr->addr);
}
-static bool get_record_dma_info(struct dma_rec *dr, int hpos, int vpos, TCHAR *l1, TCHAR *l2, TCHAR *l3, TCHAR *l4, TCHAR *l5, TCHAR *l6)
+static bool get_record_dma_info(struct dma_rec *dr, int hpos, int vpos, TCHAR *l1, TCHAR *l2, TCHAR *l3, TCHAR *l4, TCHAR *l5, TCHAR *l6, uae_u32 *split, int *iplp)
{
int longsize = dr->size;
bool got = false;
if (l6)
l6[0] = 0;
+ if (split) {
+ if ((dr->evt & DMA_EVENT_CPUINS) && dr->evtdataset) {
+ *split = dr->evtdata;
+ }
+ }
+
if (dr->type != 0 || dr->reg != 0xffff || dr->evt)
got = true;
} else {
_tcscpy(srtext, sr);
}
- _stprintf (l1, _T("[%02X %3d]"), hpos, hpos);
+ int ipl = 0;
+ if (iplp) {
+ ipl = *iplp;
+ if (dr->ipl > 0) {
+ ipl = dr->ipl;
+ } else if (dr->ipl < 0) {
+ ipl = 0;
+ }
+ *iplp = ipl;
+ }
+ if (ipl >= 0) {
+ _stprintf(l1, _T("[%02X %d]"), hpos, ipl);
+ } else if (ipl == -2) {
+ _stprintf(l1, _T("[%02X -]"), hpos);
+ } else {
+ _stprintf(l1, _T("[%02X ]"), hpos);
+ }
if (l4) {
_tcscpy(l4, _T(" "));
}
maxh = maxh2;
}
}
+ int ipl = -2;
while (h < maxh) {
int cols = (logfile ? 16 : 8);
TCHAR l1[200];
l6[0] = 0;
for (i = 0; i < cols && h < maxh; i++, h++, dr++) {
TCHAR l1l[16], l2l[16], l3l[16], l4l[16], l5l[16], l6l[16];
+ uae_u32 split = 0xffffffff;
- get_record_dma_info(dr, h, vpos, l1l, l2l, l3l, l4l, l5l, l6l);
+ get_record_dma_info(dr, h, vpos, l1l, l2l, l3l, l4l, l5l, l6l, &split, &ipl);
TCHAR *p = l1 + _tcslen(l1);
_stprintf(p, _T("%9s "), l1l);
_stprintf(p, _T("%9s "), l5l);
p = l6 + _tcslen(l6);
_stprintf(p, _T("%9s "), l6l);
+
+ if (split != 0xffffffff) {
+ if (split < 0x10000) {
+ struct instr *dp = table68k + split;
+ if (dp->mnemo == i_ILLG) {
+ split = 0x4AFC;
+ dp = table68k + split;
+ }
+ struct mnemolookup *lookup;
+ for (lookup = lookuptab; lookup->mnemo != dp->mnemo; lookup++)
+ ;
+ const TCHAR *opcodename = lookup->friendlyname;
+ if (!opcodename) {
+ opcodename = lookup->name;
+ }
+ TCHAR *ptrs[7];
+ ptrs[0] = &l1[_tcslen(l1)];
+ ptrs[1] = &l2[_tcslen(l2)];
+ ptrs[2] = &l3[_tcslen(l3)];
+ ptrs[3] = &l4[_tcslen(l4)];
+ ptrs[4] = &l5[_tcslen(l5)];
+ ptrs[5] = &l6[_tcslen(l6)];
+ for (int i = 0; i < 6; i++) {
+ if (!opcodename[i]) {
+ break;
+ }
+ TCHAR *p = ptrs[i];
+ p[-1] = opcodename[i];
+ }
+ } else {
+ l1[_tcslen(l1) - 1] = '*';
+ }
+ }
}
if (logfile) {
write_dlog(_T("%s\n"), l1);
if (!dr)
return;
TCHAR l1[16], l2[16], l3[16], l4[16];
- if (get_record_dma_info(dr, hp, vp, l1, l2, l3, l4, NULL, NULL)) {
+ if (get_record_dma_info(dr, hp, vp, l1, l2, l3, l4, NULL, NULL, NULL, NULL)) {
console_out_f(_T(" - %02X %s %s %s\n"), hp, l2, l3, l4);
}
hp++;
uae_u16 size;
uae_u32 addr;
uae_u32 evt;
+ uae_u32 evtdata;
+ bool evtdataset;
uae_s16 type;
uae_u16 extra;
- uae_s8 intlev;
+ uae_s8 intlev, ipl;
uae_u16 cf_reg, cf_dat, cf_addr;
int ciareg;
int ciamask;
#define DMA_EVENT_CIAB_IRQ 0x10000000
#define DMA_EVENT_CPUSTOP 0x20000000
#define DMA_EVENT_CPUSTOPIPL 0x40000000
+#define DMA_EVENT_CPUINS 0x80000000
#define DMARECORD_REFRESH 1
extern void record_dma_replace(int hpos, int vpos, int type, int extra);
extern void record_dma_reset(void);
extern void record_dma_event(uae_u32 evt, int hpos, int vpos);
+extern void record_dma_event_data(uae_u32 evt, int hpos, int vpos, uae_u32 data);
extern void record_dma_clear(int hpos, int vpos);
extern bool record_dma_check(int hpos, int vpos);
extern void record_dma_hsync(int);
extern void record_dma_vsync(int);
extern void record_cia_access(int r, int mask, uae_u16 value, bool rw, int hpos, int vpos);
+extern void record_dma_ipl(int hpos, int vpos);
extern void debug_mark_refreshed(uaecptr);
extern void debug_draw(uae_u8 *buf, int bpp, int line, int width, int height, uae_u32 *xredcolors, uae_u32 *xgreencolors, uae_u32 *xbluescolors);
uaecptr pc = m68k_getpc();
regs.exception = nr;
regs.loop_mode = 0;
+
+ if (debug_dma) {
+ record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, 0x20000);
+ }
if (cpu_tracer) {
cputrace.state = nr;
}
static void do_interrupt (int nr)
{
if (debug_dma)
- record_dma_event (DMA_EVENT_CPUIRQ, current_hpos (), vpos);
+ record_dma_event(DMA_EVENT_CPUIRQ, current_hpos (), vpos);
if (inputrecord_debug & 2) {
if (input_record > 0)
if (!ppc_interrupt(intlev()))
return;
}
+#endif
+ int il = intlev();
+ regs.ipl_pin = il;
+#ifdef DEBUGGER
+ if (debug_dma) {
+ record_dma_ipl(current_hpos(), vpos);
+ }
#endif
if (m68k_interrupt_delay) {
- int il = intlev();
- regs.ipl_pin = il;
if (regs.ipl_pin > 0) {
set_special(SPCFLAG_INT);
}
}
r->instruction_pc = m68k_getpc ();
+ if (debug_dma) {
+ record_dma_event_data(DMA_EVENT_CPUINS, current_hpos(), vpos, r->opcode);
+ }
(*cpufunctbl[r->opcode])(r->opcode);
if (!regs.loop_mode)