make comparison opcodes use three-address patterns

diff --git a/ChangeLog b/ChangeLog
index 097092407cd7aaa7a873d3600476772d8b6b340e..1dbf7bd801c8e4a3b944fbff0240358be7fda31f 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2006-11-04  Aleksey Demakov  <ademakov@gmail.com>
+
+       * jit/jit-rules-x86.ins: make comparison opcodes use three-address
+       patterns.
+
 2006-11-01  Aleksey Demakov  <ademakov@gmail.com>
 
        * jit/jit-reg-alloc.c (commit_input_value, commit_output_value):

diff --git a/jit/jit-rules-x86.ins b/jit/jit-rules-x86.ins
index 97dd12bf797a6bfb08b257fc5e8b4069d4299498..10db6d47a712640560e9339cf7aa6b1c71683b9a 100644 (file)
--- a/jit/jit-rules-x86.ins
+++ b/jit/jit-rules-x86.ins
@@ -1069,151 +1069,151 @@ JIT_OP_BR_IGE_UN: binary_branch
  * Comparison opcodes.
  */
 
-JIT_OP_IEQ: binary
-       [reg, immzero] -> {
-               x86_alu_reg_reg(inst, X86_OR, $1, $1);
+JIT_OP_IEQ:
+       [=reg, reg, immzero] -> {
+               x86_alu_reg_reg(inst, X86_OR, $2, $2);
                inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
        }
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_EQ, 0);
        }
 
-JIT_OP_INE: binary
-       [reg, immzero] -> {
-               x86_alu_reg_reg(inst, X86_OR, $1, $1);
+JIT_OP_INE:
+       [=reg, reg, immzero] -> {
+               x86_alu_reg_reg(inst, X86_OR, $2, $2);
                inst = setcc_reg(inst, $1, X86_CC_NE, 0);
        }
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_NE, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_NE, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_NE, 0);
        }
 
-JIT_OP_ILT: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILT:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 1);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 1);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 1);
        }
 
-JIT_OP_ILT_UN: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILT_UN:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LT, 0);
        }
 
-JIT_OP_ILE: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILE:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 1);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 1);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 1);
        }
 
-JIT_OP_ILE_UN: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_ILE_UN:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_LE, 0);
        }
 
-JIT_OP_IGT: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGT:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 1);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 1);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 1);
        }
 
-JIT_OP_IGT_UN: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGT_UN:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GT, 0);
        }
 
-JIT_OP_IGE: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGE:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 1);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 1);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 1);
        }
 
-JIT_OP_IGE_UN: binary
-       [reg, imm] -> {
-               x86_alu_reg_imm(inst, X86_CMP, $1, $2);
+JIT_OP_IGE_UN:
+       [=reg, reg, imm] -> {
+               x86_alu_reg_imm(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 0);
        }
-       [reg, local] -> {
-               x86_alu_reg_membase(inst, X86_CMP, $1, X86_EBP, $2);
+       [=reg, reg, local] -> {
+               x86_alu_reg_membase(inst, X86_CMP, $2, X86_EBP, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 0);
        }
-       [reg, reg] -> {
-               x86_alu_reg_reg(inst, X86_CMP, $1, $2);
+       [=reg, reg, reg] -> {
+               x86_alu_reg_reg(inst, X86_CMP, $2, $3);
                inst = setcc_reg(inst, $1, X86_CC_GE, 0);
        }