/cpuemu_32.cpp
/cpuemu_33.cpp
/cpuemu_40.cpp
+/cpuemu_50.cpp
/cpustbl.cpp
/cputbl.h
/jit/compemu.cpp
static uae_u32 REGPARAM2 a2065_wget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr == CHIP_OFFSET || addr == CHIP_OFFSET + 2) {
v = chip_wget (addr);
static uae_u32 REGPARAM2 a2065_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = a2065_wget (addr) << 16;
v |= a2065_wget (addr + 2);
static uae_u32 REGPARAM2 a2065_bget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr < 0x40) {
v = config[addr];
static void REGPARAM2 a2065_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
if (addr == CHIP_OFFSET || addr == CHIP_OFFSET + 2) {
chip_wput (addr, w);
static void REGPARAM2 a2065_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
a2065_wput (addr, l >> 16);
a2065_wput (addr + 2, l);
a2065_lget, a2065_wget, a2065_bget,
a2065_lput, a2065_wput, a2065_bput,
a2065_xlate, a2065_check, NULL, NULL, _T("A2065 Z2 Ethernet"),
- a2065_lgeti, a2065_wgeti, ABFLAG_IO
+ a2065_lgeti, a2065_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static void REGPARAM2 a2065_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (addr == 0x48 && !configured) {
static uae_u32 REGPARAM2 a2065_wgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
return v;
}
static uae_u32 REGPARAM2 a2065_lgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = (a2065_wgeti (addr) << 16) | a2065_wgeti (addr + 2);
return v;
static uae_u32 REGPARAM2 dmac_a2091_lget (struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = dmac_a2091_read_word(wd, addr) << 16;
v |= dmac_a2091_read_word(wd, addr + 2) & 0xffff;
static uae_u32 REGPARAM2 dmac_a2091_wget(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = dmac_a2091_read_word(wd, addr);
return v;
static uae_u32 REGPARAM2 dmac_a2091_bget(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = dmac_a2091_read_byte(wd, addr);
return v;
static void REGPARAM2 dmac_a2091_lput(struct wd_state *wd, uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
dmac_a2091_write_word(wd, addr + 0, l >> 16);
dmac_a2091_write_word(wd, addr + 2, l);
static void REGPARAM2 dmac_a2091_wput(struct wd_state *wd, uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
dmac_a2091_write_word(wd, addr, w);
}
static void REGPARAM2 dmac_a2091_bput(struct wd_state *wd, uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (wd->autoconfig) {
static uae_u32 REGPARAM2 dmac_a2091_wgeti(struct wd_state *wd, uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr >= CDMAC_ROM_OFFSET)
v = (wd->rom[addr & wd->rom_mask] << 8) | wd->rom[(addr + 1) & wd->rom_mask];
static uae_u32 REGPARAM2 dmac_a2091_lgeti(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = dmac_a2091_wgeti(wd, addr) << 16;
v |= dmac_a2091_wgeti(wd, addr + 2);
dmac_a2091_lget, dmac_a2091_wget, dmac_a2091_bget,
dmac_a2091_lput, dmac_a2091_wput, dmac_a2091_bput,
dmac_a2091_xlate, dmac_a2091_check, NULL, NULL, _T("A2090/A2091/A590"),
- dmac_a2091_lgeti, dmac_a2091_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dmac_a2091_lgeti, dmac_a2091_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static uae_u32 REGPARAM2 dmac_gvp_lget(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= wd->board_mask;
v = dmac_gvp_read_word(wd, addr) << 16;
v |= dmac_gvp_read_word(wd, addr + 2) & 0xffff;
static uae_u32 REGPARAM2 dmac_gvp_wget(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= wd->board_mask;
v = dmac_gvp_read_word(wd, addr);
return v;
static uae_u32 REGPARAM2 dmac_gvp_bget(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= wd->board_mask;
v = dmac_gvp_read_byte(wd, addr);
return v;
static void REGPARAM2 dmac_gvp_lput(struct wd_state *wd, uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= wd->board_mask;
dmac_gvp_write_word(wd, addr + 0, l >> 16);
dmac_gvp_write_word(wd, addr + 2, l);
static void REGPARAM2 dmac_gvp_wput(struct wd_state *wd, uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= wd->board_mask;
dmac_gvp_write_word(wd, addr, w);
}
static void REGPARAM2 dmac_gvp_bput(struct wd_state *wd, uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= wd->board_mask;
if (wd->autoconfig) {
static uae_u32 REGPARAM2 dmac_gvp_wgeti(struct wd_state *wd, uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= wd->board_mask;
if (addr >= GVP_ROM_OFFSET) {
addr -= GVP_ROM_OFFSET;
static uae_u32 REGPARAM2 dmac_gvp_lgeti(struct wd_state *wd, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= wd->board_mask;
v = dmac_gvp_wgeti(wd, addr) << 16;
v |= dmac_gvp_wgeti(wd, addr + 2);
dmac_gvp_lget, dmac_gvp_wget, dmac_gvp_bget,
dmac_gvp_lput, dmac_gvp_wput, dmac_gvp_bput,
dmac_gvp_xlate, dmac_gvp_check, NULL, NULL, _T("GVP"),
- dmac_gvp_lgeti, dmac_gvp_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dmac_gvp_lgeti, dmac_gvp_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
/* SUPERDMAC (A3000 mainboard built-in) */
static uae_u32 REGPARAM2 mbdmac_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = mbdmac_read_word (wd_a3000, addr + 0) << 16;
v |= mbdmac_read_word (wd_a3000, addr + 2) << 0;
return v;
static uae_u32 REGPARAM2 mbdmac_wget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = mbdmac_read_word (wd_a3000, addr);
return v;
}
static uae_u32 REGPARAM2 mbdmac_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return mbdmac_read_byte (wd_a3000, addr);
}
static void REGPARAM2 mbdmac_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if ((addr & 0xffff) == 0x40) {
// long write to 0x40 = write byte to SASR
mbdmac_write_byte (wd_a3000, 0x41, l);
}
static void REGPARAM2 mbdmac_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
mbdmac_write_word (wd_a3000, addr + 0, w);
}
static void REGPARAM2 mbdmac_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
mbdmac_write_byte (wd_a3000, addr, b);
}
mbdmac_lget, mbdmac_wget, mbdmac_bget,
mbdmac_lput, mbdmac_wput, mbdmac_bput,
default_xlate, default_check, NULL, NULL, _T("A3000 DMAC"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static void ew (struct wd_state *wd, int addr, uae_u32 value)
static uae_u32 REGPARAM2 akiko_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return akiko_bget2 (addr, 1);
}
static uae_u32 REGPARAM2 akiko_wget (uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xffff;
v = akiko_bget2 (addr + 1, 0);
v |= akiko_bget2 (addr + 0, 0) << 8;
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xffff;
v = akiko_bget2 (addr + 3, 0);
v |= akiko_bget2 (addr + 2, 0) << 8;
static void REGPARAM2 akiko_bput (uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
akiko_bput2 (addr, v, 1);
}
static void REGPARAM2 akiko_wput (uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xfff;
if((addr < 0x30 && AKIKO_DEBUG_IO))
write_log (_T("akiko_wput %08X: %08X=%04X\n"), M68K_GETPC, addr, v & 0xffff);
static void REGPARAM2 akiko_lput (uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xffff;
if(addr < 0x30 && AKIKO_DEBUG_IO)
write_log (_T("akiko_lput %08X: %08X=%08X\n"), M68K_GETPC, addr, v);
akiko_lget, akiko_wget, akiko_bget,
akiko_lput, akiko_wput, akiko_bput,
default_xlate, default_check, NULL, NULL, _T("Akiko"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static const uae_u8 patchdata[]={0x0c,0x82,0x00,0x00,0x03,0xe8,0x64,0x00,0x00,0x46};
hrtmem_lget, hrtmem_wget, hrtmem_bget,
hrtmem_lput, hrtmem_wput, hrtmem_bput,
hrtmem_xlate, hrtmem_check, NULL, NULL, _T("Cartridge Bank"),
- hrtmem_lget, hrtmem_wget, ABFLAG_RAM
+ hrtmem_lget, hrtmem_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
static addrbank hrtmem2_bank = {
hrtmem2_lget, hrtmem2_wget, hrtmem2_bget,
hrtmem2_lput, hrtmem2_wput, hrtmem2_bput,
hrtmem2_xlate, hrtmem2_check, NULL, NULL, _T("Cartridge Bank 2"),
- hrtmem2_lget, hrtmem2_wget, ABFLAG_RAM
+ hrtmem2_lget, hrtmem2_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
static addrbank hrtmem3_bank = {
hrtmem3_lget, hrtmem3_wget, hrtmem3_bget,
hrtmem3_lput, hrtmem3_wput, hrtmem3_bput,
hrtmem3_xlate, hrtmem3_check, NULL, NULL, _T("Cartridge Bank 3"),
- hrtmem3_lget, hrtmem3_wget, ABFLAG_RAM
+ hrtmem3_lget, hrtmem3_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
static void copyfromamiga (uae_u8 *dst, uaecptr src, int len)
static uae_u32 REGPARAM2 arram_lget (uaecptr addr)
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(4);
addr -= arram_start;
static uae_u32 REGPARAM2 arram_wget (uaecptr addr)
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(4);
addr -= arram_start;
static uae_u32 REGPARAM2 arram_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(4);
addr -= arram_start;
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arram_start;
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arram_start;
void REGPARAM2 arram_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arram_start;
static uae_u32 REGPARAM2 arrom_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(4);
addr -= arrom_start;
static uae_u32 REGPARAM2 arrom_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(2);
addr -= arrom_start;
static uae_u32 REGPARAM2 arrom_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ar_hidden)
return ar_null(1);
addr -= arrom_start;
static void REGPARAM2 arrom_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arrom_start;
static void REGPARAM2 arrom_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arrom_start;
static void REGPARAM2 arrom_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (ar_hidden)
return;
addr -= arrom_start;
arrom_lget, arrom_wget, arrom_bget,
arrom_lput, arrom_wput, arrom_bput,
arrom_xlate, arrom_check, NULL, NULL, _T("Action Replay ROM"),
- arrom_lget, arrom_wget, ABFLAG_ROM
+ arrom_lget, arrom_wget,
+ ABFLAG_ROM, S_READ, S_WRITE
};
static addrbank arram_bank = {
arram_lget, arram_wget, arram_bget,
arram_lput, arram_wput, arram_bput,
arram_xlate, arram_check, NULL, NULL, _T("Action Replay RAM"),
- arram_lget, arram_wget, ABFLAG_RAM
+ arram_lget, arram_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
rtarea_lget, rtarea_wget, rtarea_bget,
rtarea_lput, rtarea_wput, rtarea_bput,
rtarea_xlate, rtarea_check, NULL, _T("rtarea"), _T("UAE Boot ROM"),
- rtarea_lget, rtarea_wget, ABFLAG_ROMIN
+ rtarea_lget, rtarea_wget,
+ ABFLAG_ROMIN, S_READ, S_WRITE
};
static uae_u8 *REGPARAM2 rtarea_xlate (uaecptr addr)
static uae_u32 REGPARAM2 rtarea_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xFFFF;
return (uae_u32)(rtarea_wget (addr) << 16) + rtarea_wget (addr + 2);
}
static uae_u32 REGPARAM2 rtarea_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xFFFF;
return (rtarea_bank.baseaddr[addr] << 8) + rtarea_bank.baseaddr[addr + 1];
}
static uae_u32 REGPARAM2 rtarea_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xFFFF;
return rtarea_bank.baseaddr[addr];
}
static void REGPARAM2 rtarea_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xffff;
if (addr < RTAREA_WRITEOFFSET)
return;
}
static void REGPARAM2 rtarea_wput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xffff;
if (addr < RTAREA_WRITEOFFSET)
return;
}
static void REGPARAM2 rtarea_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xffff;
if (addr < RTAREA_WRITEOFFSET)
return;
fmv_lget, fmv_wget, fmv_bget,
fmv_lput, fmv_wput, fmv_bput,
default_xlate, default_check, NULL, NULL, _T("CD32 FMV IO"),
- fmv_lget, fmv_wget, ABFLAG_IO
+ fmv_lget, fmv_wget,
+ ABFLAG_IO, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(fmv_rom);
fmv_rom_lget, fmv_rom_wget, fmv_rom_bget,
fmv_rom_lput, fmv_rom_wput, fmv_rom_bput,
fmv_rom_xlate, fmv_rom_check, NULL, _T("fmv_rom"), _T("CD32 FMV ROM"),
- fmv_rom_lget, fmv_rom_wget, ABFLAG_ROM
+ fmv_rom_lget, fmv_rom_wget,
+ ABFLAG_ROM, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(fmv_ram);
fmv_ram_lget, fmv_ram_wget, fmv_ram_bget,
fmv_ram_lput, fmv_ram_wput, fmv_ram_bput,
fmv_ram_xlate, fmv_ram_check, NULL, _T("fmv_ram"), _T("CD32 FMV RAM"),
- fmv_ram_lget, fmv_ram_wget, ABFLAG_RAM
+ fmv_ram_lget, fmv_ram_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
-MEMORY_FUNCTIONS_NOJIT(fmv_rom);
-MEMORY_FUNCTIONS_NOJIT(fmv_ram);
+MEMORY_FUNCTIONS(fmv_rom);
+MEMORY_FUNCTIONS(fmv_ram);
void rethink_cd32fmv(void)
{
static uae_u32 REGPARAM2 dmac_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = (dmac_bget2 (addr) << 24) | (dmac_bget2 (addr + 1) << 16) |
(dmac_bget2 (addr + 2) << 8) | (dmac_bget2 (addr + 3));
static uae_u32 REGPARAM2 dmac_wget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = (dmac_bget2 (addr) << 8) | dmac_bget2 (addr + 1);
#ifdef CDTV_DEBUG
static uae_u32 REGPARAM2 dmac_bget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = dmac_bget2 (addr);
if (configured <= 0)
static void REGPARAM2 dmac_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
#ifdef CDTV_DEBUG
write_log (_T("dmac_lput %08X=%08X PC=%08X\n"), addr, l, M68K_GETPC);
static void REGPARAM2 dmac_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
#ifdef CDTV_DEBUG
write_log (_T("dmac_wput %04X=%04X PC=%08X\n"), addr, w & 65535, M68K_GETPC);
static void REGPARAM2 dmac_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
b &= 0xff;
if (addr == 0x48) {
static uae_u32 REGPARAM2 dmac_wgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return v;
}
static uae_u32 REGPARAM2 dmac_lgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return v;
}
-
addrbank dmac_bank = {
dmac_lget, dmac_wget, dmac_bget,
dmac_lput, dmac_wput, dmac_bput,
default_xlate, default_check, NULL, NULL, _T("CDTV DMAC/CD Controller"),
- dmac_lgeti, dmac_wgeti, ABFLAG_IO
+ dmac_lgeti, dmac_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
-
/* CDTV batterybacked RAM emulation */
#define CDTV_NVRAM_MASK 16383
#define CDTV_NVRAM_SIZE 32768
static uae_u32 REGPARAM2 cdtvcr_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = (cdtvcr_bget2 (addr) << 24) | (cdtvcr_bget2 (addr + 1) << 16) |
(cdtvcr_bget2 (addr + 2) << 8) | (cdtvcr_bget2 (addr + 3));
#if CDTVCR_DEBUG
static uae_u32 REGPARAM2 cdtvcr_wgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return v;
}
static uae_u32 REGPARAM2 cdtvcr_lgeti (uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return v;
}
static uae_u32 REGPARAM2 cdtvcr_wget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = (cdtvcr_bget2 (addr) << 8) | cdtvcr_bget2 (addr + 1);
#if CDTVCR_DEBUG
if (cdtvcr_debug(addr))
static uae_u32 REGPARAM2 cdtvcr_bget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = cdtvcr_bget2 (addr);
#if CDTVCR_DEBUG
if (cdtvcr_debug(addr))
static void REGPARAM2 cdtvcr_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if CDTVCR_DEBUG
if (cdtvcr_debug(addr))
write_log (_T("cdtvcr_lput %08X=%08X PC=%08X\n"), addr, l, M68K_GETPC);
static void REGPARAM2 cdtvcr_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if CDTVCR_DEBUG
if (cdtvcr_debug(addr))
write_log (_T("cdtvcr_wput %08X=%04X PC=%08X\n"), addr, w & 65535, M68K_GETPC);
static void REGPARAM2 cdtvcr_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if CDTVCR_DEBUG
if (cdtvcr_debug(addr))
write_log (_T("cdtvcr_bput %08X=%02X PC=%08X\n"), addr, b & 255, M68K_GETPC);
cdtvcr_lget, cdtvcr_wget, cdtvcr_bget,
cdtvcr_lput, cdtvcr_wput, cdtvcr_bput,
default_xlate, default_check, NULL, NULL, _T("CDTV-CR"),
- cdtvcr_lgeti, cdtvcr_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ cdtvcr_lgeti, cdtvcr_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static void *dev_thread (void *p)
cia_lget, cia_wget, cia_bget,
cia_lput, cia_wput, cia_bput,
default_xlate, default_check, NULL, NULL, _T("CIA"),
- cia_lgeti, cia_wgeti, ABFLAG_IO, NULL, 0x3f01, 0xbfc000
+ cia_lgeti, cia_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE, NULL, 0x3f01, 0xbfc000
};
// Gayle or Fat Gary does not enable CIA /CS lines if both CIAs are selected
int r = (addr & 0xf00) >> 8;
uae_u8 v = 0xff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
-
if (isgarynocia(addr))
return dummy_get(addr, 1, false);
int r = (addr & 0xf00) >> 8;
uae_u16 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
-
if (isgarynocia(addr))
return dummy_get(addr, 2, false);
{
int r = (addr & 0xf00) >> 8;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
if (isgarynocia(addr)) {
dummy_put(addr, 1, false);
return;
{
int r = (addr & 0xf00) >> 8;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
if (isgarynocia(addr)) {
dummy_put(addr, 2, false);
return;
clock_lget, clock_wget, clock_bget,
clock_lput, clock_wput, clock_bput,
default_xlate, default_check, NULL, NULL, _T("Battery backed up clock (none)"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO, NULL, 0x3f, 0xd80000
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE, NULL, 0x3f, 0xd80000
};
static unsigned int clock_control_d;
struct tm *ct;
uae_u8 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
-
if ((addr & 0xffff) >= 0x8000 && currprefs.cs_fatgaryrev >= 0)
return dummy_get(addr, 1, false);
static void REGPARAM2 clock_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
// write_log(_T("W: %x (%x): %x, PC=%08x\n"), addr, (addr & 0xff) >> 2, value & 0xff, M68K_GETPC);
if ((addr & 0xffff) >= 0x8000 && currprefs.cs_fatgaryrev >= 0) {
blizzardio_lget, blizzardio_wget, blizzardio_bget,
blizzardio_lput, blizzardio_wput, blizzardio_bput,
default_xlate, default_check, NULL, NULL, _T("CPUBoard IO"),
- blizzardio_wget, blizzardio_bget, ABFLAG_IO
+ blizzardio_wget, blizzardio_bget,
+ ABFLAG_IO, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzardram);
blizzardram_lget, blizzardram_wget, blizzardram_bget,
blizzardram_lput, blizzardram_wput, blizzardram_bput,
blizzardram_xlate, blizzardram_check, NULL, NULL, _T("CPUBoard RAM"),
- blizzardram_lget, blizzardram_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ blizzardram_lget, blizzardram_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
DECLARE_MEMORY_FUNCTIONS(blizzardea);
blizzardea_lget, blizzardea_wget, blizzardea_bget,
blizzardea_lput, blizzardea_wput, blizzardea_bput,
blizzardea_xlate, blizzardea_check, NULL, _T("rom_ea"), _T("CPUBoard E9/EA Autoconfig"),
- blizzardea_lget, blizzardea_wget, ABFLAG_IO | ABFLAG_SAFE
+ blizzardea_lget, blizzardea_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzarde8);
blizzarde8_lget, blizzarde8_wget, blizzarde8_bget,
blizzarde8_lput, blizzarde8_wput, blizzarde8_bput,
blizzarde8_xlate, blizzarde8_check, NULL, NULL, _T("CPUBoard E8 Autoconfig"),
- blizzarde8_lget, blizzarde8_wget, ABFLAG_IO | ABFLAG_SAFE
+ blizzarde8_lget, blizzarde8_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzardf0);
blizzardf0_lget, blizzardf0_wget, blizzardf0_bget,
blizzardf0_lput, blizzardf0_wput, blizzardf0_bput,
blizzardf0_xlate, blizzardf0_check, NULL, _T("rom_f0_ppc"), _T("CPUBoard F00000"),
- blizzardf0_lget, blizzardf0_wget, ABFLAG_ROM
+ blizzardf0_lget, blizzardf0_wget,
+ ABFLAG_ROM, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzardram_nojit);
blizzardram_nojit_lget, blizzardram_nojit_wget, blizzardram_nojit_bget,
blizzardram_nojit_lput, blizzardram_nojit_wput, blizzardram_nojit_bput,
blizzardram_nojit_xlate, blizzardram_nojit_check, NULL, NULL, _T("CPUBoard RAM"),
- blizzardram_nojit_lget, blizzardram_nojit_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ blizzardram_nojit_lget, blizzardram_nojit_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzardmaprom);
blizzardmaprom_lget, blizzardmaprom_wget, blizzardmaprom_bget,
blizzardmaprom_lput, blizzardmaprom_wput, blizzardmaprom_bput,
blizzardmaprom_xlate, blizzardmaprom_check, NULL, _T("maprom"), _T("CPUBoard MAPROM"),
- blizzardmaprom_lget, blizzardmaprom_wget, ABFLAG_RAM
+ blizzardmaprom_lget, blizzardmaprom_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(blizzardmaprom2);
static addrbank blizzardmaprom2_bank = {
blizzardmaprom2_lget, blizzardmaprom2_wget, blizzardmaprom2_bget,
blizzardmaprom2_lput, blizzardmaprom2_wput, blizzardmaprom2_bput,
blizzardmaprom2_xlate, blizzardmaprom2_check, NULL, _T("maprom2"), _T("CPUBoard MAPROM2"),
- blizzardmaprom2_lget, blizzardmaprom2_wget, ABFLAG_RAM
+ blizzardmaprom2_lget, blizzardmaprom2_wget,
+ ABFLAG_RAM, S_READ, S_WRITE
};
// hack to map F41000 SCSI SCRIPTS RAM to JIT friendly address
MEMORY_FUNCTIONS(blizzardram);
-MEMORY_BGET(blizzardram_nojit, 1);
-MEMORY_WGET(blizzardram_nojit, 1);
-MEMORY_LGET(blizzardram_nojit, 1);
+MEMORY_BGET(blizzardram_nojit);
+MEMORY_WGET(blizzardram_nojit);
+MEMORY_LGET(blizzardram_nojit);
MEMORY_CHECK(blizzardram_nojit);
MEMORY_XLATE(blizzardram_nojit);
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= blizzardram_nojit_bank.mask;
if (maprom_state && addr >= maprom_base)
return;
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= blizzardram_nojit_bank.mask;
if (maprom_state && addr >= maprom_base)
return;
}
static void REGPARAM2 blizzardram_nojit_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= blizzardram_nojit_bank.mask;
if (maprom_state && addr >= maprom_base)
return;
protect_roms(false);
}
-MEMORY_BGET(blizzardmaprom2, 1);
-MEMORY_WGET(blizzardmaprom2, 1);
-MEMORY_LGET(blizzardmaprom2, 1);
-MEMORY_BPUT(blizzardmaprom2, 1);
-MEMORY_WPUT(blizzardmaprom2, 1);
-MEMORY_LPUT(blizzardmaprom2, 1);
+MEMORY_BGET(blizzardmaprom2);
+MEMORY_WGET(blizzardmaprom2);
+MEMORY_LGET(blizzardmaprom2);
+MEMORY_BPUT(blizzardmaprom2);
+MEMORY_WPUT(blizzardmaprom2);
+MEMORY_LPUT(blizzardmaprom2);
MEMORY_CHECK(blizzardmaprom2);
MEMORY_XLATE(blizzardmaprom2);
-MEMORY_BGET(blizzardmaprom, 1);
-MEMORY_WGET(blizzardmaprom, 1);
-MEMORY_LGET(blizzardmaprom, 1);
+MEMORY_BGET(blizzardmaprom);
+MEMORY_WGET(blizzardmaprom);
+MEMORY_LGET(blizzardmaprom);
MEMORY_CHECK(blizzardmaprom);
MEMORY_XLATE(blizzardmaprom);
static void REGPARAM2 blizzardmaprom_lput(uaecptr addr, uae_u32 l)
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (is_blizzard2060() && !maprom_state)
return;
addr &= blizzardmaprom_bank.mask;
static void REGPARAM2 blizzardmaprom_wput(uaecptr addr, uae_u32 w)
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (is_blizzard2060() && !maprom_state)
return;
addr &= blizzardmaprom_bank.mask;
}
static void REGPARAM2 blizzardmaprom_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (is_blizzard2060() && !maprom_state)
return;
addr &= blizzardmaprom_bank.mask;
static uae_u32 REGPARAM2 blizzardf0_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v;
blizzardf0_slow(1);
}
static uae_u32 REGPARAM2 blizzardf0_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 *m;
//write_log(_T("F0 LONGGET %08x\n"), addr);
}
static uae_u32 REGPARAM2 blizzardf0_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u16 *m, v;
blizzardf0_slow(2);
static void REGPARAM2 blizzardf0_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
blizzardf0_slow(1);
if (is_csmk3() || is_blizzardppc()) {
}
static void REGPARAM2 blizzardf0_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
blizzardf0_slow(4);
}
static void REGPARAM2 blizzardf0_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
blizzardf0_slow(2);
if (is_dkb_wildfire()) {
blizzardf0_bput(addr + 0, b >> 8);
static uae_u32 REGPARAM2 blizzardea_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0;
if (cpuboard_non_byte_ea) {
v = blizzardea_bget(addr + 3) << 0;
}
static uae_u32 REGPARAM2 blizzardea_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0;
if (cpuboard_non_byte_ea) {
v = blizzardea_bget(addr + 1) << 0;
}
static uae_u32 REGPARAM2 blizzardea_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v;
addr &= blizzardea_bank.mask;
static void REGPARAM2 blizzardea_lput(uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (cpuboard_non_byte_ea) {
blizzardea_bput(addr + 3, l >> 0);
blizzardea_bput(addr + 2, l >> 8);
}
static void REGPARAM2 blizzardea_wput(uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (cpuboard_non_byte_ea) {
blizzardea_bput(addr + 1, w >> 0);
blizzardea_bput(addr + 0, w >> 8);
}
static void REGPARAM2 blizzardea_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
addr &= blizzardea_bank.mask;
if (is_tekmagic()) {
cpuboard_non_byte_ea = true;
static void REGPARAM2 blizzarde8_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
static void REGPARAM2 blizzarde8_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
static void REGPARAM2 blizzarde8_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (addr == 0x48 && !configured) {
static uae_u32 REGPARAM2 blizzarde8_bget(uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = blizzardea_bank.baseaddr[addr & blizzardea_bank.mask];
return v;
}
static uae_u32 REGPARAM2 blizzarde8_wget(uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = (blizzardea_bank.baseaddr[addr & blizzardea_bank.mask] << 8) | blizzardea_bank.baseaddr[(addr + 1) & blizzardea_bank.mask];
return v;
}
static uae_u32 REGPARAM2 blizzarde8_lget(uaecptr addr)
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = (blizzarde8_wget(addr) << 16) | blizzarde8_wget(addr + 2);
return v;
}
static uae_u32 REGPARAM2 blizzardio_bget(uaecptr addr)
{
uae_u8 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
//write_log(_T("CS IO XBGET %08x=%02X PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
if (is_csmk3() || is_blizzardppc()) {
uae_u32 bank = addr & 0x10000;
}
static uae_u32 REGPARAM2 blizzardio_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (is_csmk3() || is_blizzardppc()) {
;//write_log(_T("CS IO WGET %08x\n"), addr);
//activate_debugger();
}
static uae_u32 REGPARAM2 blizzardio_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
write_log(_T("CS IO LGET %08x PC=%08x\n"), addr, M68K_GETPC);
if (is_blizzard2060() && mapromconfigured()) {
if (addr & 0x10000000) {
}
static void REGPARAM2 blizzardio_bput(uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if CPUBOARD_IO_LOG > 1
write_log(_T("CS IO XBPUT %08x %02x PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
#endif
}
static void REGPARAM2 blizzardio_wput(uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (is_fusionforty()) {
write_log(_T("FusionForty IO WPUT %08x %04x\n"), addr, v);
} else if (is_blizzard()) {
}
static void REGPARAM2 blizzardio_lput(uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log(_T("CS IO LPUT %08x %08x\n"), addr, v);
if (is_csmk1()) {
if (addr == 0x80f80000) {
custom_lget, custom_wget, custom_bget,
custom_lput, custom_wput, custom_bput,
default_xlate, default_check, NULL, NULL, _T("Custom chipset"),
- custom_lgeti, custom_wgeti, ABFLAG_IO, NULL, 0x1ff, 0xdff000
+ custom_lgeti, custom_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE, NULL, 0x1ff, 0xdff000
};
static uae_u32 REGPARAM2 custom_wgeti (uaecptr addr)
{
uae_u16 v;
int missing;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 0xfff;
#if CUSTOM_DEBUG > 2
write_log (_T("%d:%d:wget: %04X=%04X pc=%p\n"), current_hpos(), vpos, addr, addr & 0x1fe, m68k_getpc ());
static uae_u32 REGPARAM2 custom_bget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
return dummy_get(addr, 1, false);
v = custom_wget2 (addr & ~1, true);
static uae_u32 REGPARAM2 custom_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0)
return dummy_get(addr, 4, false);
return ((uae_u32)custom_wget (addr) << 16) | custom_wget (addr + 2);
static void REGPARAM2 custom_wput (uaecptr addr, uae_u32 value)
{
int hpos = current_hpos ();
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0) {
dummy_put(addr, 2, value);
rval = (value << 8) | (value & 0xff);
}
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.cs_bytecustomwritebug) {
if (addr & 1)
custom_wput (addr & ~1, rval);
static void REGPARAM2 custom_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if ((addr & 0xffff) < 0x8000 && currprefs.cs_fatgaryrev >= 0) {
dummy_put(addr, 4, value);
return;
#ifdef AHI
#if defined(JIT)
-#define special_mem_r special_mem |= S_READ
-#define special_mem_w special_mem |= S_WRITE
#define NMEM_OFFSET NATMEM_OFFSET
#else
#define special_mem_r
static uae_u32 REGPARAM2 dummy_lget2 (uaecptr addr)
{
- special_mem_r;
enforcer_display_hit (_T("LONG READ from"), m68k_getpc (), addr);
if (enforcermode & 1) {
set_special (SPCFLAG_TRAP);
static uae_u32 REGPARAM2 dummy_wget2 (uaecptr addr)
{
- special_mem_r;
-
#ifdef JIT
if (addr >= 0x00F10000 && addr <= 0x00F7FFFF) {
if (!warned_JIT_0xF10000) {
static uae_u32 REGPARAM2 dummy_bget2 (uaecptr addr)
{
- special_mem_r;
enforcer_display_hit (_T("BYTE READ from"), m68k_getpc (), addr);
if (enforcermode & 1) {
set_special (SPCFLAG_TRAP);
static void REGPARAM2 dummy_lput2 (uaecptr addr, uae_u32 l)
{
- special_mem_w;
enforcer_display_hit (_T("LONG WRITE to"), m68k_getpc (), addr);
if (enforcermode & 1) {
set_special (SPCFLAG_TRAP);
static void REGPARAM2 dummy_wput2 (uaecptr addr, uae_u32 w)
{
- special_mem_w;
enforcer_display_hit (_T("WORD WRITE to"), m68k_getpc (), addr);
if (enforcermode & 1) {
set_special (SPCFLAG_TRAP);
static void REGPARAM2 dummy_bput2 (uaecptr addr, uae_u32 b)
{
- special_mem_w;
enforcer_display_hit (_T("BYTE WRITE to"), m68k_getpc (), addr);
if (enforcermode & 1) {
set_special (SPCFLAG_TRAP);
static int REGPARAM2 dummy_check2 (uaecptr addr, uae_u32 size)
{
- special_mem_r;
enforcer_display_hit (_T("CHECK from "), m68k_getpc (), addr);
return 0;
}
#define BOARD_NONAUTOCONFIG_AFTER_Z3 6
#define BOARD_IGNORE 7
+#define KS12_BOOT_HACK 0
+
#define EXP_DEBUG 0
#define MAX_EXPANSION_BOARD_SPACE 16
v == BOARD_NONAUTOCONFIG_BEFORE;
}
+static bool ks12orolder(void)
+{
+ /* check if Kickstart version is below 1.3 */
+ return kickstart_version
+ && (/* Kickstart 1.0 & 1.1! */
+ kickstart_version == 0xFFFF
+ /* Kickstart < 1.3 */
+ || kickstart_version < 34);
+}
+
+
/* ********************************************************** */
/* Please note: ZorroIII implementation seems to work different
expamem_lget, expamem_wget, expamem_bget,
expamem_lput, expamem_wput, expamem_bput,
default_xlate, default_check, NULL, NULL, _T("Autoconfig Z2"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
DECLARE_MEMORY_FUNCTIONS(expamemz3);
static addrbank expamemz3_bank = {
expamemz3_lget, expamemz3_wget, expamemz3_bget,
expamemz3_lput, expamemz3_wput, expamemz3_bput,
default_xlate, default_check, NULL, NULL, _T("Autoconfig Z3"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static addrbank *expamem_map_clear (void)
static void REGPARAM2 expamem_write(uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 0xffff;
if (addr == 00 || addr == 02 || addr == 0x40 || addr == 0x42) {
expamem[addr] = (value & 0xf0);
static uae_u32 REGPARAM2 expamem_bget (uaecptr addr)
{
uae_u8 b;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (!chipdone) {
chipdone = true;
addextrachip (get_long (4));
static void REGPARAM2 expamem_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (expamem_bank_current && expamem_bank_current != &expamem_bank) {
expamem_bank_current->lput(addr, value);
return;
{
#if EXP_DEBUG
write_log (_T("expamem_wput %x %x\n"), addr, value);
-#endif
-#ifdef JIT
- special_mem |= S_WRITE;
#endif
value &= 0xffff;
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
{
#if EXP_DEBUG
write_log (_T("expamem_bput %x %x\n"), addr, value);
-#endif
-#ifdef JIT
- special_mem |= S_WRITE;
#endif
value &= 0xff;
if (cpuboards[currprefs.cpuboard_type].subtypes[currprefs.cpuboard_subtype].e8) {
}
static void REGPARAM2 expamemz3_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log (_T("warning: Z3 WRITE.L to address $%08x : value $%08x\n"), addr, value);
}
MEMORY_FUNCTIONS(fastmem);
-MEMORY_FUNCTIONS_NOJIT(fastmem_nojit);
+MEMORY_FUNCTIONS(fastmem_nojit);
MEMORY_FUNCTIONS(fastmem2);
-MEMORY_FUNCTIONS_NOJIT(fastmem2_nojit);
+MEMORY_FUNCTIONS(fastmem2_nojit);
addrbank fastmem_bank = {
fastmem_lget, fastmem_wget, fastmem_bget,
fastmem_lput, fastmem_wput, fastmem_bput,
fastmem_xlate, fastmem_check, NULL, _T("fast"), _T("Fast memory"),
- fastmem_lget, fastmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ fastmem_lget, fastmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank fastmem_nojit_bank = {
fastmem_nojit_lget, fastmem_nojit_wget, fastmem_bget,
fastmem_nojit_lput, fastmem_nojit_wput, fastmem_bput,
fastmem_nojit_xlate, fastmem_nojit_check, NULL, NULL, _T("Fast memory (nojit)"),
- fastmem_nojit_lget, fastmem_nojit_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ fastmem_nojit_lget, fastmem_nojit_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
addrbank fastmem2_bank = {
fastmem2_lget, fastmem2_wget, fastmem2_bget,
fastmem2_lput, fastmem2_wput, fastmem2_bput,
fastmem2_xlate, fastmem2_check, NULL,_T("fast2"), _T("Fast memory 2"),
- fastmem2_lget, fastmem2_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ fastmem2_lget, fastmem2_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank fastmem2_nojit_bank = {
fastmem2_nojit_lget, fastmem2_nojit_wget, fastmem2_nojit_bget,
fastmem2_nojit_lput, fastmem2_nojit_wput, fastmem2_nojit_bput,
fastmem2_nojit_xlate, fastmem2_nojit_check, NULL, NULL, _T("Fast memory #2 (nojit)"),
- fastmem2_nojit_lget, fastmem2_nojit_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ fastmem2_nojit_lget, fastmem2_nojit_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank *fastbanks[] =
static uae_u32 REGPARAM2 catweasel_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
write_log (_T("catweasel_lget @%08X!\n"),addr);
return 0;
}
static uae_u32 REGPARAM2 catweasel_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
write_log (_T("catweasel_wget @%08X!\n"),addr);
return 0;
}
static uae_u32 REGPARAM2 catweasel_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= catweasel_start & catweasel_mask;
addr &= catweasel_mask;
return catweasel_do_bget (addr);
static void REGPARAM2 catweasel_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log (_T("catweasel_lput @%08X=%08X!\n"),addr,l);
}
static void REGPARAM2 catweasel_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log (_T("catweasel_wput @%08X=%04X!\n"),addr,w);
}
static void REGPARAM2 catweasel_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= catweasel_start & catweasel_mask;
addr &= catweasel_mask;
catweasel_do_bput (addr, b);
catweasel_lget, catweasel_wget, catweasel_bget,
catweasel_lput, catweasel_wput, catweasel_bput,
catweasel_xlate, catweasel_check, NULL, NULL, _T("Catweasel"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static addrbank *expamem_map_catweasel (void)
filesys_lget, filesys_wget, filesys_bget,
filesys_lput, filesys_wput, filesys_bput,
default_xlate, default_check, NULL, _T("filesys"), _T("Filesystem autoconfig"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE | ABFLAG_INDIRECT
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE | ABFLAG_INDIRECT, S_READ, S_WRITE
};
static uae_u32 filesys_start; /* Determined by the OS */
static uae_u32 REGPARAM2 filesys_lget (uaecptr addr)
{
uae_u8 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= filesys_start & 65535;
addr &= 65535;
m = filesys_bank.baseaddr + addr;
static uae_u32 REGPARAM2 filesys_wget (uaecptr addr)
{
uae_u8 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= filesys_start & 65535;
addr &= 65535;
m = filesys_bank.baseaddr + addr;
static uae_u32 REGPARAM2 filesys_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= filesys_start & 65535;
addr &= 65535;
#if EXP_DEBUG
static void REGPARAM2 filesys_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log (_T("filesys_lput called PC=%08x\n"), M68K_GETPC);
}
static void REGPARAM2 filesys_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
write_log (_T("filesys_wput called PC=%08x\n"), M68K_GETPC);
}
static void REGPARAM2 filesys_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if EXP_DEBUG
write_log (_T("filesys_bput %x %x\n"), addr, b);
#endif
uaeboard_lget, uaeboard_wget, uaeboard_bget,
uaeboard_lput, uaeboard_wput, uaeboard_bput,
default_xlate, default_check, NULL, _T("uaeboard"), _T("uae x autoconfig board"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE | ABFLAG_INDIRECT
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE | ABFLAG_INDIRECT, S_READ, S_WRITE
};
static uae_u32 uaeboard_start; /* Determined by the OS */
static uae_u32 REGPARAM2 uaeboard_lget(uaecptr addr)
{
uae_u8 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= uaeboard_start & 65535;
addr &= 65535;
if (addr == 0x200 || addr == 0x201) {
static uae_u32 REGPARAM2 uaeboard_wget(uaecptr addr)
{
uae_u8 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= uaeboard_start & 65535;
addr &= 65535;
if (addr == 0x200 || addr == 0x201) {
static uae_u32 REGPARAM2 uaeboard_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= uaeboard_start & 65535;
addr &= 65535;
if (addr == 0x200 || addr == 0x201) {
static void REGPARAM2 uaeboard_lput(uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
- write_log(_T("uaeboard_lput called PC=%08x\n"), M68K_GETPC);
+ if (addr >= 0x200 + 0x20 && addr < 0x200 + 0x24) {
+ mousehack_write(addr - 0x200, l >> 16);
+ mousehack_write(addr - 0x200 + 2, l);
+ }
+ write_log(_T("uaeboard_lput %08x = %08x PC=%08x\n"), addr, l, M68K_GETPC);
}
static void REGPARAM2 uaeboard_wput(uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
- write_log(_T("uaeboard_wput called PC=%08x\n"), M68K_GETPC);
+ if (addr >= 0x200 + 0x20 && addr < 0x200 + 0x24)
+ mousehack_write(addr - 0x200, w);
+ write_log(_T("uaeboard_wput %08x = %04x PC=%08x\n"), addr, w, M68K_GETPC);
}
static void REGPARAM2 uaeboard_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if EXP_DEBUG
write_log(_T("uaeboard_bput %x %x\n"), addr, b);
#endif
z3fastmem_lget, z3fastmem_wget, z3fastmem_bget,
z3fastmem_lput, z3fastmem_wput, z3fastmem_bput,
z3fastmem_xlate, z3fastmem_check, NULL, _T("z3"), _T("Zorro III Fast RAM"),
- z3fastmem_lget, z3fastmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ z3fastmem_lget, z3fastmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank z3fastmem2_bank = {
z3fastmem2_lget, z3fastmem2_wget, z3fastmem2_bget,
z3fastmem2_lput, z3fastmem2_wput, z3fastmem2_bput,
z3fastmem2_xlate, z3fastmem2_check, NULL, _T("z3_2"), _T("Zorro III Fast RAM #2"),
- z3fastmem2_lget, z3fastmem2_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ z3fastmem2_lget, z3fastmem2_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank z3chipmem_bank = {
z3chipmem_lget, z3chipmem_wget, z3chipmem_bget,
z3chipmem_lput, z3chipmem_wput, z3chipmem_bput,
z3chipmem_xlate, z3chipmem_check, NULL, _T("z3_chip"), _T("MegaChipRAM"),
- z3chipmem_lget, z3chipmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ z3chipmem_lget, z3chipmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
/* ********************************************************** */
#define FILESYS_BOOTPOINT 0x01e6
#define FILESYS_DIAGAREA 0x2000
+static void fixromoffset(uae_u8 *p, int offset)
+{
+ uaecptr a;
+
+ a = (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | (p[3] << 0);
+ a += offset;
+ p[0] = a >> 24;
+ p[1] = a >> 16;
+ p[2] = a >> 8;
+ p[3] = a >> 0;
+}
+
static addrbank* expamem_init_filesys (int devnum)
{
+ bool ks12 = ks12orolder();
+
/* struct DiagArea - the size has to be large enough to store several device ROMTags */
uae_u8 diagarea[] = { 0x90, 0x00, /* da_Config, da_Flags */
0x02, 0x00, /* da_Size */
};
expamem_init_clear ();
- expamem_write (0x00, Z2_MEM_64KB | rom_card | zorroII);
+ expamem_write (0x00, Z2_MEM_64KB | zorroII | (ks12 ? 0 : rom_card));
expamem_write (0x08, no_shutup);
do_put_mem_word ((uae_u16 *)(expamem + FILESYS_DIAGAREA + FILESYS_BOOTPOINT), 0x4EF9); /* JMP */
do_put_mem_long ((uae_u32 *)(expamem + FILESYS_DIAGAREA + FILESYS_BOOTPOINT + 2), EXPANSION_bootcode);
+#if KS12_BOOT_HACK
+ for (int i = 0; i < 65536 - 26; i++) {
+ uae_u8 *romp = rtarea_bank.baseaddr + i;
+ if (romp[0] == 0x4a && romp[1] == 0xfc) {
+ romp[2] = 0;
+ romp[3] = 0;
+ romp[4] = 0;
+ romp[5] = 0;
+ if (ks12) {
+ // relocate struct resident
+ fixromoffset(romp + 2, i);
+ fixromoffset(romp + 6, i);
+ fixromoffset(romp + 14, i);
+ fixromoffset(romp + 18, i);
+ fixromoffset(romp + 22, i);
+ }
+ }
+ }
+#endif
memcpy (filesys_bank.baseaddr, expamem, 0x3000);
return NULL;
}
allocate_expamem ();
expamem_bank.name = _T("Autoconfig [reset]");
+ if (need_uae_boot_rom() == 0)
+ do_mount = 0;
+ if (uae_boot_rom_type <= 0)
+ do_mount = 0;
+
/* check if Kickstart version is below 1.3 */
- if (kickstart_version && do_mount
- && (/* Kickstart 1.0 & 1.1! */
- kickstart_version == 0xFFFF
- /* Kickstart < 1.3 */
- || kickstart_version < 34))
- {
+ if (ks12orolder() && do_mount) {
/* warn user */
write_log (_T("Kickstart version is below 1.3! Disabling automount devices.\n"));
+#if KS12_BOOT_HACK
+ do_mount = -1;
+#else
do_mount = 0;
+#endif
}
- if (need_uae_boot_rom () == 0)
- do_mount = 0;
- if (uae_boot_rom_type <= 0)
- do_mount = 0;
if (currprefs.cpuboard_type) {
// This may require first 128k slot.
uaecptr oaddr = addr;
uae_u32 v = 0;
int got = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (currprefs.cs_ide == IDE_A600A1200) {
if ((addr & 0xA0000) != 0xA0000)
return 0;
{
uaecptr oaddr = addr;
int got = 0;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.cs_ide == IDE_A600A1200) {
if ((addr & 0xA0000) != 0xA0000)
return;
gayle_lget, gayle_wget, gayle_bget,
gayle_lput, gayle_wput, gayle_bput,
default_xlate, default_check, NULL, NULL, _T("Gayle (low)"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
void gayle_dataflyer_enable(bool enable)
struct ide_hdf *ide = NULL;
int ide_reg;
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
#ifdef NCR
if (currprefs.cs_mbdmac == 2 && (addr & 0xffff) == 0x3000)
return 0xffffffff; // NCR DIP BANK
struct ide_hdf *ide = NULL;
int ide_reg;
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
#ifdef NCR
if (currprefs.cs_mbdmac == 2 && (addr & (0xffff - 1)) == 0x3000)
return 0xffff; // NCR DIP BANK
static uae_u32 REGPARAM2 gayle_bget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
#ifdef NCR
if (currprefs.cs_mbdmac == 2 && (addr & (0xffff - 3)) == 0x3000)
return 0xff; // NCR DIP BANK
{
struct ide_hdf *ide = NULL;
int ide_reg;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (isdataflyerscsiplus(addr, &value, -4)) {
return;
}
{
struct ide_hdf *ide = NULL;
int ide_reg;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#ifdef NCR
if (isdataflyerscsiplus(addr, &value, -2)) {
return;
static void REGPARAM2 gayle_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#ifdef NCR
if (isdataflyerscsiplus(addr, &value, -1)) {
return;
gayle2_lget, gayle2_wget, gayle2_bget,
gayle2_lput, gayle2_wput, gayle2_bput,
default_xlate, default_check, NULL, NULL, _T("Gayle (high)"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static uae_u32 REGPARAM2 gayle2_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = gayle2_wget (addr) << 16;
v |= gayle2_wget (addr + 2);
return v;
static uae_u32 REGPARAM2 gayle2_wget (uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = gayle2_bget (addr) << 8;
v |= gayle2_bget (addr + 1);
return v;
}
static uae_u32 REGPARAM2 gayle2_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return gayle2_read (addr);
}
static void REGPARAM2 gayle2_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle2_wput (addr, value >> 16);
gayle2_wput (addr + 2, value & 0xffff);
}
static void REGPARAM2 gayle2_wput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle2_bput (addr, value >> 8);
gayle2_bput (addr + 1, value & 0xff);
}
static void REGPARAM2 gayle2_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle2_write (addr, value);
}
static uae_u32 REGPARAM2 mbres_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = mbres_wget (addr) << 16;
v |= mbres_wget (addr + 2);
return v;
}
static uae_u32 REGPARAM2 mbres_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return mbres_read (addr, 2);
}
static uae_u32 REGPARAM2 mbres_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return mbres_read (addr, 1);
}
static void REGPARAM2 mbres_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
mbres_wput (addr, value >> 16);
mbres_wput (addr + 2, value & 0xffff);
}
static void REGPARAM2 mbres_wput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
mbres_write (addr, value, 2);
}
static void REGPARAM2 mbres_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
mbres_write (addr, value, 1);
}
mbres_lget, mbres_wget, mbres_bget,
mbres_lput, mbres_wput, mbres_bput,
default_xlate, default_check, NULL, NULL, _T("Motherboard Resources"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE,
};
static struct addrbank_sub mbres_sub_banks[] = {
sub_bank_lget, sub_bank_wget, sub_bank_bget,
sub_bank_lput, sub_bank_wput, sub_bank_bput,
sub_bank_xlate, sub_bank_check, NULL, NULL, _T("Motherboard Resources"),
- sub_bank_lgeti, sub_bank_wgeti, ABFLAG_IO, mbres_sub_banks
+ sub_bank_lgeti, sub_bank_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE, mbres_sub_banks
};
void gayle_hsync (void)
gayle_common_lget, gayle_common_wget, gayle_common_bget,
gayle_common_lput, gayle_common_wput, gayle_common_bput,
gayle_common_xlate, gayle_common_check, NULL, NULL, _T("Gayle PCMCIA Common"),
- gayle_common_lget, gayle_common_wget, ABFLAG_RAM | ABFLAG_SAFE
+ gayle_common_lget, gayle_common_wget,
+ ABFLAG_RAM | ABFLAG_SAFE, 0, 0
};
gayle_attr_lget, gayle_attr_wget, gayle_attr_bget,
gayle_attr_lput, gayle_attr_wput, gayle_attr_bput,
default_xlate, default_check, NULL, NULL, _T("Gayle PCMCIA Attribute/Misc"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static uae_u32 REGPARAM2 gayle_attr_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = gayle_attr_wget (addr) << 16;
v |= gayle_attr_wget (addr + 2);
return v;
static uae_u32 REGPARAM2 gayle_attr_wget (uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (pcmcia_type == PCMCIA_IDE && pcmcia_configured >= 0) {
struct ide_hdf *ide = NULL;
}
static uae_u32 REGPARAM2 gayle_attr_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return gayle_attr_read (addr);
}
static void REGPARAM2 gayle_attr_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle_attr_wput (addr, value >> 16);
gayle_attr_wput (addr + 2, value & 0xffff);
}
static void REGPARAM2 gayle_attr_wput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
if (pcmcia_type == PCMCIA_IDE && pcmcia_configured >= 0) {
struct ide_hdf *ide = NULL;
int reg = get_pcmcmia_ide_reg (addr, 2, &ide);
}
static void REGPARAM2 gayle_attr_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle_attr_write (addr, value);
}
static uae_u32 REGPARAM2 gayle_common_lget (uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = gayle_common_wget (addr) << 16;
v |= gayle_common_wget (addr + 2);
return v;
static uae_u32 REGPARAM2 gayle_common_wget (uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = gayle_common_bget (addr) << 8;
v |= gayle_common_bget (addr + 1);
return v;
}
static uae_u32 REGPARAM2 gayle_common_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return gayle_common_read (addr);
}
static void REGPARAM2 gayle_common_lput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle_common_wput (addr, value >> 16);
gayle_common_wput (addr + 2, value & 0xffff);
}
static void REGPARAM2 gayle_common_wput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle_common_bput (addr, value >> 8);
gayle_common_bput (addr + 1, value & 0xff);
}
static void REGPARAM2 gayle_common_bput (uaecptr addr, uae_u32 value)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
gayle_common_write (addr, value);
}
dstllrmw = NULL;
getpc = "m68k_getpc ()";
- if (using_indirect) {
+ if (using_indirect > 0) {
// tracer
getpc = "m68k_getpci ()";
if (!using_ce020 && !using_prefetch_020 && !using_ce) {
srcli = "get_dilong";
srcwi = "get_diword";
srcbi = "get_dibyte";
- srcl = "get_long";
- dstl = "put_long";
- srcw = "get_word";
- dstw = "put_word";
- srcb = "get_byte";
- dstb = "put_byte";
+ if (using_indirect < 0) {
+ srcl = "get_long_jit";
+ dstl = "put_long_jit";
+ srcw = "get_word_jit";
+ dstw = "put_word_jit";
+ srcb = "get_byte_jit";
+ dstb = "put_byte_jit";
+ } else {
+ srcl = "get_long";
+ dstl = "put_long";
+ srcw = "get_word";
+ dstw = "put_word";
+ srcb = "get_byte";
+ dstb = "put_byte";
+ }
}
if (!dstld)
dstld = dstl;
case i_RTS:
addop_ce020 (curi, 0);
printf ("\tuaecptr pc = %s;\n", getpc);
- if (using_indirect && !using_ce020 && !using_prefetch_020 && !using_ce) {
+ if (using_indirect > 0 && !using_ce020 && !using_prefetch_020 && !using_ce) {
printf("\tm68k_do_rtsi_jit ();\n");
} else if (using_ce020 == 1) {
add_head_cycs (1);
need_endlabel = 1;
}
addcycles000 (2);
- if (using_indirect && !using_ce020 && !using_prefetch_020 && !using_ce) {
+ if (using_indirect > 0 && !using_ce020 && !using_prefetch_020 && !using_ce) {
printf("\tm68k_do_bsri_jit (%s + %d, s);\n", getpc, m68k_pc_offset);
} else if (using_ce020 == 1) {
printf ("\tm68k_do_bsr_ce020 (%s + %d, s);\n", getpc, m68k_pc_offset);
if (using_mmu == 68060 && (curi->mnemo == i_BFCHG || curi->mnemo == i_BFCLR || curi->mnemo == i_BFSET || curi->mnemo == i_BFINS)) {
getb = "mmu060_get_rmw_bitfield";
putb = "mmu060_put_rmw_bitfield";
- } else if (using_mmu || using_ce020 || using_indirect) {
+ } else if (using_mmu || using_ce020 || using_indirect > 0) {
getb = "x_get_bitfield";
putb = "x_put_bitfield";
} else {
}
postfix = id;
- if (id == 0 || id == 11 || id == 13 || id == 20 || id == 21 || id == 22 || id == 23 || id == 24 || id == 31 || id == 32 || id == 33 || id == 40) {
+ if (id == 0 || id == 11 || id == 13 || id == 20 || id == 21 || id == 22 || id == 23 || id == 24 || id == 31 || id == 32 || id == 33 || id == 40 || id == 50) {
if (generate_stbl)
fprintf (stblfile, "#ifdef CPUEMU_%d%s\n", postfix, extraup);
postfix2 = postfix;
generate_includes (stdout, id);
}
- using_indirect = 0;
using_exception_3 = 1;
using_prefetch = 0;
using_prefetch_020 = 0;
memory_cycle_cnt = 4;
mmu_postfix = "";
using_simple_cycles = 0;
+ using_indirect = using_ce || using_ce020 || using_prefetch_020 || id >= 50;
if (id == 11 || id == 12) { // 11 = 68010 prefetch, 12 = 68000 prefetch
cpu_level = id == 11 ? 1 : 0;
for (rp = 0; rp < nr_cpuop_funcs; rp++)
opcode_next_clev[rp] = cpu_level;
} else if (id < 6) {
- cpu_level = 5 - (id - 0); // "generic" + direct
+ cpu_level = 5 - (id - 0); // "generic"
} else if (id >= 40 && id < 46) {
- cpu_level = 5 - (id - 40); // "generic" + indirect
+ cpu_level = 5 - (id - 40); // "generic" + direct
if (id == 40) {
read_counts();
for (rp = 0; rp < nr_cpuop_funcs; rp++)
opcode_next_clev[rp] = cpu_level;
}
- }
- using_indirect = using_ce || using_ce020 || using_prefetch_020 || id >= 40;
+ using_indirect = -1;
+ } else if (id >= 50 && id < 56) {
+ cpu_level = 5 - (id - 50); // "generic" + indirect
+ if (id == 50) {
+ read_counts();
+ for (rp = 0; rp < nr_cpuop_funcs; rp++)
+ opcode_next_clev[rp] = cpu_level;
+ }
+ }
+
if (generate_stbl) {
- if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46))
+ if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46) || (id > 50 && id < 56))
fprintf (stblfile, "#ifndef CPUEMU_68000_ONLY\n");
fprintf (stblfile, "const struct cputbl CPUFUNC(op_smalltbl_%d%s)[] = {\n", postfix, extra);
}
endlabelno = id * 10000;
generate_func (extra);
if (generate_stbl) {
- if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46))
+ if ((id > 0 && id < 6) || (id >= 20 && id < 40) || (id > 40 && id < 46) || (id > 50 && id < 56))
fprintf (stblfile, "#endif /* CPUEMU_68000_ONLY */\n");
if (postfix2 >= 0)
fprintf (stblfile, "#endif /* CPUEMU_%d%s */\n", postfix2, extraup);
stblfile = fopen ("cpustbl.cpp", "wb");
generate_includes (stblfile, 0);
- for (i = 0; i <= 45; i++) {
+ for (i = 0; i <= 55; i++) {
if ((i >= 6 && i < 11) || (i > 14 && i < 20) || (i > 25 && i < 31) || (i > 33 && i < 40))
continue;
generate_stbl = 1;
gfxboard_lget_mem, gfxboard_wget_mem, gfxboard_bget_mem,
gfxboard_lput_mem, gfxboard_wput_mem, gfxboard_bput_mem,
gfxboard_xlate, gfxboard_check, NULL, NULL, NULL,
- gfxboard_lget_mem, gfxboard_wget_mem, ABFLAG_RAM | ABFLAG_THREADSAFE
+ gfxboard_lget_mem, gfxboard_wget_mem,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
static addrbank gfxboard_bank_memory_nojit = {
gfxboard_lget_mem_nojit, gfxboard_wget_mem_nojit, gfxboard_bget_mem_nojit,
gfxboard_lput_mem_nojit, gfxboard_wput_mem_nojit, gfxboard_bput_mem_nojit,
gfxboard_xlate, gfxboard_check, NULL, NULL, NULL,
- gfxboard_lget_mem_nojit, gfxboard_wget_mem_nojit, ABFLAG_RAM | ABFLAG_THREADSAFE
+ gfxboard_lget_mem_nojit, gfxboard_wget_mem_nojit,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank gfxboard_bank_wbsmemory = {
gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, gfxboard_bget_wbsmem,
gfxboard_lput_wbsmem, gfxboard_wput_wbsmem, gfxboard_bput_wbsmem,
gfxboard_xlate, gfxboard_check, NULL, NULL, NULL,
- gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, ABFLAG_RAM | ABFLAG_THREADSAFE
+ gfxboard_lget_wbsmem, gfxboard_wget_wbsmem,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank gfxboard_bank_lbsmemory = {
gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, gfxboard_bget_lbsmem,
gfxboard_lput_lbsmem, gfxboard_wput_lbsmem, gfxboard_bput_lbsmem,
gfxboard_xlate, gfxboard_check, NULL, NULL, NULL,
- gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, ABFLAG_RAM | ABFLAG_THREADSAFE
+ gfxboard_lget_lbsmem, gfxboard_wget_lbsmem,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank gfxboard_bank_nbsmemory = {
gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, gfxboard_bget_bsmem,
gfxboard_lput_nbsmem, gfxboard_wput_nbsmem, gfxboard_bput_bsmem,
gfxboard_xlate, gfxboard_check, NULL, NULL, _T("Picasso IV banked VRAM"),
- gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, ABFLAG_RAM | ABFLAG_THREADSAFE
+ gfxboard_lget_nbsmem, gfxboard_wget_nbsmem,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank gfxboard_bank_registers = {
gfxboard_lget_regs, gfxboard_wget_regs, gfxboard_bget_regs,
gfxboard_lput_regs, gfxboard_wput_regs, gfxboard_bput_regs,
default_xlate, default_check, NULL, NULL, NULL,
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static addrbank gfxboard_bank_special = {
gfxboards_lget_regs, gfxboards_wget_regs, gfxboards_bget_regs,
gfxboards_lput_regs, gfxboards_wput_regs, gfxboards_bput_regs,
default_xlate, default_check, NULL, NULL, _T("Picasso IV MISC"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static void init_board (void)
// LONG byteswapped VRAM
static uae_u32 REGPARAM2 gfxboard_lget_lbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_wget_lbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_bget_lbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
static void REGPARAM2 gfxboard_lput_lbsmem (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static void REGPARAM2 gfxboard_wput_lbsmem (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static void REGPARAM2 gfxboard_bput_lbsmem (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
// WORD byteswapped VRAM
static uae_u32 REGPARAM2 gfxboard_lget_wbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_wget_wbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_bget_wbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
static void REGPARAM2 gfxboard_lput_wbsmem (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static void REGPARAM2 gfxboard_wput_wbsmem (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
}
static void REGPARAM2 gfxboard_bput_wbsmem (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
if (addr == -1)
// normal or byteswapped (banked) vram
static uae_u32 REGPARAM2 gfxboard_lget_nbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr_bs (addr, 0, &bs);
}
static uae_u32 REGPARAM2 gfxboard_wget_nbsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr_bs (addr, 0, &bs);
static void REGPARAM2 gfxboard_lput_nbsmem (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr_bs (addr, 0, &bs);
}
static void REGPARAM2 gfxboard_wput_nbsmem (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr_bs (addr, 0, &bs);
static uae_u32 REGPARAM2 gfxboard_bget_bsmem (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr, 0);
}
static void REGPARAM2 gfxboard_bput_bsmem (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int bs = 0;
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr_bs (addr, 0, &bs);
// normal vram, no jit direct
static uae_u32 REGPARAM2 gfxboard_lget_mem_nojit (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_wget_mem_nojit (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
}
static uae_u32 REGPARAM2 gfxboard_bget_mem_nojit (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
}
static void REGPARAM2 gfxboard_lput_mem_nojit (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
}
static void REGPARAM2 gfxboard_wput_mem_nojit (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
}
static void REGPARAM2 gfxboard_bput_mem_nojit (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr -= gfxboardmem_start & gfxmem_bank.mask;
addr = fixaddr (addr);
if (addr == -1)
static uae_u32 REGPARAM2 gfxboard_bget_mem_autoconfig (uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr < GFXBOARD_AUTOCONFIG_SIZE)
v = automemory[addr];
static void REGPARAM2 gfxboard_wput_mem_autoconfig (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (board->configtype == 2)
return;
b &= 0xffff;
static void REGPARAM2 gfxboard_bput_mem_autoconfig (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (addr == 0x48) {
static uae_u32 REGPARAM2 gfxboard_lget_regs (uaecptr addr)
{
uae_u32 v = 0xffffffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr = mungeaddr (addr, false);
if (addr)
v = vgaio->read (&vga, addr, 4);
static uae_u32 REGPARAM2 gfxboard_wget_regs (uaecptr addr)
{
uae_u16 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr = mungeaddr (addr, false);
if (addr) {
uae_u8 v1, v2;
static uae_u32 REGPARAM2 gfxboard_bget_regs (uaecptr addr)
{
uae_u8 v = 0xff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr >= 0x8000) {
write_log (_T("GFX SPECIAL BGET IO %08X\n"), addr);
static void REGPARAM2 gfxboard_lput_regs (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
//write_log (_T("GFX LONG PUT IO %04X = %04X\n"), addr & 65535, l);
addr = mungeaddr (addr, true);
if (addr) {
}
static void REGPARAM2 gfxboard_wput_regs (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
//write_log (_T("GFX WORD PUT IO %04X = %04X\n"), addr & 65535, w & 0xffff);
addr = mungeaddr (addr, true);
if (addr) {
}
static void REGPARAM2 gfxboard_bput_regs (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
//write_log (_T("GFX BYTE PUT IO %04X = %02X\n"), addr & 65535, b & 0xff);
addr &= 65535;
if (addr >= 0x8000) {
static uae_u32 REGPARAM2 gfxboard_bget_regs_autoconfig (uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr < GFXBOARD_AUTOCONFIG_SIZE)
v = automemory[addr];
static void REGPARAM2 gfxboard_bput_regs_autoconfig (uaecptr addr, uae_u32 b)
{
addrbank *ab;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (addr == 0x48) {
static uae_u32 REGPARAM2 gfxboards_lget_regs (uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= p4_special_mask;
// pci config
if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
static uae_u32 REGPARAM2 gfxboards_wget_regs (uaecptr addr)
{
uae_u16 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= p4_special_mask;
// pci config
if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
static uae_u32 REGPARAM2 gfxboards_bget_regs (uaecptr addr)
{
uae_u8 v = 0xff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= p4_special_mask;
// pci config
}
static void REGPARAM2 gfxboards_lput_regs (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= p4_special_mask;
if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
uae_u32 addr2 = addr & 0xffff;
}
static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
uae_u16 w = (uae_u16)v;
addr &= p4_special_mask;
if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
static void REGPARAM2 gfxboards_bput_regs (uaecptr addr, uae_u32 v)
{
uae_u8 b = (uae_u8)v;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= p4_special_mask;
if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
uae_u32 addr2 = addr & 0xffff;
uaecptr oaddr = addr;
uae_u8 v = 0xff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
-
addr &= board->mask;
#if DEBUG_IDE
{
uae_u32 v = 0xffff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
-
addr &= board->mask;
if (addr < 0x40 && (!board->configured || board->keepautoconfig)) {
uaecptr oaddr = addr;
addr &= board->mask;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
#if DEBUG_IDE
write_log(_T("IDE IO BYTE WRITE %08x=%02x %08x\n"), addr, v, M68K_GETPC);
#endif
{
addr &= board->mask;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
-
- if (addr == 0xf04a)
- addr &= 0xffff;
-
#if DEBUG_IDE
write_log(_T("IDE IO WORD WRITE %08x=%04x %08x\n"), addr, v, M68K_GETPC);
#endif
ide_controller_gvp_lget, ide_controller_gvp_wget, ide_controller_gvp_bget,
ide_controller_gvp_lput, ide_controller_gvp_wput, ide_controller_gvp_bput,
default_xlate, default_check, NULL, NULL, _T("GVP IDE"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
IDE_MEMORY_FUNCTIONS(ide_rom_gvp, ide, gvp_ide_rom_board);
ide_rom_gvp_lget, ide_rom_gvp_wget, ide_rom_gvp_bget,
ide_rom_gvp_lput, ide_rom_gvp_wput, ide_rom_gvp_bput,
default_xlate, default_check, NULL, NULL, _T("GVP BOOT"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static void REGPARAM2 ide_generic_bput (uaecptr addr, uae_u32 b)
ide_generic_lget, ide_generic_wget, ide_generic_bget,
ide_generic_lput, ide_generic_wput, ide_generic_bput,
default_xlate, default_check, NULL, NULL, _T("IDE"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
extern void input_mousehack_mouseoffset (uaecptr pointerprefs);
extern int mousehack_alive (void);
extern void mousehack_wakeup(void);
+extern void mousehack_write(int reg, uae_u16 val);
extern void setmouseactive (int);
extern bool ismouseactive (void);
/* for instruction opcode/operand fetches */
mem_get_func lgeti, wgeti;
int flags;
+ int jit_read_flag, jit_write_flag;
struct addrbank_sub *sub_banks;
uae_u32 mask;
uae_u32 startmask;
#define CE_MEMBANK_FAST16 4
extern uae_u8 ce_banktype[65536], ce_cachable[65536];
-#ifdef JIT
-#define MEMORY_LGET(name, nojit) \
+#define MEMORY_LGET(name) \
static uae_u32 REGPARAM3 name ## _lget (uaecptr) REGPARAM; \
static uae_u32 REGPARAM2 name ## _lget (uaecptr addr) \
{ \
uae_u8 *m; \
- if (nojit) special_mem |= S_READ; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
m = name ## _bank.baseaddr + addr; \
return do_get_mem_long ((uae_u32 *)m); \
}
-#define MEMORY_WGET(name, nojit) \
+#define MEMORY_WGET(name) \
static uae_u32 REGPARAM3 name ## _wget (uaecptr) REGPARAM; \
static uae_u32 REGPARAM2 name ## _wget (uaecptr addr) \
{ \
uae_u8 *m; \
- if (nojit) special_mem |= S_READ; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
m = name ## _bank.baseaddr + addr; \
return do_get_mem_word ((uae_u16 *)m); \
}
-#define MEMORY_BGET(name, nojit) \
+#define MEMORY_BGET(name) \
static uae_u32 REGPARAM3 name ## _bget (uaecptr) REGPARAM; \
static uae_u32 REGPARAM2 name ## _bget (uaecptr addr) \
{ \
- if (nojit) special_mem |= S_READ; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
return name ## _bank.baseaddr[addr]; \
}
-#define MEMORY_LPUT(name, nojit) \
+#define MEMORY_LPUT(name) \
static void REGPARAM3 name ## _lput (uaecptr, uae_u32) REGPARAM; \
static void REGPARAM2 name ## _lput (uaecptr addr, uae_u32 l) \
{ \
uae_u8 *m; \
- if (nojit) special_mem |= S_WRITE; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
m = name ## _bank.baseaddr + addr; \
do_put_mem_long ((uae_u32 *)m, l); \
}
-#define MEMORY_WPUT(name, nojit) \
+#define MEMORY_WPUT(name) \
static void REGPARAM3 name ## _wput (uaecptr, uae_u32) REGPARAM; \
static void REGPARAM2 name ## _wput (uaecptr addr, uae_u32 w) \
{ \
uae_u8 *m; \
- if (nojit) special_mem |= S_WRITE; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
m = name ## _bank.baseaddr + addr; \
do_put_mem_word ((uae_u16 *)m, w); \
}
-#define MEMORY_BPUT(name, nojit) \
+#define MEMORY_BPUT(name) \
static void REGPARAM3 name ## _bput (uaecptr, uae_u32) REGPARAM; \
static void REGPARAM2 name ## _bput (uaecptr addr, uae_u32 b) \
{ \
- if (nojit) special_mem |= S_WRITE; \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
name ## _bank.baseaddr[addr] = b; \
addr &= name ## _bank.mask; \
return name ## _bank.baseaddr + addr; \
}
-#else
-#define MEMORY_LGET(name, nojit) \
-static uae_u32 REGPARAM3 name ## _lget (uaecptr) REGPARAM; \
-static uae_u32 REGPARAM2 name ## _lget (uaecptr addr) \
-{ \
- uae_u8 *m; \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- m = name ## _bank.baseaddr + addr; \
- return do_get_mem_long ((uae_u32 *)m); \
-}
-#define MEMORY_WGET(name, nojit) \
-static uae_u32 REGPARAM3 name ## _wget (uaecptr) REGPARAM; \
-static uae_u32 REGPARAM2 name ## _wget (uaecptr addr) \
-{ \
- uae_u8 *m; \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- m = name ## _bank.baseaddr + addr; \
- return do_get_mem_word ((uae_u16 *)m); \
-}
-#define MEMORY_BGET(name, nojit) \
-static uae_u32 REGPARAM3 name ## _bget (uaecptr) REGPARAM; \
-static uae_u32 REGPARAM2 name ## _bget (uaecptr addr) \
-{ \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- return name ## _bank.baseaddr[addr]; \
-}
-#define MEMORY_LPUT(name, nojit) \
-static void REGPARAM3 name ## _lput (uaecptr, uae_u32) REGPARAM; \
-static void REGPARAM2 name ## _lput (uaecptr addr, uae_u32 l) \
-{ \
- uae_u8 *m; \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- m = name ## _bank.baseaddr + addr; \
- do_put_mem_long ((uae_u32 *)m, l); \
-}
-#define MEMORY_WPUT(name, nojit) \
-static void REGPARAM3 name ## _wput (uaecptr, uae_u32) REGPARAM; \
-static void REGPARAM2 name ## _wput (uaecptr addr, uae_u32 w) \
-{ \
- uae_u8 *m; \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- m = name ## _bank.baseaddr + addr; \
- do_put_mem_word ((uae_u16 *)m, w); \
-}
-#define MEMORY_BPUT(name, nojit) \
-static void REGPARAM3 name ## _bput (uaecptr, uae_u32) REGPARAM; \
-static void REGPARAM2 name ## _bput (uaecptr addr, uae_u32 b) \
-{ \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- name ## _bank.baseaddr[addr] = b; \
-}
-#define MEMORY_CHECK(name) \
-static int REGPARAM3 name ## _check (uaecptr addr, uae_u32 size) REGPARAM; \
-static int REGPARAM2 name ## _check (uaecptr addr, uae_u32 size) \
-{ \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- return (addr + size) <= name ## _bank.allocated; \
-}
-#define MEMORY_XLATE(name) \
-static uae_u8 *REGPARAM3 name ## _xlate (uaecptr addr) REGPARAM; \
-static uae_u8 *REGPARAM2 name ## _xlate (uaecptr addr) \
-{ \
- addr -= name ## _bank.start & name ## _bank.mask; \
- addr &= name ## _bank.mask; \
- return name ## _bank.baseaddr + addr; \
-}
-#endif
#define DECLARE_MEMORY_FUNCTIONS(name) \
static uae_u32 REGPARAM3 NOWARN_UNUSED(name ## _lget) (uaecptr) REGPARAM; \
static uae_u8 *REGPARAM3 NOWARN_UNUSED(name ## _xlate_ ## suffix) (uaecptr addr) REGPARAM;
#define MEMORY_FUNCTIONS(name) \
-MEMORY_LGET(name, 0); \
-MEMORY_WGET(name, 0); \
-MEMORY_BGET(name, 0); \
-MEMORY_LPUT(name, 0); \
-MEMORY_WPUT(name, 0); \
-MEMORY_BPUT(name, 0); \
-MEMORY_CHECK(name); \
-MEMORY_XLATE(name);
-
-#define MEMORY_FUNCTIONS_NOJIT(name) \
-MEMORY_LGET(name, 1); \
-MEMORY_WGET(name, 1); \
-MEMORY_BGET(name, 1); \
-MEMORY_LPUT(name, 1); \
-MEMORY_WPUT(name, 1); \
-MEMORY_BPUT(name, 1); \
+MEMORY_LGET(name); \
+MEMORY_WGET(name); \
+MEMORY_BGET(name); \
+MEMORY_LPUT(name); \
+MEMORY_WPUT(name); \
+MEMORY_BPUT(name); \
MEMORY_CHECK(name); \
MEMORY_XLATE(name);
STATIC_INLINE uae_u32 get_long (uaecptr addr)
{
-#if 0
- printf("get_long %08x -> %08x\n", addr, longget(addr));
-#endif
return longget (addr);
}
STATIC_INLINE uae_u32 get_word (uaecptr addr)
return wordgeti (addr);
}
+STATIC_INLINE uae_u32 get_long_jit(uaecptr addr)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_read_flag;
+ return bank->lget(addr);
+}
+STATIC_INLINE uae_u32 get_word_jit(uaecptr addr)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_read_flag;
+ return bank->wget(addr);
+}
+STATIC_INLINE uae_u32 get_byte_jit(uaecptr addr)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_read_flag;
+ return bank->bget(addr);
+}
+STATIC_INLINE uae_u32 get_longi_jit(uaecptr addr)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_read_flag;
+ return bank->lgeti(addr);
+}
+STATIC_INLINE uae_u32 get_wordi_jit(uaecptr addr)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_read_flag;
+ return bank->wgeti(addr);
+}
+
/*
* Read a host pointer from addr
*/
byteput(addr, b);
}
+STATIC_INLINE void put_long_jit(uaecptr addr, uae_u32 l)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_write_flag;
+ bank->lput(addr, l);
+}
+STATIC_INLINE void put_word_jit(uaecptr addr, uae_u32 l)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_write_flag;
+ bank->wput(addr, l);
+}
+STATIC_INLINE void put_byte_jit(uaecptr addr, uae_u32 l)
+{
+ addrbank *bank = &get_mem_bank(addr);
+ special_mem |= bank->jit_write_flag;
+ bank->bput(addr, l);
+}
+
extern void put_long_slow (uaecptr addr, uae_u32 v);
extern void put_word_slow (uaecptr addr, uae_u32 v);
extern void put_byte_slow (uaecptr addr, uae_u32 v);
/* 68060 */
extern const struct cputbl op_smalltbl_0_ff[];
extern const struct cputbl op_smalltbl_40_ff[];
+extern const struct cputbl op_smalltbl_50_ff[];
extern const struct cputbl op_smalltbl_24_ff[]; // CE
extern const struct cputbl op_smalltbl_33_ff[]; // MMU
/* 68040 */
extern const struct cputbl op_smalltbl_1_ff[];
extern const struct cputbl op_smalltbl_41_ff[];
+extern const struct cputbl op_smalltbl_51_ff[];
extern const struct cputbl op_smalltbl_25_ff[]; // CE
extern const struct cputbl op_smalltbl_31_ff[]; // MMU
/* 68030 */
extern const struct cputbl op_smalltbl_2_ff[];
extern const struct cputbl op_smalltbl_42_ff[];
+extern const struct cputbl op_smalltbl_52_ff[];
extern const struct cputbl op_smalltbl_22_ff[]; // prefetch
extern const struct cputbl op_smalltbl_23_ff[]; // CE
extern const struct cputbl op_smalltbl_32_ff[]; // MMU
/* 68020 */
extern const struct cputbl op_smalltbl_3_ff[];
extern const struct cputbl op_smalltbl_43_ff[];
+extern const struct cputbl op_smalltbl_53_ff[];
extern const struct cputbl op_smalltbl_20_ff[]; // prefetch
extern const struct cputbl op_smalltbl_21_ff[]; // CE
/* 68010 */
extern const struct cputbl op_smalltbl_4_ff[];
extern const struct cputbl op_smalltbl_44_ff[];
+extern const struct cputbl op_smalltbl_54_ff[];
extern const struct cputbl op_smalltbl_11_ff[]; // prefetch
extern const struct cputbl op_smalltbl_13_ff[]; // CE
/* 68000 */
extern const struct cputbl op_smalltbl_5_ff[];
extern const struct cputbl op_smalltbl_45_ff[];
+extern const struct cputbl op_smalltbl_55_ff[];
extern const struct cputbl op_smalltbl_12_ff[]; // prefetch
extern const struct cputbl op_smalltbl_14_ff[]; // CE
static uae_u32 REGPARAM2 tms_bget(uaecptr addr)
{
uae_u32 v = 0xff;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (!tms_configured) {
v = tms_config[addr];
static uae_u32 REGPARAM2 tms_wget(uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (tms_configured) {
v = tms_device.host_r(tms_space, addr >> 1);
static uae_u32 REGPARAM2 tms_lget(uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
v = tms_wget(addr) << 16;
v |= tms_wget(addr + 2);
static void REGPARAM2 tms_wput(uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
if (tms_configured) {
//write_log(_T("TMS write %08x = %04x PC=%08x\n"), addr, w & 0xffff, M68K_GETPC);
static void REGPARAM2 tms_lput(uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
tms_wput(addr, l >> 16);
tms_wput(addr + 2, l);
static void REGPARAM2 tms_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (!tms_configured) {
tms_lget, tms_wget, tms_bget,
tms_lput, tms_wput, tms_bput,
default_xlate, default_check, NULL, NULL, _T("A2410"),
- tms_lget, tms_wget, ABFLAG_IO
+ tms_lget, tms_wget,
+ ABFLAG_IO, S_READ, S_WRITE
};
static bool a2410_modechanged;
static uae_u32 REGPARAM2 dummy_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (currprefs.illegal_mem)
dummylog (0, addr, 4, 0, 0);
return dummy_get (addr, 4, false);
}
uae_u32 REGPARAM2 dummy_lgeti (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (currprefs.illegal_mem)
dummylog (0, addr, 4, 0, 1);
return dummy_get (addr, 4, true);
static uae_u32 REGPARAM2 dummy_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
#if 0
if (addr == 0xb0b000) {
extern uae_u16 isideint(void);
}
uae_u32 REGPARAM2 dummy_wgeti (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (currprefs.illegal_mem)
dummylog (0, addr, 2, 0, 1);
return dummy_get (addr, 2, true);
static uae_u32 REGPARAM2 dummy_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (currprefs.illegal_mem)
dummylog (0, addr, 1, 0, 0);
return dummy_get (addr, 1, false);
static void REGPARAM2 dummy_lput (uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
dummylog (1, addr, 4, l, 0);
dummy_put (addr, 4, l);
}
static void REGPARAM2 dummy_wput (uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
dummylog (1, addr, 2, w, 0);
dummy_put (addr, 2, w);
}
static void REGPARAM2 dummy_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
dummylog (1, addr, 1, b, 0);
dummy_put (addr, 1, b);
static int REGPARAM2 dummy_check (uaecptr addr, uae_u32 size)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return 0;
}
static void REGPARAM2 none_put (uaecptr addr, uae_u32 v)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
static uae_u32 REGPARAM2 ones_get (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return 0xffffffff;
}
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= chipmem_bank.mask;
m = (uae_u32 *)(chipmem_bank.baseaddr + addr);
ce2_timeout ();
{
uae_u16 *m, v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= chipmem_bank.mask;
m = (uae_u16 *)(chipmem_bank.baseaddr + addr);
ce2_timeout ();
static uae_u32 REGPARAM2 chipmem_bget_ce2 (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= chipmem_bank.mask;
ce2_timeout ();
return chipmem_bank.baseaddr[addr];
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= chipmem_bank.mask;
m = (uae_u32 *)(chipmem_bank.baseaddr + addr);
ce2_timeout ();
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= chipmem_bank.mask;
m = (uae_u16 *)(chipmem_bank.baseaddr + addr);
ce2_timeout ();
static void REGPARAM2 chipmem_bput_ce2 (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= chipmem_bank.mask;
ce2_timeout ();
chipmem_bank.baseaddr[addr] = b;
static void REGPARAM2 chipmem_dummy_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
-
static void REGPARAM2 chipmem_dummy_wput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
-
static void REGPARAM2 chipmem_dummy_lput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
}
static uae_u32 REGPARAM2 chipmem_dummy_bget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return chipmem_dummy ();
}
static uae_u32 REGPARAM2 chipmem_dummy_wget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return chipmem_dummy ();
}
static uae_u32 REGPARAM2 chipmem_dummy_lget (uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
return (chipmem_dummy () << 16) | chipmem_dummy ();
}
static void REGPARAM2 kickmem_lput (uaecptr addr, uae_u32 b)
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.rom_readwrite && rom_write_enabled) {
addr &= kickmem_bank.mask;
m = (uae_u32 *)(kickmem_bank.baseaddr + addr);
static void REGPARAM2 kickmem_wput (uaecptr addr, uae_u32 b)
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.rom_readwrite && rom_write_enabled) {
addr &= kickmem_bank.mask;
m = (uae_u16 *)(kickmem_bank.baseaddr + addr);
static void REGPARAM2 kickmem_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.rom_readwrite && rom_write_enabled) {
addr &= kickmem_bank.mask;
kickmem_bank.baseaddr[addr] = b;
static void REGPARAM2 kickmem2_lput (uaecptr addr, uae_u32 l)
{
uae_u32 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= kickmem_bank.mask;
m = (uae_u32 *)(kickmem_bank.baseaddr + addr);
do_put_mem_long (m, l);
static void REGPARAM2 kickmem2_wput (uaecptr addr, uae_u32 w)
{
uae_u16 *m;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= kickmem_bank.mask;
m = (uae_u16 *)(kickmem_bank.baseaddr + addr);
do_put_mem_word (m, w);
static void REGPARAM2 kickmem2_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= kickmem_bank.mask;
kickmem_bank.baseaddr[addr] = b;
}
static void REGPARAM2 extendedkickmem_lput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem lput at %08x\n"), addr);
}
static void REGPARAM2 extendedkickmem_wput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem wput at %08x\n"), addr);
}
static void REGPARAM2 extendedkickmem_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem lput at %08x\n"), addr);
}
static void REGPARAM2 extendedkickmem2_lput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem2 lput at %08x\n"), addr);
}
static void REGPARAM2 extendedkickmem2_wput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem2 wput at %08x\n"), addr);
}
static void REGPARAM2 extendedkickmem2_bput (uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (currprefs.illegal_mem)
write_log (_T("Illegal extendedkickmem2 lput at %08x\n"), addr);
}
dummy_lget, dummy_wget, dummy_bget,
dummy_lput, dummy_wput, dummy_bput,
default_xlate, dummy_check, NULL, NULL, NULL,
- dummy_lgeti, dummy_wgeti, ABFLAG_NONE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_NONE, S_READ, S_WRITE
};
addrbank ones_bank = {
ones_get, ones_get, ones_get,
none_put, none_put, none_put,
default_xlate, dummy_check, NULL, NULL, _T("Ones"),
- dummy_lgeti, dummy_wgeti, ABFLAG_NONE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_NONE, S_READ, S_WRITE
};
addrbank chipmem_bank = {
chipmem_lget, chipmem_wget, chipmem_bget,
chipmem_lput, chipmem_wput, chipmem_bput,
chipmem_xlate, chipmem_check, NULL, _T("chip"), _T("Chip memory"),
- chipmem_lget, chipmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ chipmem_lget, chipmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank chipmem_dummy_bank = {
chipmem_dummy_lget, chipmem_dummy_wget, chipmem_dummy_bget,
chipmem_dummy_lput, chipmem_dummy_wput, chipmem_dummy_bput,
default_xlate, dummy_check, NULL, NULL, _T("Dummy Chip memory"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
chipmem_lget_ce2, chipmem_wget_ce2, chipmem_bget_ce2,
chipmem_lput_ce2, chipmem_wput_ce2, chipmem_bput_ce2,
chipmem_xlate, chipmem_check, NULL, NULL, _T("Chip memory (68020 'ce')"),
- chipmem_lget_ce2, chipmem_wget_ce2, ABFLAG_RAM
+ chipmem_lget_ce2, chipmem_wget_ce2,
+ ABFLAG_RAM, S_READ, S_WRITE
};
#endif
bogomem_lget, bogomem_wget, bogomem_bget,
bogomem_lput, bogomem_wput, bogomem_bput,
bogomem_xlate, bogomem_check, NULL, _T("bogo"), _T("Slow memory"),
- bogomem_lget, bogomem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ bogomem_lget, bogomem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank cardmem_bank = {
cardmem_lget, cardmem_wget, cardmem_bget,
cardmem_lput, cardmem_wput, cardmem_bput,
cardmem_xlate, cardmem_check, NULL, _T("rom_e0"), _T("CDTV memory card"),
- cardmem_lget, cardmem_wget, ABFLAG_RAM
+ cardmem_lget, cardmem_wget,
+ ABFLAG_RAM, 0, 0
};
addrbank mem25bit_bank = {
mem25bit_lget, mem25bit_wget, mem25bit_bget,
mem25bit_lput, mem25bit_wput, mem25bit_bput,
mem25bit_xlate, mem25bit_check, NULL, _T("25bitmem"), _T("25bit memory"),
- mem25bit_lget, mem25bit_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ mem25bit_lget, mem25bit_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank a3000lmem_bank = {
a3000lmem_lget, a3000lmem_wget, a3000lmem_bget,
a3000lmem_lput, a3000lmem_wput, a3000lmem_bput,
a3000lmem_xlate, a3000lmem_check, NULL, _T("ramsey_low"), _T("RAMSEY memory (low)"),
- a3000lmem_lget, a3000lmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ a3000lmem_lget, a3000lmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank a3000hmem_bank = {
a3000hmem_lget, a3000hmem_wget, a3000hmem_bget,
a3000hmem_lput, a3000hmem_wput, a3000hmem_bput,
a3000hmem_xlate, a3000hmem_check, NULL, _T("ramsey_high"), _T("RAMSEY memory (high)"),
- a3000hmem_lget, a3000hmem_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ a3000hmem_lget, a3000hmem_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank kickmem_bank = {
kickmem_lget, kickmem_wget, kickmem_bget,
kickmem_lput, kickmem_wput, kickmem_bput,
kickmem_xlate, kickmem_check, NULL, _T("kick"), _T("Kickstart ROM"),
- kickmem_lget, kickmem_wget, ABFLAG_ROM | ABFLAG_THREADSAFE
+ kickmem_lget, kickmem_wget,
+ ABFLAG_ROM | ABFLAG_THREADSAFE, 0, S_WRITE
};
addrbank kickram_bank = {
kickmem_lget, kickmem_wget, kickmem_bget,
kickmem2_lput, kickmem2_wput, kickmem2_bput,
kickmem_xlate, kickmem_check, NULL, NULL, _T("Kickstart Shadow RAM"),
- kickmem_lget, kickmem_wget, ABFLAG_UNK | ABFLAG_SAFE
+ kickmem_lget, kickmem_wget,
+ ABFLAG_UNK | ABFLAG_SAFE, 0, 0
};
addrbank extendedkickmem_bank = {
extendedkickmem_lget, extendedkickmem_wget, extendedkickmem_bget,
extendedkickmem_lput, extendedkickmem_wput, extendedkickmem_bput,
extendedkickmem_xlate, extendedkickmem_check, NULL, NULL, _T("Extended Kickstart ROM"),
- extendedkickmem_lget, extendedkickmem_wget, ABFLAG_ROM | ABFLAG_THREADSAFE
+ extendedkickmem_lget, extendedkickmem_wget,
+ ABFLAG_ROM | ABFLAG_THREADSAFE, 0, S_WRITE
};
addrbank extendedkickmem2_bank = {
extendedkickmem2_lget, extendedkickmem2_wget, extendedkickmem2_bget,
extendedkickmem2_lput, extendedkickmem2_wput, extendedkickmem2_bput,
extendedkickmem2_xlate, extendedkickmem2_check, NULL, _T("rom_a8"), _T("Extended 2nd Kickstart ROM"),
- extendedkickmem2_lget, extendedkickmem2_wget, ABFLAG_ROM | ABFLAG_THREADSAFE
+ extendedkickmem2_lget, extendedkickmem2_wget,
+ ABFLAG_ROM | ABFLAG_THREADSAFE, 0, S_WRITE
};
MEMORY_FUNCTIONS(custmem1);
custmem1_lget, custmem1_wget, custmem1_bget,
custmem1_lput, custmem1_wput, custmem1_bput,
custmem1_xlate, custmem1_check, NULL, _T("custmem1"), _T("Non-autoconfig RAM #1"),
- custmem1_lget, custmem1_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ custmem1_lget, custmem1_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
addrbank custmem2_bank = {
custmem2_lget, custmem2_wget, custmem2_bget,
custmem2_lput, custmem2_wput, custmem2_bput,
custmem2_xlate, custmem2_check, NULL, _T("custmem2"), _T("Non-autoconfig RAM #2"),
- custmem2_lget, custmem2_wget, ABFLAG_RAM | ABFLAG_THREADSAFE
+ custmem2_lget, custmem2_wget,
+ ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
#define fkickmem_size ROM_SIZE_512
static uae_u32 REGPARAM2 ncr9x_lget(struct ncr9x_state *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= ncr->board_mask;
if (isncr(ncr, ncr_oktagon2008_scsi)) {
v = ncr9x_io_bget(ncr, addr + 0) << 24;
static uae_u32 REGPARAM2 ncr9x_wget(struct ncr9x_state *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= ncr->board_mask;
if (isncr(ncr, ncr_oktagon2008_scsi)) {
v = ncr9x_io_bget(ncr, addr) << 8;
static uae_u32 REGPARAM2 ncr9x_bget(struct ncr9x_state *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= ncr->board_mask;
if (!ncr->configured) {
addr &= 65535;
static void REGPARAM2 ncr9x_lput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= ncr->board_mask;
if (isncr(ncr, ncr_oktagon2008_scsi)) {
ncr9x_io_bput(ncr, addr + 0, l >> 24);
static void REGPARAM2 ncr9x_wput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
w &= 0xffff;
addr &= ncr->board_mask;
if (!ncr->configured) {
static void REGPARAM2 ncr9x_bput(struct ncr9x_state *ncr, uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= ncr->board_mask;
if (!ncr->configured) {
ncr9x_generic_lget, ncr9x_generic_wget, ncr9x_generic_bget,
ncr9x_generic_lput, ncr9x_generic_wput, ncr9x_generic_bput,
ncr9x_generic_xlate, ncr9x_generic_check, NULL, NULL, _T("53C94/FAS216"),
- ncr9x_generic_lget, ncr9x_generic_wget, ABFLAG_IO | ABFLAG_SAFE
+ ncr9x_generic_lget, ncr9x_generic_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
uae_u32 cpuboard_ncr9x_scsi_get(uaecptr addr)
static uae_u32 REGPARAM2 ncr_lget (struct ncr_state *ncr, uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ncr) {
addr &= ncr->board_mask;
if (ncr == ncr_we) {
static uae_u32 REGPARAM2 ncr_wget (struct ncr_state *ncr, uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ncr) {
v = (ncr_bget2 (ncr, addr) << 8) | ncr_bget2 (ncr, addr + 1);
}
static uae_u32 REGPARAM2 ncr_bget (struct ncr_state *ncr, uaecptr addr)
{
uae_u32 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
if (ncr) {
addr &= ncr->board_mask;
if (!ncr->configured) {
static void REGPARAM2 ncr_lput (struct ncr_state *ncr, uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (!ncr)
return;
addr &= ncr->board_mask;
static void REGPARAM2 ncr_wput (struct ncr_state *ncr, uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (!ncr)
return;
w &= 0xffff;
static void REGPARAM2 ncr_bput (struct ncr_state *ncr, uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
if (!ncr)
return;
b &= 0xff;
cs_lget, cs_wget, cs_bget,
cs_lput, cs_wput, cs_bput,
cyberstorm_scsi_ram_xlate, cyberstorm_scsi_ram_check, NULL, NULL, _T("CyberStorm SCSI RAM"),
- cs_lget, cs_wget, ABFLAG_IO | ABFLAG_THREADSAFE
+ cs_lget, cs_wget,
+ ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static addrbank ncr_bank_cs_scsi_io = {
cs_lget, cs_wget, cs_bget,
cs_lput, cs_wput, cs_bput,
default_xlate, default_check, NULL, NULL, _T("CyberStorm SCSI IO"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_THREADSAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static struct addrbank_sub ncr_sub_bank_cs[] = {
sub_bank_lget, sub_bank_wget, sub_bank_bget,
sub_bank_lput, sub_bank_wput, sub_bank_bput,
sub_bank_xlate, sub_bank_check, NULL, NULL, _T("CyberStorm SCSI"),
- sub_bank_lgeti, sub_bank_wgeti, ABFLAG_IO | ABFLAG_THREADSAFE, ncr_sub_bank_cs
+ sub_bank_lgeti, sub_bank_wgeti,
+ ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE, ncr_sub_bank_cs
};
addrbank ncr_bank_generic = {
ncr_generic_lget, ncr_generic_wget, ncr_generic_bget,
ncr_generic_lput, ncr_generic_wput, ncr_generic_bput,
default_xlate, default_check, NULL, NULL, _T("NCR53C700/800"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_THREADSAFE
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO | ABFLAG_THREADSAFE, S_READ, S_WRITE
};
static void ew (struct ncr_state *ncr, int addr, uae_u8 value)
} else {
x_prefetch = NULL;
set_x_ifetches();
- x_put_long = put_long;
- x_put_word = put_word;
- x_put_byte = put_byte;
- x_get_long = get_long;
- x_get_word = get_word;
- x_get_byte = get_byte;
+ if (currprefs.cachesize) {
+ x_put_long = put_long_jit;
+ x_put_word = put_word_jit;
+ x_put_byte = put_byte_jit;
+ x_get_long = get_long_jit;
+ x_get_word = get_word_jit;
+ x_get_byte = get_byte_jit;
+ } else {
+ x_put_long = put_long;
+ x_put_word = put_word;
+ x_put_byte = put_byte;
+ x_get_long = get_long;
+ x_get_word = get_word;
+ x_get_byte = get_byte;
+ }
x_do_cycles = do_cycles;
x_do_cycles_pre = do_cycles;
x_do_cycles_post = do_cycles_post;
return 4;
}
-// generic+direct, generic+indirect, more compatible, cycle-exact, mmu
-static const struct cputbl *cputbls[6][5] =
+// generic+direct, generic+direct+jit, generic+indirect, more compatible, cycle-exact, mmu
+static const struct cputbl *cputbls[6][6] =
{
// 68000
- { op_smalltbl_5_ff, op_smalltbl_45_ff, op_smalltbl_12_ff, op_smalltbl_14_ff, NULL },
+ { op_smalltbl_5_ff, op_smalltbl_45_ff, op_smalltbl_55_ff, op_smalltbl_12_ff, op_smalltbl_14_ff, NULL },
// 68010
- { op_smalltbl_4_ff, op_smalltbl_44_ff, op_smalltbl_11_ff, op_smalltbl_13_ff, NULL },
+ { op_smalltbl_4_ff, op_smalltbl_44_ff, op_smalltbl_54_ff, op_smalltbl_11_ff, op_smalltbl_13_ff, NULL },
// 68020
- { op_smalltbl_3_ff, op_smalltbl_43_ff, op_smalltbl_20_ff, op_smalltbl_21_ff, NULL },
+ { op_smalltbl_3_ff, op_smalltbl_43_ff, op_smalltbl_53_ff, op_smalltbl_20_ff, op_smalltbl_21_ff, NULL },
// 68030
- { op_smalltbl_2_ff, op_smalltbl_42_ff, op_smalltbl_22_ff, op_smalltbl_23_ff, op_smalltbl_32_ff },
+ { op_smalltbl_2_ff, op_smalltbl_42_ff, op_smalltbl_52_ff, op_smalltbl_22_ff, op_smalltbl_23_ff, op_smalltbl_32_ff },
// 68040
- { op_smalltbl_1_ff, op_smalltbl_41_ff, op_smalltbl_25_ff, op_smalltbl_25_ff, op_smalltbl_31_ff },
+ { op_smalltbl_1_ff, op_smalltbl_41_ff, op_smalltbl_51_ff, op_smalltbl_25_ff, op_smalltbl_25_ff, op_smalltbl_31_ff },
// 68060
- { op_smalltbl_0_ff, op_smalltbl_40_ff, op_smalltbl_24_ff, op_smalltbl_24_ff, op_smalltbl_33_ff }
+ { op_smalltbl_0_ff, op_smalltbl_40_ff, op_smalltbl_50_ff, op_smalltbl_24_ff, op_smalltbl_24_ff, op_smalltbl_33_ff }
};
static void build_cpufunctbl (void)
if (!currprefs.cachesize) {
if (currprefs.mmu_model)
- mode = 4;
+ mode = 5;
else if (currprefs.cpu_cycle_exact)
- mode = 3;
+ mode = 4;
else if (currprefs.cpu_compatible)
- mode = 2;
+ mode = 3;
else
mode = 0;
m68k_pc_indirect = mode != 0 ? 1 : 0;
} else {
- mode = 0;
+ mode = 1;
m68k_pc_indirect = 0;
if (currprefs.comptrustbyte) {
- mode = 1;
+ mode = 2;
m68k_pc_indirect = -1;
}
}
gfxmem_lget, gfxmem_wget, gfxmem_bget,
gfxmem_lput, gfxmem_wput, gfxmem_bput,
gfxmem_xlate, gfxmem_check, NULL, NULL, _T("RTG RAM"),
- dummy_lgeti, dummy_wgeti, ABFLAG_RAM | ABFLAG_RTG
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_RAM | ABFLAG_RTG, 0, 0
};
/* Call this function first, near the beginning of code flow
#define WITH_SOFTFLOAT
#define MMUEMU /* Aranym 68040 MMU */
#define FULLMMU /* Aranym 68040 MMU */
-#define CPUEMU_0 /* generic 680x0 emulation with direct memory access */
+#define CPUEMU_0 /* generic 680x0 emulation */
#define CPUEMU_11 /* 68000/68010 prefetch emulation */
#define CPUEMU_13 /* 68000/68010 cycle-exact cpu&blitter */
#define CPUEMU_20 /* 68020 prefetch */
#define CPUEMU_31 /* Aranym 68040 MMU */
#define CPUEMU_32 /* Previous 68030 MMU */
#define CPUEMU_33 /* 68060 MMU */
-#define CPUEMU_40 /* generic 680x0 with indirect memory access */
+#define CPUEMU_40 /* generic 680x0 with JIT direct memory access */
+#define CPUEMU_50 /* generic 680x0 with indirect memory access */
#define ACTION_REPLAY /* Action Replay 1/2/3 support */
#define PICASSO96 /* Picasso96 display card emulation */
#define UAEGFX_INTERNAL /* built-in libs:picasso96/uaegfx.card */
static uae_u32 REGPARAM2 pci_config_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffffffff;
int endianswap;
uae_u8 *config = get_pci_config(addr, -4, 0, &endianswap);
}
static uae_u32 REGPARAM2 pci_config_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffff;
int endianswap;
uae_u8 *config = get_pci_config(addr, -2, 0, &endianswap);
}
static uae_u32 REGPARAM2 pci_config_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v = 0xff;
int endianswap;
uae_u8 *config = get_pci_config(addr, -1, 0, &endianswap);
}
static void REGPARAM2 pci_config_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
uae_u8 *config = get_pci_config(addr, 4, b, &endianswap);
if (config) {
}
static void REGPARAM2 pci_config_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
uae_u8 *config = get_pci_config(addr, 2, b, &endianswap);
if (config) {
}
static void REGPARAM2 pci_config_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
uae_u8 *config = get_pci_config(addr, 1, b, &endianswap);
if (config) {
static uae_u32 REGPARAM2 pci_io_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffffffff;
int endianswap;
struct pci_board_state *pcibs;
}
static uae_u32 REGPARAM2 pci_io_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffff;
int endianswap;
struct pci_board_state *pcibs;
}
static uae_u32 REGPARAM2 pci_io_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xff;
int endianswap;
struct pci_board_state *pcibs;
}
static void REGPARAM2 pci_io_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_io(&addr, &pcibs, &endianswap, -4);
}
static void REGPARAM2 pci_io_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_io(&addr, &pcibs, &endianswap, -2);
}
static void REGPARAM2 pci_io_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_io(&addr, &pcibs, &endianswap, -1);
static uae_u32 REGPARAM2 pci_mem_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffffffff;
int endianswap;
struct pci_board_state *pcibs;
}
static uae_u32 REGPARAM2 pci_mem_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffff;
int endianswap;
struct pci_board_state *pcibs;
}
static uae_u32 REGPARAM2 pci_mem_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xff;
int endianswap;
struct pci_board_state *pcibs;
}
static void REGPARAM2 pci_mem_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_mem(&addr, &pcibs, &endianswap);
}
static void REGPARAM2 pci_mem_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_mem(&addr, &pcibs, &endianswap);
}
static void REGPARAM2 pci_mem_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
int endianswap;
struct pci_board_state *pcibs;
const pci_addrbank *a = get_pci_mem(&addr, &pcibs, &endianswap);
static uae_u32 REGPARAM2 pci_bridge_lget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0;
struct pci_bridge *pcib = get_pci_bridge(addr);
if (!pcib)
}
static uae_u32 REGPARAM2 pci_bridge_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u16 v = 0;
#if PCI_DEBUG_BRIDGE
write_log(_T("pci_bridge_wget %08x PC=%08x\n"), addr, M68K_GETPC);
}
static uae_u32 REGPARAM2 pci_bridge_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v = 0;
struct pci_bridge *pcib = get_pci_bridge(addr);
if (!pcib)
}
static void REGPARAM2 pci_bridge_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if PCI_DEBUG_BRIDGE
write_log(_T("pci_bridge_lput %08x %08x PC=%08x\n"), addr, b, M68K_GETPC);
#endif
}
static void REGPARAM2 pci_bridge_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct pci_bridge *pcib = get_pci_bridge(addr);
if (!pcib)
return;
}
static void REGPARAM2 pci_bridge_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct pci_bridge *pcib = get_pci_bridge(addr);
if (!pcib)
return;
static uae_u32 REGPARAM2 pci_bridge_bget_2(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v = 0xff;
struct pci_bridge *pcib = get_pci_bridge_2(addr);
if (!pcib)
}
static uae_u32 REGPARAM2 pci_bridge_wget_2(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u16 v = 0xffff;
#if PCI_DEBUG_BRIDGE
write_log(_T("pci_bridge_wget_2 %08x PC=%08x\n"), addr, M68K_GETPC);
}
static uae_u32 REGPARAM2 pci_bridge_lget_2(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u32 v = 0xffffffff;
#if PCI_DEBUG_BRIDGE
write_log(_T("pci_bridge_lget_2 %08x PC=%08x\n"), addr, M68K_GETPC);
static void REGPARAM2 pci_bridge_bput_2(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct pci_bridge *pcib = get_pci_bridge_2(addr);
if (!pcib)
return;
}
static void REGPARAM2 pci_bridge_wput_2(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct pci_bridge *pcib = get_pci_bridge_2(addr);
if (!pcib)
return;
}
static void REGPARAM2 pci_bridge_lput_2(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
#if PCI_DEBUG_BRIDGE
write_log(_T("pci_bridge_lput_2 %08x %08x PC=%08x\n"), addr, b, M68K_GETPC);
#endif
pci_config_lget, pci_config_wget, pci_config_bget,
pci_config_lput, pci_config_wput, pci_config_bput,
default_xlate, default_check, NULL, NULL, _T("PCI CONFIG"),
- pci_config_lget, pci_config_wget, ABFLAG_IO | ABFLAG_SAFE
+ pci_config_lget, pci_config_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
addrbank pci_io_bank = {
pci_io_lget, pci_io_wget, pci_io_bget,
pci_io_lput, pci_io_wput, pci_io_bput,
default_xlate, default_check, NULL, NULL, _T("PCI IO"),
- pci_io_lget, pci_io_wget, ABFLAG_IO | ABFLAG_SAFE
+ pci_io_lget, pci_io_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
addrbank pci_mem_bank = {
pci_mem_lget, pci_mem_wget, pci_mem_bget,
pci_mem_lput, pci_mem_wput, pci_mem_bput,
default_xlate, default_check, NULL, NULL, _T("PCI MEMORY"),
- pci_mem_lget, pci_mem_wget, ABFLAG_IO | ABFLAG_SAFE
+ pci_mem_lget, pci_mem_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
addrbank pci_bridge_bank = {
pci_bridge_lget, pci_bridge_wget, pci_bridge_bget,
pci_bridge_lput, pci_bridge_wput, pci_bridge_bput,
default_xlate, default_check, NULL, NULL, _T("PCI BRIDGE"),
- pci_bridge_lget, pci_bridge_wget, ABFLAG_IO | ABFLAG_SAFE
+ pci_bridge_lget, pci_bridge_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
addrbank pci_bridge_bank_2 = {
pci_bridge_lget_2, pci_bridge_wget_2, pci_bridge_bget_2,
pci_bridge_lput_2, pci_bridge_wput_2, pci_bridge_bput_2,
default_xlate, default_check, NULL, NULL, _T("PCI BRIDGE #2"),
- pci_bridge_lget_2, pci_bridge_wget_2, ABFLAG_IO | ABFLAG_SAFE
+ pci_bridge_lget_2, pci_bridge_wget_2,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
static bool validate_pci_dma(struct pci_board_state *pcibs, uaecptr addr, int size)
static uae_u32 REGPARAM2 ncr80_lget(struct soft_scsi *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = ncr80_bget2(ncr, addr + 0, 4) << 24;
v |= ncr80_bget2(ncr, addr + 1, 4) << 16;
v |= ncr80_bget2(ncr, addr + 2, 4) << 8;
static uae_u32 REGPARAM2 ncr80_wget(struct soft_scsi *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = ncr80_bget2(ncr, addr, 2) << 8;
v |= ncr80_bget2(ncr, addr + 1, 2);
return v;
static uae_u32 REGPARAM2 ncr80_bget(struct soft_scsi *ncr, uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= ncr->board_mask;
if (!ncr->configured) {
addr &= 65535;
static void REGPARAM2 ncr80_lput(struct soft_scsi *ncr, uaecptr addr, uae_u32 l)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
ncr80_bput2(ncr, addr + 0, l >> 24, 4);
ncr80_bput2(ncr, addr + 1, l >> 16, 4);
ncr80_bput2(ncr, addr + 2, l >> 8, 4);
static void REGPARAM2 ncr80_wput(struct soft_scsi *ncr, uaecptr addr, uae_u32 w)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
w &= 0xffff;
if (!ncr->configured) {
return;
static void REGPARAM2 ncr80_bput(struct soft_scsi *ncr, uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= ncr->board_mask;
if (!ncr->configured) {
soft_generic_lget, soft_generic_wget, soft_generic_bget,
soft_generic_lput, soft_generic_wput, soft_generic_bput,
soft_xlate, soft_check, NULL, NULL, _T("LOWLEVEL/5380 SCSI"),
- soft_generic_lget, soft_generic_wget, ABFLAG_IO | ABFLAG_SAFE
+ soft_generic_lget, soft_generic_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
void soft_scsi_put(uaecptr addr, int size, uae_u32 v)
static void REGPARAM2 toccata_bput(uaecptr addr, uae_u32 b)
{
struct toccata_data *data = &toccata;
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= BOARD_MASK;
if (!data->configured) {
static void REGPARAM2 toccata_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
toccata_bput(addr + 0, b >> 8);
toccata_bput(addr + 1, b >> 0);
}
static void REGPARAM2 toccata_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
toccata_bput(addr + 0, b >> 24);
toccata_bput(addr + 1, b >> 16);
toccata_bput(addr + 2, b >> 8);
{
struct toccata_data *data = &toccata;
uae_u8 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= BOARD_MASK;
if (!data->configured) {
if (addr >= sizeof data->acmemory)
static uae_u32 REGPARAM2 toccata_wget(uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = toccata_get(addr) << 8;
v |= toccata_get(addr + 1) << 0;
return v;
static uae_u32 REGPARAM2 toccata_lget(uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
v = toccata_get(addr) << 24;
v |= toccata_get(addr + 1) << 16;
v |= toccata_get(addr + 2) << 8;
toccata_lget, toccata_wget, toccata_bget,
toccata_lput, toccata_wput, toccata_bput,
default_xlate, default_check, NULL, NULL, _T("Toccata"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static void ew (uae_u8 *acmemory, int addr, uae_u32 value)
static void REGPARAM2 sm_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
b &= 0xff;
addr &= 65535;
if (!sm_configured) {
}
static void REGPARAM2 sm_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
if (addr < 10) {
firecracker24_write(addr, b, 2);
static void REGPARAM2 sm_lput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
addr &= 65535;
if (addr < 10) {
firecracker24_write(addr + 0, b >> 16, 2);
static uae_u32 REGPARAM2 sm_bget(uaecptr addr)
{
uae_u8 v = 0;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (!sm_configured) {
if (addr >= sizeof sm_acmemory)
static uae_u32 REGPARAM2 sm_wget(uaecptr addr)
{
uae_u16 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr < 10) {
v = firecracker24_read(addr, 2);
static uae_u32 REGPARAM2 sm_lget(uaecptr addr)
{
uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= 65535;
if (addr < 10) {
v = firecracker24_read(addr + 0, 2) << 16;
sm_lget, sm_wget, sm_bget,
sm_lput, sm_wput, sm_bput,
default_xlate, default_check, NULL, NULL, _T("DisplayAdapter"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti,
+ ABFLAG_IO, S_READ, S_WRITE
};
static void ew(int addr, uae_u32 value)
static uae_u32 REGPARAM2 x86_bridge_wget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u16 v = 0;
struct x86_bridge *xb = get_x86_bridge(addr);
if (!xb)
}
static uae_u32 REGPARAM2 x86_bridge_bget(uaecptr addr)
{
-#ifdef JIT
- special_mem |= S_READ;
-#endif
uae_u8 v = 0;
struct x86_bridge *xb = get_x86_bridge(addr);
if (!xb)
static void REGPARAM2 x86_bridge_wput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct x86_bridge *xb = get_x86_bridge(addr);
if (!xb)
return;
}
static void REGPARAM2 x86_bridge_bput(uaecptr addr, uae_u32 b)
{
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
struct x86_bridge *xb = get_x86_bridge(addr);
if (!xb)
return;
x86_bridge_lget, x86_bridge_wget, x86_bridge_bget,
x86_bridge_lput, x86_bridge_wput, x86_bridge_bput,
default_xlate, default_check, NULL, NULL, _T("X86 BRIDGE"),
- x86_bridge_lget, x86_bridge_wget, ABFLAG_IO | ABFLAG_SAFE
+ x86_bridge_lget, x86_bridge_wget,
+ ABFLAG_IO | ABFLAG_SAFE, S_READ, S_WRITE
};
void x86_bridge_rethink(void)
projects / francis / winuae.git / commitdiff