}
#endif
-struct chipset_refresh *get_chipset_refresh (void)
+struct chipset_refresh *get_chipset_refresh(struct uae_prefs *p)
{
struct amigadisplay *ad = &adisplays[0];
int islace = interlace_seen ? 1 : 0;
int isntsc = (beamcon0 & 0x20) ? 0 : 1;
int custom = (beamcon0 & 0x80) ? 1 : 0;
- if (!(currprefs.chipset_mask & CSMASK_ECS_AGNUS))
+ if (!(p->chipset_mask & CSMASK_ECS_AGNUS))
isntsc = currprefs.ntscmode ? 1 : 0;
int def = -1;
for (int i = 0; i < MAX_CHIPSET_REFRESH_TOTAL; i++) {
- struct chipset_refresh *cr = &currprefs.cr[i];
+ struct chipset_refresh *cr = &p->cr[i];
if (cr->defaultdata)
def = i;
if (cr->inuse) {
}
}
if (def >= 0)
- return &currprefs.cr[def];
+ return &p->cr[def];
return NULL;
}
static bool changed_chipset_refresh (void)
{
- return stored_chipset_refresh != get_chipset_refresh ();
+ return stored_chipset_refresh != get_chipset_refresh(&currprefs);
}
void compute_framesync(void)
vblank_hz = target_adjust_vblank_hz(0, vblank_hz);
- struct chipset_refresh *cr = get_chipset_refresh ();
+ struct chipset_refresh *cr = get_chipset_refresh(&currprefs);
while (cr) {
double v = -1;
if (!ad->picasso_on && !ad->picasso_requested_on) {
extern bool ispal (void);
extern bool isvga (void);
extern int current_maxvpos (void);
-extern struct chipset_refresh *get_chipset_refresh (void);
+extern struct chipset_refresh *get_chipset_refresh (struct uae_prefs*);
extern void compute_framesync (void);
extern void getsyncregisters(uae_u16 *phsstrt, uae_u16 *phsstop, uae_u16 *pvsstrt, uae_u16 *pvsstop);
int is_bitplane_dma (int hpos);
case AKS_DECREASEREFRESHRATE:
case AKS_INCREASEREFRESHRATE:
{
- int dir = code == AKS_INCREASEREFRESHRATE ? 5 : -5;
- if (currprefs.chipset_refreshrate == 0)
- currprefs.chipset_refreshrate = currprefs.ntscmode ? 60 : 50;
- changed_prefs.chipset_refreshrate = currprefs.chipset_refreshrate + dir;
- if (changed_prefs.chipset_refreshrate < 10.0)
- changed_prefs.chipset_refreshrate = 10.0;
- if (changed_prefs.chipset_refreshrate > 900.0)
- changed_prefs.chipset_refreshrate = 900.0;
- set_config_changed ();
+ struct chipset_refresh *cr = get_chipset_refresh(&changed_prefs);
+ if (cr) {
+ int dir = code == AKS_INCREASEREFRESHRATE ? 5 : -5;
+ if (cr->rate == 0)
+ cr->rate = currprefs.ntscmode ? 60 : 50;
+ cr->locked = true;
+ cr->rate += dir;
+ if (cr->rate < 10)
+ cr->rate = 10;
+ if (cr->rate > 900)
+ cr->rate = 900;
+ set_config_changed();
+ }
}
break;
case AKS_DISKSWAPPER_NEXT:
SendDlgItemMessage(hDlg, IDC_RATE2BOX, CB_RESETCONTENT, 0, 0);
v = 0;
- struct chipset_refresh *selectcr = full_property_sheet ? (workprefs.ntscmode ? &workprefs.cr[CHIPSET_REFRESH_NTSC] : &workprefs.cr[CHIPSET_REFRESH_PAL]) : get_chipset_refresh () ;
+ struct chipset_refresh *selectcr = full_property_sheet ? (workprefs.ntscmode ? &workprefs.cr[CHIPSET_REFRESH_NTSC] : &workprefs.cr[CHIPSET_REFRESH_PAL]) : get_chipset_refresh (&workprefs) ;
for (int i = 0; i < MAX_CHIPSET_REFRESH_TOTAL; i++) {
struct chipset_refresh *cr = &workprefs.cr[i];
if (cr->rate > 0) {