Cleaner 68040 T0 support, 68040 T0 FPU instruction special cases. 68040 MMU LINK...

diff --git a/fpp.cpp b/fpp.cpp
index 603ed1c645dfda247687c935f486d11fddb8f551..be0eee811775abaf38779b3af2cf59080906d610 100644 (file)
--- a/fpp.cpp
+++ b/fpp.cpp
@@ -1874,6 +1874,13 @@ static void maybe_idle_state (void)
                regs.fpu_state = 1;
 }
 
+static void trace_t0_68040(void)
+{
+       if (regs.t0 && currprefs.cpu_model == 68040)
+               check_t0_trace();
+}
+
+
 void fpuop_dbcc (uae_u32 opcode, uae_u16 extra)
 {
        uaecptr pc = m68k_getpc ();
@@ -1911,6 +1918,8 @@ void fpuop_dbcc (uae_u32 opcode, uae_u16 extra)
                        regs.fp_branch = true;
                }
        }
+       // 68040 FDBCC: T0 always
+       trace_t0_68040();
 }
 
 void fpuop_scc (uae_u32 opcode, uae_u16 extra)
@@ -2153,6 +2162,8 @@ void fpuop_save (uae_u32 opcode)
                        x_cp_put_long(ad, fsave_data.et[2]); // ETM
                        ad += 4;
                }
+               // 68040 FSAVE: T0 always
+               trace_t0_68040();
        } else { /* 68881/68882 */
                uae_u32 biu_flags = 0x540effff;
                int frame_size = currprefs.fpu_model == 68882 ? 0x3c : 0x1c;
@@ -2935,6 +2946,7 @@ static void fpuop_arithmetic2 (uae_u32 opcode, uae_u16 extra)
                                        m68k_areg (regs, opcode & 7) = ad;
                                if ((opcode & 0x38) == 0x20)
                                        m68k_areg (regs, opcode & 7) = ad;
+                               trace_t0_68040();
                        } else {
                                /* FMOVEM Memory->Control Register */
                                uae_u32 ad;
@@ -3026,6 +3038,7 @@ static void fpuop_arithmetic2 (uae_u32 opcode, uae_u16 extra)
                                if (extra & 0x2000) {
                                        /* FMOVEM FPP->Memory */
                                        ad = fmovem2mem (ad, list, incr, regdir);
+                                       trace_t0_68040();
                                } else {
                                        /* FMOVEM Memory->FPP */
                                        ad = fmovem2fpp (ad, list, incr, regdir);

diff --git a/gencpu.cpp b/gencpu.cpp
index fbbbbdda899299e323ab51bd34a4c6e4930cc973..4b68b632c88d19731ed6417ebf806e8a81828e6a 100644 (file)
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -725,6 +725,19 @@ static void check_trace(void)
        printf("\tif(regs.t0) check_t0_trace();\n");
 }
 
+static void trace_t0_68040_only(void)
+{
+       if (cpu_level == 4)
+               check_trace();
+       if (cpu_level == 5) {
+               if (next_cpu_level < 5)
+                       next_cpu_level = 5 - 1;
+       } else if (cpu_level == 4) {
+               if (next_cpu_level < 4)
+                       next_cpu_level = 4 - 1;
+       }
+}
+
 // check trace bits
 static void fill_prefetch_full (void)
 {
@@ -4154,9 +4167,7 @@ static void gen_opcode (unsigned int opcode)
                genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
                fill_prefetch_next ();
                printf ("\tregs.usp = src;\n");
-               if (cpu_level == 4)
-                       check_trace();
-               next_level_040_to_030();
+               trace_t0_68040_only();
                break;
        case i_MVUSP2R:
                genamode (curi, curi->smode, "srcreg", curi->size, "src", 2, 0, 0);
@@ -4175,9 +4186,7 @@ static void gen_opcode (unsigned int opcode)
                break;
        case i_NOP:
                fill_prefetch_next ();
-               if (cpu_level == 4)
-                       check_trace();
-               next_level_040_to_030();
+               trace_t0_68040_only();
                break;
        case i_STOP:
                next_level_000();
@@ -4394,8 +4403,8 @@ static void gen_opcode (unsigned int opcode)
                        genamode(NULL, curi->dmode, "dstreg", curi->size, "offs", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
                        if (cpu_level == 4) {
                                genamode(NULL, Apdi, "7", sz_long, "old", GENA_GETV_FETCH_ALIGN, GENA_MOVEM_DO_INC, 0);
-                               genastore("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
                                genamode(NULL, curi->smode, "srcreg", sz_long, "src", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
+                               genastore("m68k_areg(regs, 7)", curi->smode, "srcreg", sz_long, "src");
                        } else {
                                genamode(NULL, curi->smode, "srcreg", sz_long, "src", GENA_GETV_FETCH, GENA_MOVEM_DO_INC, 0);
                                genamode(NULL, Apdi, "7", sz_long, "old", GENA_GETV_FETCH_ALIGN, GENA_MOVEM_DO_INC, 0);
@@ -5474,9 +5483,7 @@ bccl_not68020:
                printf ("\tint regno = (src >> 12) & 15;\n");
                printf ("\tuae_u32 *regp = regs.regs + regno;\n");
                printf ("\tif (! m68k_movec2(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
-               if (cpu_level == 4)
-                       check_trace();
-               next_level_040_to_030();
+               trace_t0_68040_only();
                break;
        case i_MOVE2C:
                genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
@@ -5485,9 +5492,7 @@ bccl_not68020:
                printf ("\tint regno = (src >> 12) & 15;\n");
                printf ("\tuae_u32 *regp = regs.regs + regno;\n");
                printf ("\tif (! m68k_move2c(src & 0xFFF, regp)) goto %s;\n", endlabelstr);
-               if (cpu_level == 4)
-                       check_trace();
-               next_level_040_to_030();
+               trace_t0_68040_only();
                break;
        case i_CAS:
                {
@@ -5538,9 +5543,7 @@ bccl_not68020:
                                break;
                        }
                        pop_braces (old_brace_level);
-                       if (cpu_level == 4)
-                               check_trace();
-                       next_level_040_to_030();
+                       trace_t0_68040_only();
                }
                break;
        case i_CAS2:
@@ -5590,9 +5593,7 @@ bccl_not68020:
                        }
                        printf ("\t}\n");
                }
-               if (cpu_level == 4)
-                       check_trace();
-               next_level_040_to_030();
+               trace_t0_68040_only();
                break;
        case i_MOVES: /* ignore DFC and SFC when using_mmu == false */
                {
@@ -5642,12 +5643,7 @@ bccl_not68020:
                                returntail(false);
                                pop_braces (old_brace_level);
                        }
-                       if (cpu_level == 4)
-                               check_trace();
-                       if (cpu_level >= 5) {
-                               if (next_cpu_level < 5)
-                                       next_cpu_level = 5 - 1;
-                       }
+                       trace_t0_68040_only();
                }
                break;
        case i_BKPT:            /* only needed for hardware emulators */
@@ -5836,6 +5832,7 @@ bccl_not68020:
                        addcycles000_nonce("\t\t", 4);
                        printf ("\t}\n");
                }
+               trace_t0_68040_only();
                break;
        case i_FPP:
                fpulimit();
@@ -6009,8 +6006,7 @@ bccl_not68020:
        case i_PFLUSHA:
                sync_m68k_pc();
                printf("\tmmu_op (opcode, 0);\n");
-               if (cpu_level == 4)
-                       check_trace();
+               trace_t0_68040_only();
                break;
        case i_PLPAR:
        case i_PLPAW:
@@ -6021,8 +6017,7 @@ bccl_not68020:
        case i_PTESTW:
                sync_m68k_pc ();
                printf ("\tmmu_op (opcode, 0);\n");
-               if (cpu_level == 4)
-                       check_trace();
+               trace_t0_68040_only();
                break;
        case i_MMUOP030:
                printf("\tuaecptr pc = %s;\n", getpc);

diff --git a/newcpu_common.cpp b/newcpu_common.cpp
index 618e0a61b376118df76c34ce8cfede6aec82fe1f..02753998a92b237d158fdb04bb6608eda20b9a06 100644 (file)
--- a/newcpu_common.cpp
+++ b/newcpu_common.cpp
@@ -1149,7 +1149,7 @@ bool m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
                                m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32);
                                m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
                        } else {
-                               // 020/030/060
+                               // 020/030
                                m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
                                m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32);
                        }
@@ -1179,7 +1179,7 @@ bool m68k_mull (uae_u32 opcode, uae_u32 src, uae_u16 extra)
                                m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32);
                                m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
                        } else {
-                               // 020/030/060
+                               // 020/030
                                m68k_dreg(regs, (extra >> 12) & 7) = (uae_u32)a;
                                m68k_dreg(regs, extra & 7) = (uae_u32)(a >> 32);
                        }