bool a3000scsi_init(struct autoconfig_info *aci)
{
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
aci->start = 0xdd0000;
aci->size = 0x10000;
aci->hardwired = true;
#include "debug.h"
#define AKIKO_DEBUG_NVRAM 0
-#define AKIKO_DEBUG_IO 1
-#define AKIKO_DEBUG_IO_CMD 1
+#define AKIKO_DEBUG_IO 0
+#define AKIKO_DEBUG_IO_CMD 0
int log_cd32 = 0;
if (hrtmem2_size && !hrtmem2_size2)
hrtmem2_size2 = hrtmem2_size;
- hrtmem_bank.allocated = hrtmem_size;
+ hrtmem_bank.reserved_size = hrtmem_size;
hrtmem_bank.label = memname1;
hrtmem_mask = hrtmem_size - 1;
mapped_malloc (&hrtmem_bank);
}
hrtmem2_mask = hrtmem2_size - 1;
- hrtmem2_bank.allocated = hrtmem2_size;
+ hrtmem2_bank.reserved_size = hrtmem2_size;
hrtmem2_bank.label = memname2;
if (hrtmem2_size) {
mapped_malloc (&hrtmem2_bank);
memset(hrtmemory2, 0, hrtmem2_size);
}
- hrtmem3_bank.allocated = hrtmem3_size;
+ hrtmem3_bank.reserved_size = hrtmem3_size;
hrtmem3_bank.label = memname3;
hrtmem3_mask = hrtmem3_size - 1;
if (hrtmem3_size) {
#endif
cart_type = CART_HRTMON;
}
- hrtmem_bank.allocated = hrtmem_size;
+ hrtmem_bank.reserved_size = hrtmem_size;
hrtmem_bank.label = _T("hrtmem");
mapped_malloc (&hrtmem_bank);
hrtmemory = hrtmem_bank.baseaddr;
static uae_u32 REGPARAM2 getchipmemsize (TrapContext *ctx)
{
- trap_set_dreg(ctx, 1, z3chipmem_bank.allocated);
+ trap_set_dreg(ctx, 1, z3chipmem_bank.allocated_size);
trap_set_areg(ctx, 1, z3chipmem_bank.start);
- return chipmem_bank.allocated;
+ return chipmem_bank.allocated_size;
}
static uae_u32 REGPARAM2 uae_puts (TrapContext *ctx)
void rtarea_init_mem (void)
{
- if (need_uae_boot_rom(&currprefs)) {
- rtarea_bank.flags &= ~ABFLAG_ALLOCINDIRECT;
- } else {
- rtarea_bank.flags |= ABFLAG_ALLOCINDIRECT;
- }
- rtarea_bank.allocated = RTAREA_SIZE;
+ rtarea_bank.reserved_size = RTAREA_SIZE;
+ rtarea_bank.start = rtarea_base;
if (!mapped_malloc (&rtarea_bank)) {
write_log (_T("virtual memory exhausted (rtarea)!\n"));
abort ();
void cd32_fmv_reset(void)
{
if (fmv_ram_bank.baseaddr)
- memset(fmv_ram_bank.baseaddr, 0, fmv_ram_bank.allocated);
+ memset(fmv_ram_bank.baseaddr, 0, fmv_ram_bank.allocated_size);
cd32_fmv_state(0);
}
fmv_ram_bank.start = fmv_rom_bank.start + 0x80000;
fmv_rom_bank.mask = fmv_rom_size - 1;
- fmv_rom_bank.allocated = fmv_rom_size;
+ fmv_rom_bank.reserved_size = fmv_rom_size;
fmv_ram_bank.mask = fmv_ram_size - 1;
- fmv_ram_bank.allocated = fmv_ram_size;
+ fmv_ram_bank.reserved_size = fmv_ram_size;
if (mapped_malloc(&fmv_rom_bank)) {
load_rom_rc(aci->rc, ROMTYPE_CD32CART, 262144, 0, fmv_rom_bank.baseaddr, 262144, 0);
{
aci->start = 0xb80000;
aci->size = 0x10000;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
if (!aci->doinit)
return true;
map_banks(&cdtvcr_bank, 0xB8, 1, 0);
if(_tcslen (hdc) >= 4 && !_tcsncmp (hdc, _T("ide"), 3)) {
hdcv = HD_CONTROLLER_TYPE_IDE_AUTO;
hdunit = hdc[3] - '0';
- if (hdunit < 0 || hdunit >= 4)
+ if (hdunit < 0 || hdunit >= 6)
hdunit = 0;
} else if(_tcslen (hdc) >= 5 && !_tcsncmp (hdc, _T("scsi"), 4)) {
hdcv = HD_CONTROLLER_TYPE_SCSI_AUTO;
addbcromtype(p, ROMTYPE_NE2KPCMCIA, p->ne2000pcmcianame[0] != 0);
addbcromtype(p, ROMTYPE_NE2KPCI, p->ne2000pciname[0] != 0);
- static int restricted_net[] = { ROMTYPE_A2065, ROMTYPE_NE2KPCMCIA, ROMTYPE_NE2KPCI, 0 };
+ static int restricted_net[] = { ROMTYPE_A2065, ROMTYPE_NE2KPCMCIA, ROMTYPE_NE2KPCI, ROMTYPE_NE2KISA, 0 };
static int restricted_x86[] = { ROMTYPE_A1060, ROMTYPE_A2088, ROMTYPE_A2088T, ROMTYPE_A2286, ROMTYPE_A2386, 0 };
static int restricted_pci[] = { ROMTYPE_GREX, ROMTYPE_MEDIATOR, ROMTYPE_PROMETHEUS, 0 };
romtype_restricted(p, restricted_net);
} else if (is_blizzard1230mk2(&currprefs) && addr >= 0x10000 && (currprefs.cpuboard_settings & 2)) {
v = cpuboard_ncr9x_scsi_get(addr);
} else if (is_blizzard(&currprefs)) {
- if (addr & BLIZZARD_SCSI_KIT_SCSI_OFFSET)
+ if (addr & BLIZZARD_SCSI_KIT4_SCSI_OFFSET)
+ v = cpuboard_ncr9x_scsi_get(addr);
+ else
+ v = blizzardea_bank.baseaddr[addr];
+ } else if (is_blizzard1230mk3(&currprefs)) {
+ if (addr & BLIZZARD_SCSI_KIT3_SCSI_OFFSET)
v = cpuboard_ncr9x_scsi_get(addr);
else
v = blizzardea_bank.baseaddr[addr];
if ((addr & 0xf800) == 0xe800) {
if ((addr & 3) < 2) {
map_banks(&dummy_bank, 0x10000000 >> 16, 0x8000000 >> 16, 0);
- if (custmem1_bank.allocated) {
- map_banks(&custmem1_bank, (0x18000000 - custmem1_bank.allocated) >> 16, custmem1_bank.allocated >> 16, 0);
- if (custmem1_bank.allocated < 128 * 1024 * 1024) {
- map_banks(&custmem1_bank, (0x18000000 - 2 * custmem1_bank.allocated) >> 16, custmem1_bank.allocated >> 16, 0);
+ if (custmem1_bank.allocated_size) {
+ map_banks(&custmem1_bank, (0x18000000 - custmem1_bank.allocated_size) >> 16, custmem1_bank.allocated_size >> 16, 0);
+ if (custmem1_bank.allocated_size < 128 * 1024 * 1024) {
+ map_banks(&custmem1_bank, (0x18000000 - 2 * custmem1_bank.allocated_size) >> 16, custmem1_bank.allocated_size >> 16, 0);
}
}
}
if ((addr & 3) >= 2) {
map_banks(&dummy_bank, 0x18000000 >> 16, 0x8000000 >> 16, 0);
- if (custmem2_bank.allocated) {
- map_banks(&custmem2_bank, 0x18000000 >> 16, custmem2_bank.allocated >> 16, 0);
- if (custmem2_bank.allocated < 128 * 1024 * 1024) {
- map_banks(&custmem2_bank, (0x18000000 + custmem2_bank.allocated) >> 16, custmem2_bank.allocated >> 16, 0);
+ if (custmem2_bank.allocated_size) {
+ map_banks(&custmem2_bank, 0x18000000 >> 16, custmem2_bank.allocated_size >> 16, 0);
+ if (custmem2_bank.allocated_size < 128 * 1024 * 1024) {
+ map_banks(&custmem2_bank, (0x18000000 + custmem2_bank.allocated_size) >> 16, custmem2_bank.allocated_size >> 16, 0);
}
}
}
cpuboard_ncr9x_scsi_put(addr, b);
} else if (is_blizzard2060(&currprefs) && addr >= BLIZZARD_2060_SCSI_OFFSET) {
cpuboard_ncr9x_scsi_put(addr, b);
- } else if ((is_blizzard(&currprefs)) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
+ } else if ((is_blizzard(&currprefs)) && addr >= BLIZZARD_SCSI_KIT4_SCSI_OFFSET) {
+ cpuboard_ncr9x_scsi_put(addr, b);
+ } else if ((is_blizzard1230mk3(&currprefs)) && addr >= BLIZZARD_SCSI_KIT3_SCSI_OFFSET) {
cpuboard_ncr9x_scsi_put(addr, b);
} else if (is_csmk1(&currprefs)) {
if (addr >= CYBERSTORM_MK1_SCSI_OFFSET) {
if ((addr & 0xf800) == 0xe800) {
if ((addr & 3) < 2) {
map_banks(&dummy_bank, 0x10000000 >> 16, 0x8000000 >> 16, 0);
- if (custmem1_bank.allocated)
- map_banks(&custmem1_bank, (0x18000000 - custmem1_bank.allocated) >> 16, custmem1_bank.allocated >> 16, 0);
+ if (custmem1_bank.allocated_size)
+ map_banks(&custmem1_bank, (0x18000000 - custmem1_bank.allocated_size) >> 16, custmem1_bank.allocated_size >> 16, 0);
}
if ((addr & 3) >= 2) {
map_banks(&dummy_bank, 0x18000000 >> 16, 0x8000000 >> 16, 0);
- if (custmem2_bank.allocated)
- map_banks(&custmem2_bank, 0x18000000 >> 16, custmem2_bank.allocated >> 16, 0);
+ if (custmem2_bank.allocated_size)
+ map_banks(&custmem2_bank, 0x18000000 >> 16, custmem2_bank.allocated_size >> 16, 0);
}
}
}
b &= 0xff;
addr &= 65535;
if (addr == 0x48 && !configured) {
- map_banks(&blizzardea_bank, b, blizzardea_bank.allocated >> 16, 0);
+ map_banks(&blizzardea_bank, b, blizzardea_bank.allocated_size >> 16, 0);
write_log(_T("Accelerator Z2 board autoconfigured at %02X0000\n"), b);
configured = 1;
expamem_next (&blizzardea_bank, NULL);
static void cyberstormmk2_copymaprom(void)
{
if (blizzardmaprom_bank.baseaddr) {
- uae_u8 *src = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
+ uae_u8 *src = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated_size - 524288;
uae_u8 *dst = kickmem_bank.baseaddr;
protect_roms(false);
memcpy(dst, src, 524288);
blizzardmaprom2_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
blizzardmaprom2_bank.start = blizzardram_bank.start + cpuboard_size - 524288;
- blizzardmaprom2_bank.allocated = 524288;
+ blizzardmaprom2_bank.reserved_size = 524288;
blizzardmaprom2_bank.mask = 524288 - 1;
blizzardmaprom2_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom2_bank);
}
blizzardmaprom_bank.start = CYBERSTORM_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
static void cyberstorm_maprom(void)
{
- if (a3000hmem_bank.allocated <= 2 * 524288)
+ if (a3000hmem_bank.reserved_size <= 2 * 524288)
return;
map_banks(&dummy_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
if (blizzardmaprom_bank_mapped)
mapped_free(&blizzardmaprom_bank);
if (maprom_state) {
- blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 2 * 524288;
+ blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.reserved_size - 2 * 524288;
} else {
- blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
+ blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.reserved_size - 524288;
}
blizzardmaprom_bank.start = CYBERSTORM_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
map_banks(&blizzardf0_bank, 0xf00000 >> 16, 65536 >> 16, 0);
map_banks(&blizzardio_bank, 0x80000000 >> 16, 0x10000000 >> 16, 0);
if (mapromconfigured())
- map_banks_nojitdirect(&blizzardmaprom_bank, (a3000hmem_bank.start + a3000hmem_bank.allocated - 524288) >> 16, 524288 >> 16, 0);
+ map_banks_nojitdirect(&blizzardmaprom_bank, (a3000hmem_bank.start + a3000hmem_bank.allocated_size - 524288) >> 16, 524288 >> 16, 0);
} else {
map_banks(&dummy_bank, 0xf00000 >> 16, 0x80000 >> 16, 0);
}
}
if (is_ivsvector(&currprefs)) {
if (!currprefs.address_space_24) {
- map_banks(&cpuboardmem1_bank, cpuboardmem1_bank.start >> 16, (0x04000000 - cpuboardmem1_bank.start) >> 16, cpuboardmem1_bank.allocated);
- if (cpuboardmem2_bank.allocated)
- map_banks(&cpuboardmem2_bank, cpuboardmem2_bank.start >> 16, (0x10000000 - cpuboardmem2_bank.start) >> 16, cpuboardmem2_bank.allocated);
+ map_banks(&cpuboardmem1_bank, cpuboardmem1_bank.start >> 16, (0x04000000 - cpuboardmem1_bank.start) >> 16, cpuboardmem1_bank.allocated_size);
+ if (cpuboardmem2_bank.allocated_size)
+ map_banks(&cpuboardmem2_bank, cpuboardmem2_bank.start >> 16, (0x10000000 - cpuboardmem2_bank.start) >> 16, cpuboardmem2_bank.allocated_size);
}
}
if (is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs)) {
- if (cpuboardmem1_bank.allocated) {
- map_banks(&cpuboardmem1_bank, cpuboardmem1_bank.start >> 16, cpuboardmem1_bank.allocated >> 16, 0);
+ if (cpuboardmem1_bank.allocated_size) {
+ map_banks(&cpuboardmem1_bank, cpuboardmem1_bank.start >> 16, cpuboardmem1_bank.allocated_size >> 16, 0);
}
}
}
return;
cpuboard_size = currprefs.cpuboardmem1_size;
- cpuboardmem1_bank.allocated = 0;
- cpuboardmem2_bank.allocated = 0;
+ cpuboardmem1_bank.reserved_size = 0;
+ cpuboardmem2_bank.reserved_size = 0;
if (is_kupke(&currprefs) || is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs)) {
// plain 64k autoconfig, nothing else.
- blizzardea_bank.allocated = 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
if (is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs)) {
cpuboardmem1_bank.start = 0x18000000 - cpuboard_size;
- cpuboardmem1_bank.allocated = cpuboard_size;
- cpuboardmem1_bank.mask = cpuboardmem1_bank.allocated - 1;
+ cpuboardmem1_bank.reserved_size = cpuboard_size;
+ cpuboardmem1_bank.mask = cpuboardmem1_bank.reserved_size - 1;
mapped_malloc(&cpuboardmem1_bank);
}
} else if (is_aca500(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 524288;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 524288;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
} else if (is_a2630(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 131072;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 131072;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
- blizzardea_bank.allocated = 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
}
else if (is_dkb_12x0(&currprefs)) {
blizzardram_bank.start = 0x10000000;
- blizzardram_bank.allocated = cpuboard_size;
- blizzardram_bank.mask = blizzardram_bank.allocated - 1;
+ blizzardram_bank.reserved_size = cpuboard_size;
+ blizzardram_bank.mask = blizzardram_bank.reserved_size - 1;
blizzardram_bank.startmask = 0x10000000;
blizzardram_bank.label = _T("dkb");
mapped_malloc(&blizzardram_bank);
} else if (is_dkb_wildfire(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 65536;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 65536;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
} else if (is_apollo(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 131072;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 131072;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
} else if (is_fusionforty(&currprefs)) {
blizzardf0_bank.start = 0x00f40000;
- blizzardf0_bank.allocated = 262144;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 262144;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
blizzardram_bank.start = 0x11000000;
- blizzardram_bank.allocated = cpuboard_size;
- blizzardram_bank.mask = blizzardram_bank.allocated - 1;
+ blizzardram_bank.reserved_size = cpuboard_size;
+ blizzardram_bank.mask = blizzardram_bank.reserved_size - 1;
blizzardram_bank.startmask = 0x11000000;
blizzardram_bank.label = _T("fusionforty");
mapped_malloc(&blizzardram_bank);
} else if (is_tekmagic(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 131072;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 131072;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
- blizzardea_bank.allocated = 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
} else if (is_blizzard1230mk2(&currprefs)) {
- blizzardea_bank.allocated = 2 * 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 2 * 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
blizzardram_bank.start = 0x0e000000 - cpuboard_size / 2;
- blizzardram_bank.allocated = cpuboard_size;
- blizzardram_bank.mask = blizzardram_bank.allocated - 1;
+ blizzardram_bank.reserved_size = cpuboard_size;
+ blizzardram_bank.mask = blizzardram_bank.reserved_size - 1;
if (cpuboard_size) {
blizzardram_bank.label = _T("*");
mapped_malloc(&blizzardram_bank);
blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
blizzardmaprom_bank.start = BLIZZARDMK2_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
blizzardmaprom_bank_mapped = true;
- maprom_base = blizzardram_bank.allocated - 524288;
+ maprom_base = blizzardram_bank.reserved_size - 524288;
} else if (is_blizzard1230mk3(&currprefs)) {
- blizzardea_bank.allocated = 2 * 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 2 * 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
blizzardram_bank.start = 0x1e000000 - cpuboard_size / 2;
- blizzardram_bank.allocated = cpuboard_size;
- blizzardram_bank.mask = blizzardram_bank.allocated - 1;
+ blizzardram_bank.reserved_size = cpuboard_size;
+ blizzardram_bank.mask = blizzardram_bank.reserved_size - 1;
if (cpuboard_size) {
blizzardram_bank.label = _T("*");
mapped_malloc(&blizzardram_bank);
blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
blizzardmaprom_bank.start = BLIZZARDMK3_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
blizzardmaprom_bank_mapped = true;
- maprom_base = blizzardram_bank.allocated - 524288;
+ maprom_base = blizzardram_bank.reserved_size - 524288;
} else if (is_blizzard(&currprefs) || is_blizzardppc(&currprefs)) {
blizzard_jit = 1;
blizzardram_bank.start = BLIZZARDMK4_RAM_BASE_48 - cpuboard_size / 2;
- blizzardram_bank.allocated = cpuboard_size;
- blizzardram_bank.mask = blizzardram_bank.allocated - 1;
+ blizzardram_bank.reserved_size = cpuboard_size;
+ blizzardram_bank.mask = blizzardram_bank.reserved_size - 1;
if (cpuboard_size) {
blizzardram_bank.label = _T("*");
mapped_malloc(&blizzardram_bank);
}
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 524288;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 524288;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
if (!is_blizzardppc(&currprefs)) {
- blizzardea_bank.allocated = 2 * 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 2 * 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
// Blizzard 12xx autoconfig ROM must be mapped at $ea0000-$ebffff, board requires it.
mapped_malloc(&blizzardea_bank);
}
if (!is_blizzardppc(&currprefs)) {
blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
blizzardmaprom_bank.start = BLIZZARDMK4_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
}
}
- maprom_base = blizzardram_bank.allocated - 524288;
+ maprom_base = blizzardram_bank.reserved_size - 524288;
} else if (is_csmk1(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 65536;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 65536;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
- blizzardea_bank.allocated = 2 * 65536;
+ blizzardea_bank.reserved_size = 2 * 65536;
blizzardea_bank.mask = 65535 - 1;
mapped_malloc(&blizzardea_bank);
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.start = 0x07f80000;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank_mapped = true;
} else if (is_csmk2(&currprefs) || is_blizzard2060(&currprefs)) {
- blizzardea_bank.allocated = 2 * 65536;
- blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.reserved_size = 2 * 65536;
+ blizzardea_bank.mask = blizzardea_bank.reserved_size - 1;
mapped_malloc(&blizzardea_bank);
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 65536;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 65536;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
- blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
- blizzardmaprom_bank.start = a3000hmem_bank.start + a3000hmem_bank.allocated - 524288;
- blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.reserved_size - 524288;
+ blizzardmaprom_bank.start = a3000hmem_bank.start + a3000hmem_bank.reserved_size - 524288;
+ blizzardmaprom_bank.reserved_size = 524288;
blizzardmaprom_bank.mask = 524288 - 1;
blizzardmaprom_bank.flags |= ABFLAG_INDIRECT | ABFLAG_NOALLOC;
mapped_malloc(&blizzardmaprom_bank);
} else if (is_csmk3(&currprefs)) {
blizzardf0_bank.start = 0x00f00000;
- blizzardf0_bank.allocated = 524288;
- blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.reserved_size = 524288;
+ blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
} else if (is_ivsvector(&currprefs)) {
cpuboardmem1_bank.start = 0x02000000;
- cpuboardmem1_bank.allocated = 32 * 1024 * 1024;
- cpuboardmem1_bank.mask = cpuboardmem1_bank.allocated - 1;
+ cpuboardmem1_bank.reserved_size = 32 * 1024 * 1024;
+ cpuboardmem1_bank.mask = cpuboardmem1_bank.reserved_size - 1;
mapped_malloc(&cpuboardmem1_bank);
cpuboardmem2_bank.start = 0x0c000000;
- cpuboardmem2_bank.allocated = cpuboard_size;
+ cpuboardmem2_bank.reserved_size = cpuboard_size;
cpuboardmem2_bank.mask = cpuboard_size - 1;
mapped_malloc(&cpuboardmem2_bank);
}
if (!cpuboardmem1_bank.baseaddr)
- cpuboardmem1_bank.allocated = 0;
+ cpuboardmem1_bank.reserved_size = 0;
if (!cpuboardmem2_bank.baseaddr)
- cpuboardmem2_bank.allocated = 0;
+ cpuboardmem2_bank.reserved_size = 0;
}
void cpuboard_init(void)
if (is_a2630(&currprefs)) {
if (!(a2630_io & 2))
map_banks(&blizzardf0_bank, 0xf80000 >> 16, f0rom_size >> 16, 0);
- if (mem25bit_bank.allocated)
- map_banks(&chipmem_bank, (mem25bit_bank.start + mem25bit_bank.allocated) >> 16, (1024 * 1024) >> 16, 0);
+ if (mem25bit_bank.allocated_size)
+ map_banks(&chipmem_bank, (mem25bit_bank.start + mem25bit_bank.allocated_size) >> 16, (1024 * 1024) >> 16, 0);
else
map_banks(&chipmem_bank, 0x01000000 >> 16, (1024 * 1024) >> 16, 0);
}
break;
case BOARD_BLIZZARD_SUB_1230III:
roms[0] = 162;
+ roms2[0] = 167;
break;
case BOARD_BLIZZARD_SUB_1230IV:
roms[0] = 89;
break;
case BOARD_BLIZZARD_SUB_2060:
roms[0] = 92;
+ roms[1] = 168;
break;
case BOARD_BLIZZARD_SUB_PPC:
roms[0] = p->cpu_model == 68040 ? 99 : 100;
flashrom = flash_new(blizzardf0_bank.baseaddr + 0, 32768, 65536, 0x20, flashrom_file, FLASHROM_EVERY_OTHER_BYTE | FLASHROM_PARALLEL_EEPROM);
flashrom2 = flash_new(blizzardf0_bank.baseaddr + 1, 32768, 65536, 0x20, flashrom_file, FLASHROM_EVERY_OTHER_BYTE | FLASHROM_EVERY_OTHER_BYTE_ODD | FLASHROM_PARALLEL_EEPROM);
autoconf = false;
+ aci->start = 0xf00000;
+ aci->size = 65536;
} else if (is_aca500(p)) {
f0rom_size = 524288;
zfile_fread(blizzardf0_bank.baseaddr, f0rom_size, 1, autoconfig_rom);
zfile_fread(blizzardf0_bank.baseaddr, 1, f0rom_size, autoconfig_rom);
autoconf = false;
autoconf_stop = true;
+ aci->start = 0xf00000;
+ aci->size = f0rom_size;
} else if (is_kupke(p)) {
earom_size = 65536;
for (int i = 0; i < 8192; i++) {
f0rom_size = 131072;
zfile_fread(blizzardf0_bank.baseaddr, 1, 131072, autoconfig_rom);
autoconf = false;
+ aci->start = 0xf00000;
+ aci->size = f0rom_size;
} else if (is_fusionforty(p)) {
f0rom_size = 262144;
zfile_fread(blizzardf0_bank.baseaddr, 1, 131072, autoconfig_rom);
autoconf = false;
+ aci->start = 0xf00000;
+ aci->size = f0rom_size;
} else if (is_tekmagic(p)) {
earom_size = 65536;
f0rom_size = 131072;
zfile_fread(blizzardf0_bank.baseaddr, 1, f0rom_size, autoconfig_rom);
autoconf = false;
cpuboard_non_byte_ea = false;
+ aci->start = 0xf00000;
+ aci->size = f0rom_size;
} else if (is_blizzard2060(p)) {
f0rom_size = 65536;
earom_size = 131072;
}
}
aci->last_high_ram = BLIZZARDMK4_RAM_BASE_48 + p->cpuboardmem1_size / 2;
- } else if (is_blizzard1230mk3(p) || is_blizzard1230mk2(p)) {
+ } else if (is_blizzard1230mk2(p)) {
earom_size = 131072;
for (int i = 0; i < 32768; i++) {
uae_u8 b = 0xff;
}
zfile_fclose(autoconfig_rom);
autoconfig_rom = NULL;
+ } else if (is_blizzard1230mk3(p)) {
+ earom_size = 131072;
+ zfile_fread(blizzardea_bank.baseaddr, 65536, 1, autoconfig_rom);
+ zfile_fclose(autoconfig_rom);
+ autoconfig_rom = NULL;
+ if (roms2[0] != -1) {
+ int idx2;
+ struct boardromconfig *brc2 = get_device_rom(p, ROMTYPE_BLIZKIT3, 0, &idx2);
+ if (brc2 && brc2->roms[idx2].romfile[0])
+ autoconfig_rom = board_rom_open(roms2, brc2->roms[idx2].romfile);
+ if (autoconfig_rom) {
+ zfile_fread(blizzardea_bank.baseaddr, 65536, 1, autoconfig_rom);
+ zfile_fclose(autoconfig_rom);
+ autoconfig_rom = NULL;
+ }
+ }
}
if (autoconf_stop) {
aci->addrbank = &expamem_none;
} else if (!autoconf) {
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
} else {
aci->addrbank = &blizzarde8_bank;
memcpy(aci->autoconfig_raw, blizzardea_bank.baseaddr, sizeof aci->autoconfig_raw);
+ aci->zorro = 2;
}
zfile_fclose(autoconfig_rom);
static int nextwaitvpos;
if (vpos == 0)
nextwaitvpos = maxvpos_display * 1 / 4;
- if (audio_is_pull() > 0) {
- while (audio_pull_buffer() > 1) {
+ if (audio_is_pull() > 0 && !currprefs.turbo_emulation) {
+ frame_time_t rpt = read_processor_time();
+ while (audio_pull_buffer() > 1 && (!isvsync() || (!vsync_isdone() && (int)vsyncmintime - (int)(rpt + vsynctimebase / 10) > 0 && (int)vsyncmintime - (int)rpt < vsynctimebase))) {
cpu_sleep_millis(1);
maybe_process_pull_audio();
+ rpt = read_processor_time();
}
}
if (vpos + 1 < maxvpos + lof_store && vpos >= nextwaitvpos && vpos < maxvpos - (maxvpos / 3) && (audio_is_pull() <= 0 || (audio_is_pull() > 0 && audio_pull_buffer()))) {
#ifdef AUTOCONFIG
expamem_reset ();
rtarea_reset();
+#endif
+#ifdef DRIVESOUND
+ driveclick_reset();
#endif
uae_int_requested = 0;
}
/* support HD floppies */
#define FLOPPY_DRIVE_HD
/* writable track length with normal 2us bitcell/300RPM motor, 12667 PAL, 12797 NTSC */
-#define FLOPPY_WRITE_LEN (currprefs.floppy_write_length > 256 ? currprefs.floppy_write_length / 2 : (currprefs.ntscmode ? (12798 / 2) : (12668 / 2)))
+#define FLOPPY_WRITE_LEN_PAL 12668
+#define FLOPPY_WRITE_LEN_NTSC 12798
+#define FLOPPY_WRITE_LEN (currprefs.floppy_write_length > 256 ? currprefs.floppy_write_length / 2 : (currprefs.ntscmode ? (FLOPPY_WRITE_LEN_NTSC / 2) : (FLOPPY_WRITE_LEN_PAL / 2)))
#define FLOPPY_WRITE_MAXLEN 0x3800
/* This works out to 350 */
#define FLOPPY_GAP_LEN (FLOPPY_WRITE_LEN - 11 * 544)
if (!p)
p = name + _tcslen (name);
_tcscpy (p, _T(".extended.adf"));
- if (!disk_creatediskfile (name, 1, hd ? DRV_35_HD : DRV_35_DD, NULL, false, false, drv->diskfile))
+ if (!disk_creatediskfile (&currprefs, name, 1, hd ? DRV_35_HD : DRV_35_DD, NULL, false, false, drv->diskfile))
return false;
} else if (mode == 2) {
struct zfile *tmp = zfile_fopen_load_zfile (drv->diskfile);
return false;
zfile_fclose (drv->diskfile);
drv->diskfile = NULL;
- if (!disk_creatediskfile (name, 1, hd ? DRV_35_HD : DRV_35_DD, NULL, false, false, tmp)) {
+ if (!disk_creatediskfile (&currprefs, name, 1, hd ? DRV_35_HD : DRV_35_DD, NULL, false, false, tmp)) {
zfile_fclose (tmp);
return false;
}
/* type: 0=regular, 1=ext2adf */
/* adftype: 0=DD,1=HD,2=DD PC,3=HD PC,4=525SD */
-bool disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom)
+bool disk_creatediskfile (struct uae_prefs *p, const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom)
{
int size = 32768;
struct zfile *f;
file_size = 720 * 1024;
sectors = 9;
}
- track_len = FLOPPY_WRITE_LEN * 2;
+ // largest needed
+ track_len = FLOPPY_WRITE_LEN_NTSC;
+ if (p->floppy_write_length > track_len && p->floppy_write_length < 2 * FLOPPY_WRITE_LEN_NTSC)
+ track_len = p->floppy_write_length;
if (adftype == 1 || adftype == 3) {
file_size *= 2;
track_len *= 2;
name2 = DISK_get_saveimagepath(name, -2);
if (needwritefile && zf2 == 0)
- disk_creatediskfile (name2, 1, drvtype, NULL, false, false, NULL);
+ disk_creatediskfile (p, name2, 1, drvtype, NULL, false, false, NULL);
zfile_fclose (zf2);
if (writeprotected && iswritefileempty (p, name)) {
for (i = 0; i < MAX_FLOPPY_DRIVES; i++) {
if (dstptr)
dstbak = dst = dstptr;
else
- dstbak = dst = xmalloc (uae_u8, 2 + 4 + 2 + 4 + 4 + size);
+ dstbak = dst = xmalloc (uae_u8, 2 + 4 + 2 + 4 + 4 + size + 2);
save_u32 (m);
save_u16 (drv->floppybitcounter);
static int click_initialized, wave_initialized;
#define DS_SHIFT 10
static int sample_step;
-
static uae_s16 *clickbuffer;
+static int clickcnt;
uae_s16 *decodewav (uae_u8 *s, int *lenp)
{
void driveclick_free(void)
{
driveclick_close();
- for (int i = 0; i < 4; i++) {
- drv_starting[i] = 0;
- drv_spinning[i] = 0;
- drv_has_spun[i] = 0;
- drv_has_disk[i] = 0;
- }
}
void driveclick_init (void)
{
xfree (clickbuffer);
clickbuffer = NULL;
+ clickcnt = 0;
+ for (int i = 0; i < 4; i++) {
+ drv_starting[i] = 0;
+ drv_spinning[i] = 0;
+ drv_has_spun[i] = 0;
+ drv_has_disk[i] = 0;
+ }
if (!wave_initialized)
return;
- clickbuffer = xmalloc (uae_s16, paula_sndbufsize / 2);
+ clickbuffer = xcalloc (uae_s16, paula_sndbufsize / 2);
sample_step = (freq << DS_SHIFT) / currprefs.sound_freq;
}
return total_sample / total_div;
}
-static int clickcnt;
-
static void mix (void)
{
int total = ((uae_u8*)paula_sndbufpt - (uae_u8*)paula_sndbuffer) / (get_audio_nativechannels (currprefs.sound_stereo) * 2);
{
addr -= chipmem_start_addr & chipmem_bank.mask;
addr &= chipmem_bank.mask;
- return (addr + size) <= chipmem_bank.allocated;
+ return (addr + size) <= chipmem_bank.allocated_size;
}
static uae_u8 * REGPARAM2 chipmem_xlate2 (uaecptr addr)
}
}
-addrbank expamem_null, expamem_none, expamem_nonautoconfig;
+addrbank expamem_null, expamem_none;
DECLARE_MEMORY_FUNCTIONS(expamem);
addrbank expamem_bank = {
expamem_bank_current = NULL;
return;
}
- if (ab == &expamem_null || ab == &expamem_nonautoconfig || cd->zorro < 1 || cd->zorro > 3) {
+ if (ab == &expamem_null || cd->zorro < 1 || cd->zorro > 3) {
expamem_next(NULL, NULL);
return;
}
addrbank filesys_bank = {
filesys_lget, filesys_wget, filesys_bget,
filesys_lput, filesys_wput, filesys_bput,
- filesys_xlate, filesys_check, NULL, _T("filesys"), _T("Filesystem autoconfig"),
+ filesys_xlate, filesys_check, NULL, _T("*"), _T("Filesystem autoconfig"),
filesys_lget, filesys_wget,
ABFLAG_IO | ABFLAG_SAFE | ABFLAG_PPCIOSPACE, S_READ, S_WRITE
};
-static uae_u32 filesys_start; /* Determined by the OS */
-
static bool filesys_write(uaecptr addr)
{
return addr >= 0x4000;
static uae_u32 REGPARAM2 filesys_lget (uaecptr addr)
{
uae_u8 *m;
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
m = filesys_bank.baseaddr + addr;
#if EXP_DEBUG
static uae_u32 REGPARAM2 filesys_wget (uaecptr addr)
{
uae_u8 *m;
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
m = filesys_bank.baseaddr + addr;
#if EXP_DEBUG
static uae_u32 REGPARAM2 filesys_bget (uaecptr addr)
{
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
#if EXP_DEBUG
write_log (_T("filesys_bget %x %x\n"), addr, filesys_bank.baseaddr[addr]);
static void REGPARAM2 filesys_bput(uaecptr addr, uae_u32 b)
{
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
if (!filesys_write(addr))
return;
static void REGPARAM2 filesys_lput (uaecptr addr, uae_u32 l)
{
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
if (!filesys_write(addr))
return;
static void REGPARAM2 filesys_wput (uaecptr addr, uae_u32 w)
{
- addr -= filesys_start & 65535;
+ addr -= filesys_bank.start & 65535;
addr &= 65535;
if (!filesys_write(addr))
return;
{
addr -= filesys_bank.start & 65535;
addr &= 65535;
- return (addr + size) <= filesys_bank.allocated;
+ return (addr + size) <= filesys_bank.allocated_size;
}
static uae_u8 *REGPARAM2 filesys_xlate(uaecptr addr)
{
p -= uaeboard_base;
return uaeboard_bank.baseaddr + p;
} else {
- p -= filesys_start;
+ p -= filesys_bank.start;
return filesys_bank.baseaddr + p;
}
}
p = uaeboard_ram_start + uaeboard_base;
memset(uaeboard_bank.baseaddr + uaeboard_ram_start, 0, size);
} else {
- p = uaeboard_ram_start + filesys_start;
+ p = uaeboard_ram_start + filesys_bank.start;
memset(filesys_bank.baseaddr + uaeboard_ram_start, 0, size);
}
uaeboard_ram_start += size;
{
addr -= uaeboard_base & 65535;
addr &= 65535;
- return (addr + size) <= uaeboard_bank.allocated;
+ return (addr + size) <= uaeboard_bank.allocated_size;
}
static uae_u8 *REGPARAM2 uaeboard_xlate(uaecptr addr)
{
addrbank *ab = &fastmem_bank[aci->devnum];
if (start == 0x00ff0000)
return ab;
- uae_u32 size = ab->allocated;
+ uae_u32 size = ab->allocated_size;
ab->start = start;
if (ab->start && size) {
map_banks_z2(ab, ab->start >> 16, size >> 16);
static bool megachipram_init(struct autoconfig_info *aci)
{
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
aci->start = 0x10000000;
aci->size = aci->prefs->z3chipmem_size;
aci->label = _T("32-bit Chip RAM");
#ifdef FILESYS
+static bool expamem_rtarea_init(struct autoconfig_info *aci)
+{
+ aci->start = rtarea_base;
+ aci->size = 65536;
+ aci->addrbank = &rtarea_bank;
+ aci->label = _T("UAE Boot ROM");
+ return true;
+}
+
/*
* Filesystem device
*/
/* 68k code needs to know this. */
uaecptr a = here();
org(rtarea_base + RTAREA_FSBOARD);
- dl(filesys_start + 0x2000);
+ dl(filesys_bank.start + 0x2000);
org(a);
}
// can't show dialogs from PPC thread, deadlock danger.
regs.halted = -2;
}
-
+ filesys_bank.start = expamem_board_pointer;
+ filesys_bank.mask = filesys_bank.reserved_size - 1;
+ mapped_malloc(&filesys_bank);
+ memcpy (filesys_bank.baseaddr, expamem, 0x3000);
uaeboard_ram_start = UAEBOARD_WRITEOFFSET;
- filesys_start = expamem_board_pointer;
- map_banks_z2(&filesys_bank, filesys_start >> 16, 1);
+ map_banks_z2(&filesys_bank, filesys_bank.start >> 16, 1);
expamem_map_filesys_update();
return &filesys_bank;
}
bool ks12 = ks12orolder();
bool hide = currprefs.uae_hide_autoconfig;
- aci->label = _T("UAE Boot ROM");
+ aci->label = _T("UAE FS ROM");
aci->get_params = get_params_filesys;
aci->set_params = set_params_filesys;
+ aci->addrbank = &filesys_bank;
#if 0
FILE *f = fopen("d:\\amiga\\amiga\\source\\acap\\autoconf", "rb");
if (ks12)
add_ks12_boot_hack();
- memcpy (filesys_bank.baseaddr, expamem, 0x3000);
+ //memcpy (filesys_bank.baseaddr, expamem, 0x3000);
return true;
}
uaecptr z3fs = expamem_board_pointer;
uae_u32 size = currprefs.z3fastmem[devnum].size;
- if (ab->allocated)
+ if (ab->allocated_size)
map_banks_z3(ab, z3fs >> 16, size >> 16);
return ab;
}
uae_u32 start = bank->start;
bool alwaysmapz3 = aci->prefs->z3_mapping_mode != Z3MAPPING_REAL;
- if ((alwaysmapz3 || expamem_z3hack(aci->prefs)) && bank->allocated) {
+ if ((alwaysmapz3 || expamem_z3hack(aci->prefs)) && bank->allocated_size) {
map_banks_z3(bank, start >> 16, size >> 16);
}
return true;
{
int devnum = aci->devnum;
gfxmem_banks[devnum]->start = expamem_board_pointer;
- map_banks_z3(gfxmem_banks[devnum], gfxmem_banks[devnum]->start >> 16, gfxmem_banks[devnum]->allocated >> 16);
+ map_banks_z3(gfxmem_banks[devnum], gfxmem_banks[devnum]->start >> 16, gfxmem_banks[devnum]->allocated_size >> 16);
return gfxmem_banks[devnum];
}
{
int devnum = aci->devnum;
gfxmem_banks[devnum]->start = expamem_board_pointer;
- map_banks_z2(gfxmem_banks[devnum], gfxmem_banks[devnum]->start >> 16, gfxmem_banks[devnum]->allocated >> 16);
+ map_banks_z2(gfxmem_banks[devnum], gfxmem_banks[devnum]->start >> 16, gfxmem_banks[devnum]->allocated_size >> 16);
return gfxmem_banks[devnum];
}
{
int alloc = *currpsize;
- bank->allocated = 0;
+ bank->allocated_size = 0;
+ bank->reserved_size = alloc;
bank->baseaddr = NULL;
bank->mask = 0;
return false;
bank->mask = alloc - 1;
- bank->allocated = alloc;
bank->label = label ? label : _T("*");
if (mapped_malloc (bank)) {
*currpsize = alloc;
currprefs.z3chipmem_size = changed_prefs.z3chipmem_size = 0;
for (int i = 0; i < MAX_RAM_BOARDS; i++) {
- if (fastmem_bank[i].allocated != currprefs.fastmem[i].size) {
+ if (fastmem_bank[i].reserved_size != currprefs.fastmem[i].size) {
free_fastmemory(i);
if (fastmem_bank[i].start == 0xffffffff) {
- fastmem_bank[i].allocated = 0;
+ fastmem_bank[i].reserved_size = 0;
} else {
- fastmem_bank[i].allocated = currprefs.fastmem[i].size;
- fastmem_bank[i].mask = fastmem_bank[i].allocated - 1;
+ fastmem_bank[i].reserved_size = currprefs.fastmem[i].size;
+ fastmem_bank[i].mask = fastmem_bank[i].reserved_size - 1;
- if (fastmem_bank[i].allocated && fastmem_bank[i].start != 0xffffffff) {
+ if (fastmem_bank[i].reserved_size && fastmem_bank[i].start != 0xffffffff) {
mapped_malloc (&fastmem_bank[i]);
if (fastmem_bank[i].baseaddr == 0) {
write_log (_T("Out of memory for fastmem card.\n"));
- fastmem_bank[i].allocated = 0;
}
}
}
}
}
- if (z3fastmem_bank[0].allocated != currprefs.z3fastmem[0].size) {
+ if (z3fastmem_bank[0].reserved_size != currprefs.z3fastmem[0].size) {
mapped_free(&z3fastmem_bank[0]);
mapped_malloc_dynamic(&currprefs.z3fastmem[0].size, &changed_prefs.z3fastmem[0].size, &z3fastmem_bank[0], 1, _T("*"));
memory_hardreset(1);
if (currprefs.z3fastmem[i].size && z3fastmem_bank[i].start == 0xffffffff) {
z3fastmem_bank[i].start = expansion_startaddress(&currprefs, z3fastmem_bank[i - 1].start, currprefs.z3fastmem[i - 1].size);
}
- if (z3fastmem_bank[i].allocated != currprefs.z3fastmem[i].size) {
+ if (z3fastmem_bank[i].reserved_size != currprefs.z3fastmem[i].size) {
mapped_free (&z3fastmem_bank[i]);
- z3fastmem_bank[i].allocated = currprefs.z3fastmem[i].size;
- z3fastmem_bank[i].mask = z3fastmem_bank[i].allocated - 1;
+ z3fastmem_bank[i].reserved_size = currprefs.z3fastmem[i].size;
+ z3fastmem_bank[i].mask = z3fastmem_bank[i].reserved_size - 1;
- if (z3fastmem_bank[i].allocated) {
+ if (z3fastmem_bank[i].reserved_size) {
mapped_malloc(&z3fastmem_bank[i]);
if (z3fastmem_bank[i].baseaddr == 0) {
write_log (_T("Out of memory for 32 bit fast memory #%d.\n"), i);
- z3fastmem_bank[i].allocated = 0;
}
}
memory_hardreset (1);
}
}
- if (z3chipmem_bank.allocated != currprefs.z3chipmem_size) {
+ if (z3chipmem_bank.reserved_size != currprefs.z3chipmem_size) {
mapped_free (&z3chipmem_bank);
mapped_malloc_dynamic (&currprefs.z3chipmem_size, &changed_prefs.z3chipmem_size, &z3chipmem_bank, 16, _T("*"));
memory_hardreset (1);
#ifdef PICASSO96
struct rtgboardconfig *rbc = &currprefs.rtgboards[0];
- if (gfxmem_banks[0]->allocated != rbc->rtgmem_size) {
+ if (gfxmem_banks[0]->reserved_size != rbc->rtgmem_size) {
mapped_free (gfxmem_banks[0]);
if (rbc->rtgmem_type < GFXBOARD_HARDWARE)
mapped_malloc_dynamic (&rbc->rtgmem_size, &changed_prefs.rtgboards[0].rtgmem_size, gfxmem_banks[0], 1, NULL);
#ifdef SAVESTATE
if (savestate_state == STATE_RESTORE) {
for (int i = 0; i < MAX_RAM_BOARDS; i++) {
- if (fastmem_bank[i].allocated > 0) {
+ if (fastmem_bank[i].allocated_size > 0) {
restore_ram (fast_filepos[i], fastmem_bank[i].baseaddr);
if (!fastmem_bank[i].start) {
// old statefile compatibility support
fastmem_bank[i].start = 0x00200000;
}
map_banks(&fastmem_bank[i], fastmem_bank[i].start >> 16, currprefs.fastmem[i].size >> 16,
- fastmem_bank[i].allocated);
+ fastmem_bank[i].allocated_size);
}
- if (z3fastmem_bank[i].allocated > 0) {
+ if (z3fastmem_bank[i].allocated_size > 0) {
restore_ram (z3_filepos[i], z3fastmem_bank[i].baseaddr);
map_banks(&z3fastmem_bank[i], z3fastmem_bank[i].start >> 16, currprefs.z3fastmem[i].size >> 16,
- z3fastmem_bank[i].allocated);
+ z3fastmem_bank[i].allocated_size);
}
}
- if (z3chipmem_bank.allocated > 0) {
+ if (z3chipmem_bank.allocated_size > 0) {
restore_ram (z3_fileposchip, z3chipmem_bank.baseaddr);
map_banks(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16,
- z3chipmem_bank.allocated);
+ z3chipmem_bank.allocated_size);
}
#ifdef PICASSO96
- if (gfxmem_banks[0]->allocated > 0 && gfxmem_banks[0]->start > 0) {
+ if (gfxmem_banks[0]->allocated_size > 0 && gfxmem_banks[0]->start > 0) {
restore_ram (p96_filepos, gfxmem_banks[0]->baseaddr);
map_banks(gfxmem_banks[0], gfxmem_banks[0]->start >> 16, currprefs.rtgboards[0].rtgmem_size >> 16,
- gfxmem_banks[0]->allocated);
+ gfxmem_banks[0]->allocated_size);
}
#endif
}
bool alloc_expansion_bank(addrbank *bank, struct autoconfig_info *aci)
{
bank->start = aci->start;
- bank->allocated = aci->size;
+ bank->reserved_size = aci->size;
aci->addrbank = bank;
return mapped_malloc(bank);
}
{
mapped_free(bank);
bank->start = NULL;
- bank->allocated = 0;
+ bank->reserved_size = 0;
}
struct autoconfig_info *expansion_get_autoconfig_data(struct uae_prefs *p, int index)
aci->ert = cd->ert;
aci->cst = cd->cst;
aci->start = 0xffffffff;
+ aci->zorro = cd->zorro;
if (cd->initnum) {
ok = cd->initnum(aci);
} else {
if (cd->flags & CARD_FLAG_CHILD)
aci->parent_of_previous = true;
- if (aci->addrbank != &expamem_nonautoconfig && aci->addrbank != &expamem_null && aci->addrbank != &expamem_none && (aci->autoconfig_raw[0] != 0xff || aci->autoconfigp)) {
+ if ((aci->zorro == 1 || aci->zorro == 2 || aci->zorro == 3) && aci->addrbank != &expamem_null && aci->addrbank != &expamem_none && (aci->autoconfig_raw[0] != 0xff || aci->autoconfigp)) {
uae_u8 ac2[16];
const uae_u8 *a = aci->autoconfigp;
if (!a) {
aci->prefs = p;
aci->ert = cd->ert;
aci->cst = cd->cst;
+ aci->zorro = cd->zorro;
aci->start = 0xffffffff;
if (cd->initnum) {
ok = cd->initnum(aci);
_stprintf(s, _T(" [%d]"), aci->devnum + 1);
}
- if (aci->addrbank != &expamem_nonautoconfig && aci->addrbank != &expamem_null && aci->addrbank != &expamem_none && (aci->autoconfig_raw[0] != 0xff || aci->autoconfigp)) {
+ if ((aci->zorro == 1 || aci->zorro == 2 || aci->zorro == 3) && aci->addrbank != &expamem_none && (aci->autoconfig_raw[0] != 0xff || aci->autoconfigp)) {
uae_u8 ac2[16];
const uae_u8 *a = aci->autoconfigp;
if (!a) {
memcpy(aci->autoconfig_bytes, a, sizeof aci->autoconfig_bytes);
if (aci->addrbank) {
aci->addrbank->start = expamem_board_pointer;
- if (aci->addrbank->allocated == 0 && !(type & add_memory) && expamem_board_size < 524288) {
- aci->addrbank->allocated = expamem_board_size;
+ if (aci->addrbank->reserved_size == 0 && !(type & add_memory) && expamem_board_size < 524288) {
+ aci->addrbank->reserved_size = expamem_board_size;
}
}
aci->zorro = cd->zorro;
if (cd->zorro == 3) {
if (expamem_z3_pointer_real + expamem_board_size < expamem_z3_pointer_real) {
expamem_z3_pointer_real = 0xffffffff;
+ expamem_z3_highram_real = 0xffffffff;
} else {
expamem_z3_pointer_real += expamem_board_size;
}
if (expamem_z3_pointer_uae + expamem_board_size < expamem_z3_pointer_uae) {
expamem_z3_pointer_uae = 0xffffffff;
+ expamem_z3_highram_uae = 0xffffffff;
} else {
expamem_z3_pointer_uae += expamem_board_size;
}
}
} else {
+ cd->base = aci->start;
+ cd->size = aci->size;
if (log)
- write_log(_T("'%s' no autoconfig.\n"), aci->label ? aci->label : _T("<no name>"));
+ write_log(_T("'%s' no autoconfig %08x - %08x.\n"), aci->label ? aci->label : _T("<no name>"), cd->base, cd->base + cd->size - 1);
}
_tcscpy(aci->name, label);
if (cd->flags & CARD_FLAG_CHILD)
struct card_data *cd = tcards[idx];
if (!cd)
continue;
- if (cd->cst || cd->aci.hardwired || cd->size == 0) {
+ if (cd->cst || cd->aci.hardwired) {
cards[new_cardno++] = cd;
tcards[idx] = NULL;
for (int j = idx + 1; j < cardno; j++) {
reset_ac(p);
if (p == &currprefs && do_mount < 0 && ks11orolder()) {
- filesys_start = 0xe90000;
- map_banks_z2(&filesys_bank, filesys_start >> 16, 1);
+ filesys_bank.start = 0xe90000;
+ mapped_malloc(&filesys_bank);
+ map_banks_z2(&filesys_bank, filesys_bank.start >> 16, 1);
expamem_init_filesys(0);
expamem_map_filesys_update();
}
-
+
if (p->cpuboard_type) {
// This may require first 128k slot.
cards_set[cardno].flags = 1;
cards_set[cardno].initnum = expamem_init_uaeboard;
cards_set[cardno++].map = expamem_map_uaeboard;
}
+ if (do_mount && p->uaeboard < 2) {
+ cards_set[cardno].flags = 0;
+ cards_set[cardno].name = _T("UAEBOOTROM");
+ cards_set[cardno].zorro = BOARD_NONAUTOCONFIG_BEFORE;
+ cards_set[cardno].initnum = expamem_rtarea_init;
+ cards_set[cardno++].map = NULL;
+
+ }
#endif
#ifdef PICASSO96
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
if (savestate_state != STATE_RESTORE) {
for (int i = 0; i < MAX_RAM_BOARDS; i++) {
- fastmem_bank[i].allocated = 0;
+ fastmem_bank[i].reserved_size = 0;
fastmem_bank[i].mask = 0;
fastmem_bank[i].baseaddr = NULL;
}
#ifdef PICASSO96
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
- gfxmem_banks[i]->allocated = 0;
+ gfxmem_banks[i]->reserved_size = 0;
gfxmem_banks[i]->mask = 0;
gfxmem_banks[i]->baseaddr = NULL;
}
#endif
for (int i = 0; i < MAX_RAM_BOARDS; i++) {
- z3fastmem_bank[i].allocated = 0;
+ z3fastmem_bank[i].reserved_size = 0;
z3fastmem_bank[i].mask = 0;
z3fastmem_bank[i].baseaddr = NULL;
}
- z3chipmem_bank.allocated = 0;
+ z3chipmem_bank.reserved_size = 0;
z3chipmem_bank.mask = z3chipmem_bank.start = 0;
z3chipmem_bank.baseaddr = NULL;
}
-#ifdef FILESYS
- filesys_start = 0;
-#endif
-
allocate_expamem ();
-#ifdef FILESYS
- filesys_bank.allocated = 0x10000;
- if (!mapped_malloc (&filesys_bank)) {
- write_log (_T("virtual memory exhausted (filesysory)!\n"));
- exit (0);
- }
-#endif
if (currprefs.uaeboard) {
- uaeboard_bank.allocated = 0x10000;
+ uaeboard_bank.reserved_size = 0x10000;
mapped_malloc(&uaeboard_bank);
}
}
static void clear_bank (addrbank *ab)
{
- if (!ab->baseaddr || !ab->allocated)
+ if (!ab->baseaddr || !ab->allocated_size)
return;
- memset (ab->baseaddr, 0, ab->allocated > 0x800000 ? 0x800000 : ab->allocated);
+ memset (ab->baseaddr, 0, ab->allocated_size > 0x800000 ? 0x800000 : ab->allocated_size);
}
void expansion_clear (void)
uae_u8 *save_fram (int *len, int num)
{
- *len = fastmem_bank[num].allocated;
+ *len = fastmem_bank[num].allocated_size;
return fastmem_bank[num].baseaddr;
}
uae_u8 *save_zram (int *len, int num)
{
if (num < 0) {
- *len = z3chipmem_bank.allocated;
+ *len = z3chipmem_bank.allocated_size;
return z3chipmem_bank.baseaddr;
}
- *len = z3fastmem_bank[num].allocated;
+ *len = z3fastmem_bank[num].allocated_size;
return z3fastmem_bank[num].baseaddr;
}
uae_u8 *save_pram (int *len)
{
- *len = gfxmem_banks[0]->allocated;
+ *len = gfxmem_banks[0]->allocated_size;
return gfxmem_banks[0]->baseaddr;
}
}
};
+static const struct expansionboardsettings ne2k_isa_settings[] = {
+ {
+ _T("IO\0") _T("240\0") _T("260\0") _T("280\0") _T("2A0\0") _T("300\0") _T("320\0") _T("340\0") _T("360\0"),
+ _T("io\0") _T("240\0") _T("260\0") _T("280\0") _T("2A0\0") _T("300\0") _T("320\0") _T("340\0") _T("360\0"),
+ true, false, 0
+ },
+ {
+ _T("IRQ\0") _T("3\0") _T("4\0") _T("5\0") _T("7\0") _T("9\0") _T("10\0") _T("11\0") _T("12\0") _T("15\0"),
+ _T("irq\0") _T("3\0") _T("4\0") _T("5\0") _T("7\0") _T("9\0") _T("10\0") _T("11\0") _T("12\0") _T("15\0"),
+ true, false, 0
+ },
+ {
+ NULL
+ }
+};
+
+
static const struct expansionboardsettings toccata_soundcard_settings[] = {
{
_T("Paula/CD audio mixer"),
NULL
}
};
+static const struct expansionboardsettings buddha_settings[] = {
+ {
+ _T("Model\0") _T("Buddha\0") _T("Catweasel Z2\0"),
+ _T("model\0") _T("buddha\0") _T("cwz2\0"),
+ true, false, 0
+ },
+ {
+ NULL
+ }
+};
+
static const struct expansionboardsettings adscsi2000_settings[] = {
{
_T("Cache (B)"),
mediator_sub, 0,
false, EXPANSIONTYPE_PCI_BRIDGE,
0, 0, 0, false, NULL,
- false,
- mediator_settings
+ false, 0, mediator_settings
},
{
_T("prometheus"), _T("Prometheus"), _T("Matay"),
NULL, 0,
false, EXPANSIONTYPE_PCI_BRIDGE,
0, 0, 0, false, NULL,
- false,
- bridge_settings
+ false, 0, bridge_settings
},
/* SCSI/IDE expansion */
false, EXPANSIONTYPE_SCSI,
8498, 27, 0, true, NULL
},
+ {
+ _T("blizzardscsikitiii"), _T("SCSI Kit III"), _T("Phase 5"),
+ NULL, NULL, cpuboard_ncr9x_add_scsi_unit, ROMTYPE_BLIZKIT3, 0, 0, 0, true,
+ NULL, 0,
+ false, EXPANSIONTYPE_SCSI
+ },
{
_T("blizzardscsikitiv"), _T("SCSI Kit IV"), _T("Phase 5"),
NULL, NULL, cpuboard_ncr9x_add_scsi_unit, ROMTYPE_BLIZKIT4, 0, 0, 0, true,
NULL, 0,
false, EXPANSIONTYPE_SCSI,
0, 0, 0, false, NULL,
- false, NULL,
+ false, 0, NULL,
{ 0xc1, 0x0c, 0x00, 0x00, 0x03, 0xec, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
},
{
NULL, 0,
false, EXPANSIONTYPE_SCSI,
0, 0, 0, false, NULL,
- true, a4091_settings
+ true, 0, a4091_settings
},
{
_T("dataflyerscsiplus"), _T("DataFlyer SCSI+"), _T("Expansion Systems"),
NULL, 0,
false, EXPANSIONTYPE_SCSI,
0, 0, 0, false, NULL,
- true,
- adscsi2000_settings
+ true, 0, adscsi2000_settings
+ },
+ {
+ _T("buddha"), _T("Buddha"), _T("Individual Computers"),
+ buddha_init, NULL, buddha_add_ide_unit, ROMTYPE_BUDDHA, 0, 0, BOARD_AUTOCONFIG_Z2, false,
+ NULL, 0,
+ false, EXPANSIONTYPE_IDE,
+ 0, 0, 0, false, NULL,
+ false, 4, buddha_settings,
+ { 0xd1, 0x00, 0x00, 0x00, 0x12, 0x12, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00 },
},
{
_T("trumpcardpro"), _T("Grand Slam"), _T("IVS"),
NULL, 0,
true, EXPANSIONTYPE_SCSI,
2112, 4, 0, false, NULL,
- true, NULL,
+ true, 0, NULL,
{ 0xd1, 0x34, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
},
{
- _T("kommos"), _T("A500/A2000 SCSI"), _T("Jürgen Kommos"),
+ _T("kommos"), _T("Kommos A500/A2000 SCSI"), _T("Jürgen Kommos"),
kommos_init, NULL, kommos_add_scsi_unit, ROMTYPE_KOMMOS, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
NULL, 0,
false, EXPANSIONTYPE_SCSI
NULL, 0,
true, EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE,
0, 0, 0, false, NULL,
- true,
- golemfast_settings
+ true, 0, golemfast_settings
},
{
_T("multievolution"), _T("Multi Evolution 500/2000"), _T("MacroSystem"),
NULL, 0,
false, EXPANSIONTYPE_SCSI,
1010, 0, 0, false, NULL,
- false, NULL,
+ false, 0, NULL,
{ 0xc1, 2, 0x00, 0x00, 0x03, 0xf2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
},
NULL, 0,
false, EXPANSIONTYPE_SCSI,
2102, 4, 0, false, nexus_memory_callback,
- false, nexus_settings,
+ false, 0, nexus_settings,
{ 0xd1, 0x01, 0x00, 0x00, 0x08, 0x36, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
},
{
_T("rochard"), _T("RocHard RH800C"), _T("Roctec"),
rochard_init, NULL, rochard_add_idescsi_unit, ROMTYPE_ROCHARD | ROMTYPE_NONE, 0, 0, BOARD_AUTOCONFIG_Z2, false,
rochard_sub, 0,
- true, EXPANSIONTYPE_IDE | EXPANSIONTYPE_SCSI | EXPANSIONTYPE_IDE_PORT_DOUBLED,
- 2144, 2, 0
+ true, EXPANSIONTYPE_IDE | EXPANSIONTYPE_SCSI,
+ 2144, 2, 0, false, NULL,
+ false, 2, NULL
},
{
_T("supradrive"), _T("SupraDrive"), _T("Supra Corporation"),
NULL, 0,
false, EXPANSIONTYPE_CUSTOM | EXPANSIONTYPE_SCSI,
0, 0, 0, false, NULL,
- false, NULL,
+ false, 0, NULL,
{ 0xc1, 0x04, 0x00, 0x00, 0x07, 0xf2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
},
{
NULL, 0,
false, EXPANSIONTYPE_IDE,
0, 0, 0, false, NULL,
- false,
- x86_athdxt_settings
+ false, 0, x86_athdxt_settings
},
/* PC Bridgeboards */
NULL, 0,
false, EXPANSIONTYPE_X86_BRIDGE,
0, 0, 0, false, NULL,
- false,
- x86_bridge_sidecar_settings
+ false, 0, x86_bridge_sidecar_settings
},
{
_T("a2088"), _T("A2088"), _T("Commodore"),
NULL, 0,
false, EXPANSIONTYPE_X86_BRIDGE,
0, 0, 0, false, NULL,
- false,
- x86_bridge_settings
+ false, 0, x86_bridge_settings
},
{
_T("a2088t"), _T("A2088T"), _T("Commodore"),
NULL, 0,
false, EXPANSIONTYPE_X86_BRIDGE,
0, 0, 0, false, NULL,
- false,
- x86_bridge_settings
+ false, 0, x86_bridge_settings
},
{
_T("a2286"), _T("A2286"), _T("Commodore"),
NULL, 0,
false, EXPANSIONTYPE_X86_BRIDGE,
0, 0, 0, false, NULL,
- false,
- x86at286_bridge_settings
+ false, 0, x86at286_bridge_settings
},
{
_T("a2386"), _T("A2386SX"), _T("Commodore"),
NULL, 0,
false, EXPANSIONTYPE_X86_BRIDGE,
0, 0, 0, false, NULL,
- false,
- x86at386_bridge_settings
+ false, 0, x86at386_bridge_settings
},
// only here for rom selection
NULL, 0,
false, EXPANSIONTYPE_SOUND,
0, 0, 0, false, NULL,
- false, toccata_soundcard_settings,
+ false, 0, toccata_soundcard_settings,
{ 0xc1, 12, 0, 0, 18260 >> 8, 18260 & 255 }
},
{
NULL, 0,
false, EXPANSIONTYPE_SOUND,
0, 0, 0, false, NULL,
- false, NULL,
+ false, 0, NULL,
{ 0xc1, 2, 0x00, 0x00, 6502 >> 8, 6502 & 255, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
},
{
NULL, 0,
false, EXPANSIONTYPE_SOUND,
0, 0, 0, false, NULL,
- false, NULL,
+ false, 0, NULL,
{ 0x80, 2, 0x10, 0x00, 6502 >> 8, 6502 & 255, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
},
NULL, 0,
false, EXPANSIONTYPE_NET
},
+ {
+ _T("ne2000_isa"), _T("NE2000 ISA"), NULL,
+ isa_expansion_init, NULL, NULL, ROMTYPE_NE2KISA | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
+ NULL, 0,
+ false, EXPANSIONTYPE_NET,
+ 0, 0, 0, false, NULL,
+ false, 0, ne2k_isa_settings
+ },
/* Catweasel */
{
bool gayle_ide_init(struct autoconfig_info *aci)
{
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
if (aci->prefs->cs_ide == 1) {
aci->start = GAYLE_BASE_1200;
aci->size = 0x10000;
{
aci->start = 0xa00000;
aci->size = 0x1000;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
aci->parent_address_space = true;
return true;
}
{
aci->start = 0x600000;
aci->size = 0xa80000 - aci->start;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
return true;
}
gb->vram_offset[0] = gb->vram_offset[1] = 0;
gb->vram_enabled = true;
gb->vram_offset_enabled = false;
- gb->gfxmem_bank->allocated = vramsize;
+ gb->gfxmem_bank->reserved_size = vramsize;
gb->gfxmem_bank->start = gb->gfxboardmem_start;
if (gb->board->manufacturer) {
gb->gfxmem_bank->label = _T("*");
gb->vram += gb->vram_start_offset;
gb->vramend += gb->vram_start_offset;
gb->gfxmem_bank->baseaddr = gb->vram;
- gb->gfxmem_bank->allocated = rbc->rtgmem_size;
+ if (rbc->rtgmem_size < gb->gfxmem_bank->allocated_size)
+ gb->gfxmem_bank->allocated_size = rbc->rtgmem_size;
gb->vga.vga.vram_size_mb = rbc->rtgmem_size >> 20;
gb->vgaioregion.opaque = &gb->vgaioregionptr;
gb->vgaioregion.data = gb;
dst->start = src->start;
dst->startmask = src->startmask;
dst->mask = src->mask;
- dst->allocated = src->allocated;
+ dst->allocated_size = src->allocated_size;
+ dst->reserved_size = src->reserved_size;
dst->baseaddr = src->baseaddr;
dst->flags = src->flags;
dst->jit_read_flag = src->jit_read_flag;
gb->gfxboard_bank_registers.bput = gfxboard_bput_regs;
if (gb->p4z2) {
ab = &gb->gfxboard_bank_special;
- map_banks_z2(ab, b, gb->gfxboard_bank_special.allocated >> 16);
+ map_banks_z2(ab, b, gb->gfxboard_bank_special.reserved_size >> 16);
gb->io_start = b << 16;
- gb->io_end = gb->io_start + gb->gfxboard_bank_special.allocated;
+ gb->io_end = gb->io_start + gb->gfxboard_bank_special.reserved_size;
} else {
ab = &gb->gfxboard_bank_registers;
- map_banks_z2(ab, b, gb->gfxboard_bank_registers.allocated >> 16);
+ map_banks_z2(ab, b, gb->gfxboard_bank_registers.reserved_size >> 16);
gb->io_start = b << 16;
- gb->io_end = gb->io_start + gb->gfxboard_bank_registers.allocated;
+ gb->io_end = gb->io_start + gb->gfxboard_bank_registers.reserved_size;
}
gb->configured_regs = b;
expamem_next (ab, NULL);
aci->label = gb->board->name;
aci->direct_vram = true;
+ aci->addrbank = &gb->gfxboard_bank_memory;
if (gb->rbc->rtgmem_type == GFXBOARD_VGA) {
- aci->addrbank = &expamem_nonautoconfig;
- } else {
- aci->addrbank = &gb->gfxboard_bank_memory;
+ aci->zorro = 0;
}
aci->parent = aci;
gb->configured_mem = -1;
ew (gb, 0x20, ser >> 8); /* ser.no. Byte 2 */
ew (gb, 0x24, ser >> 0); /* ser.no. Byte 3 */
- gb->gfxboard_bank_registers.allocated = BOARD_REGISTERS_SIZE;
+ gb->gfxboard_bank_registers.reserved_size = BOARD_REGISTERS_SIZE;
gb->configured_regs = -1;
if (ISP4()) {
copyp4autoconfig (gb, 128);
loadp4rom (gb);
v = (((gb->automemory[0] & 0xf0) | (gb->automemory[2] >> 4)) & 3) - 1;
- gb->gfxboard_bank_special.allocated = 0x10000 << v;
+ gb->gfxboard_bank_special.reserved_size = 0x10000 << v;
}
gb->gfxboard_bank_registers.bget = gfxboard_bget_regs_autoconfig;
ls = 0x12;
#endif
break;
- case 0xe0: /* RAM DIAGNOSTICS */
- case 0xe3: /* DRIVE DIAGNOSTIC */
- case 0xe4: /* CONTROLLER INTERNAL DIAGNOSTICS */
+ case 0xe0: /* RAM DIAGNOSTICS */
+ case 0xe3: /* DRIVE DIAGNOSTIC */
+ case 0xe4: /* CONTROLLER INTERNAL DIAGNOSTICS */
scsi_len = 0;
break;
readprot:
ide->regs.ide_status = 0;
if (ide->scsi->status) {
// error
- ide->regs.ide_error = (ide->scsi->sense[2] << 4) | 4;
+ ide->regs.ide_error = (ide->scsi->sense[2] << 4) | 4; // ABRT
atapi_data_done (ide);
ide->regs.ide_status |= ATAPI_STATUS_CHK;
atapi_set_size (ide);
if (ide->data_offset == ide->packet_transfer_size) {
if (IDE_LOG > 1)
write_log (_T("IDE%d ATAPI partial read finished, %d bytes remaining\n"), ide->num, ide->data_size);
- if (ide->data_size == 0) {
+ if (ide->data_size == 0 || ide->data_size == 1) { // 1 byte remaining: ignore, ATAPI has word transfer size.
ide->packet_state = 0;
atapi_data_done (ide);
if (IDE_LOG > 1)
#define ROCHARD_IDE (PROTAR_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
#define x86_AT_IDE (ROCHARD_IDE + 2 * MAX_DUPLICATE_EXPANSION_BOARDS)
#define GOLEMFAST_IDE (x86_AT_IDE + 2 * MAX_DUPLICATE_EXPANSION_BOARDS)
-#define TOTAL_IDE (GOLEMFAST_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
+#define BUDDHA_IDE (GOLEMFAST_IDE + 2 * MAX_DUPLICATE_EXPANSION_BOARDS)
+#define TOTAL_IDE (BUDDHA_IDE + 3 * MAX_DUPLICATE_EXPANSION_BOARDS)
#define ALF_ROM_OFFSET 0x0100
#define GVP_IDE_ROM_OFFSET 0x8000
static struct ide_board *rochard_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_board *x86_at_ide_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_board *golemfast_board[MAX_DUPLICATE_EXPANSION_BOARDS];
+static struct ide_board *buddha_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_hdf *idecontroller_drive[TOTAL_IDE * 2];
static struct ide_thread_state idecontroller_its;
return reg;
}
+static int get_buddha_reg(uaecptr addr, struct ide_board *board, int *portnum)
+{
+ int reg = -1;
+ if (addr < 0x800 || addr >= 0xe00)
+ return reg;
+ *portnum = (addr - 0x800) / 0x200;
+ reg = (addr >> 2) & 15;
+ if (addr & 0x100)
+ reg |= IDE_SECONDARY;
+ return reg;
+}
+
static int get_rochard_reg(uaecptr addr, struct ide_board *board, int *portnum)
{
int reg = -1;
if (addr < 0x40 && (!board->configured || board->keepautoconfig))
return board->acmemory[addr];
- if (board->type == ALF_IDE) {
+ if (board->type == BUDDHA_IDE) {
+
+ int portnum;
+ int regnum = get_buddha_reg(addr, board, &portnum);
+ if (regnum >= 0) {
+ if (board->ide[portnum])
+ v = get_ide_reg_multi(board, regnum, portnum, 1);
+ } else if (addr >= 0xf00 && addr < 0x1000) {
+ if ((addr & ~3) == 0xf00)
+ v = ide_irq_check(board->ide[0], false) ? 0x80 : 0x00;
+ else if ((addr & ~3) == 0xf40)
+ v = ide_irq_check(board->ide[1], false) ? 0x80 : 0x00;
+ else if ((addr & ~3) == 0xf80)
+ v = ide_irq_check(board->ide[2], false) ? 0x80 : 0x00;
+ else
+ v = 0;
+ } else if (addr >= 0x7fc && addr <= 0x7ff) {
+ v = board->userdata;
+ } else {
+ v = board->rom[addr & board->rom_mask];
+ }
+
+ } else if (board->type == ALF_IDE) {
if (addr < 0x1100 || (addr & 1)) {
if (board->rom)
if (board->configured) {
- if (board->type == ALF_IDE) {
+ if (board->type == BUDDHA_IDE) {
+
+ int portnum;
+ int regnum = get_buddha_reg(addr, board, &portnum);
+ if (regnum == IDE_DATA) {
+ if (board->ide[portnum])
+ v = get_ide_reg_multi(board, IDE_DATA, portnum, 1);
+ } else {
+ v = ide_read_byte(board, addr) << 8;
+ v |= ide_read_byte(board, addr + 1);
+ }
+
+ } else if (board->type == ALF_IDE) {
int regnum = get_alf_reg(addr, board);
if (regnum == IDE_DATA) {
}
}
if (board->configured) {
- if (board->type == ALF_IDE) {
+
+ if (board->type == BUDDHA_IDE) {
+
+ int portnum;
+ int regnum = get_buddha_reg(addr, board, &portnum);
+ if (regnum >= 0) {
+ if (board->ide[portnum]) {
+ put_ide_reg_multi(board, regnum, v, portnum, 1);
+ }
+ } else if (addr >= 0xfc0 && addr < 0xfc4) {
+ board->intena = true;
+ } else if (addr >= 0x7fc && addr <= 0x7ff) {
+ board->userdata = v;
+ }
+
+ } else if (board->type == ALF_IDE) {
+
int regnum = get_alf_reg(addr, board);
if (regnum >= 0)
put_ide_reg(board, regnum, v);
write_log(_T("IDE IO WORD WRITE %08x=%04x %08x\n"), addr, v, M68K_GETPC);
#endif
if (board->configured) {
- if (board->type == ALF_IDE) {
+
+ if (board->type == BUDDHA_IDE) {
+
+ int portnum;
+ int regnum = get_buddha_reg(addr, board, &portnum);
+ if (regnum == IDE_DATA) {
+ if (board->ide[portnum])
+ put_ide_reg_multi(board, IDE_DATA, v, portnum, 1);
+ } else {
+ ide_write_byte(board, addr, v >> 8);
+ ide_write_byte(board, addr + 1, v);
+ }
+
+ } else if (board->type == ALF_IDE) {
int regnum = get_alf_reg(addr, board);
if (regnum == IDE_DATA) {
ide->rom = rom;
ide->rom_size = rom_size;
+ ide->rom_mask = rom_size - 1;
memcpy(ide->acmemory, ide->rom, sizeof ide->acmemory);
aci->addrbank = ide->bank;
add_ide_standard_unit(ch, ci, rc, rochard_board, ROCHARD_IDE, false, false, 4);
}
+bool buddha_init(struct autoconfig_info *aci)
+{
+ const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_BUDDHA);
+
+ if (!aci->doinit) {
+ aci->autoconfigp = ert->autoconfig;
+ return true;
+ }
+ struct ide_board *ide = getide(aci->rc);
+
+ ide->configured = 0;
+ ide->bank = &ide_bank_generic;
+ ide->rom_size = 65536;
+ ide->mask = 65536 - 1;
+
+ ide->rom = xcalloc(uae_u8, ide->rom_size);
+ memset(ide->rom, 0xff, ide->rom_size);
+ ide->rom_mask = ide->rom_size - 1;
+ load_rom_rc(aci->rc, ROMTYPE_BUDDHA, 32768, 0, ide->rom, 65536, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
+ for (int i = 0; i < 16; i++) {
+ uae_u8 b = ert->autoconfig[i];
+ if (i == 1 && (aci->rc->device_settings & 1))
+ b = 42;
+ ew(ide, i * 4, b);
+ }
+ aci->addrbank = ide->bank;
+ return true;
+}
+
+void buddha_add_ide_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ add_ide_standard_unit(ch, ci, rc, buddha_board, BUDDHA_IDE, false, false, 6);
+}
+
void rochard_add_idescsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
if (ch < 0) {
#define EXPANSIONTYPE_SCSI 1
#define EXPANSIONTYPE_IDE 2
#define EXPANSIONTYPE_24BIT 4
-#define EXPANSIONTYPE_IDE_PORT_DOUBLED 8
#define EXPANSIONTYPE_SASI 16
#define EXPANSIONTYPE_CUSTOM 32
#define EXPANSIONTYPE_PCI_BRIDGE 64
#define EXPANSIONTYPE_PARALLEL_ADAPTER 128
-#define EXPANSIONTYPE_X86_BRIDGE 256
-#define EXPANSIONTYPE_CUSTOM_SECONDARY 512
-#define EXPANSIONTYPE_RTG 1024
-#define EXPANSIONTYPE_SOUND 2048
-#define EXPANSIONTYPE_FLOPPY 4096
-#define EXPANSIONTYPE_NET 8192
-#define EXPANSIONTYPE_INTERNAL 16384
-#define EXPANSIONTYPE_FALLBACK_DISABLE 32768
-#define EXPANSIONTYPE_HAS_FALLBACK 65536
+#define EXPANSIONTYPE_X86_BRIDGE 0x100
+#define EXPANSIONTYPE_CUSTOM_SECONDARY 0x200
+#define EXPANSIONTYPE_RTG 0x400
+#define EXPANSIONTYPE_SOUND 0x800
+#define EXPANSIONTYPE_FLOPPY 0x1000
+#define EXPANSIONTYPE_NET 0x2000
+#define EXPANSIONTYPE_INTERNAL 0x4000
+#define EXPANSIONTYPE_FALLBACK_DISABLE 0x8000
+#define EXPANSIONTYPE_HAS_FALLBACK 0x10000
struct expansionboardsettings
{
bool memory_after;
DEVICE_MEMORY_CALLBACK memory_callback;
bool id_jumper;
+ int extrahdports;
const struct expansionboardsettings *settings;
uae_u8 autoconfig[16];
};
extern void DISK_reset (void);
extern int disk_getwriteprotect (struct uae_prefs *p, const TCHAR *name);
extern int disk_setwriteprotect (struct uae_prefs *p, int num, const TCHAR *name, bool writeprotected);
-extern bool disk_creatediskfile (const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom);
+extern bool disk_creatediskfile (struct uae_prefs *p, const TCHAR *name, int type, drive_type adftype, const TCHAR *disk_name, bool ffs, bool bootable, struct zfile *copyfrom);
extern void dumpdisk (const TCHAR*);
extern int DISK_history_add (const TCHAR *name, int idx, int type, int donotcheck);
extern TCHAR *DISK_history_get (int idx, int type);
struct ide_thread_state;
struct ide_hdf;
-#define MAX_IDE_PORTS_BOARD 2
+#define MAX_IDE_PORTS_BOARD 3
struct ide_board
{
uae_u8 *rom;
bool golemfast_init(struct autoconfig_info *aci);
void golemfast_add_idescsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+bool buddha_init(struct autoconfig_info *aci);
+void buddha_add_ide_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+
uae_u32 REGPARAM3 apollo_ide_lget (uaecptr addr) REGPARAM;
uae_u32 REGPARAM3 apollo_ide_wget (uaecptr addr) REGPARAM;
uae_u32 REGPARAM3 apollo_ide_bget (uaecptr addr) REGPARAM;
uae_u32 mask;
uae_u32 startmask;
uae_u32 start;
- uae_u32 allocated;
+ // if RAM: size of allocated RAM. Zero if failed.
+ uae_u32 allocated_size;
+ // size of bank (if IO or before RAM allocation)
+ uae_u32 reserved_size;
} addrbank;
#define MEMORY_MIN_SUBBANK 1024
{ \
addr -= name ## _bank.start & name ## _bank.mask; \
addr &= name ## _bank.mask; \
- return (addr + size) <= name ## _bank.allocated; \
+ return (addr + size) <= name ## _bank.allocated_size; \
}
#define MEMORY_XLATE(name) \
static uae_u8 *REGPARAM3 name ## _xlate (uaecptr addr) REGPARAM; \
{ \
addr -= name ## _bank[index].start & name ## _bank[index].mask; \
addr &= name ## _bank[index].mask; \
- return (addr + size) <= name ## _bank[index].allocated; \
+ return (addr + size) <= name ## _bank[index].allocated_size; \
}
#define MEMORY_ARRAY_XLATE(name, index) \
static uae_u8 *REGPARAM3 name ## index ## _xlate (uaecptr addr) REGPARAM; \
extern addrbank filesys_bank;
extern addrbank uaeboard_bank;
extern addrbank expamem_bank;
-extern addrbank expamem_null, expamem_none, expamem_nonautoconfig;
+extern addrbank expamem_null, expamem_none;
extern addrbank fastmem_bank[MAX_RAM_BOARDS];
extern addrbank fastmem_nojit_bank[MAX_RAM_BOARDS];
extern addrbank *gfxmem_banks[MAX_RTG_BOARDS];
#define BLIZZARD_2060_DMA_OFFSET 0x1fff0
#define BLIZZARD_2060_LED_OFFSET 0x1ffe0
-#define BLIZZARD_SCSI_KIT_SCSI_OFFSET 0x8000
-#define BLIZZARD_SCSI_KIT_DMA_OFFSET 0x10000
+#define BLIZZARD_SCSI_KIT4_SCSI_OFFSET 0x8000
+#define BLIZZARD_SCSI_KIT4_DMA_OFFSET 0x10000
+
+#define BLIZZARD_SCSI_KIT3_SCSI_OFFSET 0x10000
#define CYBERSTORM_MK2_SCSI_OFFSET 0x1ff03
#define CYBERSTORM_MK2_LED_OFFSET 0x1ff43
#define ROMTYPE_CDTVDMAC 0x0010004c
#define ROMTYPE_CDTVCR 0x0010004d
#define ROMTYPE_IVSVECTOR 0x0010004e
+#define ROMTYPE_BUDDHA 0x0010004f
+#define ROMTYPE_NE2KISA 0x00100050
+#define ROMTYPE_BLIZKIT3 0x00100051
#define ROMTYPE_NOT 0x00800000
#define ROMTYPE_QUAD 0x01000000
#ifndef UAE_X86_H
#define UAE_X86_H
-extern bool a1060_init(struct autoconfig_info *aci);
-extern bool a2088xt_init(struct autoconfig_info *aci);
-extern bool a2088t_init(struct autoconfig_info *aci);
-extern bool a2286_init(struct autoconfig_info *aci);
-extern bool a2386_init(struct autoconfig_info *aci);
+bool a1060_init(struct autoconfig_info *aci);
+bool a2088xt_init(struct autoconfig_info *aci);
+bool a2088t_init(struct autoconfig_info *aci);
+bool a2286_init(struct autoconfig_info *aci);
+bool a2386_init(struct autoconfig_info *aci);
+bool isa_expansion_init(struct autoconfig_info *aci);
void x86_bridge_hsync(void);
void x86_bridge_vsync(void);
void x86_bridge_reset(void);
#if defined(JIT_DEBUG)
#define DEBUG_ACCESS
-#elif defined(CPU_x86_64)
-#define DEBUG_ACCESS
#endif
#if defined(_WIN32) && defined(CPU_x86_64)
uae_u32 addr = uae_p32(fault_addr) - uae_p32(NATMEM_OFFSET);
#ifdef DEBUG_ACCESS
- if ((addr >= 0x10000000 && addr < 0x40000000) ||
- (addr >= 0x50000000)) {
+ if (addr >= 0x80000000) {
write_log (_T("JIT: Suspicious address 0x%x in SEGV handler.\n"), addr);
}
addrbank *ab = &get_mem_bank(addr);
xfree(program_ram);
gfxmem_banks[a2410_gfxboard]->label = _T("ram_a8");
- gfxmem_banks[a2410_gfxboard]->allocated = 1 * 1024 * 1024;
+ gfxmem_banks[a2410_gfxboard]->reserved_size = 1 * 1024 * 1024;
gfxboard_get_a8_vram(a2410_gfxboard);
- picasso_allocatewritewatch(a2410_gfxboard, gfxmem_banks[a2410_gfxboard]->allocated);
+ picasso_allocatewritewatch(a2410_gfxboard, gfxmem_banks[a2410_gfxboard]->allocated_size);
gfxmem_banks[a2410_gfxboard]->start = 0xa80000;
program_ram = xcalloc(uae_u8, 1 * 1024 * 1024);
static void nocanbang (void)
{
+ if (canbang) {
+ write_log(_T("Switching JIT direct off!\n"));
+ }
canbang = 0;
}
protect_roms (false);
if (map) {
- uae_u8 *fkickmemory = a3000lmem_bank.baseaddr + a3000lmem_bank.allocated - fkickmem_size;
+ uae_u8 *fkickmemory = a3000lmem_bank.baseaddr + a3000lmem_bank.reserved_size - fkickmem_size;
if (fkickmemory[2] == 0x4e && fkickmemory[3] == 0xf9 && fkickmemory[4] == 0x00) {
if (!kickstore)
kickstore = xmalloc (uae_u8, fkickmem_size);
if (fkickmemory[5] == 0xfc) {
memcpy (kickmem_bank.baseaddr, fkickmemory, fkickmem_size / 2);
memcpy (kickmem_bank.baseaddr + fkickmem_size / 2, fkickmemory, fkickmem_size / 2);
- extendedkickmem_bank.allocated = 65536;
+ extendedkickmem_bank.reserved_size = 65536;
extendedkickmem_bank.label = _T("rom_f0");
- extendedkickmem_bank.mask = extendedkickmem_bank.allocated - 1;
+ extendedkickmem_bank.mask = extendedkickmem_bank.reserved_size - 1;
mapped_malloc (&extendedkickmem_bank);
memcpy (extendedkickmem_bank.baseaddr, fkickmemory + fkickmem_size / 2, 65536);
map_banks (&extendedkickmem_bank, 0xf0, 1, 1);
memcpy (a1000_bootrom + off, kickmem_bank.baseaddr, i);
off += i;
}
- memset (kickmem_bank.baseaddr, 0, kickmem_bank.allocated);
+ memset (kickmem_bank.baseaddr, 0, kickmem_bank.allocated_size);
a1000_handle_kickstart (1);
dochecksum = 0;
i = ROM_SIZE_512;
}
zfile_fseek (f, 0, SEEK_END);
size = zfile_ftell (f);
- extendedkickmem_bank.allocated = ROM_SIZE_512;
+ extendedkickmem_bank.reserved_size = ROM_SIZE_512;
off = 0;
if (type == 0) {
if (currprefs.cs_cd32cd) {
break;
}
if (extendedkickmem_bank.baseaddr) {
- read_kickstart (f, extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated, 0, 1);
- extendedkickmem_bank.mask = extendedkickmem_bank.allocated - 1;
+ read_kickstart (f, extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated_size, 0, 1);
+ extendedkickmem_bank.mask = extendedkickmem_bank.allocated_size - 1;
ret = true;
}
}
static void patch_kick (void)
{
int patched = 0;
- if (kickmem_bank.allocated >= ROM_SIZE_512 && currprefs.kickshifter)
+ if (kickmem_bank.allocated_size >= ROM_SIZE_512 && currprefs.kickshifter)
patched += patch_shapeshifter (kickmem_bank.baseaddr);
- patched += patch_residents (kickmem_bank.baseaddr, kickmem_bank.allocated);
+ patched += patch_residents (kickmem_bank.baseaddr, kickmem_bank.allocated_size);
if (extendedkickmem_bank.baseaddr) {
- patched += patch_residents (extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated);
+ patched += patch_residents (extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated_size);
if (patched)
- kickstart_fix_checksum (extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated);
+ kickstart_fix_checksum (extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated_size);
}
if (patched)
- kickstart_fix_checksum (kickmem_bank.baseaddr, kickmem_bank.allocated);
+ kickstart_fix_checksum (kickmem_bank.baseaddr, kickmem_bank.allocated_size);
}
extern unsigned char arosrom[];
if (!f)
return false;
- extendedkickmem_bank.allocated = ROM_SIZE_512;
+ extendedkickmem_bank.reserved_size = ROM_SIZE_512;
extendedkickmem_bank.mask = ROM_SIZE_512 - 1;
extendedkickmem_bank.label = _T("rom_e0");
extendedkickmem_type = EXTENDED_ROM_KS;
read_kickstart (f, extendedkickmem_bank.baseaddr, ROM_SIZE_512, 0, 1);
- kickmem_bank.allocated = ROM_SIZE_512;
+ kickmem_bank.reserved_size = ROM_SIZE_512;
kickmem_bank.mask = ROM_SIZE_512 - 1;
read_kickstart (f, kickmem_bank.baseaddr, ROM_SIZE_512, 1, 0);
if (size == 0)
goto err;
kickmem_bank.mask = size - 1;
- kickmem_bank.allocated = size;
+ kickmem_bank.reserved_size = size;
if (filesize >= ROM_SIZE_512 * 2 && !extendedkickmem_type) {
- extendedkickmem_bank.allocated = ROM_SIZE_512;
+ extendedkickmem_bank.reserved_size = ROM_SIZE_512;
if (currprefs.cs_cdtvcd || currprefs.cs_cdtvram) {
extendedkickmem_type = EXTENDED_ROM_CDTV;
- extendedkickmem_bank.allocated *= 2;
+ extendedkickmem_bank.reserved_size *= 2;
extendedkickmem_bank.label = _T("rom_f0");
extendedkickmem_bank.start = 0xf00000;
} else {
}
mapped_malloc (&extendedkickmem_bank);
zfile_fseek (f, extpos, SEEK_SET);
- read_kickstart (f, extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated, 0, 1);
- extendedkickmem_bank.mask = extendedkickmem_bank.allocated - 1;
+ read_kickstart (f, extendedkickmem_bank.baseaddr, extendedkickmem_bank.allocated_size, 0, 1);
+ extendedkickmem_bank.mask = extendedkickmem_bank.allocated_size - 1;
}
if (filesize > ROM_SIZE_512 * 2) {
- extendedkickmem2_bank.allocated = ROM_SIZE_512 * 2;
+ extendedkickmem2_bank.reserved_size = ROM_SIZE_512 * 2;
mapped_malloc (&extendedkickmem2_bank);
zfile_fseek (f, extpos + ROM_SIZE_512, SEEK_SET);
read_kickstart (f, extendedkickmem2_bank.baseaddr, ROM_SIZE_512, 0, 1);
zfile_fseek (f, extpos + ROM_SIZE_512 * 2, SEEK_SET);
read_kickstart (f, extendedkickmem2_bank.baseaddr + ROM_SIZE_512, ROM_SIZE_512, 0, 1);
- extendedkickmem2_bank.mask = extendedkickmem2_bank.allocated - 1;
+ extendedkickmem2_bank.mask = extendedkickmem2_bank.allocated_size - 1;
extendedkickmem2_bank.start = 0xa80000;
}
}
bool mapped_malloc (addrbank *ab)
{
ab->startmask = ab->start;
- ab->baseaddr = xcalloc (uae_u8, ab->allocated + 4);
+ ab->baseaddr = xcalloc (uae_u8, ab->reserved_size + 4);
+ ab->allocated_size = ab->baseaddr != NULL ? ab->reserved_size : 0;
return ab->baseaddr != NULL;
}
void mapped_free (addrbank *ab)
{
xfree(ab->baseaddr);
+ ab->allocated_size = 0;
ab->baseaddr = NULL;
}
if (!base)
return;
+ if (what->jit_read_flag && what->jit_write_flag)
+ return;
+
x = find_shmpiece (base, false);
if (!x)
return;
bool rtgmem = (ab->flags & ABFLAG_RTG) != 0;
static int recurse;
+ if (ab->allocated_size) {
+ write_log(_T("mapped_malloc with memory bank '%s' already allocated!?"), ab->name);
+ }
+ ab->allocated_size = 0;
+
if (ab->label && ab->label[0] == '*') {
if (ab->start == 0 || ab->start == 0xffffffff) {
write_log(_T("mapped_malloc(*) without start address!\n"));
}
}
- struct uae_mman_data md;
+ struct uae_mman_data md = { 0 };
uaecptr start = ab->start;
if (uae_mman_info(ab, &md)) {
start = md.start;
}
ab->startmask = start;
if (!md.directsupport || (ab->flags & ABFLAG_ALLOCINDIRECT)) {
- if (!(ab->flags & ABFLAG_ALLOCINDIRECT))
- nocanbang ();
+ if (!(ab->flags & ABFLAG_ALLOCINDIRECT)) {
+ if (canbang) {
+ write_log(_T("JIT direct switched off: %s\n"), ab->name);
+ }
+ nocanbang();
+ }
ab->flags &= ~ABFLAG_DIRECTMAP;
if (ab->flags & ABFLAG_NOALLOC) {
+ ab->allocated_size = ab->reserved_size;
#if MAPPED_MALLOC_DEBUG
write_log(_T("mapped_malloc noalloc %s\n"), ab->name);
#endif
return true;
}
- ab->baseaddr = xcalloc (uae_u8, ab->allocated + 4);
+ ab->baseaddr = xcalloc (uae_u8, ab->reserved_size + 4);
+ if (ab->baseaddr)
+ ab->allocated_size = ab->reserved_size;
#if MAPPED_MALLOC_DEBUG
write_log(_T("mapped_malloc nodirect %s %p\n"), ab->name, ab->baseaddr);
#endif
x = xmalloc (shmpiece, 1);
x->native_address = (uae_u8*)answer;
x->id = id;
- x->size = ab->allocated;
+ x->size = ab->reserved_size;
x->name = ab->label;
x->next = shm_start;
x->prev = NULL;
x->next->prev = x;
shm_start = x;
ab->baseaddr = x->native_address;
+ if (ab->baseaddr)
+ ab->allocated_size = ab->reserved_size;
ab->flags |= ABFLAG_DIRECTMAP;
#if MAPPED_MALLOC_DEBUG
write_log(_T("mapped_malloc direct %s %p\n"), ab->name, ab->baseaddr);
bogomem_aliasing = 0;
bool bogoreset = (bogomem_bank.flags & ABFLAG_NOALLOC) != 0 &&
- (chipmem_bank.allocated != currprefs.chipmem_size || bogomem_bank.allocated != currprefs.bogomem_size);
+ (chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size);
if (bogoreset) {
mapped_free(&chipmem_bank);
/* emulate 0.5M+0.5M with 1M Agnus chip ram aliasing */
if (currprefs.chipmem_size == 0x80000 && currprefs.bogomem_size >= 0x80000 &&
(currprefs.chipset_mask & CSMASK_ECS_AGNUS) && !(currprefs.chipset_mask & CSMASK_AGA) && currprefs.cpu_model < 68020) {
- if ((chipmem_bank.allocated != currprefs.chipmem_size || bogomem_bank.allocated != currprefs.bogomem_size)) {
+ if ((chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size)) {
int memsize1, memsize2;
mapped_free (&chipmem_bank);
mapped_free (&bogomem_bank);
- bogomem_bank.allocated = 0;
- memsize1 = chipmem_bank.allocated = currprefs.chipmem_size;
- memsize2 = bogomem_bank.allocated = currprefs.bogomem_size;
- chipmem_bank.mask = chipmem_bank.allocated - 1;
+ bogomem_bank.reserved_size = 0;
+ memsize1 = chipmem_bank.reserved_size = currprefs.chipmem_size;
+ memsize2 = bogomem_bank.reserved_size = currprefs.bogomem_size;
+ chipmem_bank.mask = chipmem_bank.reserved_size - 1;
chipmem_bank.start = chipmem_start_addr;
- chipmem_full_mask = bogomem_bank.allocated * 2 - 1;
+ chipmem_full_mask = bogomem_bank.reserved_size * 2 - 1;
chipmem_full_size = 0x80000 * 2;
- chipmem_bank.allocated = memsize1 + memsize2;
+ chipmem_bank.reserved_size = memsize1 + memsize2;
mapped_malloc (&chipmem_bank);
- chipmem_bank.allocated = currprefs.chipmem_size;
+ chipmem_bank.reserved_size = currprefs.chipmem_size;
bogomem_bank.baseaddr = chipmem_bank.baseaddr + memsize1;
- bogomem_bank.mask = bogomem_bank.allocated - 1;
+ bogomem_bank.mask = bogomem_bank.reserved_size - 1;
bogomem_bank.start = bogomem_start_addr;
bogomem_bank.flags |= ABFLAG_NOALLOC;
if (chipmem_bank.baseaddr == 0) {
write_log (_T("Fatal error: out of memory for chipmem.\n"));
- chipmem_bank.allocated = 0;
+ chipmem_bank.reserved_size = 0;
} else {
need_hardreset = true;
}
bogomem_aliasing = 1;
} else if (currprefs.chipmem_size == 0x80000 && currprefs.bogomem_size >= 0x80000 &&
!(currprefs.chipset_mask & CSMASK_ECS_AGNUS) && currprefs.cs_1mchipjumper && currprefs.cpu_model < 68020) {
- if ((chipmem_bank.allocated != currprefs.chipmem_size || bogomem_bank.allocated != currprefs.bogomem_size)) {
+ if ((chipmem_bank.reserved_size != currprefs.chipmem_size || bogomem_bank.reserved_size != currprefs.bogomem_size)) {
int memsize1, memsize2;
mapped_free (&chipmem_bank);
mapped_free (&bogomem_bank);
- bogomem_bank.allocated = 0;
- memsize1 = chipmem_bank.allocated = currprefs.chipmem_size;
- memsize2 = bogomem_bank.allocated = currprefs.bogomem_size;
- chipmem_bank.mask = chipmem_bank.allocated - 1;
+ bogomem_bank.reserved_size = 0;
+ memsize1 = chipmem_bank.reserved_size = currprefs.chipmem_size;
+ memsize2 = bogomem_bank.reserved_size = currprefs.bogomem_size;
+ chipmem_bank.mask = chipmem_bank.reserved_size - 1;
chipmem_bank.start = chipmem_start_addr;
- chipmem_full_mask = chipmem_bank.allocated - 1;
- chipmem_full_size = chipmem_bank.allocated;
- chipmem_bank.allocated = memsize1 + memsize2;
+ chipmem_full_mask = chipmem_bank.reserved_size - 1;
+ chipmem_full_size = chipmem_bank.reserved_size;
+ chipmem_bank.reserved_size = memsize1 + memsize2;
mapped_malloc (&chipmem_bank);
- chipmem_bank.allocated = currprefs.chipmem_size;
+ chipmem_bank.reserved_size = currprefs.chipmem_size;
bogomem_bank.baseaddr = chipmem_bank.baseaddr + memsize1;
- bogomem_bank.mask = bogomem_bank.allocated - 1;
+ bogomem_bank.mask = bogomem_bank.reserved_size - 1;
bogomem_bank.start = chipmem_bank.start + currprefs.chipmem_size;
bogomem_bank.flags |= ABFLAG_NOALLOC;
if (chipmem_bank.baseaddr == 0) {
write_log (_T("Fatal error: out of memory for chipmem.\n"));
- chipmem_bank.allocated = 0;
+ chipmem_bank.reserved_size = 0;
} else {
need_hardreset = true;
}
bogomem_aliasing = 2;
}
- if (chipmem_bank.allocated != currprefs.chipmem_size || bogoreset) {
+ if (chipmem_bank.reserved_size != currprefs.chipmem_size || bogoreset) {
int memsize;
mapped_free (&chipmem_bank);
chipmem_bank.flags &= ~ABFLAG_NOALLOC;
- memsize = chipmem_bank.allocated = chipmem_full_size = currprefs.chipmem_size;
- chipmem_full_mask = chipmem_bank.mask = chipmem_bank.allocated - 1;
+ memsize = chipmem_bank.reserved_size = chipmem_full_size = currprefs.chipmem_size;
+ chipmem_full_mask = chipmem_bank.mask = chipmem_bank.reserved_size - 1;
chipmem_bank.start = chipmem_start_addr;
if (!currprefs.cachesize && memsize < 0x100000)
memsize = 0x100000;
if (memsize > 0x100000 && memsize < 0x200000)
memsize = 0x200000;
- chipmem_bank.allocated = memsize;
+ chipmem_bank.reserved_size = memsize;
mapped_malloc (&chipmem_bank);
- chipmem_bank.allocated = currprefs.chipmem_size;
+ chipmem_bank.reserved_size = currprefs.chipmem_size;
if (chipmem_bank.baseaddr == 0) {
write_log (_T("Fatal error: out of memory for chipmem.\n"));
- chipmem_bank.allocated = 0;
+ chipmem_bank.reserved_size = 0;
} else {
need_hardreset = true;
- if (memsize > chipmem_bank.allocated)
- memset (chipmem_bank.baseaddr + chipmem_bank.allocated, 0xff, memsize - chipmem_bank.allocated);
+ if (memsize > chipmem_bank.allocated_size)
+ memset (chipmem_bank.baseaddr + chipmem_bank.allocated_size, 0xff, memsize - chipmem_bank.allocated_size);
}
currprefs.chipset_mask = changed_prefs.chipset_mask;
- chipmem_full_mask = chipmem_bank.allocated - 1;
+ chipmem_full_mask = chipmem_bank.allocated_size - 1;
if (!currprefs.cachesize) {
if (currprefs.chipset_mask & CSMASK_ECS_AGNUS) {
- if (chipmem_bank.allocated < 0x100000)
+ if (chipmem_bank.allocated_size < 0x100000)
chipmem_full_mask = 0x100000 - 1;
- if (chipmem_bank.allocated > 0x100000 && chipmem_bank.allocated < 0x200000)
+ if (chipmem_bank.allocated_size > 0x100000 && chipmem_bank.allocated_size < 0x200000)
chipmem_full_mask = chipmem_bank.mask = 0x200000 - 1;
} else if (currprefs.cs_1mchipjumper) {
chipmem_full_mask = 0x80000 - 1;
}
}
- if (bogomem_bank.allocated != currprefs.bogomem_size || bogoreset) {
- if (!(bogomem_bank.allocated == 0x200000 && currprefs.bogomem_size == 0x180000)) {
+ if (bogomem_bank.reserved_size != currprefs.bogomem_size || bogoreset) {
+ if (!(bogomem_bank.reserved_size == 0x200000 && currprefs.bogomem_size == 0x180000)) {
mapped_free (&bogomem_bank);
bogomem_bank.flags &= ~ABFLAG_NOALLOC;
- bogomem_bank.allocated = 0;
+ bogomem_bank.reserved_size = 0;
- bogomem_bank.allocated = currprefs.bogomem_size;
- if (bogomem_bank.allocated >= 0x180000)
- bogomem_bank.allocated = 0x200000;
- bogomem_bank.mask = bogomem_bank.allocated - 1;
+ bogomem_bank.reserved_size = currprefs.bogomem_size;
+ if (bogomem_bank.reserved_size >= 0x180000)
+ bogomem_bank.reserved_size = 0x200000;
+ bogomem_bank.mask = bogomem_bank.reserved_size - 1;
bogomem_bank.start = bogomem_start_addr;
- if (bogomem_bank.allocated) {
+ if (bogomem_bank.reserved_size) {
if (!mapped_malloc (&bogomem_bank)) {
write_log (_T("Out of memory for bogomem.\n"));
- bogomem_bank.allocated = 0;
+ bogomem_bank.reserved_size = 0;
}
}
need_hardreset = true;
}
}
- if (mem25bit_bank.allocated != currprefs.mem25bit_size) {
+ if (mem25bit_bank.reserved_size != currprefs.mem25bit_size) {
mapped_free(&mem25bit_bank);
- mem25bit_bank.allocated = currprefs.mem25bit_size;
- mem25bit_bank.mask = mem25bit_bank.allocated - 1;
+ mem25bit_bank.reserved_size = currprefs.mem25bit_size;
+ mem25bit_bank.mask = mem25bit_bank.reserved_size - 1;
mem25bit_bank.start = 0x01000000;
- if (mem25bit_bank.allocated) {
+ if (mem25bit_bank.reserved_size) {
if (!mapped_malloc(&mem25bit_bank)) {
write_log(_T("Out of memory for 25 bit memory.\n"));
- mem25bit_bank.allocated = 0;
+ mem25bit_bank.reserved_size = 0;
}
}
need_hardreset = true;
}
- if (a3000lmem_bank.allocated != currprefs.mbresmem_low_size) {
+ if (a3000lmem_bank.reserved_size != currprefs.mbresmem_low_size) {
mapped_free (&a3000lmem_bank);
- a3000lmem_bank.allocated = currprefs.mbresmem_low_size;
- a3000lmem_bank.mask = a3000lmem_bank.allocated - 1;
- a3000lmem_bank.start = 0x08000000 - a3000lmem_bank.allocated;
- if (a3000lmem_bank.allocated) {
+ a3000lmem_bank.reserved_size = currprefs.mbresmem_low_size;
+ a3000lmem_bank.mask = a3000lmem_bank.reserved_size - 1;
+ a3000lmem_bank.start = 0x08000000 - a3000lmem_bank.reserved_size;
+ if (a3000lmem_bank.reserved_size) {
if (!mapped_malloc (&a3000lmem_bank)) {
write_log (_T("Out of memory for a3000lowmem.\n"));
- a3000lmem_bank.allocated = 0;
+ a3000lmem_bank.reserved_size = 0;
}
}
need_hardreset = true;
}
- if (a3000hmem_bank.allocated != currprefs.mbresmem_high_size) {
+ if (a3000hmem_bank.reserved_size != currprefs.mbresmem_high_size) {
mapped_free (&a3000hmem_bank);
- a3000hmem_bank.allocated = currprefs.mbresmem_high_size;
- a3000hmem_bank.mask = a3000hmem_bank.allocated - 1;
+ a3000hmem_bank.reserved_size = currprefs.mbresmem_high_size;
+ a3000hmem_bank.mask = a3000hmem_bank.reserved_size - 1;
a3000hmem_bank.start = 0x08000000;
- if (a3000hmem_bank.allocated) {
+ if (a3000hmem_bank.reserved_size) {
if (!mapped_malloc (&a3000hmem_bank)) {
write_log (_T("Out of memory for a3000highmem.\n"));
- a3000hmem_bank.allocated = 0;
+ a3000hmem_bank.reserved_size = 0;
}
}
need_hardreset = true;
}
#ifdef CDTV
- if (cardmem_bank.allocated != currprefs.cs_cdtvcard * 1024) {
+ if (cardmem_bank.reserved_size != currprefs.cs_cdtvcard * 1024) {
mapped_free (&cardmem_bank);
cardmem_bank.baseaddr = NULL;
- cardmem_bank.allocated = currprefs.cs_cdtvcard * 1024;
- cardmem_bank.mask = cardmem_bank.allocated - 1;
+ cardmem_bank.reserved_size = currprefs.cs_cdtvcard * 1024;
+ cardmem_bank.mask = cardmem_bank.reserved_size - 1;
cardmem_bank.start = 0xe00000;
- if (cardmem_bank.allocated) {
+ if (cardmem_bank.reserved_size) {
if (!mapped_malloc (&cardmem_bank)) {
write_log (_T("Out of memory for cardmem.\n"));
- cardmem_bank.allocated = 0;
+ cardmem_bank.reserved_size = 0;
}
}
- cdtv_loadcardmem(cardmem_bank.baseaddr, cardmem_bank.allocated);
+ cdtv_loadcardmem(cardmem_bank.baseaddr, cardmem_bank.reserved_size);
}
#endif
- if (custmem1_bank.allocated != currprefs.custom_memory_sizes[0]) {
+ if (custmem1_bank.reserved_size != currprefs.custom_memory_sizes[0]) {
mapped_free (&custmem1_bank);
- custmem1_bank.allocated = currprefs.custom_memory_sizes[0];
+ custmem1_bank.reserved_size = currprefs.custom_memory_sizes[0];
// custmem1 and 2 can have non-power of 2 size so only set correct mask if size is power of 2.
- custmem1_bank.mask = singlebit (custmem1_bank.allocated) ? custmem1_bank.allocated - 1 : -1;
+ custmem1_bank.mask = singlebit (custmem1_bank.reserved_size) ? custmem1_bank.reserved_size - 1 : -1;
custmem1_bank.start = currprefs.custom_memory_addrs[0];
- if (custmem1_bank.allocated) {
+ if (custmem1_bank.reserved_size) {
if (!mapped_malloc (&custmem1_bank))
- custmem1_bank.allocated = 0;
+ custmem1_bank.reserved_size = 0;
}
}
- if (custmem2_bank.allocated != currprefs.custom_memory_sizes[1]) {
+ if (custmem2_bank.reserved_size != currprefs.custom_memory_sizes[1]) {
mapped_free (&custmem2_bank);
- custmem2_bank.allocated = currprefs.custom_memory_sizes[1];
- custmem2_bank.mask = singlebit (custmem2_bank.allocated) ? custmem2_bank.allocated - 1 : -1;
+ custmem2_bank.reserved_size = currprefs.custom_memory_sizes[1];
+ custmem2_bank.mask = singlebit (custmem2_bank.reserved_size) ? custmem2_bank.reserved_size - 1 : -1;
custmem2_bank.start = currprefs.custom_memory_addrs[1];
- if (custmem2_bank.allocated) {
+ if (custmem2_bank.reserved_size) {
if (!mapped_malloc (&custmem2_bank))
- custmem2_bank.allocated = 0;
+ custmem2_bank.reserved_size = 0;
}
}
protect_roms (true);
}
restore_ram (chip_filepos, chipmem_bank.baseaddr);
- if (bogomem_bank.allocated > 0)
+ if (bogomem_bank.allocated_size > 0)
restore_ram (bogo_filepos, bogomem_bank.baseaddr);
- if (mem25bit_bank.allocated > 0)
+ if (mem25bit_bank.allocated_size > 0)
restore_ram(mem25bit_filepos, mem25bit_bank.baseaddr);
- if (a3000lmem_bank.allocated > 0)
+ if (a3000lmem_bank.allocated_size > 0)
restore_ram (a3000lmem_filepos, a3000lmem_bank.baseaddr);
- if (a3000hmem_bank.allocated > 0)
+ if (a3000hmem_bank.allocated_size > 0)
restore_ram (a3000hmem_filepos, a3000hmem_bank.baseaddr);
}
#ifdef AGA
if (!currprefs.cs_slowmemisfast) {
for (i = (0xc00000 >> 16); i < (0xe00000 >> 16); i++)
ce_banktype[i] = ce_banktype[0];
- for (i = (bogomem_bank.start >> 16); i < ((bogomem_bank.start + bogomem_bank.allocated) >> 16); i++)
+ for (i = (bogomem_bank.start >> 16); i < ((bogomem_bank.start + bogomem_bank.allocated_size) >> 16); i++)
ce_banktype[i] = ce_banktype[0];
}
for (i = (0xd00000 >> 16); i < (0xe00000 >> 16); i++)
int size;
addrbank *cb;
- size = chipmem_bank.allocated >= 0x180000 ? (chipmem_bank.allocated >> 16) : 32;
+ size = chipmem_bank.allocated_size >= 0x180000 ? (chipmem_bank.allocated_size >> 16) : 32;
if (bogomem_aliasing)
size = 8;
cb = &chipmem_bank;
if (chip) {
map_banks (&dummy_bank, 0, size, 0);
if (!isdirectjit ()) {
- if ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) && bogomem_bank.allocated == 0) {
- map_banks(cb, 0, size, chipmem_bank.allocated);
- int start = chipmem_bank.allocated >> 16;
- if (chipmem_bank.allocated < 0x100000) {
+ if ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) && bogomem_bank.allocated_size == 0) {
+ map_banks(cb, 0, size, chipmem_bank.allocated_size);
+ int start = chipmem_bank.allocated_size >> 16;
+ if (chipmem_bank.allocated_size < 0x100000) {
if (currprefs.cs_1mchipjumper) {
- int dummy = (0x100000 - chipmem_bank.allocated) >> 16;
+ int dummy = (0x100000 - chipmem_bank.allocated_size) >> 16;
map_banks (&chipmem_dummy_bank, start, dummy, 0);
map_banks (&chipmem_dummy_bank, start + 16, dummy, 0);
}
- } else if (chipmem_bank.allocated < 0x200000 && chipmem_bank.allocated > 0x100000) {
- int dummy = (0x200000 - chipmem_bank.allocated) >> 16;
+ } else if (chipmem_bank.allocated_size < 0x200000 && chipmem_bank.allocated_size > 0x100000) {
+ int dummy = (0x200000 - chipmem_bank.allocated_size) >> 16;
map_banks (&chipmem_dummy_bank, start, dummy, 0);
}
} else {
- map_banks(cb, 0, 32, chipmem_bank.allocated);
+ map_banks(cb, 0, 32, chipmem_bank.allocated_size);
}
} else {
- map_banks (cb, 0, chipmem_bank.allocated >> 16, 0);
+ map_banks (cb, 0, chipmem_bank.allocated_size >> 16, 0);
}
} else {
addrbank *rb = NULL;
if (savestate_state == STATE_RESTORE)
return;
if (chipmem_bank.baseaddr)
- memset(chipmem_bank.baseaddr, 0, chipmem_bank.allocated);
+ memset(chipmem_bank.baseaddr, 0, chipmem_bank.allocated_size);
if (bogomem_bank.baseaddr)
- memset(bogomem_bank.baseaddr, 0, bogomem_bank.allocated);
+ memset(bogomem_bank.baseaddr, 0, bogomem_bank.allocated_size);
if (mem25bit_bank.baseaddr)
- memset(mem25bit_bank.baseaddr, 0, mem25bit_bank.allocated);
+ memset(mem25bit_bank.baseaddr, 0, mem25bit_bank.allocated_size);
if (a3000lmem_bank.baseaddr)
- memset(a3000lmem_bank.baseaddr, 0, a3000lmem_bank.allocated);
+ memset(a3000lmem_bank.baseaddr, 0, a3000lmem_bank.allocated_size);
if (a3000hmem_bank.baseaddr)
- memset(a3000hmem_bank.baseaddr, 0, a3000hmem_bank.allocated);
+ memset(a3000hmem_bank.baseaddr, 0, a3000hmem_bank.allocated_size);
expansion_clear ();
cpuboard_clear();
}
need_hardreset = true;
mapped_free (&extendedkickmem_bank);
mapped_free (&extendedkickmem2_bank);
- extendedkickmem_bank.allocated = 0;
- extendedkickmem2_bank.allocated = 0;
+ extendedkickmem_bank.reserved_size = 0;
+ extendedkickmem2_bank.reserved_size = 0;
extendedkickmem_type = 0;
load_extendedkickstart (currprefs.romextfile, 0);
load_extendedkickstart (currprefs.romextfile2, EXTENDED_ROM_CDTV);
}
load_kickstart_replacement ();
} else {
- struct romdata *rd = getromdatabydata (kickmem_bank.baseaddr, kickmem_bank.allocated);
+ struct romdata *rd = getromdatabydata (kickmem_bank.baseaddr, kickmem_bank.reserved_size);
if (rd) {
write_log (_T("Known ROM '%s' loaded\n"), rd->name);
+#if 1
if ((rd->cpu & 8) && changed_prefs.cpu_model < 68030) {
notify_user (NUMSG_KS68030PLUS);
uae_restart (-1, NULL);
notify_user (NUMSG_KS68020);
uae_restart (-1, NULL);
}
+#endif
if (rd->cloanto)
cloanto_rom = 1;
kickstart_rom = 0;
restore_roms();
}
- if ((cloanto_rom || extendedkickmem_bank.allocated) && currprefs.maprom && currprefs.maprom < 0x01000000) {
+ if ((cloanto_rom || extendedkickmem_bank.allocated_size) && currprefs.maprom && currprefs.maprom < 0x01000000) {
currprefs.maprom = changed_prefs.maprom = 0x00a80000;
- if (extendedkickmem2_bank.allocated) // can't do if 2M ROM
+ if (extendedkickmem2_bank.allocated_size) // can't do if 2M ROM
currprefs.maprom = changed_prefs.maprom = 0;
}
map_banks (&dummy_bank, 0xD8, 6, 0);
/* map "nothing" to 0x200000 - 0x9FFFFF (0xBEFFFF if Gayle or Fat Gary) */
- bnk = chipmem_bank.allocated >> 16;
+ bnk = chipmem_bank.allocated_size >> 16;
if (bnk < 0x20 + (currprefs.fastmem[0].size >> 16))
bnk = 0x20 + (currprefs.fastmem[0].size >> 16);
bnk_end = currprefs.cs_cd32cd ? 0xBE : (gayleorfatgary ? 0xBF : 0xA0);
}
#endif
if (mem25bit_bank.baseaddr)
- map_banks(&mem25bit_bank, mem25bit_bank.start >> 16, mem25bit_bank.allocated >> 16, 0);
+ map_banks(&mem25bit_bank, mem25bit_bank.start >> 16, mem25bit_bank.allocated_size >> 16, 0);
if (a3000lmem_bank.baseaddr)
- map_banks(&a3000lmem_bank, a3000lmem_bank.start >> 16, a3000lmem_bank.allocated >> 16, 0);
+ map_banks(&a3000lmem_bank, a3000lmem_bank.start >> 16, a3000lmem_bank.allocated_size >> 16, 0);
if (a3000hmem_bank.baseaddr)
- map_banks(&a3000hmem_bank, a3000hmem_bank.start >> 16, a3000hmem_bank.allocated >> 16, 0);
+ map_banks(&a3000hmem_bank, a3000hmem_bank.start >> 16, a3000hmem_bank.allocated_size >> 16, 0);
#ifdef CDTV
if (cardmem_bank.baseaddr)
- map_banks (&cardmem_bank, cardmem_bank.start >> 16, cardmem_bank.allocated >> 16, 0);
+ map_banks (&cardmem_bank, cardmem_bank.start >> 16, cardmem_bank.allocated_size >> 16, 0);
#endif
cpuboard_map();
map_banks_set(&kickmem_bank, 0xF8, 8, 0);
if (currprefs.maprom) {
if (!cpuboard_maprom())
- map_banks_set(&kickram_bank, currprefs.maprom >> 16, extendedkickmem2_bank.allocated ? 32 : (extendedkickmem_bank.allocated ? 16 : 8), 0);
+ map_banks_set(&kickram_bank, currprefs.maprom >> 16, extendedkickmem2_bank.allocated_size ? 32 : (extendedkickmem_bank.allocated_size ? 16 : 8), 0);
}
/* map beta Kickstarts at 0x200000/0xC00000/0xF00000 */
if (kickmem_bank.baseaddr[0] == 0x11 && kickmem_bank.baseaddr[2] == 0x4e && kickmem_bank.baseaddr[3] == 0xf9 && kickmem_bank.baseaddr[4] == 0x00) {
break;
#ifdef CDTV
case EXTENDED_ROM_CDTV:
- map_banks_set(&extendedkickmem_bank, 0xF0, extendedkickmem_bank.allocated == 2 * ROM_SIZE_512 ? 16 : 8, 0);
+ map_banks_set(&extendedkickmem_bank, 0xF0, extendedkickmem_bank.allocated_size == 2 * ROM_SIZE_512 ? 16 : 8, 0);
break;
#endif
#ifdef CD32
map_banks(&kickmem_bank, 0xE0, 8, 0);
}
if (currprefs.cs_ksmirror_a8) {
- if (extendedkickmem2_bank.allocated) {
+ if (extendedkickmem2_bank.allocated_size) {
map_banks_set(&extendedkickmem2_bank, 0xa8, 16, 0);
} else {
struct romdata *rd = getromdatabypath (currprefs.cartfile);
init_mem_banks ();
virtualdevice_init ();
- chipmem_bank.allocated = 0;
- bogomem_bank.allocated = 0;
+ chipmem_bank.reserved_size = 0;
+ bogomem_bank.reserved_size = 0;
kickmem_bank.baseaddr = NULL;
extendedkickmem_bank.baseaddr = NULL;
- extendedkickmem_bank.allocated = 0;
+ extendedkickmem_bank.reserved_size = 0;
extendedkickmem2_bank.baseaddr = NULL;
- extendedkickmem2_bank.allocated = 0;
+ extendedkickmem2_bank.reserved_size = 0;
extendedkickmem_type = 0;
chipmem_bank.baseaddr = 0;
- mem25bit_bank.allocated = mem25bit_bank.allocated = 0;
- a3000lmem_bank.allocated = a3000hmem_bank.allocated = 0;
+ mem25bit_bank.reserved_size = mem25bit_bank.reserved_size = 0;
+ a3000lmem_bank.reserved_size = a3000hmem_bank.reserved_size = 0;
a3000lmem_bank.baseaddr = a3000hmem_bank.baseaddr = NULL;
bogomem_bank.baseaddr = NULL;
cardmem_bank.baseaddr = NULL;
- custmem1_bank.allocated = custmem2_bank.allocated = 0;
+ custmem1_bank.reserved_size = custmem2_bank.reserved_size = 0;
custmem1_bank.baseaddr = NULL;
custmem2_bank.baseaddr = NULL;
- kickmem_bank.allocated = ROM_SIZE_512;
+ kickmem_bank.reserved_size = ROM_SIZE_512;
mapped_malloc (&kickmem_bank);
memset (kickmem_bank.baseaddr, 0, ROM_SIZE_512);
_tcscpy (currprefs.romfile, _T("<none>"));
mapped_free(&chipmem_bank);
#ifdef CDTV
if (cardmem_bank.baseaddr) {
- cdtv_savecardmem (cardmem_bank.baseaddr, cardmem_bank.allocated);
+ cdtv_savecardmem (cardmem_bank.baseaddr, cardmem_bank.allocated_size);
mapped_free (&cardmem_bank);
}
#endif
uae_u8 *save_cram (int *len)
{
- *len = chipmem_bank.allocated;
+ *len = chipmem_bank.allocated_size;
return chipmem_bank.baseaddr;
}
uae_u8 *save_bram (int *len)
{
- *len = bogomem_bank.allocated;
+ *len = bogomem_bank.allocated_size;
return bogomem_bank.baseaddr;
}
static uae_u8 *save_mem25bitram (int *len)
{
- *len = mem25bit_bank.allocated;
+ *len = mem25bit_bank.allocated_size;
return mem25bit_bank.baseaddr;
}
uae_u8 *save_a3000lram (int *len)
{
- *len = a3000lmem_bank.allocated;
+ *len = a3000lmem_bank.allocated_size;
return a3000lmem_bank.baseaddr;
}
uae_u8 *save_a3000hram (int *len)
{
- *len = a3000hmem_bank.allocated;
+ *len = a3000hmem_bank.allocated_size;
return a3000hmem_bank.baseaddr;
}
case 0: /* Kickstart ROM */
mem_start = 0xf80000;
mem_real_start = kickmem_bank.baseaddr;
- mem_size = kickmem_bank.allocated;
+ mem_size = kickmem_bank.allocated_size;
path = currprefs.romfile;
/* 256KB or 512KB ROM? */
for (i = 0; i < mem_size / 2 - 4; i++) {
break;
mem_start = extendedkickmem_bank.start;
mem_real_start = extendedkickmem_bank.baseaddr;
- mem_size = extendedkickmem_bank.allocated;
+ mem_size = extendedkickmem_bank.allocated_size;
path = currprefs.romextfile;
version = longget (mem_start + 12); /* version+revision */
if (version == 0xffffffff)
/* Fake DMA */
+static int fake_dma_null(void *opaque, uint8_t *buf, int len)
+{
+ return 0;
+}
+
static int fake_dma_read_ematrix(void *opaque, uint8_t *buf, int len)
{
struct ncr9x_state *ncr = (struct ncr9x_state*)opaque;
return;
}
reg_shift = 1;
+ } else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230III)) {
+ addr &= 0xffff;
+ if (addr >= 0x20) {
+ write_log(_T("BOARD_BLIZZARD_SUB_1230III WRITE %08x %08x\n"), addr, M68K_GETPC);
+ return;
+ }
+ if (addr >= 0x10 && addr < 0x20) {
+ fas408_write_fifo(ncr->devobject.lsistate, val);
+ return;
+ }
+ reg_shift = 0;
+
} else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_2060)) {
if (addr >= BLIZZARD_2060_DMA_OFFSET) {
//write_log (_T("Blizzard DMA PUT %08x %02X\n"), addr, (uae_u8)val);
} else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230IV) || ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260)) {
if (!cfgfile_board_enabled(&currprefs, ROMTYPE_BLIZKIT4, 0))
return;
- if (addr >= BLIZZARD_SCSI_KIT_DMA_OFFSET) {
+ if (addr >= BLIZZARD_SCSI_KIT4_DMA_OFFSET) {
addr &= 0x18000;
if (addr == 0x18000) {
ncr->dma_ptr = 0;
return 0;
}
reg_shift = 1;
+ } else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230III)) {
+ addr &= 0xffff;
+ if (addr >= 0x10 && addr < 0x20) {
+ v = fas408_read_fifo(ncr->devobject.lsistate);
+ return v;
+ }
+ if (addr >= 0x20) {
+ write_log(_T("BOARD_BLIZZARD_SUB_1230III %08x %08x\n"), addr, M68K_GETPC);
+ return 0;
+ }
+ reg_shift = 0;
+
} else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_2060)) {
if (addr >= BLIZZARD_2060_DMA_OFFSET) {
write_log(_T("Blizzard DMA GET %08x\n"), addr);
} else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230IV) || ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260)) {
if (!cfgfile_board_enabled(&currprefs, ROMTYPE_BLIZKIT4, 0))
return 0;
- if (addr >= BLIZZARD_SCSI_KIT_DMA_OFFSET)
+ if (addr >= BLIZZARD_SCSI_KIT4_DMA_OFFSET)
return 0;
} else if (ISCPUBOARD(BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_MK1)) {
if (addr >= CYBERSTORM_MK1_JUMPER_OFFSET) {
bool ncr_dkb_autoconfig_init(struct autoconfig_info *aci)
{
- if (!aci->doinit)
+ if (!aci->doinit) {
+ struct zfile *z = read_device_from_romconfig(aci->rc, ROMTYPE_CB_DKB12x0);
+ if (z) {
+ for (int i = 0; i < (sizeof aci->autoconfig_raw) / 2; i++) {
+ uae_u8 b;
+ zfile_fread(&b, 1, 1, z);
+ aci->autoconfig_raw[i * 2] = b;
+ }
+ zfile_fclose(z);
+ }
return true;
+ }
struct ncr9x_state *ncr = getscsi(aci->rc);
if (!ncr)
ncr9x_reset_board(ncr);
}
-static void ncr9x_esp_scsi_init(struct ncr9x_state *ncr, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, void (*irq_func)(struct ncr9x_state*))
+static void ncr9x_esp_scsi_init(struct ncr9x_state *ncr, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, void (*irq_func)(struct ncr9x_state*), int mode)
{
ncr->board_mask = 0xffff;
ncr->irq_func = irq_func ? irq_func : set_irq2;
if (!ncr->devobject.lsistate)
- esp_scsi_init(&ncr->devobject, read, write);
+ esp_scsi_init(&ncr->devobject, read, write, mode > 0);
esp_scsi_reset(&ncr->devobject, ncr);
}
ncr_blizzard_scsi->configured = -1;
ncr_blizzard_scsi->enabled = true;
if (ISCPUBOARD(BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_MK1) || ISCPUBOARD(BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_MK2)) {
- ncr9x_esp_scsi_init(ncr_blizzard_scsi, cyberstorm_mk1_mk2_dma_read, cyberstorm_mk1_mk2_dma_write, NULL);
+ ncr9x_esp_scsi_init(ncr_blizzard_scsi, cyberstorm_mk1_mk2_dma_read, cyberstorm_mk1_mk2_dma_write, NULL, 0);
+ } else if (ISCPUBOARD(BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230III)) {
+ ncr9x_esp_scsi_init(ncr_blizzard_scsi, fake_dma_null, fake_dma_null, NULL, 1);
} else {
- ncr9x_esp_scsi_init(ncr_blizzard_scsi, blizzard_dma_read, blizzard_dma_write, NULL);
+ ncr9x_esp_scsi_init(ncr_blizzard_scsi, blizzard_dma_read, blizzard_dma_write, NULL, 0);
}
if (ISCPUBOARD(BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_MK1))
ncr_blizzard_scsi->board_mask = 0xffff;
void cpuboard_dkb_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_dkb1200_scsi, ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_dkb1200_scsi, fake_dma_read, fake_dma_write, set_irq2_dkb1200);
+ ncr9x_esp_scsi_init(ncr_dkb1200_scsi, fake_dma_read, fake_dma_write, set_irq2_dkb1200, 0);
}
void fastlane_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_fastlane_scsi[ci->controller_type_unit], ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_fastlane_scsi[ci->controller_type_unit], fastlane_dma_read, fastlane_dma_write, set_irq2_fastlane);
+ ncr9x_esp_scsi_init(ncr_fastlane_scsi[ci->controller_type_unit], fastlane_dma_read, fastlane_dma_write, set_irq2_fastlane, 0);
ncr_fastlane_scsi[ci->controller_type_unit]->board_mask = 32 * 1024 * 1024 - 1;
}
void oktagon_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_oktagon2008_scsi[ci->controller_type_unit], ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_oktagon2008_scsi[ci->controller_type_unit], fake2_dma_read, fake2_dma_write, set_irq2_oktagon);
+ ncr9x_esp_scsi_init(ncr_oktagon2008_scsi[ci->controller_type_unit], fake2_dma_read, fake2_dma_write, set_irq2_oktagon, 0);
}
void masoboshi_add_scsi_unit (int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_masoboshi_scsi[ci->controller_type_unit], ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_masoboshi_scsi[ci->controller_type_unit], fake2_dma_read, fake2_dma_write, set_irq2_masoboshi);
+ ncr9x_esp_scsi_init(ncr_masoboshi_scsi[ci->controller_type_unit], fake2_dma_read, fake2_dma_write, set_irq2_masoboshi, 0);
}
void ematrix_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_ematrix530_scsi, ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_ematrix530_scsi, fake_dma_read_ematrix, fake_dma_write_ematrix, set_irq2);
+ ncr9x_esp_scsi_init(ncr_ematrix530_scsi, fake_dma_read_ematrix, fake_dma_write_ematrix, set_irq2, 0);
esp_dma_enable(ncr_ematrix530_scsi->devobject.lsistate, 1);
}
void multievolution_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_multievolution_scsi, ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_multievolution_scsi, fake_dma_read, fake_dma_write, set_irq2);
+ ncr9x_esp_scsi_init(ncr_multievolution_scsi, fake_dma_read, fake_dma_write, set_irq2, 0);
esp_dma_enable(ncr_multievolution_scsi->devobject.lsistate, 1);
}
void golemfast_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
ncr9x_add_scsi_unit(&ncr_golemfast_scsi[ci->controller_type_unit], ch, ci, rc);
- ncr9x_esp_scsi_init(ncr_golemfast_scsi[ci->controller_type_unit], fake_dma_read, fake_dma_write, set_irq2_golemfast);
+ ncr9x_esp_scsi_init(ncr_golemfast_scsi[ci->controller_type_unit], fake_dma_read, fake_dma_write, set_irq2_golemfast, 0);
esp_dma_enable(ncr_golemfast_scsi[ci->controller_type_unit]->devobject.lsistate, 1);
}
{
aci->start = 0xdd0000;
aci->size = 0x10000;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
return true;
}
static struct cache040 dcaches040[CACHESETS040];
static int fallback_cpu_model, fallback_mmu_model, fallback_fpu_model;
-static int fallback_cpu_compatible, fallback_cpu_address_space_24;
+static bool fallback_cpu_compatible, fallback_cpu_address_space_24;
static struct regstruct fallback_regs;
static int fallback_new_cpu_model;
#if CPUTRACE_DEBUG
validate_trace ();
#endif
+ if (cputrace.memoryoffset == MAX_CPUTRACESIZE)
+ return;
struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset++];
+ if (cputrace.memoryoffset == MAX_CPUTRACESIZE) {
+ write_log(_T("CPUTRACE overflow, stopping tracing.\n"));
+ return;
+ }
ctm->mode = 0;
cputrace.cyclecounter = 0;
cputrace.cyclecounter_pre = cputrace.cyclecounter_post = 0;
#if CPUTRACE_DEBUG
validate_trace ();
#endif
+ if (cputrace.memoryoffset == MAX_CPUTRACESIZE)
+ return;
struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset++];
+ if (cputrace.memoryoffset == MAX_CPUTRACESIZE) {
+ write_log(_T("CPUTRACE overflow, stopping tracing.\n"));
+ return;
+ }
ctm->addr = addr;
ctm->data = 0xdeadf00d;
ctm->mode = accessmode | (size << 4);
memory_map_dump();
m68k_setpc(fallback_regs.pc);
} else {
+ // 68000/010/EC020
memory_restore();
expansion_cpu_fallback();
memory_map_dump();
x_do_cycles(8 * CYCLE_UNIT);
unset_special(SPCFLAG_UAEINT);
check_uae_int_request();
+#ifdef WITH_PPC
ppc_interrupt(intlev());
uae_ppc_execute_check();
+#endif
if (regs.spcflags & SPCFLAG_COPPER)
do_copper();
if (regs.spcflags & (SPCFLAG_BRK | SPCFLAG_MODE_CHANGE)) {
// sync chipset with real time
for (;;) {
check_uae_int_request();
+#ifdef WITH_PPC
ppc_interrupt(intlev());
uae_ppc_execute_check();
+#endif
if (event_wait)
break;
int d = read_processor_time() - rpt_end;
*/
int rawinput_enabled_hid = -1;
+int xinput_enabled = 0;
// 1 = keyboard
// 2 = mouse
// 4 = joystick
#include <setupapi.h>
#include <devguid.h>
#include <cfgmgr32.h>
+#include <wbemidl.h>
+#include <oleauto.h>
+
extern "C"
{
#define DIDC_WIN 3
#define DIDC_CAT 4
#define DIDC_PARJOY 5
+#define DIDC_XINPUT 6
#define AXISTYPE_NORMAL 0
#define AXISTYPE_POV_X 1
return out;
}
+static void add_xinput_device(struct didata *did)
+{
+ TCHAR tmp[256];
+
+ did->connection = DIDC_XINPUT;
+
+
+ int buttoncnt = 0;
+ for (int i = 1; i <= 16; i++) {
+ did->buttonsort[buttoncnt] = i * 2;
+ did->buttonmappings[buttoncnt] = i;
+ _stprintf(tmp, _T("Button %d"), i);
+ did->buttonname[buttoncnt] = my_strdup(tmp);
+ buttoncnt++;
+ }
+ did->buttons = buttoncnt;
+
+
+
+ fixbuttons(did);
+ fixthings(did);
+}
+
+
#define MAX_RAW_KEYBOARD 0
static bool initialize_rawinput (void)
num_joystick++;
rhid++;
v = rhid;
- if (_tcsstr (buf1, _T("IG_")))
- did->xinput = 1;
}
prodname[0] = 0;
rnum_raw++;
cleardid (did);
+ if (_tcsstr(buf1, _T("IG_"))) {
+ did->xinput = 1;
+ }
getvidpid (buf1, &did->vid, &did->pid, &did->mi);
if (prodname[0]) {
_tcscpy (tmp, prodname);
_stprintf (tmp, _T("%s"), st);
}
did->name = my_strdup (tmp);
+
did->rawinput = h;
did->rawhidhandle = hhid;
did->connection = DIDC_RAW;
did->priority = -2;
} else {
bool ok = false;
+
+#if 0
+ if (did->xinput) {
+ CloseHandle(did->rawhidhandle);
+ did->rawhidhandle = NULL;
+ rhid--;
+ rnum_raw--;
+ add_xinput_device(did);
+ continue;
+ }
+#endif
if (hhid != INVALID_HANDLE_VALUE && HidD_GetPreparsedData (hhid, &did->hidpreparseddata)) {
if (HidP_GetCaps (did->hidpreparseddata, &did->hidcaps) == HIDP_STATUS_SUCCESS) {
PHIDP_BUTTON_CAPS bcaps;
did->hidpreparseddata = NULL;
num_joystick--;
rhid--;
+ rnum_raw--;
}
}
}
cleardid(did);
}
+#if 0
+#define SAFE_RELEASE(x) if(x) x->Release();
+
+// believe it or not, this is MS example code!
+BOOL IsXInputDevice(const GUID* pGuidProductFromDirectInput)
+{
+ IWbemLocator* pIWbemLocator = NULL;
+ IEnumWbemClassObject* pEnumDevices = NULL;
+ IWbemClassObject* pDevices[20] = { 0 };
+ IWbemServices* pIWbemServices = NULL;
+ BSTR bstrNamespace = NULL;
+ BSTR bstrDeviceID = NULL;
+ BSTR bstrClassName = NULL;
+ DWORD uReturned = 0;
+ bool bIsXinputDevice = false;
+ UINT iDevice = 0;
+ VARIANT var;
+ HRESULT hr;
+
+ // CoInit if needed
+ hr = CoInitialize(NULL);
+ bool bCleanupCOM = SUCCEEDED(hr);
+
+ // Create WMI
+ hr = CoCreateInstance(__uuidof(WbemLocator),
+ NULL,
+ CLSCTX_INPROC_SERVER,
+ __uuidof(IWbemLocator),
+ (LPVOID*)&pIWbemLocator);
+ if (FAILED(hr) || pIWbemLocator == NULL)
+ goto LCleanup;
+
+ bstrNamespace = SysAllocString(L"\\\\.\\root\\cimv2"); if (bstrNamespace == NULL) goto LCleanup;
+ bstrClassName = SysAllocString(L"Win32_PNPEntity"); if (bstrClassName == NULL) goto LCleanup;
+ bstrDeviceID = SysAllocString(L"DeviceID"); if (bstrDeviceID == NULL) goto LCleanup;
+
+ // Connect to WMI
+ hr = pIWbemLocator->ConnectServer(bstrNamespace, NULL, NULL, 0L,
+ 0L, NULL, NULL, &pIWbemServices);
+ if (FAILED(hr) || pIWbemServices == NULL)
+ goto LCleanup;
+
+ // Switch security level to IMPERSONATE.
+ CoSetProxyBlanket(pIWbemServices, RPC_C_AUTHN_WINNT, RPC_C_AUTHZ_NONE, NULL,
+ RPC_C_AUTHN_LEVEL_CALL, RPC_C_IMP_LEVEL_IMPERSONATE, NULL, EOAC_NONE);
+
+ hr = pIWbemServices->CreateInstanceEnum(bstrClassName, 0, NULL, &pEnumDevices);
+ if (FAILED(hr) || pEnumDevices == NULL)
+ goto LCleanup;
+
+ // Loop over all devices
+ for (;; )
+ {
+ // Get 20 at a time
+ hr = pEnumDevices->Next(10000, 20, pDevices, &uReturned);
+ if (FAILED(hr))
+ goto LCleanup;
+ if (uReturned == 0)
+ break;
+
+ for (iDevice = 0; iDevice<uReturned; iDevice++)
+ {
+ // For each device, get its device ID
+ hr = pDevices[iDevice]->Get(bstrDeviceID, 0L, &var, NULL, NULL);
+ if (SUCCEEDED(hr) && var.vt == VT_BSTR && var.bstrVal != NULL)
+ {
+ // Check if the device ID contains "IG_". If it does, then it's an XInput device
+ // This information can not be found from DirectInput
+ if (wcsstr(var.bstrVal, L"IG_"))
+ {
+ // If it does, then get the VID/PID from var.bstrVal
+ DWORD dwPid = 0, dwVid = 0;
+ WCHAR* strVid = wcsstr(var.bstrVal, L"VID_");
+ if (strVid && swscanf(strVid, L"VID_%4X", &dwVid) != 1)
+ dwVid = 0;
+ WCHAR* strPid = wcsstr(var.bstrVal, L"PID_");
+ if (strPid && swscanf(strPid, L"PID_%4X", &dwPid) != 1)
+ dwPid = 0;
+
+ // Compare the VID/PID to the DInput device
+ DWORD dwVidPid = MAKELONG(dwVid, dwPid);
+ if (pGuidProductFromDirectInput && dwVidPid == pGuidProductFromDirectInput->Data1)
+ {
+ bIsXinputDevice = true;
+ goto LCleanup;
+ }
+ }
+ }
+ SAFE_RELEASE(pDevices[iDevice]);
+ }
+ }
+
+LCleanup:
+ if (bstrNamespace)
+ SysFreeString(bstrNamespace);
+ if (bstrDeviceID)
+ SysFreeString(bstrDeviceID);
+ if (bstrClassName)
+ SysFreeString(bstrClassName);
+ for (iDevice = 0; iDevice<20; iDevice++)
+ SAFE_RELEASE(pDevices[iDevice]);
+ SAFE_RELEASE(pEnumDevices);
+ SAFE_RELEASE(pIWbemLocator);
+ SAFE_RELEASE(pIWbemServices);
+
+ if (bCleanupCOM)
+ CoUninitialize();
+
+ return bIsXinputDevice;
+}
+#endif
+
static int di_do_init (void)
{
HRESULT hr;
if (!os_vista && rawinput_enabled_hid < 0)
rawinput_enabled_hid = 0;
+#if 0
+ IsXInputDevice(NULL);
+#endif
+
if (!no_rawinput) {
write_log (_T("RawInput enumeration..\n"));
if (!initialize_rawinput ())
static int doinit_shm (void)
{
- uae_u32 totalsize;
+ uae_u32 totalsize, totalsize_z3;
uae_u32 align;
uae_u32 z3rtgmem_size;
struct rtgboardconfig *rbc = &changed_prefs.rtgboards[0];
struct rtgboardconfig *crbc = &currprefs.rtgboards[0];
uae_u32 extra = 65536;
+ struct uae_prefs *p = &changed_prefs;
changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = 0;
set_expamem_z3_hack_mode(0);
z3rtgmem_size = gfxboard_get_configtype(rbc) == 3 ? rbc->rtgmem_size : 0;
- if (changed_prefs.cpu_model >= 68020)
+ if (p->cpu_model >= 68020)
totalsize = 0x10000000;
- totalsize += (changed_prefs.z3chipmem_size + align) & ~align;
+ totalsize += (p->z3chipmem_size + align) & ~align;
+ totalsize_z3 = totalsize;
start_rtg = 0;
end_rtg = 0;
- jit_direct_compatible_memory = currprefs.cachesize && (!currprefs.comptrustbyte || !currprefs.comptrustword || !currprefs.comptrustlong);
+ jit_direct_compatible_memory = p->cachesize && (!p->comptrustbyte || !p->comptrustword || !p->comptrustlong);
+#if 0
if (jit_direct_compatible_memory && expamem_z3_highram_uae > 0x80000000) {
write_log(_T("MMAN: RAM outside of 31-bit address space. Switching off JIT Direct.\n"));
jit_direct_compatible_memory = false;
}
-
- // choose UAE if requested, blizzard or if jit direct and only UAE mode fits in natmem space.
- if ((Z3BASE_UAE + changed_prefs.z3chipmem_size > Z3BASE_REAL && changed_prefs.z3_mapping_mode == Z3MAPPING_AUTO) ||
- (jit_direct_compatible_memory && expamem_z3_highram_real > 0x80000000 && changed_prefs.z3_mapping_mode == Z3MAPPING_AUTO) ||
- changed_prefs.z3_mapping_mode == Z3MAPPING_UAE || cpuboard_memorytype(&changed_prefs) == BOARD_MEMORY_BLIZZARD_12xx ||
- (expamem_z3_highram_real + extra >= natmem_reserved_size && expamem_z3_highram_real < totalsize && changed_prefs.z3_mapping_mode == Z3MAPPING_AUTO && jit_direct_compatible_memory)) {
+#endif
+ // 1G Z3chip?
+ if ((Z3BASE_UAE + p->z3chipmem_size > Z3BASE_REAL) ||
+ // real wrapped around
+ (expamem_z3_highram_real == 0xffffffff) ||
+ // Real highram > 0x80000000 && UAE highram <= 0x80000000 && Automatic
+ (expamem_z3_highram_real > 0x80000000 && expamem_z3_highram_uae <= 0x80000000 && p->z3_mapping_mode == Z3MAPPING_AUTO) ||
+ // Wanted UAE || Blizzard RAM
+ p->z3_mapping_mode == Z3MAPPING_UAE || cpuboard_memorytype(&changed_prefs) == BOARD_MEMORY_BLIZZARD_12xx ||
+ // JIT && Automatic && Real does not fit in NATMEM && UAE fits in NATMEM
+ (expamem_z3_highram_real + extra >= natmem_reserved_size && expamem_z3_highram_uae + extra <= natmem_reserved_size && p->z3_mapping_mode == Z3MAPPING_AUTO && jit_direct_compatible_memory)) {
changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = Z3BASE_UAE;
- if (changed_prefs.z3_mapping_mode == Z3MAPPING_AUTO)
+ if (p->z3_mapping_mode == Z3MAPPING_AUTO)
write_log(_T("MMAN: Selected UAE Z3 mapping mode\n"));
set_expamem_z3_hack_mode(Z3MAPPING_UAE);
- if (expamem_z3_highram_uae > totalsize) {
- totalsize = expamem_z3_highram_uae;
+ if (expamem_z3_highram_uae > totalsize_z3) {
+ totalsize_z3 = expamem_z3_highram_uae;
}
} else {
- if (changed_prefs.z3_mapping_mode == Z3MAPPING_AUTO)
+ if (p->z3_mapping_mode == Z3MAPPING_AUTO)
write_log(_T("MMAN: Selected REAL Z3 mapping mode\n"));
changed_prefs.z3autoconfig_start = currprefs.z3autoconfig_start = Z3BASE_REAL;
set_expamem_z3_hack_mode(Z3MAPPING_REAL);
- if (expamem_z3_highram_real > totalsize && jit_direct_compatible_memory) {
- totalsize = expamem_z3_highram_real;
- if (totalsize + extra >= natmem_reserved_size) {
+ if (expamem_z3_highram_real > totalsize_z3 && jit_direct_compatible_memory) {
+ totalsize_z3 = expamem_z3_highram_real;
+ if (totalsize_z3 + extra >= natmem_reserved_size) {
jit_direct_compatible_memory = false;
write_log(_T("MMAN: Not enough direct memory for Z3REAL. Switching off JIT Direct.\n"));
}
}
- if (jit_direct_compatible_memory && expamem_z3_highram_real > 0x80000000) {
- write_log(_T("MMAN: RAM outside of 31-bit address space. Switching off JIT Direct.\n"));
- jit_direct_compatible_memory = false;
- }
}
- write_log(_T("Total %uM, HM %uM\n"), totalsize >> 20, expamem_highmem_pointer >> 20);
+ write_log(_T("Total %uM Z3 Total %uM, HM %uM\n"), totalsize >> 20, totalsize_z3 >> 20, expamem_highmem_pointer >> 20);
- if (totalsize < expamem_highmem_pointer)
- totalsize = expamem_highmem_pointer;
+ if (totalsize_z3 < expamem_highmem_pointer)
+ totalsize_z3 = expamem_highmem_pointer;
+
+ expansion_scan_autoconfig(&currprefs, true);
if (jit_direct_compatible_memory && (totalsize > size64 || totalsize + extra >= natmem_reserved_size)) {
jit_direct_compatible_memory = false;
write_log(_T("MMAN: Not enough direct memory. Switching off JIT Direct.\n"));
}
- expansion_scan_autoconfig(&currprefs, true);
-
int idx = 0;
for (;;) {
struct autoconfig_info *aci = expansion_get_autoconfig_data(&currprefs, idx++);
if (!aci)
break;
- if (!aci->addrbank)
+ addrbank *ab = aci->addrbank;
+ if (!ab)
continue;
if (aci->direct_vram) {
if (!start_rtg)
notify_user(NUMSG_NOMEMORY);
return -1;
#else
+
p96base_offset = start_rtg;
p96mem_size = end_rtg - start_rtg;
write_log("MMAN: rtgbase_offset = %08x, size %08x\n", p96base_offset, p96mem_size);
end_rtg = 0;
}
+ idx = 0;
+ for (;;) {
+ struct autoconfig_info *aci = expansion_get_autoconfig_data(&currprefs, idx++);
+ if (!aci)
+ break;
+ addrbank *ab = aci->addrbank;
+ // disable JIT direct from Z3 boards that are outside of natmem
+ for (int i = 0; i < MAX_RAM_BOARDS; i++) {
+ if (&z3fastmem_bank[i] == ab) {
+ ab->flags &= ~ABFLAG_ALLOCINDIRECT;
+ ab->jit_read_flag = 0;
+ ab->jit_write_flag = 0;
+ if (aci->start + aci->size > natmem_reserved_size) {
+ write_log(_T("%s %08x-%08x: not JIT direct capable (>%08x)!\n"), ab->name, aci->start, aci->start + aci->size - 1, natmem_reserved_size);
+ ab->flags |= ABFLAG_ALLOCINDIRECT;
+ ab->jit_read_flag = S_READ;
+ ab->jit_write_flag = S_WRITE;
+ }
+ }
+ }
+ }
+
#if 0
z3offset = 0;
if (changed_prefs.z3_mapping_mode != Z3MAPPING_UAE && cpuboard_memorytype(&changed_prefs) != BOARD_MEMORY_BLIZZARD_12xx) {
}
ab->baseaddr = NULL;
ab->flags &= ~ABFLAG_DIRECTMAP;
+ ab->allocated_size = 0;
write_log(_T("mapped_free indirect %s\n"), ab->name);
return;
}
xfree(ab->baseaddr);
}
ab->baseaddr = NULL;
+ ab->allocated_size = 0;
write_log(_T("mapped_free nondirect %s\n"), ab->name);
return;
}
x = x->next;
}
ab->baseaddr = NULL;
+ ab->allocated_size = 0;
write_log(_T("mapped_free direct %s\n"), ab->name);
}
bool readonly = false, maprom = false;
bool directsupport = true;
uaecptr start;
- uae_u32 size = ab->allocated;
+ uae_u32 size = ab->reserved_size;
uae_u32 readonlysize = size;
bool barrier = false;
start = 0x00a80000;
barrier = true;
got = true;
+ } else {
+ directsupport = false;
}
if (got) {
md->start = start;
if (start_rtg && end_rtg) {
if (start < start_rtg || start + size > end_rtg)
directsupport = false;
- } else if (start + size > natmem_reserved_size) {
+ } else if (start >= natmem_reserved_size || start + size > natmem_reserved_size) {
+ // start + size may cause 32-bit overflow
directsupport = false;
}
md->directsupport = directsupport;
- if (barrier)
+ if (barrier) {
md->size += BARRIER;
+ }
}
return got;
}
#endif
uintptr_t natmem_end = (uintptr_t) natmem_reserved + natmem_reserved_size;
- if ((uintptr_t) shmaddr + size > natmem_end) {
+ if ((uintptr_t) shmaddr + size > natmem_end && (uintptr_t)shmaddr <= natmem_end) {
/* We cannot add a barrier beyond the end of the reserved memory. */
//assert((uintptr_t) shmaddr + size - natmem_end == BARRIER);
write_log(_T("NATMEM: Removing barrier (%d bytes) beyond reserved memory\n"), BARRIER);
int result = -1;
if ((key == UAE_IPC_PRIVATE) || ((shmflg & UAE_IPC_CREAT) && (find_shmkey (key) == -1))) {
- write_log (_T("shmget of size %zd (%zdk) for %s (%s)\n"), ab->allocated, ab->allocated >> 10, ab->label, ab->name);
+ write_log (_T("shmget of size %zd (%zdk) for %s (%s)\n"), ab->reserved_size, ab->reserved_size >> 10, ab->label, ab->name);
if ((result = get_next_shmkey ()) != -1) {
- shmids[result].size = ab->allocated;
+ shmids[result].size = ab->reserved_size;
_tcscpy (shmids[result].name, ab->label);
} else {
result = -1;
picasso96_alloc2 (ctx);
}
boardinfo = AmigaBoardInfo;
- if (gfxmem_bank.allocated && !picasso96_state_uaegfx.CardFound) {
+ if (gfxmem_bank.allocated_size && !picasso96_state_uaegfx.CardFound) {
/* Fill in MemoryBase, MemorySize */
trap_put_long(ctx, AmigaBoardInfo + PSSO_BoardInfo_MemoryBase, gfxmem_bank.start);
- trap_put_long(ctx, AmigaBoardInfo + PSSO_BoardInfo_MemorySize, gfxmem_bank.allocated - reserved_gfxmem);
+ trap_put_long(ctx, AmigaBoardInfo + PSSO_BoardInfo_MemorySize, gfxmem_bank.allocated_size - reserved_gfxmem);
picasso96_state_uaegfx.CardFound = 1; /* mark our "card" as being found */
return -1;
} else
picasso96_amem = trap_get_long(ctx, uaegfx_base + CARD_RESLIST);
} else if (uaegfx_active) {
reserved_gfxmem = size;
- picasso96_amem = gfxmem_bank.start + gfxmem_bank.allocated - size;
+ picasso96_amem = gfxmem_bank.start + gfxmem_bank.allocated_size - size;
}
picasso96_amemend = picasso96_amem + size;
write_log (_T("P96 RESINFO: %08X-%08X (%d,%d)\n"), picasso96_amem, picasso96_amemend, size / PSSO_ModeInfo_sizeof, size);
- picasso_allocatewritewatch (0, gfxmem_bank.allocated);
+ picasso_allocatewritewatch (0, gfxmem_bank.allocated_size);
}
static int p96depth (int depth)
xfree (newmodes);
newmodes = NULL;
picasso96_amem = picasso96_amemend = 0;
- if (gfxmem_bank.allocated == 0)
+ if (gfxmem_bank.allocated_size == 0)
return;
misscnt = 0;
newmodes = xmalloc (struct PicassoResolution, MAX_PICASSO_MODES);
for (depth = 8; depth <= 32; depth++) {
if (!p96depth (depth))
continue;
- if(gfxmem_bank.allocated >= w * h * (depth + 7) / 8) {
+ if(gfxmem_bank.allocated_size >= w * h * (depth + 7) / 8) {
FillBoardInfo(ctx, *amem, res, w, h, depth);
*amem += PSSO_ModeInfo_sizeof;
}
picasso_refresh ();
}
init_picasso_screen_called = 1;
- mman_ResetWatch (gfxmem_bank.start + natmem_offset, gfxmem_bank.allocated);
+ mman_ResetWatch (gfxmem_bank.start + natmem_offset, gfxmem_bank.allocated_size);
}
case 31: return picasso_InvertRect (ctx);
case 32: return picasso_BlitPlanar2Direct (ctx);
//case 34: return picasso_WaitVerticalSync (ctx);
- case 35: return gfxmem_bank.allocated ? 1 : 0;
+ case 35: return gfxmem_bank.allocated_size ? 1 : 0;
case 36: return picasso_SetSprite (ctx);
case 37: return picasso_SetSpritePosition (ctx);
case 38: return picasso_SetSpriteImage (ctx);
#define PA_BUFFERSIZE (262144 * 4)
#define PA_CALLBACKBUFFERS 8
- uae_u8 *pasoundbuffer;
volatile int pareadoffset, pawriteoffset;
int pasndbufsize;
int paframesperbuffer;
PaStream *pastream;
- int pablocking;
int pavolume;
- int pacallbacksize;
- bool pafinishsb;
// wasapi
UINT32 bufferFrameCount;
UINT64 wasapiframes;
int wasapiexclusive;
- int wasapipull;
int sndbuf;
int wasapigoodsize;
- HANDLE wasapievent;
- uae_u8 *wasapibuffer;
- int wasapibufferlen;
- int wasapibuffermaxlen;
+
+ int pullmode;
+ HANDLE pullevent;
+ uae_u8 *pullbuffer;
+ int pullbufferlen;
+ int pullbuffermaxlen;
#if USE_XAUDIO
// xaudio2
if (FAILED (hr)) {
write_log (_T("WASAPI: Stop() %08X\n"), hr);
}
- if (s->wasapievent)
- ResetEvent(s->wasapievent);
}
static void resume_audio_wasapi (struct sound_data *sd)
{
BYTE *pData;
int framecnt;
- if (s->wasapievent)
- ResetEvent(s->wasapievent);
hr = s->pAudioClient->Reset ();
if (FAILED (hr)) {
write_log (_T("WASAPI: Reset() %08X\n"), hr);
struct sound_dp *s = sd->data;
s->pawriteoffset = 0;
s->pareadoffset = 0;
- s->pacallbacksize = 0;
- s->pafinishsb = false;
PaError err = Pa_StartStream (s->pastream);
if (err != paNoError)
write_log (_T("PASOUND: Pa_StartStream() error %d (%s)\n"), err, Pa_GetErrorText (err));
return speakerconfig;
}
-static int padiff (int write, int read)
+static void finish_sound_buffer_pull(struct sound_data *sd, uae_u16 *sndbuffer)
{
- int diff;
- diff = write - read;
- if (diff > PA_BUFFERSIZE / 2)
- diff = PA_BUFFERSIZE - write + read;
- else if (diff < -PA_BUFFERSIZE / 2)
- diff = PA_BUFFERSIZE - read + write;
- return diff;
+ struct sound_dp *s = sd->data;
+
+ if (s->pullbufferlen + sd->sndbufsize > s->pullbuffermaxlen) {
+ write_log(_T("pull overflow! %d %d %d\n"), s->pullbufferlen, sd->sndbufsize, s->pullbuffermaxlen);
+ s->pullbufferlen = 0;
+ }
+ memcpy(s->pullbuffer + s->pullbufferlen, sndbuffer, sd->sndbufsize);
+ s->pullbufferlen += sd->sndbufsize;
}
static void finish_sound_buffer_pa (struct sound_data *sd, uae_u16 *sndbuffer)
{
struct sound_dp *s = sd->data;
- s->pafinishsb = true;
-
if (s->pavolume) {
int vol = 65536 - s->pavolume * 655;
for (int i = 0; i < sd->sndbufsize / sizeof (uae_u16); i++) {
sndbuffer[i] = v * vol / 65536;
}
}
- if (s->pablocking) {
-
- int avail;
- time_t t = 0;
- for (;;) {
- avail = Pa_GetStreamWriteAvailable (s->pastream);
- if (avail < 0 || avail >= s->pasndbufsize)
- break;
- if (!t) {
- t = time (NULL) + 2;
- } else if (time (NULL) >= t) {
- write_log (_T("PA: audio stuck!? %d\n"), avail);
- break;
- }
- sleep_millis (1);
- }
- int pos = avail - s->paframesperbuffer;
- docorrection (s, -pos * 1000 / (s->paframesperbuffer), -pos, 100);
- Pa_WriteStream (s->pastream, sndbuffer, s->pasndbufsize);
-
- } else {
-
- if (!s->pacallbacksize)
- return;
-
- int diff = padiff (s->pawriteoffset, s->pareadoffset);
- int samplediff = diff / sd->samplesize;
- samplediff -= s->pacallbacksize * PA_CALLBACKBUFFERS;
- docorrection (s, samplediff * 1000 / (s->pacallbacksize * PA_CALLBACKBUFFERS / 2), samplediff, s->pacallbacksize);
-
- while (diff > PA_BUFFERSIZE / 4 && s->pastream && !sd->paused) {
- gui_data.sndbuf_status = 1;
- statuscnt = SND_STATUSCNT;
- sleep_millis (1);
- diff = padiff (s->pawriteoffset, s->pareadoffset);
- }
-
- if (sd->sndbufsize + s->pawriteoffset > PA_BUFFERSIZE) {
- int partsize = PA_BUFFERSIZE - s->pawriteoffset;
- memcpy (s->pasoundbuffer + s->pawriteoffset, sndbuffer, partsize);
- memcpy (s->pasoundbuffer, (uae_u8*)sndbuffer + partsize, sd->sndbufsize - partsize);
- s->pawriteoffset = sd->sndbufsize - partsize;
- } else {
- memcpy (s->pasoundbuffer + s->pawriteoffset, sndbuffer, sd->sndbufsize);
- s->pawriteoffset = s->pawriteoffset + sd->sndbufsize;
- }
-
- }
+ finish_sound_buffer_pull(sd, sndbuffer);
}
static int _cdecl portAudioCallback (const void *inputBuffer, void *outputBuffer,
struct sound_data *sd = (struct sound_data*)userData;
struct sound_dp *s = sd->data;
int bytestocopy;
- int diff;
- if (!framesPerBuffer || !s->pafinishsb || sdp->deactive)
+ if (!framesPerBuffer || sdp->deactive)
return paContinue;
- if (!s->pacallbacksize)
- s->pawriteoffset = (PA_CALLBACKBUFFERS + 1) * framesPerBuffer * sd->samplesize;
-
- s->pacallbacksize = framesPerBuffer;
+ if (s->pullbufferlen <= 0) {
+ SetEvent(s->pullevent);
+ return paContinue;
+ }
bytestocopy = framesPerBuffer * sd->samplesize;
- diff = padiff (s->pawriteoffset, s->pareadoffset + bytestocopy);
- if (diff <= 0) {
- memset (outputBuffer, 0, bytestocopy);
- gui_data.sndbuf_status = 2;
- bytestocopy -= -diff;
- statuscnt = SND_STATUSCNT;
- }
if (bytestocopy > 0) {
- if (bytestocopy + s->pareadoffset > PA_BUFFERSIZE) {
- int partsize = PA_BUFFERSIZE - s->pareadoffset;
- memcpy (outputBuffer, s->pasoundbuffer + s->pareadoffset, partsize);
- memcpy ((uae_u8*)outputBuffer + partsize, s->pasoundbuffer, bytestocopy - partsize);
- s->pareadoffset = bytestocopy - partsize;
- } else {
- memcpy (outputBuffer, s->pasoundbuffer + s->pareadoffset, bytestocopy);
- s->pareadoffset = s->pareadoffset + bytestocopy;
- }
+ memcpy(outputBuffer, s->pullbuffer, bytestocopy);
}
+ if (bytestocopy < s->pullbufferlen) {
+ memmove(s->pullbuffer, s->pullbuffer + bytestocopy, s->pullbufferlen - bytestocopy);
+ }
+ s->pullbufferlen -= bytestocopy;
+
return paContinue;
}
if (s->pastream)
Pa_CloseStream (s->pastream);
s->pastream = NULL;
- xfree (s->pasoundbuffer);
- s->pasoundbuffer = NULL;
}
static int open_audio_pa (struct sound_data *sd, int index)
int defaultrate = 0;
s->paframesperbuffer = sd->sndbufsize;
- s->pasndbufsize = sd->sndbufsize / 32;
+ s->pasndbufsize = s->paframesperbuffer;
sd->sndbufsize = s->pasndbufsize * ch * 2;
if (sd->sndbufsize > SND_MAX_BUFFER)
sd->sndbufsize = SND_MAX_BUFFER;
}
sd->samplesize = ch * 16 / 8;
-#if 0
- s->pablocking = 1;
- err = Pa_OpenStream (&s->pastream, NULL, &p, freq, s->paframesperbuffer, paNoFlag, NULL, NULL);
-#else
- err = paUnanticipatedHostError;
-#endif
- if (err == paUnanticipatedHostError) { // could be "blocking not supported"
- s->pablocking = 0;
- err = Pa_OpenStream (&s->pastream, NULL, &p, freq, paFramesPerBufferUnspecified, paNoFlag, portAudioCallback, sd);
- }
+ s->pullmode = 1;
+ err = Pa_OpenStream (&s->pastream, NULL, &p, freq, s->paframesperbuffer, paNoFlag, portAudioCallback, sd);
+
if (err == paInvalidSampleRate || err == paInvalidChannelCount)
goto fixfreq;
if (err != paNoError) {
break;
}
- if (!s->pablocking) {
- s->pasoundbuffer = xcalloc (uae_u8, PA_BUFFERSIZE);
- }
+ s->pullevent = CreateEvent(NULL, TRUE, FALSE, NULL);
+ s->pullbuffermaxlen = sd->sndbufsize;
+ s->pullbuffer = xcalloc(uae_u8, s->pullbuffermaxlen);
+ s->pullbufferlen = 0;
name = au (di->name);
write_log (_T("PASOUND: CH=%d,FREQ=%d (%s) '%s' buffer %d/%d (%s)\n"),
ch, freq, sound_devices[index]->name, name,
- s->pasndbufsize, s->paframesperbuffer, s->pablocking ? _T("push") : _T("pull"));
+ s->pasndbufsize, s->paframesperbuffer, !s->pullmode ? _T("push") : _T("pull"));
xfree (name);
return 1;
end:
s->pDevice->Release ();
if (s->pEnumerator)
s->pEnumerator->Release ();
- if (s->wasapievent) {
- CloseHandle(s->wasapievent);
- s->wasapievent = NULL;
- }
- xfree(s->wasapibuffer);
- s->wasapibuffer = NULL;
}
static int open_audio_wasapi (struct sound_data *sd, int index, int exclusive)
sd->devicetype = exclusive ? SOUND_DEVICE_WASAPI_EXCLUSIVE : SOUND_DEVICE_WASAPI;
s->wasapiexclusive = exclusive;
- s->wasapipull = sound_pull;
+ s->pullmode = sound_pull;
if (s->wasapiexclusive)
sharemode = AUDCLNT_SHAREMODE_EXCLUSIVE;
else
sharemode = AUDCLNT_SHAREMODE_SHARED;
- if (s->wasapipull) {
- s->wasapievent = CreateEvent(NULL, TRUE, FALSE, NULL);
+ if (s->pullmode) {
+ s->pullevent = CreateEvent(NULL, TRUE, FALSE, NULL);
}
hr = CoCreateInstance (__uuidof(MMDeviceEnumerator), NULL,
);
}
- hr = s->pAudioClient->Initialize (sharemode, AUDCLNT_STREAMFLAGS_NOPERSIST | (s->wasapipull ? AUDCLNT_STREAMFLAGS_EVENTCALLBACK : 0),
+ hr = s->pAudioClient->Initialize (sharemode, AUDCLNT_STREAMFLAGS_NOPERSIST | (s->pullmode ? AUDCLNT_STREAMFLAGS_EVENTCALLBACK : 0),
s->hnsRequestedDuration, s->wasapiexclusive ? s->hnsRequestedDuration : 0, pwfx ? pwfx : &wavfmt.Format, NULL);
if (hr == AUDCLNT_E_BUFFER_SIZE_NOT_ALIGNED) {
hr = s->pAudioClient->GetBufferSize (&s->bufferFrameCount);
write_log (_T("WASAPI: Activate() %08X\n"), hr);
goto error;
}
- hr = s->pAudioClient->Initialize (sharemode, AUDCLNT_STREAMFLAGS_NOPERSIST | (s->wasapipull ? AUDCLNT_STREAMFLAGS_EVENTCALLBACK : 0),
+ hr = s->pAudioClient->Initialize (sharemode, AUDCLNT_STREAMFLAGS_NOPERSIST | (s->pullmode ? AUDCLNT_STREAMFLAGS_EVENTCALLBACK : 0),
s->hnsRequestedDuration, s->wasapiexclusive ? s->hnsRequestedDuration : 0, pwfx ? pwfx : &wavfmt.Format, NULL);
} else if (hr == AUDCLNT_E_BUFFER_SIZE_ERROR) {
write_log(_T("AUDCLNT_E_BUFFER_SIZE_ERROR %d\n"), s->bufferFrameCount);
goto error;
}
- if (s->wasapipull) {
- hr = s->pAudioClient->SetEventHandle(s->wasapievent);
+ if (s->pullmode) {
+ hr = s->pAudioClient->SetEventHandle(s->pullevent);
if (FAILED(hr)) {
write_log(_T("WASAPI: SetEventHandle() %08X\n"), hr);
goto error;
write_log (_T("WASAPI: GetFrequency() %08X\n"), hr);
}
}
- if (s->wasapipull) {
+ if (s->pullmode) {
if (s->wasapiexclusive) {
sd->sndbufsize = s->bufferFrameCount * sd->samplesize;
- s->wasapibuffermaxlen = sd->sndbufsize;
+ s->pullbuffermaxlen = sd->sndbufsize;
} else {
sd->sndbufsize = s->bufferFrameCount * sd->samplesize / 2;
- s->wasapibuffermaxlen = sd->sndbufsize * 2;
+ s->pullbuffermaxlen = sd->sndbufsize * 2;
}
s->wasapigoodsize = s->bufferFrameCount;
- s->wasapibuffer = xcalloc(uae_u8, s->wasapibuffermaxlen);
- s->wasapibufferlen = 0;
+ s->pullbuffer = xcalloc(uae_u8, s->pullbuffermaxlen);
+ s->pullbufferlen = 0;
} else {
sd->sndbufsize = (s->bufferFrameCount / 8) * sd->samplesize;
v = s->bufferFrameCount * sd->samplesize;
write_log(_T("WASAPI: '%s'\nWASAPI: %s %s CH=%d FREQ=%d BUF=%d (%d)\n"),
name,
s->wasapiexclusive ? _T("Exclusive") : _T("Shared"),
- s->wasapipull ? _T("Pull") : _T("Push"),
+ s->pullmode ? _T("Pull") : _T("Push"),
sd->channels, sd->freq, sd->sndbufsize / sd->samplesize, s->bufferFrameCount);
CoTaskMemFree (pwfx);
CoTaskMemFree (pwfx_saved);
CoTaskMemFree (name);
close_audio_wasapi (sd);
+ if (s->pullevent) {
+ CloseHandle(s->pullevent);
+ s->pullevent = NULL;
+ }
+ xfree(s->pullbuffer);
+ s->pullbuffer = NULL;
return 0;
}
}
void pause_sound_device (struct sound_data *sd)
{
+ struct sound_dp *s = sd->data;
sd->paused = 1;
gui_data.sndbuf_status = 0;
gui_data.sndbuf = 0;
else if (sd->devicetype == SOUND_DEVICE_XAUDIO2)
pause_audio_xaudio2 (sd);
#endif
+ if (s->pullevent)
+ ResetEvent(s->pullevent);
}
void resume_sound_device (struct sound_data *sd)
{
+ struct sound_dp *s = sd->data;
if (sd->devicetype == SOUND_DEVICE_AL)
resume_audio_al (sd);
else if (sd->devicetype == SOUND_DEVICE_DS)
else if (sd->devicetype == SOUND_DEVICE_XAUDIO2)
resume_audio_xaudio2 (sd);
#endif
+ if (s->pullevent)
+ ResetEvent(s->pullevent);
sd->paused = 0;
}
alcheck (sd, 0);
}
-int blocking_sound_device (struct sound_data *sd)
-{
- struct sound_dp *s = sd->data;
-
- if (sd->devicetype == SOUND_DEVICE_DS) {
-
- HRESULT hr;
- DWORD playpos, safepos;
- int diff;
-
- hr = IDirectSoundBuffer_GetCurrentPosition (s->lpDSBsecondary, &playpos, &safepos);
- if (FAILED (hr)) {
- restore_ds (sd, hr);
- write_log (_T("DS: GetCurrentPosition failed: %s\n"), DXError (hr));
- return -1;
- }
- if (s->writepos >= safepos)
- diff = s->writepos - safepos;
- else
- diff = s->dsoundbuf - safepos + s->writepos;
- if (diff > s->snd_maxoffset)
- return 1;
- return 0;
-
- } else if (sd->devicetype == SOUND_DEVICE_AL) {
-
- int v = 0;
- alGetError ();
- alGetSourcei (s->al_Source, AL_BUFFERS_QUEUED, &v);
- if (alGetError () != AL_NO_ERROR)
- return -1;
- if (v < AL_BUFFERS)
- return 0;
- return 1;
-
- } else if (sd->devicetype == SOUND_DEVICE_WASAPI || sd->devicetype == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
-
- // if (WaitForSingleObject (s->wasapihandle, 0) == WAIT_TIMEOUT)
- // return 0;
- return 1;
-
- }
- return -1;
-}
-
-int get_offset_sound_device (struct sound_data *sd)
-{
- struct sound_dp *s = sd->data;
-
- if (sd->devicetype == SOUND_DEVICE_DS) {
- HRESULT hr;
- DWORD playpos, safedist, status;
-
- hr = IDirectSoundBuffer_GetStatus (s->lpDSBsecondary, &status);
- hr = IDirectSoundBuffer_GetCurrentPosition (s->lpDSBsecondary, &playpos, &safedist);
- if (FAILED (hr))
- return -1;
- playpos -= s->writepos;
- if (playpos < 0)
- playpos += s->dsoundbuf;
- return playpos;
- } else if (sd->devicetype == SOUND_DEVICE_AL) {
- int v;
- alGetError ();
- alGetSourcei (s->al_Source, AL_BYTE_OFFSET, &v);
- if (alGetError () == AL_NO_ERROR)
- return v;
- }
- return -1;
-}
-
-
#if USE_XAUDIO
static void finish_sound_buffer_xaudio2 (struct sound_data *sd, uae_u16 *sndbuffer)
{
HRESULT hr;
BYTE *pData;
- if (s->wasapibufferlen <= 0)
+ if (s->pullbufferlen <= 0)
return false;
- int frames = s->wasapibufferlen / sd->samplesize;
+ int frames = s->pullbufferlen / sd->samplesize;
int avail = frames;
if (!s->wasapiexclusive) {
avail = frames;
}
- ResetEvent(s->wasapievent);
+ ResetEvent(s->pullevent);
hr = s->pRenderClient->GetBuffer(avail, &pData);
if (SUCCEEDED(hr)) {
- memcpy(pData, s->wasapibuffer, avail * sd->samplesize);
+ memcpy(pData, s->pullbuffer, avail * sd->samplesize);
hr = s->pRenderClient->ReleaseBuffer(avail, 0);
if (FAILED(hr)) {
write_log(_T("WASAPI: ReleaseBuffer() %08X\n"), hr);
}
if (avail < frames) {
- memmove(s->wasapibuffer, s->wasapibuffer + avail * sd->samplesize, s->wasapibufferlen - (avail * sd->samplesize));
+ memmove(s->pullbuffer, s->pullbuffer + avail * sd->samplesize, s->pullbufferlen - (avail * sd->samplesize));
}
- s->wasapibufferlen -= avail * sd->samplesize;
+ s->pullbufferlen -= avail * sd->samplesize;
return true;
}
-static void finish_sound_buffer_wasapi_pull(struct sound_data *sd, uae_u16 *sndbuffer)
-{
- struct sound_dp *s = sd->data;
-
- if (s->wasapibufferlen + sd->sndbufsize > s->wasapibuffermaxlen) {
- write_log(_T("wasapi pull overflow! %d %d %d\n"), s->wasapibufferlen, sd->sndbufsize, s->wasapibuffermaxlen);
- s->wasapibufferlen = 0;
- }
- memcpy(s->wasapibuffer + s->wasapibufferlen, sndbuffer, sd->sndbufsize);
- s->wasapibufferlen += sd->sndbufsize;
-}
-
static void finish_sound_buffer_wasapi(struct sound_data *sd, uae_u16 *sndbuffer)
{
struct sound_dp *s = sd->data;
- if (s->wasapipull)
- finish_sound_buffer_wasapi_pull(sd, sndbuffer);
+ if (s->pullmode)
+ finish_sound_buffer_pull(sd, sndbuffer);
else
finish_sound_buffer_wasapi_push(sd, sndbuffer);
}
-
static void finish_sound_buffer_ds (struct sound_data *sd, uae_u16 *sndbuffer)
{
struct sound_dp *s = sd->data;
int type = sd->devicetype;
if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
return finish_sound_buffer_wasapi_pull_do(sd);
+ } else if (type == SOUND_DEVICE_PA) {
+ struct sound_dp *s = sd->data;
+ ResetEvent(s->pullevent);
}
return false;
}
HANDLE get_sound_event(void)
{
int type = sdp->devicetype;
- if (sdp->paused)
+ if (sdp->paused || sdp->deactive)
return 0;
- if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
+ if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE || type == SOUND_DEVICE_PA) {
struct sound_dp *s = sdp->data;
- if (s && s->wasapipull) {
- return s->wasapievent;
+ if (s && s->pullmode) {
+ return s->pullevent;
}
}
return 0;
bool audio_is_event_frame_possible(int ms)
{
int type = sdp->devicetype;
- if (sdp->paused)
+ if (sdp->paused || sdp->deactive)
return false;
- if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
+ if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE || type == SOUND_DEVICE_PA) {
struct sound_dp *s = sdp->data;
int bufsize = (uae_u8*)paula_sndbufpt - (uae_u8*)paula_sndbuffer;
bufsize /= sdp->samplesize;
int audio_is_pull(void)
{
int type = sdp->devicetype;
- if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
+ if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE || type == SOUND_DEVICE_PA) {
struct sound_dp *s = sdp->data;
- if (s && s->wasapipull) {
- return sdp->paused ? -1 : 1;
+ if (s && s->pullmode) {
+ return sdp->paused || sdp->deactive ? -1 : 1;
}
}
return 0;
int cnt = 0;
int type = sdp->devicetype;
- if (sdp->paused)
+ if (sdp->paused || sdp->deactive)
return 0;
- if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
+ if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE || type == SOUND_DEVICE_PA) {
struct sound_dp *s = sdp->data;
- if (s->wasapibufferlen > 0) {
+ if (s->pullbufferlen > 0) {
cnt++;
int size = (uae_u8*)paula_sndbufpt - (uae_u8*)paula_sndbuffer;
if (size > sdp->sndbufsize * 2 / 3)
bool audio_is_pull_event(void)
{
int type = sdp->devicetype;
- if (sdp->paused)
+ if (sdp->paused || sdp->deactive)
return false;
- if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE) {
+ if (type == SOUND_DEVICE_WASAPI || type == SOUND_DEVICE_WASAPI_EXCLUSIVE || type == SOUND_DEVICE_PA) {
struct sound_dp *s = sdp->data;
- if (s->wasapipull) {
- return WaitForSingleObject(s->wasapievent, 0) == WAIT_OBJECT_0;
+ if (s->pullmode) {
+ return WaitForSingleObject(s->pullevent, 0) == WAIT_OBJECT_0;
}
}
return false;
bool audio_finish_pull(void)
{
int type = sdp->devicetype;
- if (sdp->paused)
+ if (sdp->paused || sdp->deactive)
return false;
- if (type != SOUND_DEVICE_WASAPI && type != SOUND_DEVICE_WASAPI_EXCLUSIVE)
+ if (type != SOUND_DEVICE_WASAPI && type != SOUND_DEVICE_WASAPI_EXCLUSIVE && type != SOUND_DEVICE_PA)
return false;
if (audio_pull_buffer() && audio_is_pull_event()) {
return send_sound_do(sdp);
void pause_sound_device (struct sound_data *sd);
void resume_sound_device (struct sound_data *sd);
void set_volume_sound_device (struct sound_data *sd, int volume, int mute);
-int get_offset_sound_device (struct sound_data *sd);
-int blocking_sound_device (struct sound_data *sd);
-bool is_sound_buffer(void);
#if SOUNDSTUFF > 0
extern int outputsample, doublesample;
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("4")
+#define WINUAEBETA _T("5")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2016, 8, 31)
+#define WINUAEDATE MAKEBD(2016, 9, 10)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
}
if (dowait && (currprefs.m68k_speed >= 0 || currprefs.m68k_speed_throttle < 0))
sleep_millis_main (1);
+ audio_finish_pull();
}
static void changevblankthreadmode_do (int newmode, bool fast)
TCHAR disk_name[32];
disk_name[0] = 0; disk_name[31] = 0;
GetDlgItemText (hDlg, IDC_CREATE_NAME, disk_name, 30);
- if (disk_creatediskfile (full_path, 0, (drive_type)SendDlgItemMessage (hDlg, IDC_FLOPPYTYPE, CB_GETCURSEL, 0, 0L), disk_name, ischecked (hDlg, IDC_FLOPPY_FFS), ischecked (hDlg, IDC_FLOPPY_BOOTABLE), NULL)) {
+ if (disk_creatediskfile (&workprefs, full_path, 0, (drive_type)SendDlgItemMessage (hDlg, IDC_FLOPPYTYPE, CB_GETCURSEL, 0, 0L), disk_name, ischecked (hDlg, IDC_FLOPPY_FFS), ischecked (hDlg, IDC_FLOPPY_BOOTABLE), NULL)) {
fullpath (full_path, sizeof full_path / sizeof (TCHAR));
DISK_history_add (full_path, -1, HISTORY_FLOPPY, 0);
}
TCHAR disk_name[32];
disk_name[0] = 0; disk_name[31] = 0;
GetDlgItemText (hDlg, IDC_CREATE_NAME, disk_name, 30);
- if (disk_creatediskfile (full_path, 1, (drive_type)SendDlgItemMessage (hDlg, IDC_FLOPPYTYPE, CB_GETCURSEL, 0, 0L), disk_name, ischecked (hDlg, IDC_FLOPPY_FFS), ischecked (hDlg, IDC_FLOPPY_BOOTABLE), NULL)) {
+ if (disk_creatediskfile (&workprefs, full_path, 1, (drive_type)SendDlgItemMessage (hDlg, IDC_FLOPPYTYPE, CB_GETCURSEL, 0, 0L), disk_name, ischecked (hDlg, IDC_FLOPPY_FFS), ischecked (hDlg, IDC_FLOPPY_BOOTABLE), NULL)) {
fullpath (full_path, sizeof full_path / sizeof (TCHAR));
DISK_history_add (full_path, -1, HISTORY_FLOPPY, 0);
}
i = 0;
if (full_property_sheet)
expansion_generate_autoconfig_info(&workprefs);
- struct autoconfig_info *acip = NULL;
+ uaecptr highest_expamem = 0;
for (;;) {
TCHAR tmp[200];
struct autoconfig_info *aci = expansion_get_autoconfig_data(full_property_sheet ? &workprefs : &currprefs, i);
- if (!aci)
+ if (aci) {
+ if (aci->zorro == 3 && aci->size != 0 && aci->start + aci->size > highest_expamem)
+ highest_expamem = aci->start + aci->size;
+ }
+ if (!aci && highest_expamem <= Z3BASE_UAE)
break;
- lvstruct.mask = LVIF_TEXT | LVIF_PARAM;
- if (aci->zorro >= 1 && aci->zorro <= 3)
+ if (aci && aci->zorro >= 1 && aci->zorro <= 3)
_stprintf(tmp, _T("Z%d"), aci->zorro);
else
_tcscpy(tmp, _T("-"));
+ lvstruct.mask = LVIF_TEXT | LVIF_PARAM;
lvstruct.pszText = tmp;
- lvstruct.lParam = expansion_can_move(&workprefs, i) ? 1 : 0;
+ lvstruct.lParam = 0;
+ if (aci) {
+ // movable
+ if (expansion_can_move(&workprefs, i))
+ lvstruct.lParam |= 1;
+ // outside or crosses of 2G "border"
+ if (aci->zorro == 3 && aci->start + aci->size > 0x80000000 || aci->start + aci->size < aci->start)
+ lvstruct.lParam |= 2;
+ // outside of crosses 4G "border"
+ if (aci->zorro == 3 && aci->start == 0xffffffff)
+ lvstruct.lParam |= 4;
+ if (!full_property_sheet && (aci->zorro == 2 || aci->zorro == 3) && aci->addrbank && (aci->addrbank->flags & ABFLAG_RAM) && aci->addrbank->reserved_size) {
+ // failed to allocate
+ if (aci->addrbank->allocated_size == 0)
+ lvstruct.lParam |= 8;
+ // outside of JIT direct range
+ else if (canbang && (aci->addrbank->flags & ABFLAG_ALLOCINDIRECT))
+ lvstruct.lParam |= 16;
+ }
+ }
lvstruct.iItem = i;
lvstruct.iSubItem = 0;
result = ListView_InsertItem(list, &lvstruct);
tmp[0] = 0;
- TCHAR *s = tmp + _tcslen(tmp);
- if (aci->parent_of_previous) {
- if (acip && (acip->parent_name || acip->parent_address_space || acip->parent_romtype))
- _tcscat(s, _T(" -- "));
- else
- _tcscat(s, _T(" - "));
+ TCHAR *s = tmp;
+ if (aci && aci->parent_of_previous) {
+ _tcscat(s, _T(" - "));
}
- if ((aci->parent_address_space || aci->parent_romtype) && !aci->parent_of_previous)
+ if (aci && (aci->parent_address_space || aci->parent_romtype) && !aci->parent_of_previous)
_tcscat(s, _T("? "));
- _tcscat(s, aci->name);
+ if (aci)
+ _tcscat(s, aci->name);
ListView_SetItemText(list, result, 1, tmp);
- if (aci->start != 0xffffffff)
- _stprintf(tmp, _T("0x%08x"), aci->start);
- else
- _tcscpy(tmp, _T("-"));
- ListView_SetItemText(list, result, 2, tmp);
- if (aci->size != 0)
- _stprintf(tmp, _T("0x%08x"), aci->size);
- else
- _tcscpy(tmp, _T("-"));
- ListView_SetItemText(list, result, 3, tmp);
- if (aci->autoconfig_bytes[0] != 0xff)
- _stprintf(tmp, _T("0x%04x/0x%02x"),
+ if (aci) {
+ if (aci->start != 0xffffffff)
+ _stprintf(tmp, _T("0x%08x"), aci->start);
+ else
+ _tcscpy(tmp, _T("-"));
+ ListView_SetItemText(list, result, 2, tmp);
+ if (aci->size != 0)
+ _stprintf(tmp, _T("0x%08x"), aci->size);
+ else
+ _tcscpy(tmp, _T("-"));
+ ListView_SetItemText(list, result, 3, tmp);
+ if (aci->autoconfig_bytes[0] != 0xff)
+ _stprintf(tmp, _T("0x%04x/0x%02x"),
(aci->autoconfig_bytes[4] << 8) | aci->autoconfig_bytes[5], aci->autoconfig_bytes[1]);
- else
- _tcscpy(tmp, _T("-"));
- ListView_SetItemText(list, result, 4, tmp);
+ else
+ _tcscpy(tmp, _T("-"));
+ ListView_SetItemText(list, result, 4, tmp);
+ } else {
+ _stprintf(tmp, _T("0x%08x"), highest_expamem);
+ ListView_SetItemText(list, result, 2, tmp);
+ }
i++;
- acip = aci;
+ if (!aci)
+ break;
}
+
} else if (lv_type == LV_MISC2) {
listview_column_width[0] = 180;
}
SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
}
- _tcscpy(tmp, _T("Motherboard Fast RAM"));
+ _tcscpy(tmp, _T("Processor Slot Fast RAM"));
if (workprefs.mbresmem_high_size)
_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_high_size / (1024 * 1024));
SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
- _tcscpy(tmp, _T("Processor Slot Fast RAM"));
+ _tcscpy(tmp, _T("Motherboard Fast RAM"));
if (workprefs.mbresmem_low_size)
_stprintf(tmp + _tcslen(tmp), _T(" [%dM]"), workprefs.mbresmem_low_size / (1024 * 1024));
SendDlgItemMessage(hDlg, IDC_MEMORYSELECT, CB_ADDSTRING, 0, (LPARAM)tmp);
if (((LPNMHDR)lParam)->idFrom == IDC_BOARDLIST) {
switch (((LPNMHDR)lParam)->code)
{
-#if 0
case NM_CUSTOMDRAW:
{
LPNMLVCUSTOMDRAW lpNMLVCD = (LPNMLVCUSTOMDRAW)lParam;
SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NOTIFYITEMDRAW | CDRF_NOTIFYSUBITEMDRAW);
return TRUE;
case CDDS_ITEMPREPAINT| CDDS_SUBITEM:
- if (!lpNMLVCD->nmcd.lItemlParam) {
-
- lpNMLVCD->clrTextBk = RGB(255,0,0);
- SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NEWFONT);
- return TRUE;
+ {
+ BOOL ret = FALSE;
+ if (lpNMLVCD->nmcd.lItemlParam & 16) {
+ lpNMLVCD->clrText = GetSysColor(COLOR_GRAYTEXT);
+ SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NEWFONT);
+ ret = TRUE;
+ }
+ if (lpNMLVCD->nmcd.lItemlParam & 8) {
+ lpNMLVCD->clrTextBk = RGB(0xaa, 0x00, 0x00);
+ SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NEWFONT);
+ return TRUE;
+ }
+ if (lpNMLVCD->nmcd.lItemlParam & 4) {
+ lpNMLVCD->clrTextBk = RGB(0xaa, 0xaa, 0x00);
+ SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NEWFONT);
+ return TRUE;
+ }
+ if (lpNMLVCD->nmcd.lItemlParam & 2) {
+ lpNMLVCD->clrTextBk = GetSysColor(COLOR_INACTIVECAPTION);
+ SetWindowLongPtr(hDlg, DWLP_MSGRESULT, CDRF_NEWFONT);
+ return TRUE;
+ }
+ return ret;
}
- return FALSE;
}
}
return CDRF_DODEFAULT;
-#endif
case NM_CLICK:
{
int column;
SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_RESETCONTENT, 0, 0);
if (ctype >= HD_CONTROLLER_TYPE_IDE_FIRST && ctype <= HD_CONTROLLER_TYPE_IDE_LAST) {
const struct expansionromtype *ert = get_unit_expansion_rom(ctype);
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("0"));
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("1"));
- if (!ert || (ert->deviceflags & EXPANSIONTYPE_IDE_PORT_DOUBLED)) {
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("2"));
- SendDlgItemMessage (hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)_T("3"));
+ int ports = 2 + (ert ? ert->extrahdports : 0);
+ for (int i = 0; i < ports; i += 2) {
+ TCHAR tmp[100];
+ _stprintf(tmp, _T("%d"), i + 0);
+ SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)tmp);
+ _stprintf(tmp, _T("%d"), i + 1);
+ SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER_UNIT, CB_ADDSTRING, 0, (LPARAM)tmp);
}
ew(hDlg, IDC_HDF_CONTROLLER_UNIT, TRUE);
} else if (ctype >= HD_CONTROLLER_TYPE_SCSI_FIRST && ctype <= HD_CONTROLLER_TYPE_SCSI_LAST) {
\r
+\r
+JIT Direct current rules are less complex now. It automatically switches off only in following situations:\r
+ - Accelerator mirrored maprom address space is not JIT Direct compatible. (CyberStorm, Blizzards etc)\r
+ - RTG VRAM is outside of reserved natmem space. Workaround: Move RTG in earlier position using Hardware info GUI panel.\r
+ Note that in 64-bit version RTG VRAM must be inside of reserved natmem space. (Outside = error message and return back to GUI)\r
+\r
+- Buddha Z2 IDE controller emulation added. Catweasel Z2 model optionally selectable (Has nearly identical Buddha hardware, CW\r
+ part is not emulated). No ROMs added, flash rom images are available from manufacturer's web site. IDE doubler is not emulated.\r
+- Reset drive sound state when emulated Amiga is reset.\r
+- Z3 mapping = Automatic didn't choose UAE mode if JIT direct was enabled and Real mapping would not fit in allocated natmem space\r
+ but UAE mapping would fit.\r
+- Select UAE mode if Z3 mapping is automatic and UAE fits inside 2G barrier but Real does not. (To better match pre-3.4 behavior,\r
+ selecting Real in this mode can cause non-booting config if config has enough Z3 RAM)\r
+- 3G of Z3 RAM is now possible (3x1G Z3 boards). 64-bit WinUAE only, can't be fully JIT direct compatible.\r
+- Hardware info GUI panel shows also last Z3 address.\r
+- Hardware info shows Z3 board status info: dark background = outside of 2G border (can cause problems because some exec memory\r
+ functions that use bit 31 for error status, reset proof programs mainly use them, usually causes reboot loop). Yellow background = board does not\r
+ fit in address space (32-bit overflow, start address is also 0xffffffff in this situation). Red background = memory allocation failed.\r
+ Lighter text = JIT direct enabled but memory is not JIT direct capable.\r
+- SCSI emulation request sense always returned allocation field number of bytes even if command returned less data.\r
+- If ATAPI CD data transfer size is odd (which is not valid), ignore last byte.\r
+- NE2000 ISA is now available in x86 bridgeboard emulation. 100% untested!\r
+- Portaudio driver converted to pull mode.\r
+- Added Blizzard SCSI Kit III emulation and boot ROM v1.139.\r
+- Blizzard 1230 MK III ROM layout changed to match SCSI Kit III ROM. (Still no proper dump but I am sure this is correct)\r
+- Fixed M-TEC IDE controller emulation rom handling.\r
+- Low latency vsync + no buffer + WASAPI pull mode should be stable again. (RTG mode: todo)\r
+- Sound audio switch off didn't select correct timing method in WASAPI pull mode.\r
+- Small Z2 RAM (256k or smaller that goes in IO Z2 space) shadowed f00000 UAE Boot ROM in some configurations.\r
+- If only one or more Z3 RAM boards are outside of natmem and JIT direct is enabled: don't disable JIT direct completely but only\r
+ force non-JIT direct capable Z3 memory banks to use indirect mode.\r
+- Show Tecmar T-Card as "Zorro I" (prototype/unreleased version of autoconfig) board in Hardware info GUI.\r
+- Certain accelerators with autoconfig board didn't appear correctly in Hardware info panel.\r
+- Z2/Z3 memory bank that failed to allocate (out of memory) caused a crash.\r
+- Save image extended adf image was created with smaller max PAL size if emulation was not already started and in NTSC mode.\r
+- Some fake-DMA harddrive controllers with internal buffers crashed the emulation if GUI was opened during internal DMA operation\r
+ and CPU mode was compatible/cycle exact.\r
+- Separated memory bank pre-allocation and after allocation memory size variables.\r
+- Return correct SASI request sense data.\r
+\r
+Blizzard SCSI Kit III:\r
+- PIO-only! I thought all Phase 5 SCSI controllers were true DMA...\r
+- FAS408 SCSI chip which is FAS216 + 128 byte PIO FIFO buffer. (was annoying to emulate without datasheet..)\r
+- v1.39 ROM ("$VER: A1233_VERSION 1.139 (9.5.95)") added to ROM scanner.\r
+- Blizzard 1230 "MK I" to go.. (Does anyone have it? With or without SCSI Kit)\r
+\r
Beta 4:\r
\r
- Fixed uaegfx 8-bit mode palette updates.\r
map_banks(&pci_bridge_bank, 0xfffe0000 >> 16, 0x10000 >> 16, 0);
pcib->io_offset = 0xfffa0000;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
aci->parent_of_previous = true;
aci->start = 0x80000000;
aci->size = 0x80000000;
map_banks(&pci_io_bank, 0xfffa0000 >> 16, 0x20000 >> 16, 0);
map_banks(&pci_bridge_bank, 0xfffe0000 >> 16, 0x10000 >> 16, 0);
pcib->io_offset = 0xfffa0000;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
aci->parent_of_previous = true;
return true;
}
{
static const int parent[] = { ROMTYPE_GREX, ROMTYPE_MEDIATOR, ROMTYPE_PROMETHEUS, 0 };
aci->parent_romtype = parent;
- aci->addrbank = &expamem_nonautoconfig;
+ aci->zorro = 0;
return true;
}
* Copyright (c) 2005-2006 Fabrice Bellard
* Copyright (c) 2012 Herve Poussineau
*
+ * Copyright (c) 2014-2016 Toni Wilen (pseudo-dma, fas408 PIO buffer)
+ *
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
//#define ESP(obj) OBJECT_CHECK(SysBusESPState, (obj), TYPE_ESP)
#define ESP(obj) (ESPState*)obj->lsistate
+#define ESPLOG 0
+
+static void esp_raise_ext_irq(ESPState * s)
+{
+ if (s->irq_raised)
+ return;
+ s->irq_raised = 1;
+ esp_irq_raise(s->irq);
+}
+
+static void esp_lower_ext_irq(ESPState * s)
+{
+ if (!s->irq_raised)
+ return;
+ s->irq_raised = 0;
+ esp_irq_lower(s->irq);
+}
+
+
static void esp_raise_irq(ESPState *s)
{
if (!(s->rregs[ESP_RSTAT] & STAT_INT)) {
s->rregs[ESP_RSTAT] |= STAT_INT;
- esp_irq_raise(s->irq);
+ esp_raise_ext_irq(s);
}
}
{
if (s->rregs[ESP_RSTAT] & STAT_INT) {
s->rregs[ESP_RSTAT] &= ~STAT_INT;
- esp_irq_lower(s->irq);
+ esp_lower_ext_irq(s);
}
}
+static void fas408_raise_irq(ESPState *s)
+{
+ if (!(s->rregs[ESP_REGS + NCR_PSTAT] & NCRPSTAT_SIRQ)) {
+ s->rregs[ESP_REGS + NCR_PSTAT] |= NCRPSTAT_SIRQ;
+ esp_raise_ext_irq(s);
+ }
+}
+
+static void fas408_lower_irq(ESPState *s)
+{
+ if (s->rregs[ESP_REGS + NCR_PSTAT] & NCRPSTAT_SIRQ) {
+ s->rregs[ESP_REGS + NCR_PSTAT] &= ~NCRPSTAT_SIRQ;
+ esp_lower_ext_irq(s);
+ }
+}
+
+static void fas408_check(ESPState *s)
+{
+ if (!s->fas4xxextra)
+ return;
+ bool irq = false;
+ int v = 0;
+ int len = 0;
+ if (s->fas408_buffer_size > 0) {
+ len = s->fas408_buffer_size - s->fas408_buffer_offset;
+ } else if ((s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == 0) {
+ len = s->ti_size;
+ }
+ if (s->wregs[ESP_REGS + NCR_PSTAT] & 1) {
+ v |= len == 0 ? NCRPSTAT_FEMPT : 0;
+ v |= len >= 42 ? NCRPSTAT_F13 : 0;
+ v |= len >= 84 ? NCRPSTAT_F23 : 0;
+ v |= len >= 128 ? NCRPSTAT_FFULL : 0;
+ if ((s->wregs[ESP_REGS + NCR_PIOI] & v) & (NCRPSTAT_FEMPT | NCRPSTAT_F13 | NCRPSTAT_F23 | NCRPSTAT_FFULL)) {
+ irq = true;
+ }
+ }
+ if (irq) {
+ v |= NCRPSTAT_SIRQ;
+ fas408_raise_irq(s);
+ } else {
+ fas408_lower_irq(s);
+ }
+ s->rregs[ESP_REGS + NCR_PSTAT] = v;
+}
+
void esp_dma_enable(void *opaque, int level)
{
ESPState *s = (ESPState*)opaque;
s->current_req = scsiesp_req_new(current_lun, 0, lun, buf, s);
datalen = scsiesp_req_enqueue(s->current_req);
s->ti_size = datalen;
- if (datalen != 0) {
+ if (datalen != 0) {
s->rregs[ESP_RSTAT] = 0;
if (s->dma) {
s->rregs[ESP_RSTAT] = STAT_TC;
s->dma_pending = 0;
s->async_len = 0;
s->status = status;
- s->rregs[ESP_RSTAT] = STAT_ST;
+ fas408_check(s);
+ s->rregs[ESP_RSTAT] = STAT_ST;
esp_dma_done(s);
if (s->current_req) {
scsiesp_req_unref(s->current_req);
s->fifo_on = 1;
+ fas408_check(s);
+
if (s->dma && !s->dma_enabled) {
s->dma_cb = handle_ti;
return 1;
s->dma = 0;
s->do_cmd = 0;
s->dma_cb = NULL;
-
+ s->fas408_buffer_offset = 0;
+ s->fas408_buffer_size = 0;
s->rregs[ESP_CFG1] = 7;
}
}
}
+uint64_t fas408_read_fifo(void *opaque)
+{
+ ESPState *s = (ESPState*)opaque;
+ s->rregs[ESP_FIFO] = 0;
+ if (s->fas4xxextra && (s->wregs[ESP_REGS + NCR_PSTAT] & NCRPSTAT_PIOM) && (s->fas408_buffer_size > 0 || s->fas408_buffer_offset > 0 || (s->rregs[ESP_RSTAT] & STAT_PIO_MASK) == STAT_DO)) {
+ bool refill = true;
+ if (s->ti_size > 128) {
+ s->rregs[ESP_FIFO] = s->async_buf[s->ti_rptr++];
+ s->ti_size--;
+ } else if (!s->fas408_buffer_size) {
+ if (s->ti_size) {
+ memcpy(s->fas408_buffer, &s->async_buf[s->ti_rptr], s->ti_size);
+ s->fas408_buffer_offset = 0;
+ s->fas408_buffer_size = s->ti_size;
+ s->ti_size = 0;
+ if (s->current_req) {
+ scsiesp_req_continue(s->current_req);
+ }
+ s->ti_rptr = 0;
+ s->ti_wptr = 0;
+ s->pio_on = 0;
+ s->fifo_on = 0;
+ s->rregs[ESP_FIFO] = s->fas408_buffer[s->fas408_buffer_offset++];
+ }
+ } else {
+ s->rregs[ESP_FIFO] = s->fas408_buffer[s->fas408_buffer_offset++];
+ if (s->fas408_buffer_offset >= s->fas408_buffer_size) {
+ s->fas408_buffer_offset = s->fas408_buffer_size = 0;
+ }
+ }
+ fas408_check(s);
+ return s->rregs[ESP_FIFO];
+ }
+ return 0;
+}
+
uint64_t esp_reg_read(void *opaque, uint32_t saddr)
{
ESPState *s = (ESPState*)opaque;
uint32_t old_val;
+ if (s->fas4xxextra && (s->wregs[0x0d] & 0x80)) {
+ saddr += ESP_REGS;
+ }
+
switch (saddr) {
case ESP_FIFO:
if (s->fifo_on) {
}
case ESP_RES4:
return 0x80 | 0x20 | 0x2;
- default:
- //write_log("read unknown 53c94 register %02x\n", saddr);
+
+ // FAS408
+ case ESP_REGS + NCR_PIOFIFO:
+ return fas408_read_fifo(opaque);
+ case ESP_REGS + NCR_PSTAT:
+ fas408_check(s);
+ return s->rregs[ESP_REGS + NCR_PSTAT];
+ case ESP_REGS + NCR_SIGNTR:
+ s->fas408sig ^= 7;
+ return 0x58 | s->fas408sig;
+
+ default:
+#if ESPLOG
+ write_log("read unknown 53c94 register %02x\n", saddr);
+#endif
break;
}
return s->rregs[saddr];
}
+
+void fas408_write_fifo(void *opaque, uint64_t val)
+{
+ ESPState *s = (ESPState*)opaque;
+ if (!s->fas4xxextra)
+ return;
+ s->fas408_buffer_offset = 0;
+ if (s->fas408_buffer_size < 128) {
+ s->fas408_buffer[s->fas408_buffer_size++] = (uint8_t)val;
+ }
+ fas408_check(s);
+ while ((s->wregs[ESP_REGS + NCR_PSTAT] & NCRPSTAT_PIOM) && s->ti_size < 0 && s->fas408_buffer_size > 0) {
+ s->async_buf[s->dma_pending++] = s->fas408_buffer[0];
+ s->fas408_buffer_size--;
+ if (s->fas408_buffer_size > 0) {
+ memmove(s->fas408_buffer, s->fas408_buffer + 1, s->fas408_buffer_size);
+ }
+ if (s->dma_pending == s->async_len) {
+ esp_fake_dma_done(opaque);
+ break;
+ }
+ }
+}
+
+
void esp_reg_write(void *opaque, uint32_t saddr, uint64_t val)
{
ESPState *s = (ESPState*)opaque;
+ if (s->fas4xxextra && (s->wregs[ESP_RES3] & 0x80)) {
+ saddr += ESP_REGS;
+ }
+
switch (saddr) {
case ESP_TCLO:
case ESP_TCMID:
case ESP_WSYNO:
break;
case ESP_CFG1:
- case ESP_CFG2: case ESP_CFG3:
- case ESP_RES3: case ESP_RES4:
+ case ESP_CFG2:
+ case ESP_CFG3:
+ case ESP_RES4:
s->rregs[saddr] = val;
break;
+ case ESP_RES3:
+ s->rregs[saddr] = val;
+ s->rregs[ESP_REGS + NCR_CFG5] = val;
+#if ESPLOG
+ write_log("ESP_RES3 = %02x\n", (uint8_t)val);
+#endif
+ break;
case ESP_WCCF:
case ESP_WTEST:
break;
- default:
+
+ // FAS408
+ case ESP_REGS + NCR_PIOFIFO:
+ fas408_write_fifo(opaque, val);
+ break;
+ case ESP_REGS + NCR_PSTAT: // RW - PIO Status Register
+ s->rregs[ESP_REGS + NCR_PSTAT] = val;
+ fas408_check(s);
+#if ESPLOG
+ write_log("NCR_PSTAT = %02x\n", (uint8_t)val);
+#endif
+ break;
+ case ESP_REGS + NCR_PIOI: // RW - PIO Interrupt Enable
+ s->rregs[ESP_REGS + NCR_PIOI] = val;
+ fas408_check(s);
+#if ESPLOG
+ write_log("NCR_PIOI = %02x\n", (uint8_t)val);
+#endif
+ break;
+ case ESP_REGS + NCR_CFG5: // RW - Configuration #5
+ s->wregs[ESP_RES3] = val;
+ s->rregs[ESP_REGS + NCR_CFG5] = val;
+#if ESPLOG
+ write_log("NCR_CFG5 = %02x\n", (uint8_t)val);
+#endif
+ break;
+
+ default:
+#if ESPLOG
write_log("write unknown 53c94 register %02x\n", saddr);
- //activate_debugger();
+#endif
return;
}
s->wregs[saddr] = val;
type_init(esp_register_types)
#endif
-void esp_scsi_init(DeviceState *dev, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write)
+void esp_scsi_init(DeviceState *dev, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, bool fas4xxextra)
{
dev->lsistate = calloc(sizeof(ESPState), 1);
ESPState *s = ESP(dev);
s->dma_memory_read = read;
s->dma_memory_write = write;
+ s->fas4xxextra = fas4xxextra;
}
void esp_scsi_reset(DeviceState *dev, void *privdata)
typedef struct ESPState ESPState;
struct ESPState {
- uint8_t rregs[ESP_REGS];
- uint8_t wregs[ESP_REGS];
+ uint8_t rregs[ESP_REGS * 2];
+ uint8_t wregs[ESP_REGS * 2];
qemu_irq irq;
+ int irq_raised;
uint8_t chip_id;
int32_t ti_size;
uint32_t ti_rptr, ti_wptr;
ESPDMAMemoryReadWriteFunc dma_memory_write;
void *dma_opaque;
int (*dma_cb)(ESPState *s);
+ bool fas4xxextra;
+ int fas408sig;
+ uint8_t fas408_buffer[128+1];
+ int fas408_buffer_size;
+ int fas408_buffer_offset;
};
#define ESP_TCLO 0x0
#define TCHI_FAS100A 0x4
#define TCHI_AM53C974 0x12
+
+/*
+The following registers are only on the ESP406/FAS408. The
+documentation refers to them as "Control Register Set #1".
+These are the registers that are visible when bit 7 of
+register 0x0d is set. This bit is common to both register sets.
+*/
+
+#define NCR_JMP 0x00 /* RO - Jumper Sense Register */
+#define NCRJMP_RSVD 0xc0 /* reserved */
+#define NCRJMP_ROMSZ 0x20 /* ROM Size 1=16K, 0=32K */
+#define NCRJMP_J4 0x10 /* Jumper #4 */
+#define NCRJMP_J3 0x08 /* Jumper #3 */
+#define NCRJMP_J2 0x04 /* Jumper #2 */
+#define NCRJMP_J1 0x02 /* Jumper #1 */
+#define NCRJMP_J0 0x01 /* Jumper #0 */
+
+#define NCR_PIOFIFO 0x04 /* WO - PIO FIFO, 4 bytes deep */
+
+#define NCR_PSTAT 0x08 /* RW - PIO Status Register */
+#define NCRPSTAT_PERR 0x80 /* PIO Error */
+#define NCRPSTAT_SIRQ 0x40 /* Active High of SCSI IRQ */
+#define NCRPSTAT_ATAI 0x20 /* ATA IRQ */
+#define NCRPSTAT_FEMPT 0x10 /* PIO FIFO Empty */
+#define NCRPSTAT_F13 0x08 /* PIO FIFO 1/3 */
+#define NCRPSTAT_F23 0x04 /* PIO FIFO 2/3 */
+#define NCRPSTAT_FFULL 0x02 /* PIO FIFO Full */
+#define NCRPSTAT_PIOM 0x01 /* PIO/DMA Mode */
+
+#define NCR_PIOI 0x0b /* RW - PIO Interrupt Enable */
+#define NCRPIOI_RSVD 0xe0 /* reserved */
+#define NCRPIOI_EMPTY 0x10 /* IRQ When Empty */
+#define NCRPIOI_13 0x08 /* IRQ When 1/3 */
+#define NCRPIOI_23 0x04 /* IRQ When 2/3 */
+#define NCRPIOI_FULL 0x02 /* IRQ When Full */
+#define NCRPIOI_FINV 0x01 /* Flag Invert */
+
+#define NCR_CFG5 0x0d /* RW - Configuration #5 */
+#define NCRCFG5_CRS1 0x80 /* Select Register Set #1 */
+#define NCRCFG5_SRAM 0x40 /* SRAM Memory Map */
+#define NCRCFG5_AADDR 0x20 /* Auto Address */
+#define NCRCFG5_PTRINC 0x10 /* Pointer Increment */
+#define NCRCFG5_LOWPWR 0x08 /* Low Power Mode */
+#define NCRCFG5_SINT 0x04 /* SCSI Interrupt Enable */
+#define NCRCFG5_INTP 0x02 /* INT Polarity */
+#define NCRCFG5_AINT 0x01 /* ATA Interrupt Enable */
+
+#define NCR_SIGNTR 0x0e /* RO - Signature */
+
void esp_dma_enable(ESPState *s, int irq, int level);
void esp_request_cancelled(SCSIRequest *req);
void esp_command_complete(SCSIRequest *req, uint32_t status, size_t resid);
void esp_hard_reset(ESPState *s);
uint64_t esp_reg_read(ESPState *s, uint32_t saddr);
void esp_reg_write(ESPState *s, uint32_t saddr, uint64_t val);
+uint64_t fas408_read_fifo(void *opaque);
+void fas408_write_fifo(void *opaque, uint64_t val);
extern const VMStateDescription vmstate_esp;
extern void esp_irq_raise(qemu_irq);
void esp_request_cancelled(SCSIRequest *req);
void esp_command_complete(SCSIRequest *req, uint32_t status, size_t resid);
void esp_transfer_data(SCSIRequest *req, uint32_t len);
-void esp_scsi_init(DeviceState *dev, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write);
+void esp_scsi_init(DeviceState *dev, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, bool fas4xxextra);
void esp_scsi_reset(DeviceState *dev, void *privdata);
bool esp_dreq(DeviceState *dev);
return NULL;
}
-#define NEXT_ROM_ID 167
+#define NEXT_ROM_ID 169
#define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \
{ _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e },
{ _T("Blizzard 1230-II"), 0, 0, 0, 0, _T("B1230MKII\0"), 32768, 163, 0, 0, ROMTYPE_CB_B1230MK2, 0, 0, NULL,
0xf307cd34, 0xd2f0bfe5, 0x6e84e9f2, 0x2dc11583, 0x30702fd7, 0xd59584ee },
- { _T("Blizzard 1230-III"), 0, 0, 0, 0, _T("B1230MKIII\0"), 16384, 162, 0, 0, ROMTYPE_CB_B1230MK3, 0, 0, NULL,
- 0x6850607d, 0xfc37c96c, 0xfd22f442, 0xd7d64d21, 0x06683603, 0x2111fbae },
+ { _T("Blizzard 1230-III"), 0, 0, 0, 0, _T("B1230MKIII\0"), 32768, 162, 0, 0, ROMTYPE_CB_B1230MK3, 0, 0, NULL,
+ 0x8412a22c, 0x3a4c55f3, 0xdaf62084, 0xd947e418, 0x137db019, 0xf13efc7d },
{ _T("Blizzard 1230-IV"), 0, 0, 0, 0, _T("B1230MKIV\0"), 32768, 89, 0, 0, ROMTYPE_CB_BLIZ1230, 0, 0, NULL,
0x3078dbdc, 0x4d3e7fd0, 0xa1a4c3ae, 0xe17c5de3, 0xcbe1af03, 0x447aff92 },
{ _T("Blizzard 1240/1260"), 0, 0, 0, 0, _T("B1240\0B1260\0"), 32768, 90, 0, 0, ROMTYPE_CB_BLIZ1260, 0, 0, NULL,
0xf88ae0f1, 0xf69aca4b,0xb13e3389,0x04676f0c,0x8616f8db,0x074c313d },
- { _T("Blizzard 2060"), 8, 5, 8, 5, _T("B2060\0"), 65536, 92, 0, 0, ROMTYPE_CB_BLIZ2060, 0, 0, NULL,
- 0xce270bc0, 0xe043c1aa,0x3bb06e06,0xd4dabff3,0x0a8c6317,0xabfef2bb },
+
+ { _T("Blizzard 2060 v8.2"), 8, 2, 8, 2, _T("B2060\0"), 65536, 168, 0, 0, ROMTYPE_CB_BLIZ2060, 0, 0, NULL,
+ 0x2f42af81, 0x003577b8, 0x4e1f2e59, 0x3add6c9f, 0xfd65a7b4, 0x2abaa933 },
+ ALTROMPN(168, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0xb5892212, 0x7282a8ca, 0xf7ab194d, 0x16e1d05a, 0x582f0ebf, 0x1046b3d0)
+ ALTROMPN(168, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x821a01c0, 0x6fd29f69, 0x28c5980e, 0x313b3b15, 0xb5d683ac, 0x209dd1bf)
+ { _T("Blizzard 2060 v8.5"), 8, 5, 8, 5, _T("B2060\0"), 65536, 92, 0, 0, ROMTYPE_CB_BLIZ2060, 0, 0, NULL,
+ 0xce270bc0, 0xe043c1aa, 0x3bb06e06, 0xd4dabff3, 0x0a8c6317, 0xabfef2bb },
ALTROMPN(92, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0xa6023f20, 0xdfb048d6, 0xbdc03587, 0x241e8121, 0x26aba603, 0xd69b0238)
ALTROMPN(92, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x9635a9cd, 0x47578b27, 0xc4ba6e54, 0x891930dd, 0xcb4b6a45, 0x5d6b31b2)
+
+ { _T("Blizzard SCSI Kit III"), 1, 139, 1, 139, _T("BSCSIIII\0"), 65536, 167, 0, 0, ROMTYPE_BLIZKIT3, 0, 0, NULL,
+ 0xfd2c772f, 0x1411c248, 0x72f7cb8d, 0xecbe4744, 0xf0b8d12a, 0x1aaaad44, NULL, _T("blizzard_scsi_kit_iv.rom") },
{ _T("Blizzard SCSI Kit IV"), 8, 5, 8, 5, _T("BSCSIIV\0"), 32768, 94, 0, 0, ROMTYPE_BLIZKIT4, 0, 0, NULL,
0xf53a0fca, 0xefe17ca5,0x88c44a7f,0x0f8c62be,0x20f23278,0xcfe06727, NULL, _T("blizzard_scsi_kit_iv.rom") },
{ _T("Fastlane"), 8, 5, 8, 5, _T("FASTLANE\0"), 20788, 102, 0, 0, ROMTYPE_FASTLANE, 0, 0, NULL,
0xbfd68a88, 0x84a50880, 0x76917549, 0xadf33b16, 0x8a869adb, 0x9e5a6fac, NULL, NULL },
{ _T("IVS Vector 4.14"), 4, 14, 4, 14, _T("VECTOR030\0"), 65536, 166, 0, 0, ROMTYPE_CB_VECTOR, 0, 0, NULL,
0x3befa0c0, 0x4414673c, 0xa52f78a0, 0xae656824, 0xfd08b54f, 0xa1de237c, NULL, NULL },
- ALTROMPN(166, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0x541b5988, 0x3546517b, 0x57cecd2f, 0x9fbfcd0c, 0xf26fdbbf, 0xfb009e3e)
- ALTROMPN(166, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0xb64e3bbf, 0xd6f4fc81, 0x38325a78, 0x74ff1c15, 0x7c93f1a2, 0x444904ae)
+ ALTROMPN(166, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0xb64e3bbf, 0xd6f4fc81, 0x38325a78, 0x74ff1c15, 0x7c93f1a2, 0x444904ae)
+ ALTROMPN(166, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x541b5988, 0x3546517b, 0x57cecd2f, 0x9fbfcd0c, 0xf26fdbbf, 0xfb009e3e)
{ _T("Preferred Technologies Nexus"), 1, 0, 1, 0, _T("PTNEXUS\0"), 8192, 139, 0, 0, ROMTYPE_PTNEXUS, 0, 0, NULL,
0xf495879a, 0xa3bd0202, 0xe14aa5b6, 0x49d3ce88, 0x22975950, 0x6500dbc2, NULL, NULL },
ALTROMPN(146, 1, 2, 8192, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0xc88843cb, 0x3d7eb1b6, 0x8139b81b, 0x0665684c, 0x536ab3d0, 0x52a5dd9d)
{ _T("Apollo 500/2000"), 0, 0, 0, 0, _T("APOLLOHD\0"), 16384, 145, 0, 0, ROMTYPE_APOLLOHD, 0, 0, NULL,
0x931bad25, 0x24b4ee4c,0x129c7a93,0xf83ad570,0x66afd80c,0x4179f39c, NULL, NULL },
- { _T("Multi Evolution 500/200"), 3, 0, 3, 0, _T("MULTIEVOLUTION\0"), 65536, 156, 0, 0, ROMTYPE_MEVOLUTION, 0, 0, NULL,
+ { _T("Multi Evolution 500/2000"), 3, 0, 3, 0, _T("MULTIEVOLUTION\0"), 65536, 156, 0, 0, ROMTYPE_MEVOLUTION, 0, 0, NULL,
0xd13a2c89, 0xf9e38c4b,0xf5c6499d,0x486946ba,0x7b7636b8,0x0845265b, NULL, NULL },
ALTROMPN(156, 1, 1, 32768, ROMTYPE_ODD | ROMTYPE_8BIT, NULL, 0x339b3549, 0x74de857b, 0x42f9a8e0, 0xc1f3c29e, 0x06982622, 0x853d08fe)
ALTROMPN(156, 1, 2, 32768, ROMTYPE_EVEN | ROMTYPE_8BIT, NULL, 0x3aca5d1f, 0x786f2197, 0xc614be91, 0xae7e87da, 0xb42c3290, 0xd7997763)
}
static void copysense(struct scsi_data *sd)
{
+ bool sasi = sd->hfd && (sd->hfd->ci.unit_feature_level >= HD_LEVEL_SASI && sd->hfd->ci.unit_feature_level <= HD_LEVEL_SASI_ENHANCED);
int len = sd->cmd[4];
if (log_scsiemu)
write_log (_T("REQUEST SENSE length %d (%d)\n"), len, sd->sense_len);
- if (len == 0)
+ if (len == 0 || sasi)
len = 4;
memset(sd->buffer, 0, len);
- memcpy(sd->buffer, sd->sense, sd->sense_len > len ? len : sd->sense_len);
+ int tlen = sd->sense_len > len ? len : sd->sense_len;
+ memcpy(sd->buffer, sd->sense, tlen);
if (len > 7 && sd->sense_len > 7)
sd->buffer[7] = sd->sense_len - 8;
- if (sd->sense_len == 0)
+ if (sasi) {
+ sd->buffer[0] = sd->sense[12]; // 0 <- ASC
+ } else if (sd->sense_len == 0) {
sd->buffer[0] = 0x70;
+ }
showsense (sd);
- sd->data_len = len;
+ sd->data_len = tlen;
scsi_clear_sense(sd);
}
static void copyreply(struct scsi_data *sd)
int scsi_send_data(struct scsi_data *sd, uae_u8 b)
{
+ if (sd->offset < 0) {
+ write_log(_T("SCSI data offset is negative!\n"));
+ return 0;
+ }
if (sd->direction == 1) {
if (sd->offset >= sd->buffer_size) {
write_log (_T("SCSI data buffer overflow!\n"));
uae_u16 databuffer[2];
bool databuffer_empty;
- // kronos
+ // kronos/xebec
uae_u8 *databufferptr;
int databuffer_size;
int db_read_index;
return 0x80000 + (addr & 32767);
return -1;
}
-
-// if (addr >= 0x10000)
-// write_log(_T("XEBEC %08x PC=%08x\n"), addr, M68K_GETPC);
return -1;
}
{
if (addr == 0) {
tecmar_clock_reg_select = v & 63;
- }
- else if (addr == 1) {
+ } else if (addr == 1) {
tecmar_clock_regs[tecmar_clock_reg_select] = v;
tecmar_clock_regs[12] = 0x00;
tecmar_clock_regs[13] = 0x80;
uae_u8 v = 0;
if (addr == 0) {
v = tecmar_clock_reg_select;
- }
- else if (addr == 1) {
+ } else if (addr == 1) {
time_t t = time(0);
t += currprefs.cs_rtc_adjust;
struct tm *ct = localtime(&t);
if (reg >= 0 && reg < 8) {
v = ncr5380_bget(ncr, reg);
} else if (reg >= 0x80000) {
- v = ncr->databufferptr[reg & (ncr->databuffer_size - 1)];
+ int offset = reg & (ncr->databuffer_size - 1);
+ v = ncr->databufferptr[offset];
}
} else if (ncr->type == NONCR_MICROFORGE) {
if (reg >= 0 && reg < 8) {
ncr5380_bput(ncr, reg, val);
} else if (reg >= 0x80000) {
- ncr->databufferptr[reg & (ncr->databuffer_size - 1)] = val;
+ int offset = reg & (ncr->databuffer_size - 1);
+ ncr->databufferptr[offset] = val;
}
} else if (ncr->type == NONCR_MICROFORGE) {
aci->hardwired = true;
if (!aci->doinit) {
+ aci->zorro = 1;
aci->autoconfigp = ac;
return true;
}
bool microforge_init(struct autoconfig_info *aci)
{
+ aci->start = 0xef0000;
+ aci->size = 0x10000;
+ aci->zorro = 0;
if (!aci->doinit)
return true;
scsi->configured = 1;
- map_banks(scsi->bank, 0xef0000 >> 16, 0x10000 >> 16, 0);
- scsi->baseaddress = 0xef0000;
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
+ scsi->baseaddress = aci->start;
return true;
}
bool xebec_init(struct autoconfig_info *aci)
{
+ aci->start = 0x600000;
+ aci->size = 0x800000 - aci->start;
if (!aci->doinit)
return true;
scsi->configured = 1;
- map_banks(scsi->bank, 0x600000 >> 16, (0x800000 - 0x600000) >> 16, 0);
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
scsi->board_mask = 0x1fffff;
- scsi->baseaddress = 0x600000;
+ scsi->baseaddress = aci->start;
scsi->level6 = true;
scsi->intena = true;
scsi->dma_controller = true;
bool alf1_init(struct autoconfig_info *aci)
{
+ aci->start = 0xef0000;
+ aci->size = 0x10000;
if (!aci->doinit)
return true;
struct soft_scsi *scsi = getscsi(aci->rc);
if (!scsi)
return false;
- map_banks(scsi->bank, 0xef0000 >> 16, 0x10000 >> 16, 0);
- scsi->board_mask = 0xffff;
- scsi->baseaddress = 0xef0000;
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
+ scsi->board_mask = aci->size - 1;
+ scsi->baseaddress = aci->start;
scsi->configured = 1;
aci->addrbank = scsi->bank;
return true;
bool promigos_init(struct autoconfig_info *aci)
{
+ aci->start = 0xf40000;
+ aci->size = 0x10000;
if (!aci->doinit)
return true;
struct soft_scsi *scsi = getscsi(aci->rc);
if (!scsi)
return false;
- map_banks(scsi->bank, 0xf40000 >> 16, 0x10000 >> 16, 0);
- scsi->board_mask = 0xffff;
- scsi->baseaddress = 0xf40000;
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
+ scsi->board_mask = aci->size - 1;
+ scsi->baseaddress = aci->start;
scsi->configured = 1;
scsi->intena = true;
bool system2000_init(struct autoconfig_info *aci)
{
+ aci->start = 0xf00000;
+ aci->size = 0x10000;
+
if (!aci->doinit)
return true;
if (!scsi)
return false;
- map_banks(scsi->bank, 0xf00000 >> 16, 0x10000 >> 16, 0);
- scsi->board_mask = 0xffff;
- scsi->baseaddress = 0xf00000;
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
+ scsi->board_mask = aci->size - 1;
+ scsi->baseaddress = aci->start;
scsi->configured = 1;
if (!aci->rc->autoboot_disabled) {
load_rom_rc(aci->rc, ROMTYPE_SYSTEM2000, 16384, 0, scsi->rom, 16384, 0);
bool omtiadapter_init(struct autoconfig_info *aci)
{
+ aci->start = 0x8f0000;
+ aci->size = 0x10000;
+
if (!aci->doinit)
return true;
if (!scsi)
return false;
- map_banks(scsi->bank, 0x8f0000 >> 16, 0x10000 >> 16, 0);
- scsi->board_mask = 0xffff;
- scsi->baseaddress = 0x8f0000;
+ map_banks(scsi->bank, aci->start >> 16, aci->size >> 16, 0);
+ scsi->board_mask = aci->size - 1;
+ scsi->baseaddress = aci->start;
scsi->configured = 1;
aci->addrbank = scsi->bank;
return true;
static uae_u32 emulib_GetUaeConfig(TrapContext *ctx, uaecptr place)
{
trap_put_long(ctx, place, version);
- trap_put_long(ctx, place + 4, chipmem_bank.allocated);
- trap_put_long(ctx, place + 8, bogomem_bank.allocated);
- trap_put_long(ctx, place + 12, fastmem_bank[0].allocated);
+ trap_put_long(ctx, place + 4, chipmem_bank.allocated_size);
+ trap_put_long(ctx, place + 8, bogomem_bank.allocated_size);
+ trap_put_long(ctx, place + 12, fastmem_bank[0].allocated_size);
trap_put_long(ctx, place + 16, currprefs.gfx_framerate);
trap_put_long(ctx, place + 20, currprefs.produce_sound);
trap_put_long(ctx, place + 24, currprefs.jports[0].id | (currprefs.jports[1].id << 8));
#include "scsi.h"
#include "idecontrollers.h"
#include "gfxboard.h"
+#include "pci_hw.h"
#include "dosbox/dosbox.h"
#include "dosbox/mem.h"
#define TYPE_2286 3
#define TYPE_2386 4
-void x86_reset(void);
-int x86_execute(void);
-
void exec86(uint32_t execloops);
void reset86(int v20);
void intcall86(uint8_t intnum);
float dosbox_tick_vpos_cnt;
struct romconfig *rc;
int vgaboard;
+ const struct pci_board *ne2000_isa;
+ struct pci_board_state *ne2000_isa_board_state;
+ int ne2000_io;
+ int ne2000_irq;
};
static int x86_found;
set_pc_io_access(xb, portnum, true);
+ if (xb->ne2000_isa && portnum >= xb->ne2000_io && portnum < xb->ne2000_io + 32) {
+ xb->ne2000_isa->bars[0].bput(xb->ne2000_isa_board_state, portnum - xb->ne2000_io, v);
+ goto end;
+ }
+
switch(portnum)
{
case 0x20:
break;
}
+end:
#if X86_IO_PORT_DEBUG
write_log(_T("X86_OUT %08x %02X\n"), portnum, v);
#endif
}
void portout16(uint16_t portnum, uint16_t value)
{
+ struct x86_bridge *xb = bridges[0];
+
+ if (xb->ne2000_isa && portnum >= xb->ne2000_io && portnum < xb->ne2000_io + 32) {
+ xb->ne2000_isa->bars[0].wput(xb->ne2000_isa_board_state, portnum - xb->ne2000_io, value);
+ return;
+ }
+
switch (portnum)
{
case 0x170:
set_pc_io_access(xb, portnum, false);
uae_u8 v = xb->io_ports[portnum];
+
+ if (xb->ne2000_isa && portnum >= xb->ne2000_io && portnum < xb->ne2000_io + 32) {
+ v = xb->ne2000_isa->bars[0].bget(xb->ne2000_isa_board_state, portnum - xb->ne2000_io);
+ goto end;
+ }
+
switch (portnum)
{
case 0x20:
write_log(_T("X86_IN unknown %02x\n"), portnum);
return 0;
}
-
+
+end:
if (aio >= 0)
v = xb->amiga_io[aio];
}
uint16_t portin16(uint16_t portnum)
{
+ struct x86_bridge *xb = bridges[0];
uae_u16 v = 0;
+ if (xb->ne2000_isa && portnum >= xb->ne2000_io && portnum < xb->ne2000_io + 32) {
+ v = xb->ne2000_isa->bars[0].wget(xb->ne2000_isa_board_state, portnum - xb->ne2000_io);
+ return v;
+ }
switch (portnum)
{
case 0x170:
struct x86_bridge *xb = bridges[i];
if (!xb)
continue;
+ if (xb->ne2000_isa) {
+ xb->ne2000_isa->free(xb->ne2000_isa_board_state);
+ xb->ne2000_isa = NULL;
+ xfree(xb->ne2000_isa_board_state);
+ xb->ne2000_isa_board_state = NULL;
+ }
if (xb->dosbox_cpu) {
if (xb->cmosfile) {
uae_u8 *regs = x86_cmos_regs(NULL);
check_floppy_delay();
+ if (xb->ne2000_isa)
+ xb->ne2000_isa->hsync(xb->ne2000_isa_board_state);
+
if (!xb->x86_reset) {
if (xb->dosbox_cpu) {
xb->dosbox_tick_vpos_cnt++;
memcpy(xb->pc_ram + 0x100000 - xb->bios_size, xb->pc_rom + 0x100000 - xb->bios_size, xb->bios_size);
setrombank(xb, 0x100000 - xb->bios_size, xb->bios_size);
+ if (xb->ne2000_isa)
+ xb->ne2000_isa->reset(xb->ne2000_isa_board_state);
+
xb->amiga_io[IO_CONTROL_REGISTER] = 0xfe;
xb->amiga_io[IO_PC_INTERRUPT_CONTROL] = 0xff;
xb->amiga_io[IO_INTERRUPT_MASK] = 0xff;
return X86_STATE_ACTIVE;
}
+static void ne2000_isa_irq_callback(struct pci_board_state *pcibs, bool irq)
+{
+ struct x86_bridge *xb = bridges[0];
+ x86_doirq(xb->ne2000_irq);
+}
+
static void load_vga_bios(void)
{
struct x86_bridge *xb = bridges[0];
}
}
}
+
+ if (cfgfile_board_enabled(&currprefs, ROMTYPE_NE2KISA, 0)) {
+ struct romconfig *rc = get_device_romconfig(&currprefs, ROMTYPE_NE2KISA, 0);
+ if (rc) {
+ xb->ne2000_isa = &ne2000_pci_board;
+ xb->ne2000_isa_board_state = xcalloc(pci_board_state, 1);
+ xb->ne2000_isa_board_state->irq_callback = ne2000_isa_irq_callback;
+ switch (rc->device_settings & 7)
+ {
+ case 0:
+ xb->ne2000_io = 0x240;
+ break;
+ case 1:
+ xb->ne2000_io = 0x260;
+ break;
+ case 2:
+ xb->ne2000_io = 0x280;
+ break;
+ case 3:
+ xb->ne2000_io = 0x2a0;
+ break;
+ case 4:
+ default:
+ xb->ne2000_io = 0x300;
+ break;
+ case 5:
+ xb->ne2000_io = 0x320;
+ break;
+ case 6:
+ xb->ne2000_io = 0x340;
+ break;
+ case 7:
+ xb->ne2000_io = 0x360;
+ break;
+ }
+ switch ((rc->device_settings >> 3) & 15)
+ {
+ case 0:
+ xb->ne2000_irq = 3;
+ break;
+ case 1:
+ xb->ne2000_irq = 4;
+ break;
+ case 2:
+ xb->ne2000_irq = 5;
+ break;
+ case 3:
+ default:
+ xb->ne2000_irq = 7;
+ break;
+ case 4:
+ xb->ne2000_irq = 9;
+ break;
+ case 5:
+ xb->ne2000_irq = 10;
+ break;
+ case 6:
+ xb->ne2000_irq = 11;
+ break;
+ case 7:
+ xb->ne2000_irq = 12;
+ break;
+ case 8:
+ xb->ne2000_irq = 15;
+ break;
+ }
+ if (xb->ne2000_isa->init(xb->ne2000_isa_board_state)) {
+ write_log(_T("NE2000 ISA configured, IO=%3X, IRQ=%d\n"), xb->ne2000_io, xb->ne2000_irq);
+ } else {
+ xb->ne2000_isa = NULL;
+ xfree(xb->ne2000_isa_board_state);
+ xb->ne2000_isa_board_state = NULL;
+ }
+ }
+ }
+
xb->vgaboard = -1;
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
if (currprefs.rtgboards[i].rtgmem_type == GFXBOARD_VGA) {
if (!load_rom_rc(rc, romtype, xb->bios_size, 0, xb->pc_rom + 0x100000 - xb->bios_size, xb->bios_size, LOADROM_FILL)) {
error_log(_T("Bridgeboard BIOS failed to load"));
x86_bridge_free();
- return &expamem_null;
+ aci->addrbank = &expamem_null;
+ return false;
}
memcpy(xb->pc_ram + 0x100000 - xb->bios_size, xb->pc_rom + 0x100000 - xb->bios_size, xb->bios_size);
setrombank(xb, 0x100000 - xb->bios_size, xb->bios_size);
return x86_bridge_init(aci, ROMTYPE_A2386, TYPE_2386);
}
+bool isa_expansion_init(struct autoconfig_info *aci)
+{
+ static const int parent[] = { ROMTYPE_A1060, ROMTYPE_A2088, ROMTYPE_A2088T, ROMTYPE_A2286, ROMTYPE_A2386, 0 };
+ aci->parent_romtype = parent;
+ aci->zorro = 0;
+ return true;
+}
+
/* dosbox cpu core support stuff */
void IO_WriteB(Bitu port, Bitu val)
projects / francis / winuae.git / commitdiff