Prefetch bus error support: or, and, eor

diff --git a/gencpu.cpp b/gencpu.cpp
index db78d358e7609259f97d05bbe675a76dc3318d3d..8b943b8308d091313c922ed8aab76527f14a2749 100644 (file)
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -4171,24 +4171,43 @@ static void gen_opcode (unsigned int opcode)
        case i_AND:
        case i_EOR:
        {
-               // documentaion error: and.l #imm,dn = 2 idle, not 1 idle (same as OR and EOR)
+               // documentation error: and.l #imm,dn = 2 idle, not 1 idle (same as OR and EOR)
                int c = 0;
-               genamodedual (curi,
+               genamodedual(curi,
                        curi->smode, "srcreg", curi->size, "src", 1, 0,
                        curi->dmode, "dstreg", curi->size, "dst", 1, GF_RMW);
-//             genamode (curi, curi->smode, "srcreg", curi->size, "src", 1, 0, 0);
-//             genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_RMW);
-               printf ("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
-               genflags (flag_logical, curi->size, "src", "", "");
-               if (curi->dmode == Dreg && curi->size == sz_long) {
-                       c += 2;
-                       if (curi->smode == imm || curi->smode == Dreg)
+               printf("\tsrc %c= dst;\n", curi->mnemo == i_OR ? '|' : curi->mnemo == i_AND ? '&' : '^');
+               genflags(flag_logical, curi->size, "src", "", "");
+               if (curi->size == sz_long) {
+                       if (curi->dmode == Dreg) {
                                c += 2;
+                               if (curi->smode == imm || curi->smode == Dreg) {
+                                       c += 2;
+                                       fill_prefetch_next_after("\t\tccr_68000_long_move_ae_LZN(src);\n\t\treg_68000_long_replace_low(dstreg, src);\n");
+                               } else {
+                                       fill_prefetch_next_after("\t\treg_68000_long_replace_low(dstreg, src);\n");
+                               }
+                       } else {
+                               fill_prefetch_next_after("\t\tccr_68000_long_move_ae_LZN(src);\n");
+                       }
+                       if (c > 0)
+                               addcycles000(c);
+                       genastore_rev("src", curi->dmode, "dstreg", curi->size, "dst");
+               } else {
+                       if (curi->dmode == Dreg) {
+                               genastore_rev("src", curi->dmode, "dstreg", curi->size, "dst");
+                       }
+                       if ((curi->smode == imm || curi->smode == Dreg) && curi->dmode != Dreg) {
+                               fill_prefetch_next_after(NULL);
+                       } else {
+                               fill_prefetch_next();
+                       }
+                       if (c > 0)
+                               addcycles000(c);
+                       if (curi->dmode != Dreg) {
+                               genastore_rev("src", curi->dmode, "dstreg", curi->size, "dst");
+                       }
                }
-               fill_prefetch_next ();
-               if (c > 0)
-                       addcycles000 (c);
-               genastore_rev ("src", curi->dmode, "dstreg", curi->size, "dst");
                break;
        }
        // all SR/CCR modifications does full prefetch

diff --git a/include/newcpu.h b/include/newcpu.h
index 8b624501af0007ad73fe8ff4e5a0cb5e841b31d3..47cd11b1f7009598ea2e61a80d2f116aaeb14ace 100644 (file)
--- a/include/newcpu.h
+++ b/include/newcpu.h
@@ -702,6 +702,7 @@ void ccr_68000_long_move_ae_LN(uae_s32 src);
 void ccr_68000_long_move_ae_HNZ(uae_s32 src);
 void ccr_68000_long_move_ae_normal(uae_s32 src);
 void ccr_68000_word_move_ae_normal(uae_s16 src);
+void reg_68000_long_replace_low(int reg, uae_u16 v);
 
 extern void mmu_op (uae_u32, uae_u32);
 extern bool mmu_op30 (uaecptr, uae_u32, uae_u16, uaecptr);

diff --git a/newcpu_common.cpp b/newcpu_common.cpp
index 5fae5479588a6e2d4a121a9ac2e5677fcccd9dc9..0a10a80dea07043b128bba7352f46830ebea13b8 100644 (file)
--- a/newcpu_common.cpp
+++ b/newcpu_common.cpp
@@ -1618,6 +1618,11 @@ void ccr_68000_word_move_ae_normal(uae_s16 src)
        SET_NFLG(src < 0);
 }
 
+void reg_68000_long_replace_low(int reg, uae_u16 v)
+{
+       m68k_dreg(regs, reg) = (m68k_dreg(regs, reg) & 0xffff0000) | v;
+}
+
 // Change F-line to privilege violation if missing co-pro
 bool privileged_copro_instruction(uae_u16 opcode)
 {