static uae_u32 REGPARAM2 uae_puts (TrapContext *ctx)
{
- puts ((char*)get_real_address(trap_get_areg(ctx, 0)));
+ uae_char buf[MAX_DPATH];
+ trap_get_string(ctx, buf, trap_get_areg(ctx, 0), sizeof uae_char);
+ TCHAR *s = au(buf);
+ write_log(_T("%s"), s);
+ xfree(s);
return 0;
}
tape_free (st->tape);
st->tape = NULL;
}
-#ifdef RETROPLATFORM
- rp_cd_device_enable (unitnum, false);
-#endif
sys_command_close_internal (unitnum);
}
int v;
if (state[unitnum].device_func->pause == NULL) {
int as = audiostatus (unitnum);
- uae_u8 cmd[10] = {0x4b,0,0,0,0,0,0,0,paused?0:1,0};
+ uae_u8 cmd[10] = {0x4b,0,0,0,0,0,0,0,(uae_u8)(paused?0:1),0};
do_scsi (unitnum, cmd, sizeof cmd);
v = as == AUDIO_STATUS_PAUSED;
} else {
if (!getsem (unitnum))
return 0;
if (state[unitnum].device_func->read == NULL) {
- uae_u8 cmd1[12] = { 0x28, 0, block >> 24, block >> 16, block >> 8, block >> 0, 0, size >> 8, size >> 0, 0, 0, 0 };
+ uae_u8 cmd1[12] = { 0x28, 0, (uae_u8)(block >> 24), (uae_u8)(block >> 16), (uae_u8)(block >> 8), (uae_u8)(block >> 0), 0, (uae_u8)(size >> 8), (uae_u8)(size >> 0), 0, 0, 0 };
v = do_scsi (unitnum, cmd1, sizeof cmd1, data, size * 2048);
#if 0
if (!v) {
if (!getsem (unitnum))
return 0;
if (state[unitnum].device_func->rawread == NULL) {
- uae_u8 cmd[12] = { 0xbe, 0, block >> 24, block >> 16, block >> 8, block >> 0, size >> 16, size >> 8, size >> 0, 0x10, 0, 0 };
+ uae_u8 cmd[12] = { 0xbe, 0, (uae_u8)(block >> 24), (uae_u8)(block >> 16), (uae_u8)(block >> 8), (uae_u8)(block >> 0), (uae_u8)(size >> 16), (uae_u8)(size >> 8), (uae_u8)(size >> 0), 0x10, 0, 0 };
v = do_scsi (unitnum, cmd, sizeof cmd, data, size * sectorsize);
} else {
v = state[unitnum].device_func->rawread (unitnum, data, block, size, sectorsize, 0xffffffff);
if (!getsem (unitnum))
return 0;
if (state[unitnum].device_func->rawread == NULL) {
- uae_u8 cmd[12] = { 0xbe, 0, block >> 24, block >> 16, block >> 8, block >> 0, size >> 16, size >> 8, size >> 0, 0x10, 0, 0 };
+ uae_u8 cmd[12] = { 0xbe, 0, (uae_u8)(block >> 24), (uae_u8)(block >> 16), (uae_u8)(block >> 8), (uae_u8)(block >> 0), (uae_u8)(size >> 16), (uae_u8)(size >> 8), (uae_u8)(size >> 0), 0x10, 0, 0 };
v = do_scsi (unitnum, cmd, sizeof cmd, data, size * sectorsize);
} else {
v = state[unitnum].device_func->rawread (unitnum, data, block, size, sectorsize, (sectortype << 16) | (scsicmd9 << 8) | subs);
if (!getsem (unitnum))
return 0;
if (state[unitnum].device_func->read == NULL) {
- uae_u8 cmd[12] = { 0xa8, 0, 0, 0, 0, 0, size >> 24, size >> 16, size >> 8, size >> 0, 0, 0 };
+ uae_u8 cmd[12] = { 0xa8, 0, 0, 0, 0, 0, (uae_u8)(size >> 24), (uae_u8)(size >> 16), (uae_u8)(size >> 8), (uae_u8)(size >> 0), 0, 0 };
cmd[2] = (uae_u8)(block >> 24);
cmd[3] = (uae_u8)(block >> 16);
cmd[4] = (uae_u8)(block >> 8);
sb->dtablesize = DEFAULT_DTABLE_SIZE;
/* @@@ check malloc() result */
- sb->dtable = (SOCKET*)malloc (sb->dtablesize * sizeof (*sb->dtable));
- sb->ftable = (int*)malloc (sb->dtablesize * sizeof (*sb->ftable));
+ sb->dtable = xmalloc(SOCKET, sb->dtablesize);
+ sb->ftable = xcalloc(int, sb->dtablesize);
for (i = sb->dtablesize; i--;)
- sb->dtable[i] = -1;
+ sb->dtable[i] = INVALID_SOCKET;
sb->eintrsigs = 0x1000; /* SIGBREAKF_CTRL_C */
if (newdtable == NULL || newftable == NULL || newmtable == NULL) {
sb->resultval = -1;
bsdsocklib_seterrno(ctx, sb, ENOMEM);
- free (newdtable);
- free (newftable);
- free (newmtable);
+ xfree(newdtable);
+ xfree(newftable);
+ xfree(newmtable);
return -1;
}
newdtable[i] = -1;
sb->dtablesize = newSize;
- free(sb->dtable);
- free(sb->ftable);
- free(sb->mtable);
+ xfree(sb->dtable);
+ xfree(sb->ftable);
+ xfree(sb->mtable);
sb->dtable = (SOCKET*)newdtable;
sb->ftable = newftable;
sb->mtable = newmtable;
#include "threaddep/thread.h"
#include "uae.h"
#include "custom.h"
+#include "rommgr.h"
+
+#if CDTVCR_4510_EMULATION
+static void init_65c02(void);
+static void cpu_4510(void);
+#endif
#define CDTVCR_MASK 0xffff
if (!currprefs.cs_cdtvcr)
return;
+#if CDTVCR_4510_EMULATION
+ for (int i = 0; i < 10; i++) {
+ cpu_4510();
+ }
+#endif
+
if (cdtvcr_wait_sectors > 0 && currprefs.cd_speed == 0) {
cdtvcr_wait_sectors = 0;
cdtvcr_cmd_done();
cdtvcr_battram_reset();
cdtvcr_clock[0] = 0xe3;
cdtvcr_clock[1] = 0x1b;
+
+#if CDTVCR_4510_EMULATION
+ init_65c02();
+#endif
}
void cdtvcr_free(void)
{
}
+#define CYCLE_EXACT_ALARM
+
#define INTERRUPT_DELAY 2
#define INTRRUPT_MAX_DMA_PER_OPCODE (7+10000)
BYTE z;
} R65C02_regs_t;
-#define DRIVE_RAM_SIZE 32768
+#define DRIVE_RAM_SIZE 65536
typedef BYTE drive_read_func_t(struct drive_context_s *, WORD);
typedef void drive_store_func_t(struct drive_context_s *, WORD,
#define STORE_ZERO(a, b) (drv->cpud->store_func[0](drv, (WORD)(a), \
(BYTE)(b)))
-#define JUMP(addr) \
+#define JUMP(addr) reg_pc = (unsigned int)(addr);
#define P_SIGN 0x80
#define P_OVERFLOW 0x40
return context->next_pending_alarm_clk;
}
+static struct drive_context_s m_4510_context;
+static struct drivecpu_context_s m_4510_cpu_context;
+static struct drivecpud_context_s m_4510_cpud_context;
+static CLOCK m_4510_clk;
+static struct alarm_context_s m_4510_alarm_context;
+static struct interrupt_cpu_status_s m_4510_interrupt;
+
static void cpu_4510(void)
{
int cpu_type = CPU_R65C02;
- drivecpu_context_t *cpu = NULL;
- drive_context_t *drv = NULL;
+ drivecpu_context_t *cpu = &m_4510_cpu_context;
+ drive_context_t *drv = &m_4510_context;
#define reg_a (cpu->cpu_regs.a)
#define reg_x (cpu->cpu_regs.x)
#include "65c02core.cpp"
}
-static void init_65c02(struct drive_context_s *drv)
+BYTE read_4510(struct drive_context_s *c, WORD offset)
{
- drivecpu_context_t *cpu = drv->cpu;
+ if (offset >= 32768)
+ return c->cpud->drive_ram[offset];
+ return 0;
+}
+void write_4510(struct drive_context_s *c, WORD offset, BYTE v)
+{
+ if (offset >= 32768)
+ return;
+ c->cpud->drive_ram[offset] = v;
+}
+
+static void init_65c02(void)
+{
+ drive_context_s *d = &m_4510_context;
+ drivecpu_context_s *cpu = &m_4510_cpu_context;
+ drivecpud_context_s *cpud = &m_4510_cpud_context;
+
+ d->cpu = cpu;
+ d->cpud = cpud;
+ d->clk_ptr = &m_4510_clk;
cpu->rmw_flag = 0;
cpu->d_bank_limit = 0;
cpu->d_bank_start = 0;
cpu->pageone = NULL;
+ cpu->alarm_context = &m_4510_alarm_context;
+ cpu->int_status = &m_4510_interrupt;
+
+ cpu->int_status->global_pending_int = IK_RESET;
+
+ for(int i = 0; i < 256; i++) {
+ cpud->read_func[i] = read_4510;
+ cpud->store_func[i] = write_4510;
+ }
+
+ struct zfile *zf = read_rom_name(_T("d:\\amiga\\roms\\cdtv-cr-4510.bin"));
+ if (zf) {
+ zfile_fread(cpud->drive_ram + 32768, 1, 32768, zf);
+ zfile_fclose(zf);
+ }
}
#endif
if (!cr->inuse)
continue;
cr->index = i;
- _stprintf (tmp, _T("%f"), cr->rate);
+ if (cr->rate == 0)
+ _tcscpy(tmp, _T("0"));
+ else
+ _stprintf (tmp, _T("%f"), cr->rate);
TCHAR *s = tmp + _tcslen (tmp);
if (cr->label[0] > 0 && i < MAX_CHIPSET_REFRESH)
s += _stprintf (s, _T(",t=%s"), cr->label);
}
cfgfile_dwrite(f, _T("cpuboardmem1_size"), _T("%d"), p->cpuboardmem1_size / 0x100000);
cfgfile_dwrite(f, _T("cpuboardmem2_size"), _T("%d"), p->cpuboardmem2_size / 0x100000);
- cfgfile_write(f, _T("gfxcard_size"), _T("%d"), p->rtgmem_size / 0x100000);
- cfgfile_write_str(f, _T("gfxcard_type"), gfxboard_get_configname(p->rtgmem_type));
+ cfgfile_write(f, _T("gfxcard_size"), _T("%d"), p->rtgboards[0].rtgmem_size / 0x100000);
+ cfgfile_write_str(f, _T("gfxcard_type"), gfxboard_get_configname(p->rtgboards[0].rtgmem_type));
cfgfile_write_bool(f, _T("gfxcard_hardware_vblank"), p->rtg_hardwareinterrupt);
cfgfile_write_bool (f, _T("gfxcard_hardware_sprite"), p->rtg_hardwaresprite);
cfgfile_write (f, _T("chipmem_size"), _T("%d"), p->chipmem_size == 0x20000 ? -1 : (p->chipmem_size == 0x40000 ? 0 : p->chipmem_size / 0x80000));
|| cfgfile_intval (option, value, _T("megachipmem_size"), &p->z3chipmem_size, 0x100000)
|| cfgfile_intval (option, value, _T("z3mem_start"), &p->z3autoconfig_start, 1)
|| cfgfile_intval (option, value, _T("bogomem_size"), &p->bogomem_size, 0x40000)
- || cfgfile_intval (option, value, _T("gfxcard_size"), &p->rtgmem_size, 0x100000)
+ || cfgfile_intval (option, value, _T("gfxcard_size"), &p->rtgboards[0].rtgmem_size, 0x100000)
|| cfgfile_intval(option, value, _T("rtg_modes"), &p->picasso96_modeflags, 1)
|| cfgfile_intval (option, value, _T("floppy_speed"), &p->floppy_speed, 1)
|| cfgfile_intval (option, value, _T("cd_speed"), &p->cd_speed, 1)
return 1;
if (cfgfile_string(option, value, _T("gfxcard_type"), tmpbuf, sizeof tmpbuf / sizeof(TCHAR))) {
- p->rtgmem_type = 0;
+ p->rtgboards[0].rtgmem_type = 0;
i = 0;
for (;;) {
const TCHAR *t = gfxboard_get_configname(i);
- if (!t)
+ if (!t) {
break;
+ }
if (!_tcsicmp(t, tmpbuf)) {
- p->rtgmem_type = i;
+ p->rtgboards[0].rtgmem_type = i;
break;
}
i++;
break;
case 'U':
- p->rtgmem_size = _tstoi (arg) * 0x100000;
+ p->rtgboards[0].rtgmem_size = _tstoi (arg) * 0x100000;
break;
case 'F':
p->z3autoconfig_start = 0x10000000;
p->chipmem_size = 0x00080000;
p->bogomem_size = 0x00080000;
- p->rtgmem_size = 0x00000000;
- p->rtgmem_type = GFXBOARD_UAE_Z3;
+ p->rtgboards[0].rtgmem_size = 0x00000000;
+ p->rtgboards[0].rtgmem_type = GFXBOARD_UAE_Z3;
p->custom_memory_addrs[0] = 0;
p->custom_memory_sizes[0] = 0;
p->custom_memory_addrs[1] = 0;
p->z3fastmem_size = 0x00000000;
p->z3fastmem2_size = 0x00000000;
p->z3chipmem_size = 0x00000000;
- p->rtgmem_size = 0x00000000;
- p->rtgmem_type = GFXBOARD_UAE_Z3;
+ p->rtgboards[0].rtgmem_size = 0x00000000;
+ p->rtgboards[0].rtgmem_type = GFXBOARD_UAE_Z3;
p->cs_rtc = 0;
p->cs_a1000ram = false;
p->bogomem_size = 0;
p->chipmem_size = 0x400000;
p->z3fastmem_size = 8 * 1024 * 1024;
- p->rtgmem_size = 16 * 1024 * 1024;
+ p->rtgboards[0].rtgmem_size = 16 * 1024 * 1024;
p->cpu_model = 68040;
p->fpu_model = 68040;
p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
}
addr = end - 1;
}
- if (currprefs.rtgmem_size)
- memset (illghdebug + (gfxmem_bank.start >> 16), 3, currprefs.rtgmem_size >> 16);
+ if (currprefs.rtgboards[0].rtgmem_size)
+ memset (illghdebug + (gfxmem_bank.start >> 16), 3, currprefs.rtgboards[0].rtgmem_size >> 16);
i = 0;
while (custd[i].name) {
#endif /* FILESYS */
-// experimental hardware uae board
-
DECLARE_MEMORY_FUNCTIONS(uaeboard);
addrbank uaeboard_bank = {
uaeboard_lget, uaeboard_wget, uaeboard_bget,
expamem_write (0x24, 0x01); /* ser.no. Byte 3 */
/* er_InitDiagVec */
- expamem_write (0x28, 0x20); /* Rom-Offset hi */
+ expamem_write (0x28, 0x20); /* ROM-Offset hi */
expamem_write (0x2c, 0x00); /* ROM-Offset lo */
expamem_write (0x40, 0x00); /* Ctrl/Statusreg.*/
currprefs.fastmem2_size = changed_prefs.fastmem2_size;
currprefs.z3fastmem_size = changed_prefs.z3fastmem_size;
currprefs.z3fastmem2_size = changed_prefs.z3fastmem2_size;
- currprefs.rtgmem_size = changed_prefs.rtgmem_size;
- currprefs.rtgmem_type = changed_prefs.rtgmem_type;
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ memcpy(&currprefs.rtgboards[i], &changed_prefs.rtgboards[i], sizeof(struct rtgboardconfig));
+ }
currprefs.z3chipmem_size = changed_prefs.z3chipmem_size;
z3chipmem_bank.start = Z3BASE_UAE;
}
#ifdef PICASSO96
- if (gfxmem_bank.allocated != currprefs.rtgmem_size) {
+ struct rtgboardconfig *rbc = &currprefs.rtgboards[0];
+ if (gfxmem_bank.allocated != rbc->rtgmem_size) {
mapped_free (&gfxmem_bank);
- if (currprefs.rtgmem_type < GFXBOARD_HARDWARE)
- mapped_malloc_dynamic (&currprefs.rtgmem_size, &changed_prefs.rtgmem_size, &gfxmem_bank, 1, currprefs.rtgmem_type ? _T("z3_gfx") : _T("z2_gfx"));
+ if (rbc->rtgmem_type < GFXBOARD_HARDWARE)
+ mapped_malloc_dynamic (&rbc->rtgmem_size, &changed_prefs.rtgboards[0].rtgmem_size, &gfxmem_bank, 1, rbc->rtgmem_type ? _T("z3_gfx") : _T("z2_gfx"));
memory_hardreset (1);
}
#endif
#ifdef PICASSO96
if (gfxmem_bank.allocated > 0 && gfxmem_bank.start > 0) {
restore_ram (p96_filepos, gfxmem_bank.baseaddr);
- map_banks(&gfxmem_bank, gfxmem_bank.start >> 16, currprefs.rtgmem_size >> 16,
+ map_banks(&gfxmem_bank, gfxmem_bank.start >> 16, currprefs.rtgboards[0].rtgmem_size >> 16,
gfxmem_bank.allocated);
}
#endif
return b;
if (currprefs.input_tablet > 0)
return b;
- if (currprefs.rtgmem_size && currprefs.rtgmem_type < GFXBOARD_HARDWARE)
+ if (currprefs.rtgboards[0].rtgmem_size && currprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE)
return b;
if (currprefs.win32_automount_removable)
return b;
}
#endif
#ifdef PICASSO96
- if (currprefs.rtgmem_type == GFXBOARD_UAE_Z2 && gfxmem_bank.baseaddr != NULL) {
- cards[cardno].flags = 4;
- cards[cardno].name = _T("Z2RTG");
- cards[cardno].initnum = expamem_init_gfxcard_z2;
- cards[cardno++].map = expamem_map_gfxcard_z2;
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ struct rtgboardconfig *rbc = &currprefs.rtgboards[i];
+ if (rbc->rtgmem_size && rbc->rtgmem_type == GFXBOARD_UAE_Z2 && gfxmem_bank.baseaddr != NULL) {
+ cards[cardno].flags = 4;
+ cards[cardno].name = _T("Z2RTG");
+ cards[cardno].initnum = expamem_init_gfxcard_z2;
+ cards[cardno++].map = expamem_map_gfxcard_z2;
+ }
}
#endif
#ifdef GFXBOARD
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(currprefs.rtgmem_type) <= 2) {
- cards[cardno].flags = 4;
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
- cards[cardno].name = _T("Gfxboard A2410");
- cards[cardno++].initnum = tms_init;
- } else {
- cards[cardno].name = _T("Gfxboard VRAM Zorro II");
- cards[cardno++].initnum = gfxboard_init_memory;
- if (gfxboard_num_boards (currprefs.rtgmem_type) == 3) {
- cards[cardno].flags = 0;
- cards[cardno].name = _T("Gfxboard VRAM Zorro II Extra");
- cards[cardno++].initnum = gfxboard_init_memory_p4_z2;
- }
- if (gfxboard_is_registers (currprefs.rtgmem_type)) {
- cards[cardno].flags = 0;
- cards[cardno].name = _T ("Gfxboard Registers");
- cards[cardno++].initnum = gfxboard_init_registers;
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ struct rtgboardconfig *rbc = &currprefs.rtgboards[i];
+ if (rbc->rtgmem_size && rbc->rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(rbc) <= 2) {
+ cards[cardno].flags = 4;
+ if (rbc->rtgmem_type == GFXBOARD_A2410) {
+ cards[cardno].name = _T("Gfxboard A2410");
+ cards[cardno++].initnum = tms_init;
+ } else {
+ cards[cardno].name = _T("Gfxboard VRAM Zorro II");
+ cards[cardno++].initnum = gfxboard_init_memory;
+ if (gfxboard_num_boards (rbc) == 3) {
+ cards[cardno].flags = 0;
+ cards[cardno].name = _T("Gfxboard VRAM Zorro II Extra");
+ cards[cardno++].initnum = gfxboard_init_memory_p4_z2;
+ }
+ if (gfxboard_is_registers (rbc)) {
+ cards[cardno].flags = 0;
+ cards[cardno].name = _T ("Gfxboard Registers");
+ cards[cardno++].initnum = gfxboard_init_registers;
+ }
}
}
}
if (z3chipmem_bank.baseaddr != NULL)
map_banks_z3(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16);
#ifdef PICASSO96
- if (currprefs.rtgmem_type == GFXBOARD_UAE_Z3 && gfxmem_bank.baseaddr != NULL) {
+ if (currprefs.rtgboards[0].rtgmem_size && currprefs.rtgboards[0].rtgmem_type == GFXBOARD_UAE_Z3 && gfxmem_bank.baseaddr != NULL) {
cards[cardno].flags = 4 | 1;
cards[cardno].name = _T("Z3RTG");
cards[cardno].initnum = expamem_init_gfxcard_z3;
}
#endif
#ifdef GFXBOARD
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(currprefs.rtgmem_type) == 3) {
+ if (currprefs.rtgboards[0].rtgmem_size && currprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(&currprefs.rtgboards[0]) == 3) {
cards[cardno].flags = 4 | 1;
cards[cardno].name = _T ("Gfxboard VRAM Zorro III");
cards[cardno++].initnum = gfxboard_init_memory;
mapped_free (&z3chipmem_bank);
#ifdef PICASSO96
- if (currprefs.rtgmem_type < GFXBOARD_HARDWARE)
- mapped_free (&gfxmem_bank);
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ if (currprefs.rtgboards[i].rtgmem_type < GFXBOARD_HARDWARE)
+ mapped_free (&gfxmem_bank);
+ }
#endif
#ifdef FILESYS
void restore_pram (int len, size_t filepos)
{
p96_filepos = filepos;
- changed_prefs.rtgmem_size = len;
+ changed_prefs.rtgboards[0].rtgmem_size = len;
}
uae_u8 *save_expansion (int *len, uae_u8 *dstptr)
static uae_u32 a_uniq, key_uniq;
-
-static void readdpacket(TrapContext *ctx, dpacket *packet, uaecptr pck)
-{
- // Read enough to get also all 64-bit fields
- packet->packet_addr = pck;
- trap_get_bytes(ctx, packet->packet_data, pck, dp_Max);
-}
-static void writedpacket(TrapContext *ctx, dpacket *packet)
-{
- // 32 = saves both 32-bit and 64-bit RESx fields
- trap_put_bytes(ctx, packet->packet_data + 12, packet->packet_addr + 12, 32 - 12);
-}
-
-static void set_quadp(TrapContext *ctx, uaecptr p, uae_s64 v)
-{
- if (!trap_valid_address(ctx, p, 8))
- return;
- trap_put_long(ctx, p, v >> 32);
- trap_put_long(ctx, p + 4, (uae_u64)v);
-}
-static uae_u64 get_quadp(TrapContext *ctx, uaecptr p)
-{
- if (!trap_valid_address(ctx, p, 8))
- return 0;
- return ((uae_u64)trap_get_long(ctx, p) << 32) | trap_get_long(ctx, p + 4);
-}
-
#define PUT_PCK_RES1(p,v) do { put_long_host((p)->packet_data + dp_Res1, (v)); } while (0)
#define PUT_PCK_RES2(p,v) do { put_long_host((p)->packet_data + dp_Res2, (v)); } while (0)
#define GET_PCK_TYPE(p) ((uae_s32)(get_long_host((p)->packet_data + dp_Type)))
#define GET_PCK64_ARG4(p) ((uae_s32)(get_long_host((p)->packet_data + dp64_Arg4)))
#define GET_PCK64_ARG5(p) ( (((uae_s64)(get_long_host((p)->packet_data + dp64_Arg5))) << 32) | (((uae_s64)(get_long_host((p)->packet_data + dp64_Arg5 + 4))) << 0) )
+static void readdpacket(TrapContext *ctx, dpacket *packet, uaecptr pck)
+{
+ // Read enough to get also all 64-bit fields
+ packet->packet_addr = pck;
+ trap_get_bytes(ctx, packet->packet_data, pck, dp_Max);
+}
+static void writedpacket(TrapContext *ctx, dpacket *packet)
+{
+ int type = GET_PCK_TYPE(packet);
+ if (type >= 8000 && type < 9000 && GET_PCK64_RES0(packet) == DP64_INIT) {
+ // 64-bit RESx fields
+ trap_put_bytes(ctx, packet->packet_data + 12, packet->packet_addr + 12, 32 - 12);
+ } else {
+ // dp_Res1 and dp_Res2
+ trap_put_bytes(ctx, packet->packet_data + 12, packet->packet_addr + 12, 20 - 12);
+ }
+}
+
+static void set_quadp(TrapContext *ctx, uaecptr p, uae_s64 v)
+{
+ if (!trap_valid_address(ctx, p, 8))
+ return;
+ trap_put_quad(ctx, p, v);
+}
+static uae_u64 get_quadp(TrapContext *ctx, uaecptr p)
+{
+ if (!trap_valid_address(ctx, p, 8))
+ return 0;
+ return trap_get_quad(ctx, p);
+}
+
static int flush_cache (Unit *unit, int num);
static TCHAR *char1(TrapContext *ctx, uaecptr addr)
put_byte_host(buf + i, 0), i++;
xfree (x2);
}
- trap_put_bytes(ctx, buf, info, sizeof buf);
+ // Must not write Fib_reserved at the end.
+ if (kickstart_version >= 36) {
+ // FIB + fib_OwnerUID and fib_OwnerGID
+ trap_put_bytes(ctx, buf, info, (sizeof buf) - 32);
+ } else {
+ // FIB only
+ trap_put_bytes(ctx, buf, info, (sizeof buf) - 36);
+ }
PUT_PCK_RES1 (packet, DOS_TRUE);
}
hicyl = ((currprefs.filesys_limit * 1024) / 512) / (heads * 127);
} else {
struct fs_usage fsu;
- if (!get_fs_usage(uip->rootdir, 0, &fsu)) {
+ if (!get_fs_usage(uip[unit_no].rootdir, 0, &fsu)) {
for (;;) {
hicyl = (fsu.total / 512) / (heads * 127);
if (hicyl < 65536 || heads == 64)
uae_u32 romtype;
};
-#define ISP4() (currprefs.rtgmem_type == GFXBOARD_PICASSO4_Z2 || currprefs.rtgmem_type == GFXBOARD_PICASSO4_Z3)
+#define ISP4() (gb->rbc->rtgmem_type == GFXBOARD_PICASSO4_Z2 || gb->rbc->rtgmem_type == GFXBOARD_PICASSO4_Z3)
// Picasso II: 8* 4x256 (1M) or 16* 4x256 (2M)
// Piccolo: 8* 4x256 + 2* 16x256 (2M)
struct rtggfxboard
{
+ int rtg_index;
+ struct rtgboardconfig *rbc;
TCHAR memorybankname[40];
TCHAR wbsmemorybankname[40];
TCHAR lbsmemorybankname[40];
static void init_board (struct rtggfxboard *gb)
{
+ struct rtgboardconfig *rbc = &currprefs.rtgboards[gb->rtg_index];
+ gb->rbc = rbc;
int vramsize = gb->board->vrammax;
+
gb->vga_width = 0;
mapped_free(&gfxmem_bank);
gb->vram_start_offset = 0;
gb->vramrealstart = gb->vram;
gb->vram += gb->vram_start_offset;
gfxmem_bank.baseaddr = gb->vram;
- gfxmem_bank.allocated = currprefs.rtgmem_size;
- gb->vga.vga.vram_size_mb = currprefs.rtgmem_size >> 20;
+ gfxmem_bank.allocated = rbc->rtgmem_size;
+ gb->vga.vga.vram_size_mb = rbc->rtgmem_size >> 20;
gb->vgaioregion.opaque = &gb->vgaioregionptr;
gb->vgavramregion.opaque = &gb->vgavramregionptr;
gb->vga.vga.vram.opaque = &gb->vgavramregionptr;
vga_common_init(&gb->vga.vga);
cirrus_init_common(&gb->vga, gb->board->chiptype, 0, NULL, NULL, gb->board->manufacturer == 0);
- picasso_allocatewritewatch (currprefs.rtgmem_size);
+ picasso_allocatewritewatch (rbc->rtgmem_size);
}
static void vga_update_size(struct rtggfxboard *gb)
{
struct rtggfxboard *gb = &rtggfxboards[0];
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+ if (currprefs.rtgboards[gb->rtg_index].rtgmem_type == GFXBOARD_A2410) {
return tms_toggle(mode);
}
void gfxboard_hsync_handler(void)
{
struct rtggfxboard *gb = &rtggfxboards[0];
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+ if (gb->rbc->rtgmem_type == GFXBOARD_A2410) {
tms_hsync_handler();
}
}
struct rtggfxboard *gb = &rtggfxboards[0];
bool flushed = false;
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+ if (gb->rbc->rtgmem_type == GFXBOARD_A2410) {
return tms_vsync_handler();
}
struct rtggfxboard *gb = getgfxboard(addr);
addr -= gb->gfxboardmem_start & gfxmem_bank.mask;
addr &= gfxmem_bank.mask;
- return (addr + size) <= currprefs.rtgmem_size;
+ return (addr + size) <= gb->rbc->rtgmem_size;
}
static uae_u8 *REGPARAM2 gfxboard_xlate (uaecptr addr)
{
void gfxboard_free(void)
{
struct rtggfxboard *gb = &rtggfxboards[0];
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
- tms_free();
- return;
+ if (gb->rbc) {
+ if (gb->rbc->rtgmem_type == GFXBOARD_A2410) {
+ tms_free();
+ gb->rbc = NULL;
+ return;
+ }
}
if (gb->vram) {
gfxmem_bank.baseaddr = gb->vramrealstart;
void gfxboard_reset (void)
{
struct rtggfxboard *gb = &rtggfxboards[0];
- if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+ gb->rbc = &currprefs.rtgboards[gb->rtg_index];
+ if (gb->rbc->rtgmem_type == GFXBOARD_A2410) {
tms_reset();
return;
}
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
- gb->board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE];
- gfxmem_bank.mask = currprefs.rtgmem_size - 1;
+ if (gb->rbc->rtgmem_type >= GFXBOARD_HARDWARE) {
+ gb->board = &boards[gb->rbc->rtgmem_type - GFXBOARD_HARDWARE];
+ gfxmem_bank.mask = gb->rbc->rtgmem_size - 1;
}
gfxboard_free();
if (gb->board) {
return boards[type - GFXBOARD_HARDWARE].configname;
}
-int gfxboard_get_configtype(int type)
+int gfxboard_get_configtype(struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type == GFXBOARD_UAE_Z2)
return 2;
if (type == GFXBOARD_UAE_Z3)
return gb->board->configtype;
}
-bool gfxboard_need_byteswap (int type)
+bool gfxboard_need_byteswap (struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < GFXBOARD_HARDWARE)
return false;
struct rtggfxboard *gb = &rtggfxboards[0];
return gb->board->swap;
}
-int gfxboard_get_autoconfig_size(int type)
+int gfxboard_get_autoconfig_size(struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type == GFXBOARD_PICASSO4_Z3)
return 32 * 1024 * 1024;
return -1;
}
-int gfxboard_get_vram_min (int type)
+int gfxboard_get_vram_min (struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < GFXBOARD_HARDWARE)
return -1;
struct rtggfxboard *gb = &rtggfxboards[0];
return gb->board->vrammin;
}
-int gfxboard_get_vram_max (int type)
+int gfxboard_get_vram_max (struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < GFXBOARD_HARDWARE)
return -1;
struct rtggfxboard *gb = &rtggfxboards[0];
return gb->board->vrammax;
}
-bool gfxboard_is_registers (int type)
+bool gfxboard_is_registers (struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < 2)
return false;
struct rtggfxboard *gb = &rtggfxboards[0];
return gb->board->model_registers != 0;
}
-int gfxboard_num_boards (int type)
+int gfxboard_num_boards (struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < 2)
return 1;
struct rtggfxboard *gb = &rtggfxboards[0];
return 2;
}
-uae_u32 gfxboard_get_romtype(int type)
+uae_u32 gfxboard_get_romtype(struct rtgboardconfig *rbc)
{
+ int type = rbc->rtgmem_type;
if (type < 2)
return 0;
struct rtggfxboard *gb = &rtggfxboards[0];
gfxboard_bank_memory.bget = gfxboard_bget_mem_autoconfig;
gfxboard_bank_memory.bput = gfxboard_bput_mem_autoconfig;
- if (currprefs.rtgmem_type == GFXBOARD_VGA) {
+ if (gb->rbc->rtgmem_type == GFXBOARD_VGA) {
init_board(gb);
gb->configured_mem = 1;
gb->configured_regs = 1;
#define RTAREA_TRAPS 0x3000
#define RTAREA_RTG 0x3600
-#define RTAREA_TRAMPOLINE 0x3900
+#define RTAREA_TRAMPOLINE 0x390056
#define RTAREA_DATAREGION 0xF000
#define RTAREA_FSBOARD 0xFFEC
extern void gfxboard_reset (void);
extern bool gfxboard_vsync_handler (void);
extern void gfxboard_hsync_handler(void);
-extern int gfxboard_get_configtype (int);
-extern bool gfxboard_is_registers (int);
-extern int gfxboard_get_vram_min (int);
-extern int gfxboard_get_vram_max (int);
-extern bool gfxboard_need_byteswap (int type);
-extern int gfxboard_get_autoconfig_size(int type);
+extern int gfxboard_get_configtype (struct rtgboardconfig*);
+extern bool gfxboard_is_registers (struct rtgboardconfig*);
+extern int gfxboard_get_vram_min (struct rtgboardconfig*);
+extern int gfxboard_get_vram_max (struct rtgboardconfig*);
+extern bool gfxboard_need_byteswap (struct rtgboardconfig*);
+extern int gfxboard_get_autoconfig_size(struct rtgboardconfig*);
extern double gfxboard_get_vsync (void);
extern void gfxboard_refresh (void);
extern bool gfxboard_toggle (int mode);
-extern int gfxboard_num_boards (int type);
-extern uae_u32 gfxboard_get_romtype(int type);
+extern int gfxboard_num_boards (struct rtgboardconfig*);
+extern uae_u32 gfxboard_get_romtype(struct rtgboardconfig*);
extern const TCHAR *gfxboard_get_name(int);
-extern const TCHAR *gfxboard_get_manufacturername(int);
+extern const TCHAR *gfxboard_get_manufacturername(int);
extern const TCHAR *gfxboard_get_configname(int);
extern addrbank *tms_init(int devnum);
return get_mem_bank (addr).check(addr, size);
}
+STATIC_INLINE void put_quad_host(void *addr, uae_u64 v)
+{
+ do_put_mem_long((uae_u32*)addr, v >> 32);
+ do_put_mem_long(((uae_u32*)addr) + 1, (uae_u32)v);
+}
STATIC_INLINE void put_long_host(void *addr, uae_u32 v)
{
do_put_mem_long((uae_u32*)addr, v);
{
*((uae_u8*)addr) = v;
}
+STATIC_INLINE uae_u64 get_quad_host(void *addr)
+{
+ uae_u64 v = ((uae_u64)do_get_mem_long((uae_u32*)addr)) << 32;
+ v |= do_get_mem_long(((uae_u32*)addr) + 1);
+ return v;
+}
STATIC_INLINE uae_u32 get_long_host(void *addr)
{
return do_get_mem_long((uae_u32*)addr);
int device_num;
struct romconfig roms[MAX_BOARD_ROMS];
};
+#define MAX_RTG_BOARDS 4
+struct rtgboardconfig
+{
+ int rtgmem_type;
+ uae_u32 rtgmem_size;
+};
#define Z3MAPPING_AUTO 0
#define Z3MAPPING_UAE 1
uae_u32 mbresmem_low_size;
uae_u32 mbresmem_high_size;
uae_u32 mem25bit_size;
- uae_u32 rtgmem_size;
int cpuboard_type;
int cpuboard_subtype;
int cpuboard_settings;
int ppc_implementation;
bool rtg_hardwareinterrupt;
bool rtg_hardwaresprite;
- int rtgmem_type;
bool rtg_more_compatible;
+ struct rtgboardconfig rtgboards[MAX_RTG_BOARDS];
uae_u32 custom_memory_addrs[MAX_CUSTOM_MEMORY_ADDRS];
uae_u32 custom_memory_sizes[MAX_CUSTOM_MEMORY_ADDRS];
uae_u32 custom_memory_mask[MAX_CUSTOM_MEMORY_ADDRS];
#endif
int statecapturerate, statecapturebuffersize;
int aviout_width, aviout_height, aviout_xoffset, aviout_yoffset;
+ int screenshot_width, screenshot_height, screenshot_xoffset, screenshot_yoffset;
+ int screenshot_min_width, screenshot_min_height;
+ int screenshot_max_width, screenshot_max_height;
+ int screenshot_output_width, screenshot_output_height;
+ int screenshot_xmult, screenshot_ymult;
/* input */
void trap_set_dreg(TrapContext *ctx, int reg, uae_u32 v);
void trap_set_areg(TrapContext *ctx, int reg, uae_u32 v);
+void trap_put_quad(TrapContext *ctx, uaecptr addr, uae_u64 v);
void trap_put_long(TrapContext *ctx, uaecptr addr, uae_u32 v);
void trap_put_word(TrapContext *ctx, uaecptr addr, uae_u16 v);
void trap_put_byte(TrapContext *ctx, uaecptr addr, uae_u8 v);
+uae_u64 trap_get_quad(TrapContext *ctx, uaecptr addr);
uae_u32 trap_get_long(TrapContext *ctx, uaecptr addr);
uae_u16 trap_get_word(TrapContext *ctx, uaecptr addr);
uae_u8 trap_get_byte(TrapContext *ctx, uaecptr addr);
}
}
-#if 0
-void store_inputdevice_config (struct uae_prefs *p)
-{
- for (int i = 0; i < MAX_JPORTS; i++) {
- memcpy (&stored_ports[i], &p->jports[i], sizeof (struct jport));
- }
-}
-void restore_inputdevice_config (struct uae_prefs *p, int portnum)
-{
- memcpy (&p->jports[portnum], &stored_ports[portnum], sizeof (struct jport));
-}
-#endif
-
void inputdevice_joyport_config_store(struct uae_prefs *p, const TCHAR *value, int portnum, int mode, int type)
{
struct jport *jp = &p->jports[portnum];
} else {
_tcscpy(jp->idc.shortid, value);
}
- jp->mode = mode;
+ if (mode >= 0)
+ jp->mode = mode;
}
int inputdevice_joyport_config (struct uae_prefs *p, const TCHAR *value1, const TCHAR *value2, int portnum, int mode, int type, bool candefault)
}
}
- if (p->rtgmem_size > max_z3fastmem && p->rtgmem_type == GFXBOARD_UAE_Z3) {
- error_log (_T("Graphics card memory size %d (0x%x) larger than maximum reserved %d (0x%x)."), p->rtgmem_size, p->rtgmem_size, max_z3fastmem, max_z3fastmem);
- p->rtgmem_size = max_z3fastmem;
- err = 1;
- }
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ struct rtgboardconfig *rbc = &p->rtgboards[i];
+ if (rbc->rtgmem_size > max_z3fastmem && rbc->rtgmem_type == GFXBOARD_UAE_Z3) {
+ error_log (_T("Graphics card memory size %d (0x%x) larger than maximum reserved %d (0x%x)."), rbc->rtgmem_size, rbc->rtgmem_size, max_z3fastmem, max_z3fastmem);
+ rbc->rtgmem_size = max_z3fastmem;
+ err = 1;
+ }
- if ((p->rtgmem_size & (p->rtgmem_size - 1)) != 0 || (p->rtgmem_size != 0 && (p->rtgmem_size < 0x100000))) {
- error_log (_T("Unsupported graphics card memory size %d (0x%x)."), p->rtgmem_size, p->rtgmem_size);
- if (p->rtgmem_size > max_z3fastmem)
- p->rtgmem_size = max_z3fastmem;
- else
- p->rtgmem_size = 0;
- err = 1;
+ if ((rbc->rtgmem_size & (rbc->rtgmem_size - 1)) != 0 || (rbc->rtgmem_size != 0 && (rbc->rtgmem_size < 0x100000))) {
+ error_log (_T("Unsupported graphics card memory size %d (0x%x)."), rbc->rtgmem_size, rbc->rtgmem_size);
+ if (rbc->rtgmem_size > max_z3fastmem)
+ rbc->rtgmem_size = max_z3fastmem;
+ else
+ rbc->rtgmem_size = 0;
+ err = 1;
+ }
}
if (p->z3fastmem_size > max_z3fastmem) {
p->chipmem_size = 0x200000;
err = 1;
}
- if (p->chipmem_size > 0x200000 && p->rtgmem_size && gfxboard_get_configtype(p->rtgmem_type) == 2) {
- error_log(_T("You can't use Zorro II RTG and more than 2MB chip at the same time."));
- p->chipmem_size = 0x200000;
- err = 1;
- }
if (p->mem25bit_size > 128 * 1024 * 1024 || (p->mem25bit_size & 0xfffff)) {
p->mem25bit_size = 0;
error_log(_T("Unsupported 25bit RAM size"));
error_log (_T("Unsupported CPU Board RAM size."));
}
- if (p->rtgmem_type >= GFXBOARD_HARDWARE) {
- if (gfxboard_get_vram_min(p->rtgmem_type) > 0 && p->rtgmem_size < gfxboard_get_vram_min (p->rtgmem_type)) {
- error_log(_T("Graphics card memory size %d (0x%x) smaller than minimum hardware supported %d (0x%x)."),
- p->rtgmem_size, p->rtgmem_size, gfxboard_get_vram_min(p->rtgmem_type), gfxboard_get_vram_min(p->rtgmem_type));
- p->rtgmem_size = gfxboard_get_vram_min (p->rtgmem_type);
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ struct rtgboardconfig *rbc = &p->rtgboards[i];
+ if (p->chipmem_size > 0x200000 && rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 2) {
+ error_log(_T("You can't use Zorro II RTG and more than 2MB chip at the same time."));
+ p->chipmem_size = 0x200000;
+ err = 1;
}
- if (p->address_space_24 && gfxboard_get_configtype(p->rtgmem_type) == 3) {
- p->rtgmem_type = GFXBOARD_UAE_Z2;
- p->rtgmem_size = 0;
- error_log (_T("Z3 RTG and 24-bit address space are not compatible."));
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE) {
+ if (gfxboard_get_vram_min(rbc) > 0 && rbc->rtgmem_size < gfxboard_get_vram_min (rbc)) {
+ error_log(_T("Graphics card memory size %d (0x%x) smaller than minimum hardware supported %d (0x%x)."),
+ rbc->rtgmem_size, rbc->rtgmem_size, gfxboard_get_vram_min(rbc), gfxboard_get_vram_min(rbc));
+ rbc->rtgmem_size = gfxboard_get_vram_min (rbc);
+ }
+ if (p->address_space_24 && gfxboard_get_configtype(rbc) == 3) {
+ rbc->rtgmem_type = GFXBOARD_UAE_Z2;
+ rbc->rtgmem_size = 0;
+ error_log (_T("Z3 RTG and 24-bit address space are not compatible."));
+ }
+ if (gfxboard_get_vram_max(rbc) > 0 && rbc->rtgmem_size > gfxboard_get_vram_max(rbc)) {
+ error_log(_T("Graphics card memory size %d (0x%x) larger than maximum hardware supported %d (0x%x)."),
+ rbc->rtgmem_size, rbc->rtgmem_size, gfxboard_get_vram_max(rbc), gfxboard_get_vram_max(rbc));
+ rbc->rtgmem_size = gfxboard_get_vram_max(rbc);
+ }
}
- if (gfxboard_get_vram_max(p->rtgmem_type) > 0 && p->rtgmem_size > gfxboard_get_vram_max(p->rtgmem_type)) {
- error_log(_T("Graphics card memory size %d (0x%x) larger than maximum hardware supported %d (0x%x)."),
- p->rtgmem_size, p->rtgmem_size, gfxboard_get_vram_max(p->rtgmem_type), gfxboard_get_vram_max(p->rtgmem_type));
- p->rtgmem_size = gfxboard_get_vram_max(p->rtgmem_type);
+ if (p->address_space_24 && rbc->rtgmem_size && rbc->rtgmem_type == GFXBOARD_UAE_Z3) {
+ error_log (_T("Z3 RTG and 24bit address space are not compatible."));
+ rbc->rtgmem_type = GFXBOARD_UAE_Z2;
+ }
+ if (rbc->rtgmem_size && rbc->rtgmem_type == GFXBOARD_UAE_Z2 && (p->chipmem_size > 2 * 1024 * 1024 || getz2size (p) > 8 * 1024 * 1024 || getz2size (p) < 0)) {
+ rbc->rtgmem_size = 0;
+ error_log (_T("Too large Z2 RTG memory size."));
}
- }
- if (p->address_space_24 && p->rtgmem_size && p->rtgmem_type == GFXBOARD_UAE_Z3) {
- error_log (_T("Z3 RTG and 24bit address space are not compatible."));
- p->rtgmem_type = GFXBOARD_UAE_Z2;
- }
- if (p->rtgmem_type == GFXBOARD_UAE_Z2 && (p->chipmem_size > 2 * 1024 * 1024 || getz2size (p) > 8 * 1024 * 1024 || getz2size (p) < 0)) {
- p->rtgmem_size = 0;
- error_log (_T("Too large Z2 RTG memory size."));
}
if (p->cs_z3autoconfig && p->address_space_24) {
p->z3chipmem_size = 0;
err = 1;
}
- if ((p->rtgmem_size > 0 && p->rtgmem_type == GFXBOARD_UAE_Z3) && p->address_space_24) {
- error_log (_T("UAEGFX RTG can't be used if address space is 24-bit."));
- p->rtgmem_size = 0;
- err = 1;
+ for (int i = 0; i < MAX_RTG_BOARDS; i++) {
+ if ((p->rtgboards[i].rtgmem_size > 0 && p->rtgboards[i].rtgmem_type == GFXBOARD_UAE_Z3) && p->address_space_24) {
+ error_log (_T("UAEGFX RTG can't be used if address space is 24-bit."));
+ p->rtgboards[i].rtgmem_size = 0;
+ err = 1;
+ }
}
#if !defined (BSDSOCKET)
{
ULONG start;
start = p->fastmem_size;
- if (p->rtgmem_size && gfxboard_get_configtype(p->rtgmem_type) == 2) {
- while (start & (p->rtgmem_size - 1) && start < 8 * 1024 * 1024)
+ if (p->rtgboards[0].rtgmem_size && gfxboard_get_configtype(&p->rtgboards[0]) == 2) {
+ while (start & (p->rtgboards[0].rtgmem_size - 1) && start < 8 * 1024 * 1024)
start += 1024 * 1024;
- if (start + p->rtgmem_size > 8 * 1024 * 1024)
+ if (start + p->rtgboards[0].rtgmem_size > 8 * 1024 * 1024)
return -1;
}
- start += p->rtgmem_size;
+ start += p->rtgboards[0].rtgmem_size;
return start;
}
{
ULONG start;
start = currprefs.fastmem_size;
- if (currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 2) {
+ if (currprefs.rtgboards[0].rtgmem_size && gfxboard_get_configtype(&currprefs.rtgboards[0]) == 2) {
if (!start)
start = 0x00200000;
- while (start & (currprefs.rtgmem_size - 1) && start < 4 * 1024 * 1024)
+ while (start & (currprefs.rtgboards[0].rtgmem_size - 1) && start < 4 * 1024 * 1024)
start += 1024 * 1024;
}
return start + 2 * 1024 * 1024;
tolongbcd (p + 3, msf);
}
-// write_log (_T("%6d %02x.%02x.%02x.%02x.%02x.%02x.%02x.%02x.%02x.%02x.%02x.%02x\n"),
-// pos, p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8], p[9], p[10], p[11]);
+#if 0
+ uae_u8 *s = buf + 4;
+ write_log(_T("CTRLADR:%02X TRK=%02X IDX=%02X MSF=%02X:%02X:%02X %02X:%02X:%02X\n"),
+ s[0], s[1], s[2],
+ s[3], s[4], s[5],
+ s[7], s[8], s[9]);
+#endif
+
return 1;
}
unsigned long nonblocking = 1;
int faketype;
- BSDTRACE((_T("socket(%s,%s,%d) -> "),af == AF_INET ? _T("AF_INET") : _T("AF_other"),type == SOCK_STREAM ? _T("SOCK_STREAM") : type == SOCK_DGRAM ? _T("SOCK_DGRAM ") : _T("SOCK_RAW"),protocol));
+ BSDTRACE((_T("socket(%s,%s,%d) -> "),
+ af == AF_INET ? _T("AF_INET") : _T("AF_other"),
+ type == SOCK_STREAM ? _T("SOCK_STREAM") : type == SOCK_DGRAM ? _T("SOCK_DGRAM ") : _T("SOCK_RAW"),protocol));
faketype = type;
if (protocol == IPPROTO_UDP && type == SOCK_RAW && !rawsockets)
BSDTRACE((_T("send(%d,0x%x,%d,%d):%d -> "),sd,msg,len,flags,wscnt));
sd++;
- s = getsock(ctx, sb,sd);
+ s = getsock(ctx, sb, sd);
if (s != INVALID_SOCKET) {
if (!addr_valid (_T("host_sendto1"), msg, 4))
return;
realpt = (char*)get_real_address (msg);
+ if (ISBSDTRACE) {
+ write_log(_T("FT %08x "), sb->ftable[sd - 1]);
+ for (int i = 0; i < 28; i++) {
+ if (i > 0)
+ write_log(_T("."));
+ write_log(_T("%02X"), (uae_u8)realpt[i]);
+ }
+ write_log(_T(" -> "));
+ }
+
if (to) {
if (tolen > sizeof buf) {
write_log (_T("BSDSOCK: WARNING - Target address in sendto() too large (%d):%d!\n"), tolen,wscnt);
+ sb->resultval = -1;
+ bsdsocklib_seterrno(ctx, sb, 22); // EINVAL
+ goto error;
} else {
if (!addr_valid (_T("host_sendto2"), to, tolen))
return;
sb->ftable[sd-1]|= SF_RAW_RUDP;
} else {
write_log(_T("Unknown RAW protocol %d\n"), realpt[9]);
+ sb->resultval = -1;
+ bsdsocklib_seterrno(ctx, sb, 22); // EINVAL
+ goto error;
}
}
} else
sb->resultval = -1;
+error:
if (sb->resultval == -1)
BSDTRACE((_T("sendto failed (%d):%d\n"),sb->sb_errno,wscnt));
else
buf = xmalloc(uae_u8, (len + 3) & ~3);
trap_get_bytes(ctx, buf, data, (len + 3) & ~3);
-#if 1
+#if 0
FILE *f = fopen("clipboard.dat", "wb");
if (f) {
fwrite(buf, 1, len, f);
}
#endif
-
if (clipboard_debug)
debugwrite(ctx, _T("clipboard_a2p"), data, len);
if (!memcmp ("FORM", buf, 4)) {
static uae_u32 lowmem (void)
{
uae_u32 change = 0;
+ struct rtgboardconfig *rbc = &changed_prefs.rtgboards[0];
+ struct rtgboardconfig *crbc = &currprefs.rtgboards[0];
+
if (currprefs.z3fastmem_size + currprefs.z3fastmem2_size + currprefs.z3chipmem_size >= 8 * 1024 * 1024) {
if (currprefs.z3fastmem2_size) {
change = currprefs.z3fastmem2_size;
currprefs.z3fastmem_size /= 2;
changed_prefs.z3fastmem_size = currprefs.z3fastmem_size;
}
- } else if (currprefs.rtgmem_type == GFXBOARD_UAE_Z3 && currprefs.rtgmem_size >= 1 * 1024 * 1024) {
- change = currprefs.rtgmem_size - currprefs.rtgmem_size / 2;
- currprefs.rtgmem_size /= 2;
- changed_prefs.rtgmem_size = currprefs.rtgmem_size;
+ } else if (crbc->rtgmem_type == GFXBOARD_UAE_Z3 && crbc->rtgmem_size >= 1 * 1024 * 1024) {
+ change = crbc->rtgmem_size - crbc->rtgmem_size / 2;
+ crbc->rtgmem_size /= 2;
+ rbc->rtgmem_size = crbc->rtgmem_size;
}
if (currprefs.z3fastmem2_size < 128 * 1024 * 1024)
currprefs.z3fastmem2_size = changed_prefs.z3fastmem2_size = 0;
}
}
-static ULONG getz2rtgaddr (int rtgsize)
+static ULONG getz2rtgaddr(struct rtgboardconfig *rbc)
{
ULONG start;
start = changed_prefs.fastmem_size;
if (changed_prefs.fastmem2_size >= 524288)
start += changed_prefs.fastmem2_size;
- start += rtgsize - 1;
- start &= ~(rtgsize - 1);
- while (start & (changed_prefs.rtgmem_size - 1) && start < 4 * 1024 * 1024)
+ start += rbc->rtgmem_size - 1;
+ start &= ~(rbc->rtgmem_size - 1);
+ while (start & (rbc->rtgmem_size - 1) && start < 4 * 1024 * 1024)
start += 1024 * 1024;
return start + 2 * 1024 * 1024;
}
uae_u32 startbarrier, z3offset, align;
int rounds = 0;
uae_u32 z3rtgmem_size;
+ struct rtgboardconfig *rbc = &changed_prefs.rtgboards[0];
+ struct rtgboardconfig *crbc = &currprefs.rtgboards[0];
canbang = 1;
natmem_offset = natmem_reserved;
othersize = 0;
size = 0x1000000;
startbarrier = changed_prefs.mbresmem_high_size >= 128 * 1024 * 1024 ? (changed_prefs.mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024 : 0;
- z3rtgmem_size = gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3 ? changed_prefs.rtgmem_size : 0;
+ z3rtgmem_size = gfxboard_get_configtype(rbc) == 3 ? rbc->rtgmem_size : 0;
if (changed_prefs.cpu_model >= 68020)
size = 0x10000000;
z3size = ((changed_prefs.z3fastmem_size + align) & ~align) + ((changed_prefs.z3fastmem2_size + align) & ~align) + ((changed_prefs.z3chipmem_size + align) & ~align);
p96mem_size = z3rtgmem_size;
p96base_offset = 0;
uae_u32 z3rtgallocsize = 0;
- if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3) {
- z3rtgallocsize = gfxboard_get_autoconfig_size(changed_prefs.rtgmem_type) < 0 ? changed_prefs.rtgmem_size : gfxboard_get_autoconfig_size(changed_prefs.rtgmem_type);
+ if (rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 3) {
+ z3rtgallocsize = gfxboard_get_autoconfig_size(rbc) < 0 ? rbc->rtgmem_size : gfxboard_get_autoconfig_size(rbc);
if (changed_prefs.z3autoconfig_start == Z3BASE_UAE)
p96base_offset = natmemsize + startbarrier + z3offset;
else
p96base_offset = expansion_startaddress(natmemsize + startbarrier + z3offset, z3rtgallocsize);
- } else if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 2) {
- p96base_offset = getz2rtgaddr (changed_prefs.rtgmem_size);
- } else if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 1) {
+ } else if (rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 2) {
+ p96base_offset = getz2rtgaddr (rbc);
+ } else if (rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 1) {
p96base_offset = 0xa80000;
}
if (p96base_offset) {
p96mem_offset = natmem_offset + p96base_offset;
} else {
if (changed_prefs.cachesize) {
- currprefs.rtgmem_size = changed_prefs.rtgmem_size = 0;
- currprefs.rtgmem_type = changed_prefs.rtgmem_type = 0;
+ crbc->rtgmem_size = rbc->rtgmem_size = 0;
+ crbc->rtgmem_type = rbc->rtgmem_type = 0;
error_log(_T("RTG board is not anymore supported when JIT is enabled and RTG VRAM is located outside of NATMEM (Real Z3 mode under 32-bit Windows)."));
} else {
// calculate Z3 alignment (argh, I thought only Z2 needed this..)
addr = expansion_startaddress(addr, changed_prefs.z3fastmem2_size);
addr += changed_prefs.z3fastmem2_size;
addr = expansion_startaddress(addr, z3rtgallocsize);
- if (gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3) {
+ if (gfxboard_get_configtype(rbc) == 3) {
p96base_offset = addr;
write_log("NATMEM: p96base_offset = 0x%x\n", p96base_offset);
// adjust p96mem_offset to beginning of natmem
write_log(_T("NATMEM: Our special area: %p-%p (0x%08x %dM)\n"),
natmem_offset, (uae_u8*)natmem_offset + natmemsize,
natmemsize, natmemsize / (1024 * 1024));
- if (changed_prefs.rtgmem_size)
+ if (rbc->rtgmem_size)
write_log (_T("NATMEM: P96 special area: %p-%p (0x%08x %dM)\n"),
- p96mem_offset, (uae_u8*)p96mem_offset + changed_prefs.rtgmem_size,
- changed_prefs.rtgmem_size, changed_prefs.rtgmem_size >> 20);
+ p96mem_offset, (uae_u8*)p96mem_offset + rbc->rtgmem_size,
+ rbc->rtgmem_size, rbc->rtgmem_size >> 20);
canbang = jit_direct_compatible_memory ? 1 : 0;
if (p96mem_size)
natmem_offset_end = p96mem_offset + p96mem_size;
oz3fastmem_size == changed_prefs.z3fastmem_size &&
oz3fastmem2_size == changed_prefs.z3fastmem2_size &&
oz3chipmem_size == changed_prefs.z3chipmem_size &&
- ortgmem_size == changed_prefs.rtgmem_size &&
- ortgmem_type == changed_prefs.rtgmem_type)
+ ortgmem_size == changed_prefs.rtgboards[0].rtgmem_size &&
+ ortgmem_type == changed_prefs.rtgboards[0].rtgmem_type)
return false;
oz3fastmem_size = changed_prefs.z3fastmem_size;
oz3fastmem2_size = changed_prefs.z3fastmem2_size;
oz3chipmem_size = changed_prefs.z3chipmem_size;;
- ortgmem_size = changed_prefs.rtgmem_size;
- ortgmem_type = changed_prefs.rtgmem_type;
+ ortgmem_size = changed_prefs.rtgboards[0].rtgmem_size;
+ ortgmem_type = changed_prefs.rtgboards[0].rtgmem_type;
doinit_shm ();
#ifdef NATMEM_OFFSET
unsigned int size = shmids[shmid].size;
unsigned int readonlysize = size;
+ struct rtgboardconfig *rbc = &currprefs.rtgboards[0];
if (shmids[shmid].attached)
return shmids[shmid].attached;
shmaddr=natmem_offset + 0xec0000;
} else {
shmaddr=natmem_offset + 0x200000;
- if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
+ if (!(rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 3))
size += BARRIER;
}
} else if(!_tcscmp (shmids[shmid].name, _T("fast2"))) {
shmaddr=natmem_offset + 0x200000;
if (currprefs.fastmem_size >= 524288)
shmaddr=natmem_offset + 0x200000 + currprefs.fastmem_size;
- if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
+ if (!(rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 3))
size += BARRIER;
}
} else if(!_tcscmp (shmids[shmid].name, _T("fast2"))) {
shmaddr=natmem_offset + 0x200000;
got = true;
- if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
+ if (!(rbc->rtgmem_size && gfxboard_get_configtype(rbc) == 3))
size += BARRIER;
} else if(!_tcscmp (shmids[shmid].name, _T("z2_gfx"))) {
- ULONG start = getz2rtgaddr (size);
+ ULONG start = getz2rtgaddr(rbc);
got = true;
p96special = true;
shmaddr = natmem_offset + start;
gfxmem_bank.start = start;
- if (start + currprefs.rtgmem_size < 10 * 1024 * 1024)
+ if (start + rbc->rtgmem_size < 10 * 1024 * 1024)
size += BARRIER;
} else if(!_tcscmp (shmids[shmid].name, _T("ramsey_low"))) {
shmaddr=natmem_offset + a3000lmem_bank.start;
D3DLOCKED_RECT locked;
HRESULT hr;
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE)
+ if (currprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE)
return;
gfx_lock ();
setupcursor_needed = 1;
static bool rtg_render (void)
{
bool flushed = false;
- bool uaegfx = currprefs.rtgmem_type < GFXBOARD_HARDWARE;
+ bool uaegfx = currprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
if (doskip () && p96skipmode == 0) {
;
setupcursor();
rtg_clear();
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
+ if (currprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE) {
gfxboard_refresh ();
return;
}
int vsync = isvsync_rtg();
int mult;
bool rendered = false;
- bool uaegfx = currprefs.rtgmem_type < GFXBOARD_HARDWARE;
+ bool uaegfx = currprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
int state = picasso_state_change;
if (state & PICASSO_STATE_SETDAC) {
void picasso_handle_vsync(void)
{
- bool uaegfx = currprefs.rtgmem_type < GFXBOARD_HARDWARE;
+ bool uaegfx = currprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
- if (currprefs.rtgmem_size == 0)
+ if (currprefs.rtgboards[0].rtgmem_size == 0)
return;
if (!picasso_on && uaegfx) {
void picasso_handle_hsync(void)
{
- bool uaegfx = currprefs.rtgmem_type < GFXBOARD_HARDWARE;
+ bool uaegfx = currprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
- if (currprefs.rtgmem_size == 0)
+ if (currprefs.rtgboards[0].rtgmem_size == 0)
return;
int vsync = isvsync_rtg();
void picasso96_alloc (TrapContext *ctx)
{
- if (uaegfx_old || currprefs.rtgmem_type >= GFXBOARD_HARDWARE)
+ if (uaegfx_old || currprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE)
return;
uaegfx_resname = ds (_T("uaegfx.card"));
picasso96_alloc2 (ctx);
result = 1;
}
+ if (pattern.Size >= 16)
+ result = 0;
+
if(result) {
bool indirect = trap_is_indirect();
uae_u32 fgpen, bgpen;
set_gc_called = !!(flags & 2);
set_panning_called = !!(flags & 4);
interrupt_enabled = !!(flags & 32);
- changed_prefs.rtgmem_size = restore_u32 ();
+ changed_prefs.rtgboards[0].rtgmem_size = restore_u32 ();
picasso96_state.Address = restore_u32 ();
picasso96_state.RGBFormat = (RGBFTYPE)restore_u32 ();
picasso96_state.Width = restore_u16 ();
uae_u8 *dstbak, *dst;
int i;
- if (currprefs.rtgmem_size == 0)
+ if (currprefs.rtgboards[0].rtgmem_size == 0)
return NULL;
if (dstptr)
dstbak = dst = dstptr;
save_u32 (2);
save_u32 ((picasso_on ? 1 : 0) | (set_gc_called ? 2 : 0) | (set_panning_called ? 4 : 0) |
(hwsprite ? 8 : 0) | (cursorvisible ? 16 : 0) | (interrupt_enabled ? 32 : 0) | 64);
- save_u32 (currprefs.rtgmem_size);
+ save_u32 (currprefs.rtgboards[0].rtgmem_size);
save_u32 (picasso96_state.Address);
save_u32 (picasso96_state.RGBFormat);
save_u16 (picasso96_state.Width);
#define IDC_STATEREC_AUTOPLAY 1652
#define IDC_SOUNDFREQTXT 1653
#define IDC_PANEL_FRAME 1653
+#define IDC_SCREENSHOT_ORIGINALSIZE2 1653
+#define IDC_SCREENSHOT_CLIP 1653
#define IDC_SOUNDFILTERTXT 1654
#define IDC_PANEL_FRAME_OUTER 1654
#define IDC_SOUNDSTEREO 1655
CONTROL "Disable sound sync",IDC_AVIOUTPUT_NOSOUNDSYNC,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,210,85,171,10
CONTROL "AVI output enabled",IDC_AVIOUTPUT_ACTIVATED,"Button",BS_AUTORADIOBUTTON | BS_PUSHLIKE | BS_FLAT,15,100,144,14
GROUPBOX "Ripper",IDC_STATIC,1,126,393,53
- PUSHBUTTON "Save screenshot",IDC_SCREENSHOT,53,140,87,14
- PUSHBUTTON "Pro Wizard 1.62",IDC_PROWIZARD,245,140,87,14,WS_DISABLED
+ PUSHBUTTON "Save screenshot",IDC_SCREENSHOT,28,140,87,14
+ PUSHBUTTON "Pro Wizard 1.62",IDC_PROWIZARD,162,140,87,14,WS_DISABLED
CONTROL "Take screenshot before filtering",IDC_SCREENSHOT_ORIGINALSIZE,
- "Button",BS_AUTOCHECKBOX | WS_TABSTOP,54,161,162,10
- CONTROL "Sample ripper",IDC_SAMPLERIPPER_ACTIVATED,"Button",BS_AUTORADIOBUTTON | BS_PUSHLIKE | BS_FLAT,245,159,87,14
+ "Button",BS_AUTOCHECKBOX | WS_TABSTOP,11,163,144,10
+ CONTROL "Sample ripper",IDC_SAMPLERIPPER_ACTIVATED,"Button",BS_AUTORADIOBUTTON | BS_PUSHLIKE | BS_FLAT,280,140,87,14
GROUPBOX "Re-recorder",IDC_STATIC,1,182,393,70
CONTROL "Play recording",IDC_STATEREC_PLAY,"Button",BS_AUTORADIOBUTTON | BS_PUSHLIKE | BS_FLAT,53,194,87,14
CONTROL "Re-recording enabled",IDC_STATEREC_RECORD,"Button",BS_AUTORADIOBUTTON | BS_PUSHLIKE | BS_FLAT,214,194,118,14
COMBOBOX IDC_STATEREC_RATE,141,233,38,65,CBS_DROPDOWN | WS_VSCROLL | WS_TABSTOP
RTEXT "Recording buffers:",IDC_STATIC,195,235,91,10,SS_CENTERIMAGE | WS_TABSTOP
COMBOBOX IDC_STATEREC_BUFFERSIZE,291,233,38,65,CBS_DROPDOWN | WS_VSCROLL | WS_TABSTOP
+ CONTROL "Autoclip screenshot",IDC_SCREENSHOT_CLIP,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,161,163,144,10
END
IDD_INPUT DIALOGEX 0, 0, 396, 318
static int port_insert (int inputmap_port, int devicetype, DWORD flags, const TCHAR *name)
{
+ int ret = 0;
int devicetype2;
- write_log (L"port_insert %d '%s'\n", inputmap_port, name);
+ write_log (L"port%d_insert type=%d flags=%d '%s'\n", inputmap_port, devicetype, flags, name);
if (inputmap_port < 0 || inputmap_port >= maxjports)
return FALSE;
_stprintf (tmp2, _T("KeyboardLayout%d"), i);
if (!_tcscmp (tmp2, name)) {
_stprintf (tmp2, _T("kbd%d"), i + 1);
- return inputdevice_joyport_config (&changed_prefs, tmp2, NULL, inputmap_port, devicetype2, 0, true);
+ ret = inputdevice_joyport_config (&changed_prefs, tmp2, NULL, inputmap_port, devicetype2, 0, true);
+ return ret;
}
}
- return inputdevice_joyport_config (&changed_prefs, name, NULL, inputmap_port, devicetype2, 1, true);
+ ret = inputdevice_joyport_config (&changed_prefs, name, name, inputmap_port, devicetype2, 1, true);
+ return ret;
}
static int cd_insert (int num, const TCHAR *name)
return 0;
case WM_DROPFILES:
- dragdrop (hWnd, (HDROP)wParam, &changed_prefs, -1);
+ dragdrop (hWnd, (HDROP)wParam, &changed_prefs, -2);
return 0;
case WM_TIMER:
done:;
} else {
TCHAR tmp[MAX_DPATH];
- _tcscpy (tmp, path);
- GetFullPathName (tmp, size, path, NULL);
+ _tcscpy(tmp, path);
+ DWORD err = GetFullPathName (tmp, size, path, NULL);
}
}
void getpathpart (TCHAR *outpath, int size, const TCHAR *inpath)
error_log (_T("DirectDraw is not RTG hardware sprite compatible."));
p->rtg_hardwaresprite = false;
}
- if (p->rtgmem_type >= GFXBOARD_HARDWARE) {
+ if (p->rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE) {
p->rtg_hardwareinterrupt = false;
p->rtg_hardwaresprite = false;
p->win32_rtgmatchdepth = false;
- if (gfxboard_need_byteswap (p->rtgmem_type))
+ if (gfxboard_need_byteswap (&p->rtgboards[0]))
p->color_mode = 5;
if (p->ppc_model && !p->gfx_api) {
error_log (_T("Graphics board and PPC: Direct3D enabled."));
static const TCHAR *scsimode[] = { _T("SCSIEMU"), _T("SPTI"), _T("SPTI+SCSISCAN"), NULL };
static const TCHAR *statusbarmode[] = { _T("none"), _T("normal"), _T("extended"), NULL };
+static const TCHAR *configmult[] = { _T("1x"), _T("2x"), _T("3x"), _T("4x"), _T("5x"), _T("6x"), _T("7x"), _T("8x"), NULL };
static struct midiportinfo *getmidiport (struct midiportinfo **mi, int devid)
{
cfgfile_target_dwrite(f, _T("recording_height"), _T("%d"), p->aviout_height);
cfgfile_target_dwrite(f, _T("recording_x"), _T("%d"), p->aviout_xoffset);
cfgfile_target_dwrite(f, _T("recording_y"), _T("%d"), p->aviout_yoffset);
+ cfgfile_target_dwrite(f, _T("screenshot_width"), _T("%d"), p->screenshot_width);
+ cfgfile_target_dwrite(f, _T("screenshot_height"), _T("%d"), p->screenshot_height);
+ cfgfile_target_dwrite(f, _T("screenshot_x"), _T("%d"), p->screenshot_xoffset);
+ cfgfile_target_dwrite(f, _T("screenshot_y"), _T("%d"), p->screenshot_yoffset);
+ cfgfile_target_dwrite(f, _T("screenshot_min_width"), _T("%d"), p->screenshot_min_width);
+ cfgfile_target_dwrite(f, _T("screenshot_min_height"), _T("%d"), p->screenshot_min_height);
+ cfgfile_target_dwrite(f, _T("screenshot_max_width"), _T("%d"), p->screenshot_max_width);
+ cfgfile_target_dwrite(f, _T("screenshot_max_height"), _T("%d"), p->screenshot_max_height);
+ cfgfile_target_dwrite(f, _T("screenshot_output_width_limit"), _T("%d"), p->screenshot_output_width);
+ cfgfile_target_dwrite(f, _T("screenshot_output_height_limit"), _T("%d"), p->screenshot_output_height);
+ cfgfile_target_dwrite_str(f, _T("screenshot_mult_width"), configmult[p->screenshot_xmult]);
+ cfgfile_target_dwrite_str(f, _T("screenshot_mult_height"), configmult[p->screenshot_ymult]);
}
void target_restart (void)
if (cfgfile_intval(option, value, _T("recording_width"), &p->aviout_width, 1)
|| cfgfile_intval(option, value, _T("recording_height"), &p->aviout_height, 1)
|| cfgfile_intval(option, value, _T("recording_x"), &p->aviout_xoffset, 1)
- || cfgfile_intval(option, value, _T("recording_y"), &p->aviout_yoffset, 1))
+ || cfgfile_intval(option, value, _T("recording_y"), &p->aviout_yoffset, 1)
+
+ || cfgfile_intval(option, value, _T("screenshot_width"), &p->screenshot_width, 1)
+ || cfgfile_intval(option, value, _T("screenshot_height"), &p->screenshot_height, 1)
+ || cfgfile_intval(option, value, _T("screenshot_x"), &p->screenshot_xoffset, 1)
+ || cfgfile_intval(option, value, _T("screenshot_y"), &p->screenshot_yoffset, 1)
+ || cfgfile_intval(option, value, _T("screenshot_min_width"), &p->screenshot_min_width, 1)
+ || cfgfile_intval(option, value, _T("screenshot_min_height"), &p->screenshot_min_height, 1)
+ || cfgfile_intval(option, value, _T("screenshot_max_width"), &p->screenshot_max_width, 1)
+ || cfgfile_intval(option, value, _T("screenshot_max_height"), &p->screenshot_max_height, 1)
+ || cfgfile_intval(option, value, _T("screenshot_output_width_limit"), &p->screenshot_output_width, 1)
+ || cfgfile_intval(option, value, _T("screenshot_output_height_limit"), &p->screenshot_output_height, 1))
+
return 1;
+ if (cfgfile_strval(option, value, _T("screenshot_mult_width"), &p->screenshot_xmult, configmult, 0))
+ return 1;
+ if (cfgfile_strval(option, value, _T("screenshot_mult_height"), &p->screenshot_ymult, configmult, 0))
+ return 1;
+
if (cfgfile_string(option, value, _T("expansion_gui_page"), tmpbuf, sizeof tmpbuf / sizeof(TCHAR))) {
TCHAR *p = _tcschr(tmpbuf, ',');
if (p != NULL)
_tcscpy (out, start_path_data);
}
fixtrailing (out);
- fullpath (out, size);
+ fullpath (out, size2);
}
int get_rom_path (TCHAR *out, pathtype mode)
quickstart = 1;
reopen_console ();
fetch_path (_T("ConfigurationPath"), path, sizeof (path) / sizeof (TCHAR));
- path[_tcslen (path) - 1] = 0;
+ if (path[0])
+ path[_tcslen (path) - 1] = 0;
if (GetFileAttributes (path) == 0xffffffff) {
TCHAR path2[MAX_DPATH];
_tcscpy (path2, path);
if (CoCreateGuid (&guid) != S_OK)
return 0;
out[0] = guid.Data1 >> 24;
- out[1] = guid.Data1 >> 16;
- out[2] = guid.Data1 >> 8;
- out[3] = guid.Data1 >> 0;
+ out[1] = (uae_u8)(guid.Data1 >> 16);
+ out[2] = (uae_u8)(guid.Data1 >> 8);
+ out[3] = (uae_u8)(guid.Data1 >> 0);
out[4] = guid.Data2 >> 8;
out[5] = guid.Data2 >> 0;
out[6] = guid.Data3 >> 8;
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("7")
+#define WINUAEBETA _T("8")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2016, 2, 21)
+#define WINUAEDATE MAKEBD(2016, 3, 5)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
if (picasso_on)
return false;
}
- if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
+ if (currprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE) {
return gfxboard_toggle (mode);
} else {
// can always switch from RTG to custom
frame_missed = frame_counted = frame_errors = 0;
frame_usage = frame_usage_avg = frame_usage_total = 0;
-#ifdef OPENGL
- if (OGL_isenabled ())
- return OGL_getDC (0);
-#endif
#ifdef D3D
if (D3D_isenabled ())
return D3D_getDC (0);
void releasehdc (HDC hdc)
{
-#ifdef OPENGL
- if (OGL_isenabled ()) {
- OGL_getDC (hdc);
- return;
- }
-#endif
#ifdef D3D
if (D3D_isenabled ()) {
D3D_getDC (hdc);
#define USS_FORMAT_STRING_SAVE _T("(*.uss)\0*.uss\0")
#define HDF_FORMAT_STRING _T("(*.hdf;*.vhd;*.rdf;*.hdz;*.rdz;*.chd)\0*.hdf;*.vhd;*.rdf;*.hdz;*.rdz;*.chd\0")
#define INP_FORMAT_STRING _T("(*.inp)\0*.inp\0")
-#define CD_FORMAT_STRING _T("(*.cue;*.ccd;*.mds;*.iso;*.chd)\0*.cue;*.ccd;*.mds;*.iso;*.chd;") ARCHIVE_STRING _T("\0")
+#define CD_FORMAT_STRING _T("(*.cue;*.ccd;*.mds;*.iso;*.chd;*.nrg)\0*.cue;*.ccd;*.mds;*.iso;*.chd;*.nrg;") ARCHIVE_STRING _T("\0")
#define CONFIG_HOST _T("Host")
#define CONFIG_HARDWARE _T("Hardware")
static void enable_for_displaydlg (HWND hDlg)
{
- int rtg = ((!workprefs.address_space_24 || gfxboard_get_configtype(workprefs.rtgmem_type) == 2) && workprefs.rtgmem_size) || workprefs.rtgmem_type >= GFXBOARD_HARDWARE;
+ int rtg = ((!workprefs.address_space_24 || gfxboard_get_configtype(&workprefs.rtgboards[0]) == 2) && workprefs.rtgboards[0].rtgmem_size) || workprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE;
#ifndef PICASSO96
rtg = FALSE;
#endif
uae_u32 size, rtgz3size, z3size_uae = 0, z3size_real = 0;
uae_u32 sizealign = 16 * 1024 * 1024 - 1;
- rtgz3size = gfxboard_get_configtype(workprefs.rtgmem_type) == 3 ? workprefs.rtgmem_size : 0;
+ rtgz3size = gfxboard_get_configtype(&workprefs.rtgboards[0]) == 3 ? workprefs.rtgboards[0].rtgmem_size : 0;
size = ((workprefs.z3fastmem_size + sizealign) & ~sizealign) + ((workprefs.z3fastmem2_size + sizealign) & ~sizealign) +
((rtgz3size + sizealign) & ~sizealign);
if (cfgfile_board_enabled(&currprefs, ROMTYPE_A4091, 0))
static void set_expansion_rtg_rom(void)
{
int idx;
- uae_u32 romtype = gfxboard_get_romtype(workprefs.rtgmem_type);
+ uae_u32 romtype = gfxboard_get_romtype(&workprefs.rtgboards[0]);
if (romtype) {
struct boardromconfig *bc = get_device_rom_new(&workprefs, romtype, 0, &idx);
if (bc && bc->roms[idx].romfile[0] == 0) {
en = !!full_property_sheet;
- int rtg = workprefs.rtgmem_size && full_property_sheet && workprefs.rtgmem_type < GFXBOARD_HARDWARE;
- int rtg2 = workprefs.rtgmem_size || workprefs.rtgmem_type >= GFXBOARD_HARDWARE;
- int rtg3 = workprefs.rtgmem_size && workprefs.rtgmem_type < GFXBOARD_HARDWARE;
- int rtg4 = workprefs.rtgmem_type < GFXBOARD_HARDWARE;
+ int rtg = workprefs.rtgboards[0].rtgmem_size && full_property_sheet && workprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
+ int rtg2 = workprefs.rtgboards[0].rtgmem_size || workprefs.rtgboards[0].rtgmem_type >= GFXBOARD_HARDWARE;
+ int rtg3 = workprefs.rtgboards[0].rtgmem_size && workprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
+ int rtg4 = workprefs.rtgboards[0].rtgmem_type < GFXBOARD_HARDWARE;
ew(hDlg, IDC_P96RAM, rtg2);
ew(hDlg, IDC_P96MEM, rtg2);
int min_mem = MIN_P96_MEM;
int max_mem = MAX_P96_MEM_Z3;
- if (gfxboard_get_configtype(workprefs.rtgmem_type) == 2) {
- int v = workprefs.rtgmem_size;
+ struct rtgboardconfig *rbc = &workprefs.rtgboards[0];
+ if (gfxboard_get_configtype(rbc) == 2) {
+ int v = rbc->rtgmem_size;
max_mem = 0;
- workprefs.rtgmem_size = 1024 * 1024;
+ rbc->rtgmem_size = 1024 * 1024;
while (getz2size(&workprefs) > 0) {
- workprefs.rtgmem_size *= 2;
+ rbc->rtgmem_size *= 2;
max_mem++;
}
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(workprefs.rtgmem_type))
- v = gfxboard_get_vram_max(workprefs.rtgmem_type);
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(workprefs.rtgmem_type))
- v = gfxboard_get_vram_min(workprefs.rtgmem_type);
- workprefs.rtgmem_size = v;
- while (getz2size(&workprefs) < 0 && workprefs.rtgmem_size > 0)
- workprefs.rtgmem_size -= 1024 * 1024;
- } else if (gfxboard_get_configtype(workprefs.rtgmem_type) == 3) {
- int v = workprefs.rtgmem_size;
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(workprefs.rtgmem_type))
- v = gfxboard_get_vram_max(workprefs.rtgmem_type);
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(workprefs.rtgmem_type))
- v = gfxboard_get_vram_min(workprefs.rtgmem_type);
- workprefs.rtgmem_size = v;
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(rbc))
+ v = gfxboard_get_vram_max(rbc);
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(rbc))
+ v = gfxboard_get_vram_min(rbc);
+ rbc->rtgmem_size = v;
+ while (getz2size(&workprefs) < 0 && rbc->rtgmem_size > 0)
+ rbc->rtgmem_size -= 1024 * 1024;
+ } else if (gfxboard_get_configtype(rbc) == 3) {
+ int v = rbc->rtgmem_size;
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(rbc))
+ v = gfxboard_get_vram_max(rbc);
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(rbc))
+ v = gfxboard_get_vram_min(rbc);
+ rbc->rtgmem_size = v;
} else {
- int v = workprefs.rtgmem_size;
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(workprefs.rtgmem_type))
- v = gfxboard_get_vram_max(workprefs.rtgmem_type);
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(workprefs.rtgmem_type))
- v = gfxboard_get_vram_min(workprefs.rtgmem_type);
- workprefs.rtgmem_size = v;
- }
- if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
- switch (gfxboard_get_vram_min(workprefs.rtgmem_type)) {
+ int v = rbc->rtgmem_size;
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v > gfxboard_get_vram_max(rbc))
+ v = gfxboard_get_vram_max(rbc);
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE && v < gfxboard_get_vram_min(rbc))
+ v = gfxboard_get_vram_min(rbc);
+ rbc->rtgmem_size = v;
+ }
+ if (rbc->rtgmem_type >= GFXBOARD_HARDWARE) {
+ switch (gfxboard_get_vram_min(rbc)) {
case 0x00100000: min_mem = 1; break;
case 0x00200000: min_mem = 2; break;
case 0x00400000: min_mem = 3; break;
}
- switch (gfxboard_get_vram_max(workprefs.rtgmem_type)) {
+ switch (gfxboard_get_vram_max(rbc)) {
case 0x00100000: max_mem = 1; break;
case 0x00200000: max_mem = 2; break;
case 0x00400000: max_mem = 3; break;
}
SendDlgItemMessage(hDlg, IDC_P96MEM, TBM_SETRANGE, TRUE, MAKELONG(min_mem, max_mem));
int mem_size = 0;
- switch (workprefs.rtgmem_size) {
+ switch (rbc->rtgmem_size) {
case 0x00000000: mem_size = 0; break;
case 0x00100000: mem_size = 1; break;
case 0x00200000: mem_size = 2; break;
SendDlgItemMessage(hDlg, IDC_P96MEM, TBM_SETPOS, TRUE, mem_size);
SetDlgItemText(hDlg, IDC_P96RAM, memsize_names[msi_gfx[mem_size]]);
- SendDlgItemMessage(hDlg, IDC_RTG_Z2Z3, CB_SETCURSEL, workprefs.rtgmem_size == 0 ? 0 : workprefs.rtgmem_type + 1, 0);
+ SendDlgItemMessage(hDlg, IDC_RTG_Z2Z3, CB_SETCURSEL, rbc->rtgmem_size == 0 ? 0 : rbc->rtgmem_type + 1, 0);
SendDlgItemMessage(hDlg, IDC_RTG_8BIT, CB_SETCURSEL, (workprefs.picasso96_modeflags & RGBFF_CLUT) ? 1 : 0, 0);
SendDlgItemMessage(hDlg, IDC_RTG_16BIT, CB_SETCURSEL,
(manybits(workprefs.picasso96_modeflags, RGBFF_R5G6B5PC | RGBFF_R5G6B5PC | RGBFF_R5G6B5 | RGBFF_R5G5B5 | RGBFF_B5G6R5PC | RGBFF_B5G5R5PC)) ? 1 :
SendDlgItemMessage (hDlg, IDC_RTG_32BIT, CB_ADDSTRING, 0, (LPARAM)_T("A8B8G8R8"));
SendDlgItemMessage (hDlg, IDC_RTG_32BIT, CB_ADDSTRING, 0, (LPARAM)_T("R8G8B8A8"));
SendDlgItemMessage (hDlg, IDC_RTG_32BIT, CB_ADDSTRING, 0, (LPARAM)_T("B8G8R8A8 (*)"));
- SendDlgItemMessage (hDlg, IDC_P96MEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_P96_MEM, gfxboard_get_configtype(workprefs.rtgmem_type) == 3 ? MAX_P96_MEM_Z3 : MAX_P96_MEM_Z2));
+ SendDlgItemMessage (hDlg, IDC_P96MEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_P96_MEM, gfxboard_get_configtype(&workprefs.rtgboards[0]) == 3 ? MAX_P96_MEM_Z3 : MAX_P96_MEM_Z2));
SendDlgItemMessage (hDlg, IDC_RTG_SCALE_ASPECTRATIO, CB_RESETCONTENT, 0, 0);
WIN32GUI_LoadUIString (IDS_DISABLED, tmp, sizeof tmp / sizeof (TCHAR));
SendDlgItemMessage (hDlg, IDC_RTG_SCALE_ASPECTRATIO, CB_ADDSTRING, 0, (LPARAM)tmp);
break;
case WM_HSCROLL:
- workprefs.rtgmem_size = memsizes[msi_gfx[SendMessage (GetDlgItem (hDlg, IDC_P96MEM), TBM_GETPOS, 0, 0)]];
+ workprefs.rtgboards[0].rtgmem_size = memsizes[msi_gfx[SendMessage (GetDlgItem (hDlg, IDC_P96MEM), TBM_GETPOS, 0, 0)]];
values_to_expansiondlg(hDlg);
enable_for_expansiondlg(hDlg);
break;
v = SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_GETCURSEL, 0, 0L);
if (v != CB_ERR) {
if (v == 0) {
- workprefs.rtgmem_type = 1;
- workprefs.rtgmem_size = 0;
+ workprefs.rtgboards[0].rtgmem_type = 1;
+ workprefs.rtgboards[0].rtgmem_size = 0;
} else {
- workprefs.rtgmem_type = v - 1;
- if (workprefs.rtgmem_size == 0)
- workprefs.rtgmem_size = 4096 * 1024;
+ workprefs.rtgboards[0].rtgmem_type = v - 1;
+ if (workprefs.rtgboards[0].rtgmem_size == 0)
+ workprefs.rtgboards[0].rtgmem_size = 4096 * 1024;
}
set_expansion_rtg_rom();
enable_for_expansiondlg (hDlg);
switch (msg) {
case WM_DROPFILES:
- dragdrop (hDlg, (HDROP)wParam, &changed_prefs, -1);
+ dragdrop (hDlg, (HDROP)wParam, &changed_prefs, -2);
return FALSE;
case WM_INITDIALOG:
}
CheckDlgButton (hDlg, f_enable, state ? BST_CHECKED : BST_UNCHECKED);
TCHAR tmp[10];
+ tmp[0] = 0;
if (n < 2 || nn - 1 < DRV_PC_ONLY_40) {
- _stprintf(tmp, _T("DF%d:"), n);
+ if (!showcd || n != 1)
+ _stprintf(tmp, _T("DF%d:"), n);
} else {
int t = nn - 1 == DRV_PC_ONLY_40 ? 40 : 80;
_stprintf(tmp, _T("%c: (%d)"), n == 2 ? 'A' : 'B', t);
}
- SetWindowText(GetDlgItem(hDlg, f_enable), tmp);
+ if (tmp[0])
+ SetWindowText(GetDlgItem(hDlg, f_enable), tmp);
}
chk = !showcd && disk_getwriteprotect (&workprefs, text) && state == TRUE ? BST_CHECKED : 0;
if (f_wp >= 0)
CheckDlgButton (hDlg, IDC_AVIOUTPUT_NOSOUNDSYNC, avioutput_nosoundsync ? TRUE : FALSE);
CheckDlgButton (hDlg, IDC_AVIOUTPUT_ORIGINALSIZE, avioutput_originalsize ? TRUE : FALSE);
CheckDlgButton (hDlg, IDC_AVIOUTPUT_ACTIVATED, avioutput_requested ? BST_CHECKED : BST_UNCHECKED);
- CheckDlgButton (hDlg, IDC_SCREENSHOT_ORIGINALSIZE, screenshot_originalsize ? TRUE : FALSE);
+ CheckDlgButton(hDlg, IDC_SCREENSHOT_ORIGINALSIZE, screenshot_originalsize ? TRUE : FALSE);
+ CheckDlgButton(hDlg, IDC_SCREENSHOT_CLIP, screenshot_clipmode ? TRUE : FALSE);
CheckDlgButton (hDlg, IDC_SAMPLERIPPER_ACTIVATED, sampleripper_enabled ? BST_CHECKED : BST_UNCHECKED);
CheckDlgButton (hDlg, IDC_STATEREC_RECORD, input_record ? BST_CHECKED : BST_UNCHECKED);
CheckDlgButton (hDlg, IDC_STATEREC_PLAY, input_play ? BST_CHECKED : BST_UNCHECKED);
ew (hDlg, IDC_AVIOUTPUT_FILE, TRUE);
+ if (!screenshot_originalsize) {
+ CheckDlgButton(hDlg, IDC_SCREENSHOT_CLIP, BST_UNCHECKED);
+ screenshot_clipmode = 0;
+ }
+ ew (hDlg, IDC_SCREENSHOT_CLIP, screenshot_originalsize != 0);
+
if(workprefs.produce_sound < 2) {
ew (hDlg, IDC_AVIOUTPUT_AUDIO, FALSE);
ew (hDlg, IDC_AVIOUTPUT_AUDIO_STATIC, FALSE);
pages[AVIOUTPUT_ID] = hDlg;
currentpage = AVIOUTPUT_ID;
AVIOutput_GetSettings ();
- regqueryint (NULL, _T("Screenshot_Original"), &screenshot_originalsize);
+ regqueryint(NULL, _T("Screenshot_Original"), &screenshot_originalsize);
+ regqueryint(NULL, _T("Screenshot_ClipMode"), &screenshot_clipmode);
enable_for_avioutputdlg (hDlg);
if (!avioutput_filename_gui[0]) {
fetch_path (_T("VideoPath"), avioutput_filename_gui, sizeof (avioutput_filename_gui) / sizeof (TCHAR));
AVIOutput_SetSettings ();
break;
case IDC_SCREENSHOT_ORIGINALSIZE:
- screenshot_originalsize = ischecked (hDlg, IDC_SCREENSHOT_ORIGINALSIZE) ? 1 : 0;
- regsetint (NULL, _T("Screenshot_Original"), screenshot_originalsize);
+ screenshot_originalsize = ischecked(hDlg, IDC_SCREENSHOT_ORIGINALSIZE) ? 1 : 0;
+ regsetint(NULL, _T("Screenshot_Original"), screenshot_originalsize);
+ break;
+ case IDC_SCREENSHOT_CLIP:
+ screenshot_clipmode = ischecked(hDlg, IDC_SCREENSHOT_CLIP) ? 1 : 0;
+ regsetint(NULL, _T("Screenshot_ClipMode"), screenshot_clipmode);
break;
case IDC_STATEREC_SAVE:
if (input_record > INPREC_RECORD_NORMAL) {
+Beta 8:
+
+- Game Ports joystick type was always empty (undefined).
+- Quickstart panel CDTV/CD32 CD path name label was "DF1:", not "CD". (Broke when bridgeboard drive support was added)
+- Dragndrop to emulation window didn't work correctly until GUI was opened at least once.
+- Added screenshot autoclip mode, uses autoscale display size/position detection.
+ Also added following config file only entries: (all config entries need win32. prefix)
+ screenshot_min_width and screenshot_min_height: minimum autoclip size in lores pixels.
+ screenshot_max_width and screenshot_max_height: maximum autoclip size in lores pixels.
+ screenshot_width and screenshot_height: forced screenshot size (non-autoclip mode only)
+ screenshot_x and screenshot_y: position/offset of screenshot (non-autoclip mode only)
+ screenshot_mult_width and screenshot_mult_height: 1x, 2x, 3x, .. 8x screenshot size multiplier.
+ screenshot_output_width_limit and screenshot_output_height_limit: minimum screenshot size, if original size is smaller,
+ multiplier is increased until width/height is same or larger.
+- More internal changes to support more than one enabled RTG board at the same time. (Still lots more to do..)
+- 68020/030 RTE didn't generate exception when it encountered 68040+ or 68010 only stack frame types.
+- Return error code instead of crashing if bsdsocket emulation sendto() tries to use unsupported raw protocol.
+- Switching from relative path mode back to normal mode could have caused repeated crashing.
+- Do not write reserved block at the end of FileInfoBlock back to Amiga side, Pre-2.x dos commands don't allocate
+ complete FIB structure. (Was side-effect of OS4.x compatible trap system)
+- Basic NERO nrg CD image support added. Data and audio tracks seems to work.
+- CDFS mounting selects Joliet volume label if found. (Joliet volume label is not restricted to capital ASCII letters)
+- uaenet.device S2_READORPHAN should not filter unknown multicast addresses.
+
Beta 7:
- Fullscreen + paused + enter GUI: GUI was invisible.
m68k_areg(regs, reg) = v;
}
}
-
+void trap_put_quad(TrapContext *ctx, uaecptr addr, uae_u64 v)
+{
+ uae_u8 out[8];
+ put_long_host(out + 0, v >> 32);
+ put_long_host(out + 4, (uae_u32)(v >> 0));
+ trap_put_bytes(ctx, out, addr, 8);
+}
void trap_put_long(TrapContext *ctx, uaecptr addr, uae_u32 v)
{
if (trap_is_indirect_null(ctx)) {
}
}
+uae_u64 trap_get_quad(TrapContext *ctx, uaecptr addr)
+{
+ uae_u8 in[8];
+ trap_get_bytes(ctx, in, addr, 8);
+ return ((uae_u64)get_long_host(in + 0) << 32) | get_long_host(in + 4);
+}
uae_u32 trap_get_long(TrapContext *ctx, uaecptr addr)
{
if (trap_is_indirect_null(ctx)) {
#define IO_KEYBOARD_REGISTER_A2000 0x1fff
#define IO_A2386_CONFIG 0x1f9f
-#define ISVGA() (currprefs.rtgmem_type == GFXBOARD_VGA)
+#define ISVGA() (currprefs.rtgboards[0].rtgmem_type == GFXBOARD_VGA)
static struct x86_bridge *bridges[X86_BRIDGE_MAX];
return ZFILE_NVR;
if (strcasecmp (ext, _T("uae")) == 0)
return ZFILE_CONFIGURATION;
- if (strcasecmp (ext, _T("cue")) == 0 || strcasecmp (ext, _T("iso")) == 0 || strcasecmp (ext, _T("ccd")) == 0 || strcasecmp (ext, _T("mds")) == 0 || strcasecmp (ext, _T("chd")) == 0)
+ if (strcasecmp(ext, _T("cue")) == 0 || strcasecmp(ext, _T("iso")) == 0 || strcasecmp(ext, _T("ccd")) == 0 ||
+ strcasecmp(ext, _T("mds")) == 0 || strcasecmp(ext, _T("chd")) == 0 || strcasecmp(ext, _T("nrg")) == 0)
return ZFILE_CDIMAGE;
}
memset (buf, 0, sizeof (buf));
projects / francis / winuae.git / commitdiff