4500b12

diff --git a/debug.cpp b/debug.cpp
index 620b53bb91a9794ad2d8285826b70cc69494e967..fd440a73032e0e56c8adc74d36ec1f4c99e89fc0 100644 (file)
--- a/debug.cpp
+++ b/debug.cpp
@@ -3347,7 +3347,9 @@ uae_u32 debug_putpeekdma_chipram(uaecptr addr, uae_u32 v, uae_u32 mask, int reg,
        if (!currprefs.z3chipmem.size)
                peekdma_data.addr &= chipmem_bank.mask;
        memwatch_func(peekdma_data.addr & chipmem_bank.mask, 2, 2, &v, peekdma_data.mask, peekdma_data.reg);
+       return v;
 }
+
 void debug_getpeekdma_chipram(uaecptr addr, uae_u32 mask, int reg, int ptrreg)
 {
        peekdma_save(2, addr, mask, reg, ptrreg);
@@ -7431,6 +7433,8 @@ static uae_u32 get_value(struct dsprintfstack **stackp, uae_u32 *sizep, uaecptr
                        v &= 0xff;
                else if (stack->size == 1)
                        v &= 0xffff;
+               if (size == 1)
+                       v &= 0xffff;
                *sizep = size;
                stack++;
                *stackp = stack;

diff --git a/od-win32/win32.h b/od-win32/win32.h
index 1d28a6b732bafcc9e7074e5f7c4d668e3f481a1f..3f380ad7f018fca8e74cfb62503d3cd7efa62177 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -20,12 +20,12 @@
 #define LANG_DLL_FULL_VERSION_MATCH 1
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("Beta 11")
+#define WINUAEBETA _T("Beta 12")
 #else
 #define WINUAEBETA _T("")
 #endif
 
-#define WINUAEDATE MAKEBD(2020, 11, 22)
+#define WINUAEDATE MAKEBD(2020, 12, 06)
 
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index 2f862bd310ee5610354e83d539c9f94486cc4079..3de942a6fc48269f05b2941ab02d8b1863feb740 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -1,5 +1,25 @@
 
 
+Beta 12:
+
+- 68000/010 cycle-exact/prefetch: If long write access, check IPL when first word of long has been written, not after last word. Fixes Made in Croatia / Binary (again).
+- Cycle-exact blitter DMA sequencer emulation now matches real hardware shift register based logic. Includes almost accurate emulation of on the fly modifications of BLTCON0/BLTCON1 (blitter cycle diagram changes). This should fix remaining A500 demos that do stupid things with the blitter. For example TLC Lotus 2 crack intro which is very broken.
+- When in warp mode, alternate between 10 and 11 skipped frames (was always 10). Previously if program showed exactly 10 frame animation, it looked like emulation had paused.
+- Reverted b1 copper skip update, it broke Tek/Rampage.
+- Added Hardital Synthesis emulation.
+- Added M.A.S.T. Fireball emulation
+
+Hardital Synthesis:
+- Clone of ICD AdSCSI (It seems to be common theme: Hardital Dotto is a clone of ICD AdIDE, Hardital TQM appears to be a clone of DKB Cobra)
+- Identical autoconfig data.
+- Driver has strings "ICDBoot.device", "ICD BootRom (C)1992" "hidden" in nibble part of boot ROM. All visible strings have been edited from "ICD" to "SYN". Different than AdSCSI ROMs, probably based on later not yet dumped AdSCSI ROM version.
+
+M.A.S.T. Fireball:
+- True DMA! Has really weird way to set up DMA controller address pointer, it needs minimum of 7*2 IO writes, max (7+6*7)*2 IO writes to configure it. Yes, amount of writes depends on DMA address value.
+- Not RDB compatible. Uses same partition table structure as A2090.
+- ROM version string: "FireBall 0.4 (10 Mar 1990)"
+
+
 Beta 11:
 
 - S3Trio/S3Virge double scan mode detection fixed. Calculation used size parameters before bit depth specific screen width adjustments.