* UAE - The Un*x Amiga Emulator
*
* Misc accelerator board special features
-* Blizzard 1230 IV, 1240/1260, 2060
+* Blizzard 1230 IV, 1240/1260, 2040/2060, PPC
+* CyberStorm MK1, MK2, MK3, PPC.
+* Warp Engine
*
* Copyright 2014 Toni Wilen
*
#include "custom.h"
#include "newcpu.h"
#include "ncr_scsi.h"
+#include "ncr9x_scsi.h"
#include "debug.h"
#include "flashrom.h"
#include "uae.h"
#define P5_AMIGA_RESET 0x04
#define P5_AUX_RESET 0x02
#define P5_SCSI_RESET 0x01
+/* REG_IRQ */
+#define P5_IRQ_SCSI 0x01
+#define P5_IRQ_SCSI_EN 0x02
+#define P5_IRQ_PPC_1 0x08
+#define P5_IRQ_PPC_2 0x10
/* REG_WAITSTATE */
#define P5_PPC_WRITE 0x08
#define P5_PPC_READ 0x04
#define P5_M68K_READ 0x01
/* REG_SHADOW */
#define P5_SELF_RESET 0x40
-#define P5_SHADOW 0x01
+#define P5_UNK 0x04 // something to do with flash chip
+#define P5_SHADOW 0x01 // 1 = ks map rom to 0xfff80000
/* REG_LOCK */
-#define P5_MAGIC1 0x60
+#define P5_MAGIC1 0x60 // REG_SHADOW and flash write protection unlock sequence
#define P5_MAGIC2 0x50
#define P5_MAGIC3 0x30
#define P5_MAGIC4 0x70
/* REG_INT */
#define P5_ENABLE_IPL 0x02
-#define P5_INT_MASTER 0x01
+#define P5_INT_MASTER 0x01 // 1=m68k gets interrupts, 0=ppc gets interrupts.
/* IPL_EMU */
-#define P5_DISABLE_INT 0x40
+#define P5_DISABLE_INT 0x40 // if set: all CPU interrupts disabled
#define P5_M68K_IPL2 0x20
#define P5_M68K_IPL1 0x10
#define P5_M68K_IPL0 0x08
#define BLIZZARD_MAPROM_ENABLE 0x80ffff00
#define BLIZZARD_BOARD_DISABLE 0x80fa0000
+#define CSMK2_BOARD_DISABLE 0x83000000
+
static int cpuboard_size = -1, cpuboard2_size = -1;
static int configured;
static int blizzard_jit;
static void *flashrom;
static struct zfile *flashrom_file;
static int flash_unlocked;
+static int csmk2_flashaddressing;
+static bool blizzardmaprom_bank_mapped;
static bool is_blizzard(void)
{
- return currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1260 || currprefs.cpuboard_type == BOARD_BLIZZARD_2060;
+ return currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV || currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI ||
+ currprefs.cpuboard_type == BOARD_BLIZZARD_1260 || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI;
+}
+static bool is_blizzard2060(void)
+{
+ return currprefs.cpuboard_type == BOARD_BLIZZARD_2060;
+}
+static bool is_csmk1(void)
+{
+ return currprefs.cpuboard_type == BOARD_CSMK1;
}
-static bool is_cs(void)
+static bool is_csmk2(void)
+{
+ return currprefs.cpuboard_type == BOARD_CSMK2;
+}
+static bool is_csmk3(void)
{
return currprefs.cpuboard_type == BOARD_CSMK3 || currprefs.cpuboard_type == BOARD_CSPPC;
}
{
return currprefs.cpuboard_type == BOARD_BLIZZARDPPC;
}
+static bool is_ppc(void)
+{
+ return currprefs.cpuboard_type == BOARD_BLIZZARDPPC || currprefs.cpuboard_type == BOARD_CSPPC;
-extern addrbank blizzardram_bank;
-extern addrbank blizzardram_nojit_bank;
-extern addrbank blizzardmaprom_bank;
-extern addrbank blizzardea_bank;
-extern addrbank blizzardf0_bank;
+}
-MEMORY_FUNCTIONS(blizzardram);
+DECLARE_MEMORY_FUNCTIONS(blizzardio);
+static addrbank blizzardio_bank = {
+ blizzardio_lget, blizzardio_wget, blizzardio_bget,
+ blizzardio_lput, blizzardio_wput, blizzardio_bput,
+ default_xlate, default_check, NULL, _T("CPUBoard IO"),
+ blizzardio_wget, blizzardio_bget, ABFLAG_IO
+};
-addrbank blizzardram_bank = {
+DECLARE_MEMORY_FUNCTIONS(blizzardram);
+static addrbank blizzardram_bank = {
blizzardram_lget, blizzardram_wget, blizzardram_bget,
blizzardram_lput, blizzardram_wput, blizzardram_bput,
blizzardram_xlate, blizzardram_check, NULL, _T("CPUBoard RAM"),
blizzardram_lget, blizzardram_wget, ABFLAG_RAM
};
+DECLARE_MEMORY_FUNCTIONS(blizzardea);
+static addrbank blizzardea_bank = {
+ blizzardea_lget, blizzardea_wget, blizzardea_bget,
+ blizzardea_lput, blizzardea_wput, blizzardea_bput,
+ blizzardea_xlate, blizzardea_check, NULL, _T("CPUBoard EA Autoconfig"),
+ blizzardea_lget, blizzardea_wget, ABFLAG_IO | ABFLAG_SAFE
+};
+
+DECLARE_MEMORY_FUNCTIONS(blizzarde8);
+static addrbank blizzarde8_bank = {
+ blizzarde8_lget, blizzarde8_wget, blizzarde8_bget,
+ blizzarde8_lput, blizzarde8_wput, blizzarde8_bput,
+ blizzarde8_xlate, blizzarde8_check, NULL, _T("CPUBoard E8 Autoconfig"),
+ blizzarde8_lget, blizzarde8_wget, ABFLAG_IO | ABFLAG_SAFE
+};
+
+DECLARE_MEMORY_FUNCTIONS(blizzardf0);
+static addrbank blizzardf0_bank = {
+ blizzardf0_lget, blizzardf0_wget, blizzardf0_bget,
+ blizzardf0_lput, blizzardf0_wput, blizzardf0_bput,
+ blizzardf0_xlate, blizzardf0_check, NULL, _T("CPUBoard F00000"),
+ blizzardf0_lget, blizzardf0_wget, ABFLAG_ROM
+};
+
+DECLARE_MEMORY_FUNCTIONS(blizzardram_nojit);
+static addrbank blizzardram_nojit_bank = {
+ blizzardram_nojit_lget, blizzardram_nojit_wget, blizzardram_nojit_bget,
+ blizzardram_nojit_lput, blizzardram_nojit_wput, blizzardram_nojit_bput,
+ blizzardram_nojit_xlate, blizzardram_nojit_check, NULL, _T("CPUBoard RAM"),
+ blizzardram_nojit_lget, blizzardram_nojit_wget, ABFLAG_RAM
+};
+
+DECLARE_MEMORY_FUNCTIONS(blizzardmaprom);
+static addrbank blizzardmaprom_bank = {
+ blizzardmaprom_lget, blizzardmaprom_wget, blizzardmaprom_bget,
+ blizzardmaprom_lput, blizzardmaprom_wput, blizzardmaprom_bput,
+ blizzardmaprom_xlate, blizzardmaprom_check, NULL, _T("CPUBoard MAPROM"),
+ blizzardmaprom_lget, blizzardmaprom_wget, ABFLAG_RAM
+};
+DECLARE_MEMORY_FUNCTIONS(blizzardmaprom2);
+static addrbank blizzardmaprom2_bank = {
+ blizzardmaprom2_lget, blizzardmaprom2_wget, blizzardmaprom2_bget,
+ blizzardmaprom2_lput, blizzardmaprom2_wput, blizzardmaprom2_bput,
+ blizzardmaprom2_xlate, blizzardmaprom2_check, NULL, _T("CPUBoard MAPROM2"),
+ blizzardmaprom2_lget, blizzardmaprom2_wget, ABFLAG_RAM
+};
+
+
+MEMORY_FUNCTIONS(blizzardram);
+
MEMORY_BGET(blizzardram_nojit, 1);
MEMORY_WGET(blizzardram_nojit, 1);
MEMORY_LGET(blizzardram_nojit, 1);
blizzardram_nojit_bank.baseaddr[addr] = b;
}
-static addrbank blizzardram_nojit_bank = {
- blizzardram_nojit_lget, blizzardram_nojit_wget, blizzardram_nojit_bget,
- blizzardram_nojit_lput, blizzardram_nojit_wput, blizzardram_nojit_bput,
- blizzardram_nojit_xlate, blizzardram_nojit_check, NULL, _T("CPUBoard RAM"),
- blizzardram_nojit_lget, blizzardram_nojit_wget, ABFLAG_RAM
-};
-
-MEMORY_BGET(blizzardmaprom, 1);
-MEMORY_WGET(blizzardmaprom, 1);
-MEMORY_LGET(blizzardmaprom, 1);
-MEMORY_CHECK(blizzardmaprom);
-MEMORY_XLATE(blizzardmaprom);
-
static void no_rom_protect(void)
{
if (delayed_rom_protect)
protect_roms(false);
}
+MEMORY_BGET(blizzardmaprom2, 1);
+MEMORY_WGET(blizzardmaprom2, 1);
+MEMORY_LGET(blizzardmaprom2, 1);
+MEMORY_CHECK(blizzardmaprom2);
+MEMORY_XLATE(blizzardmaprom2);
+
+static void REGPARAM2 blizzardmaprom2_lput(uaecptr addr, uae_u32 l)
+{
+ uae_u32 *m;
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ addr &= blizzardmaprom2_bank.mask;
+ m = (uae_u32 *)(blizzardmaprom2_bank.baseaddr + addr);
+ do_put_mem_long(m, l);
+}
+static void REGPARAM2 blizzardmaprom2_wput(uaecptr addr, uae_u32 w)
+{
+ uae_u16 *m;
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ addr &= blizzardmaprom2_bank.mask;
+ m = (uae_u16 *)(blizzardmaprom2_bank.baseaddr + addr);
+ do_put_mem_word(m, w);
+}
+static void REGPARAM2 blizzardmaprom2_bput(uaecptr addr, uae_u32 b)
+{
+#ifdef JIT
+ special_mem |= S_WRITE;
+#endif
+ addr &= blizzardmaprom2_bank.mask;
+ blizzardmaprom2_bank.baseaddr[addr] = b;
+}
+
+MEMORY_BGET(blizzardmaprom, 1);
+MEMORY_WGET(blizzardmaprom, 1);
+MEMORY_LGET(blizzardmaprom, 1);
+MEMORY_CHECK(blizzardmaprom);
+MEMORY_XLATE(blizzardmaprom);
+
static void REGPARAM2 blizzardmaprom_lput(uaecptr addr, uae_u32 l)
{
uae_u32 *m;
#ifdef JIT
special_mem |= S_WRITE;
#endif
+ if (is_blizzard2060() && !maprom_state)
+ return;
addr &= blizzardmaprom_bank.mask;
m = (uae_u32 *)(blizzardmaprom_bank.baseaddr + addr);
do_put_mem_long(m, l);
- if (maprom_state) {
+ if (maprom_state && !(addr & 0x80000)) {
no_rom_protect();
m = (uae_u32 *)(kickmem_bank.baseaddr + addr);
do_put_mem_long(m, l);
#ifdef JIT
special_mem |= S_WRITE;
#endif
+ if (is_blizzard2060() && !maprom_state)
+ return;
addr &= blizzardmaprom_bank.mask;
m = (uae_u16 *)(blizzardmaprom_bank.baseaddr + addr);
do_put_mem_word(m, w);
- if (maprom_state) {
+ if (maprom_state && !(addr & 0x80000)) {
no_rom_protect();
m = (uae_u16 *)(kickmem_bank.baseaddr + addr);
do_put_mem_word(m, w);
#ifdef JIT
special_mem |= S_WRITE;
#endif
+ if (is_blizzard2060() && !maprom_state)
+ return;
addr &= blizzardmaprom_bank.mask;
blizzardmaprom_bank.baseaddr[addr] = b;
- if (maprom_state) {
+ if (maprom_state && !(addr & 0x80000)) {
no_rom_protect();
kickmem_bank.baseaddr[addr] = b;
}
}
-static addrbank blizzardmaprom_bank = {
- blizzardmaprom_lget, blizzardmaprom_wget, blizzardmaprom_bget,
- blizzardmaprom_lput, blizzardmaprom_wput, blizzardmaprom_bput,
- blizzardmaprom_xlate, blizzardmaprom_check, NULL, _T("CPUBoard MAPROM"),
- blizzardmaprom_lget, blizzardmaprom_wget, ABFLAG_RAM
-};
-
-static void REGPARAM3 blizzardea_lput(uaecptr, uae_u32) REGPARAM;
-static void REGPARAM3 blizzardea_wput(uaecptr, uae_u32) REGPARAM;
-static void REGPARAM3 blizzardea_bput(uaecptr, uae_u32) REGPARAM;
-
-MEMORY_BGET(blizzardea, 0);
-MEMORY_WGET(blizzardea, 0);
-MEMORY_LGET(blizzardea, 0);
MEMORY_CHECK(blizzardea);
MEMORY_XLATE(blizzardea);
-static addrbank blizzardea_bank = {
- blizzardea_lget, blizzardea_wget, blizzardea_bget,
- blizzardea_lput, blizzardea_wput, blizzardea_bput,
- blizzardea_xlate, blizzardea_check, NULL, _T("Blizzard EA Autoconfig"),
- blizzardea_lget, blizzardea_wget, ABFLAG_IO | ABFLAG_SAFE
-};
-static void REGPARAM3 blizzarde8_lput(uaecptr, uae_u32) REGPARAM;
-static void REGPARAM3 blizzarde8_wput(uaecptr, uae_u32) REGPARAM;
-static void REGPARAM3 blizzarde8_bput(uaecptr, uae_u32) REGPARAM;
-static uae_u32 REGPARAM3 blizzarde8_lget(uaecptr) REGPARAM;
-static uae_u32 REGPARAM3 blizzarde8_wget(uaecptr) REGPARAM;
-static uae_u32 REGPARAM3 blizzarde8_bget(uaecptr) REGPARAM;
static int REGPARAM2 blizzarde8_check(uaecptr addr, uae_u32 size)
{
return 0;
return NULL;
}
-static addrbank blizzarde8_bank = {
- blizzarde8_lget, blizzarde8_wget, blizzarde8_bget,
- blizzarde8_lput, blizzarde8_wput, blizzarde8_bput,
- blizzarde8_xlate, blizzarde8_check, NULL, _T("Blizzard E8 Autoconfig"),
- blizzarde8_lget, blizzarde8_wget, ABFLAG_IO | ABFLAG_SAFE
-};
-
static uae_u32 REGPARAM2 blizzardf0_lget(uaecptr addr)
{
#ifdef JIT
regs.memory_waitstate_cycles += F0_WAITSTATES * 1;
- if (is_cs() || is_blizzardppc()) {
+ if (is_csmk3() || is_blizzardppc()) {
if (is_blizzardppc() && (flash_unlocked & 2))
addr += 262144;
if (flash_unlocked) {
#endif
regs.memory_waitstate_cycles += F0_WAITSTATES * 1;
- if (is_cs() || is_blizzardppc()) {
+ if (is_csmk3() || is_blizzardppc()) {
if (flash_unlocked) {
if (is_blizzardppc() && (flash_unlocked & 2))
addr += 262144;
MEMORY_CHECK(blizzardf0);
MEMORY_XLATE(blizzardf0);
-static addrbank blizzardf0_bank = {
- blizzardf0_lget, blizzardf0_wget, blizzardf0_bget,
- blizzardf0_lput, blizzardf0_wput, blizzardf0_bput,
- blizzardf0_xlate, blizzardf0_check, NULL, _T("CPUBoard F00000"),
- blizzardf0_lget, blizzardf0_wget, ABFLAG_ROM
-};
+static uae_u32 REGPARAM2 blizzardea_lget(uaecptr addr)
+{
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ uae_u32 *m;
+
+ addr &= blizzardea_bank.mask;
+ m = (uae_u32 *)(blizzardea_bank.baseaddr + addr);
+ return do_get_mem_long(m);
+}
+static uae_u32 REGPARAM2 blizzardea_wget(uaecptr addr)
+{
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ uae_u16 *m, v;
+
+ addr &= blizzardea_bank.mask;
+ m = (uae_u16 *)(blizzardea_bank.baseaddr + addr);
+ v = do_get_mem_word(m);
+ return v;
+}
+static uae_u32 REGPARAM2 blizzardea_bget(uaecptr addr)
+{
+#ifdef JIT
+ special_mem |= S_READ;
+#endif
+ uae_u8 v;
+
+ addr &= blizzardea_bank.mask;
+ if (is_blizzard2060() && addr >= BLIZZARD_2060_SCSI_OFFSET) {
+ v = cpuboard_ncr9x_scsi_get(addr);
+ } else if ((currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
+ v = cpuboard_ncr9x_scsi_get(addr);
+ } else if (is_csmk1()) {
+ if (addr >= CYBERSTORM_MK1_SCSI_OFFSET) {
+ v = cpuboard_ncr9x_scsi_get(addr);
+ } else {
+ v = blizzardea_bank.baseaddr[addr];
+ }
+ } else if (is_csmk2()) {
+ if (addr >= CYBERSTORM_MK2_SCSI_OFFSET) {
+ v = cpuboard_ncr9x_scsi_get(addr);
+ } else if (flash_active(flashrom, addr)) {
+ v = flash_read(flashrom, addr);
+ } else {
+ v = blizzardea_bank.baseaddr[addr];
+ }
+ } else {
+ v = blizzardea_bank.baseaddr[addr];
+ }
+ return v;
+}
static void REGPARAM2 blizzardea_lput(uaecptr addr, uae_u32 b)
{
#ifdef JIT
special_mem |= S_WRITE;
#endif
+ addr &= blizzardea_bank.mask;
+
+ if (is_blizzard2060() && addr >= BLIZZARD_2060_SCSI_OFFSET) {
+ cpuboard_ncr9x_scsi_put(addr, b);
+ } else if ((currprefs.cpuboard_type == BOARD_BLIZZARD_1230_IV_SCSI || currprefs.cpuboard_type == BOARD_BLIZZARD_1260_SCSI) && addr >= BLIZZARD_SCSI_KIT_SCSI_OFFSET) {
+ cpuboard_ncr9x_scsi_put(addr, b);
+ } else if (is_csmk1()) {
+ if (addr >= CYBERSTORM_MK1_SCSI_OFFSET) {
+ cpuboard_ncr9x_scsi_put(addr, b);
+ }
+ } else if (is_csmk2()) {
+ if (addr >= CYBERSTORM_MK2_SCSI_OFFSET) {
+ cpuboard_ncr9x_scsi_put(addr, b);
+ } else {
+ addr &= ~3;
+ addr |= csmk2_flashaddressing;
+ flash_write(flashrom, addr, b);
+ }
+ }
}
static void REGPARAM2 blizzarde8_lput(uaecptr addr, uae_u32 b)
addr &= 65535;
if (addr == 0x48 && !configured) {
map_banks(&blizzardea_bank, b, 0x20000 >> 16, 0x20000);
- write_log(_T("Blizzard Z2 autoconfigured at %02X0000\n"), b);
+ write_log(_T("Blizzard/CyberStorm Z2 autoconfigured at %02X0000\n"), b);
configured = 1;
expamem_next();
return;
static void blizzard_copymaprom(void)
{
uae_u8 *src = get_real_address(BLIZZARD_MAPROM_BASE);
- uae_u8 *dst = get_real_address(0xf80000);
+ uae_u8 *dst = kickmem_bank.baseaddr;
protect_roms(false);
memcpy(dst, src, 524288);
protect_roms(true);
{
if (blizzardmaprom_bank.baseaddr) {
uae_u8 *src = blizzardmaprom_bank.baseaddr;
- uae_u8 *dst = get_real_address(0xf80000);
+ uae_u8 *dst = kickmem_bank.baseaddr;
+ protect_roms(false);
+ memcpy(dst, src, 524288);
+ protect_roms(true);
+ }
+}
+static void cyberstormmk2_copymaprom(void)
+{
+ if (blizzardmaprom_bank.baseaddr) {
+ uae_u8 *src = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
+ uae_u8 *dst = kickmem_bank.baseaddr;
+ protect_roms(false);
+ memcpy(dst, src, 524288);
+ protect_roms(true);
+ }
+}
+static void cyberstormmk1_copymaprom(void)
+{
+ if (blizzardmaprom_bank.baseaddr) {
+ uae_u8 *src = blizzardmaprom_bank.baseaddr;
+ uae_u8 *dst = kickmem_bank.baseaddr;
protect_roms(false);
memcpy(dst, src, 524288);
protect_roms(true);
void cpuboard_rethink(void)
{
- if (is_cs() || is_blizzardppc()) {
- if (!(io_reg[CSIII_REG_IRQ] & 3))
+ if (is_csmk3() || is_blizzardppc()) {
+ if (!(io_reg[CSIII_REG_IRQ] & (P5_IRQ_SCSI_EN | P5_IRQ_SCSI)))
INTREQ(0x8000 | 0x0008);
}
}
+static void blizzardppc_maprom(void)
+{
+ if (maprom_state)
+ map_banks(&blizzardmaprom2_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
+ else
+ map_banks(&blizzardmaprom_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
+}
static void cyberstorm_maprom(void)
{
- map_banks(&blizzardmaprom_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
+ if (!(io_reg[CSIII_REG_SHADOW] & P5_SHADOW) && is_ppc())
+ map_banks(&blizzardmaprom2_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
+ else
+ map_banks(&blizzardmaprom_bank, CYBERSTORM_MAPROM_BASE >> 16, 524288 >> 16, 0);
+}
+
+static void cyberstormmk2_maprom(void)
+{
+ if (maprom_state)
+ map_banks_nojitdirect(&blizzardmaprom_bank, blizzardmaprom_bank.start >> 16, 524288 >> 16, 0);
}
void cyberstorm_irq(int level)
{
if (level)
- io_reg[CSIII_REG_IRQ] &= ~1;
+ io_reg[CSIII_REG_IRQ] &= ~P5_IRQ_SCSI;
else
- io_reg[CSIII_REG_IRQ] |= 1;
+ io_reg[CSIII_REG_IRQ] |= P5_IRQ_SCSI;
cpuboard_rethink();
}
void blizzardppc_irq(int level)
{
if (level)
- io_reg[CSIII_REG_IRQ] &= ~1;
+ io_reg[CSIII_REG_IRQ] &= ~P5_IRQ_SCSI;
else
- io_reg[CSIII_REG_IRQ] |= 1;
+ io_reg[CSIII_REG_IRQ] |= P5_IRQ_SCSI;
cpuboard_rethink();
}
#ifdef JIT
special_mem |= S_READ;
#endif
- if (is_cs() || is_blizzardppc()) {
+ //write_log(_T("CS IO XBGET %08x=%02X PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
+ if (is_csmk3() || is_blizzardppc()) {
uae_u32 bank = addr & 0x10000;
if (bank == 0) {
int reg = (addr & 0xff) / 8;
v = io_reg[reg];
if (reg == CSIII_REG_LOCK && is_blizzardppc())
- v |= 0x08;
+ v |= 0x08; // BPPC special bit
if (reg != CSIII_REG_IRQ)
write_log(_T("CS IO BGET %08x=%02X PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
} else {
#ifdef JIT
special_mem |= S_READ;
#endif
- if (is_cs() || is_blizzardppc()) {
+ if (is_csmk3() || is_blizzardppc()) {
;//write_log(_T("CS IO WGET %08x\n"), addr);
//activate_debugger();
}
#ifdef JIT
special_mem |= S_READ;
#endif
- if (is_cs() || is_blizzardppc()) {
- write_log(_T("CS IO LGET %08x PC=%08x\n"), addr, M68K_GETPC);
- //activate_debugger();
+ write_log(_T("CS IO LGET %08x PC=%08x\n"), addr, M68K_GETPC);
+ if (is_blizzard2060() && currprefs.maprom) {
+ if (addr & 0x10000000) {
+ maprom_state = 0;
+ } else {
+ maprom_state = 1;
+ }
}
return 0;
}
#ifdef JIT
special_mem |= S_WRITE;
#endif
- if (is_blizzard()) {
+ //write_log(_T("CS IO XBPUT %08x %02x PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
+ if (is_csmk2()) {
+ csmk2_flashaddressing = addr & 3;
+ if (addr == 0x880000e3 && v == 0x2a) {
+ maprom_state = 1;
+ write_log(_T("CSMKII MAPROM enabled\n"));
+ cyberstormmk2_copymaprom();
+ }
+ } else if (is_blizzard()) {
if ((addr & 65535) == (BLIZZARD_MAPROM_ENABLE & 65535)) {
if (v != 0x42 || maprom_state || !currprefs.maprom)
return;
write_log(_T("Blizzard MAPROM enabled\n"));
blizzard_copymaprom();
}
- } else if (is_cs() || is_blizzardppc()) {
+ } else if (is_csmk3() || is_blizzardppc()) {
write_log(_T("CS IO BPUT %08x %02x PC=%08x\n"), addr, v & 0xff, M68K_GETPC);
uae_u32 bank = addr & 0x10000;
if (bank == 0) {
if (addr == 0x12) {
maprom_state = 1;
cyberstorm_copymaprom();
+ blizzardppc_maprom();
}
}
addr /= 8;
if (!(regval & P5_AMIGA_RESET)) {
uae_reset(0, 0);
io_reg[addr] |= P5_AMIGA_RESET;
+ write_log(_T("CPUBoard Amiga Reset\n"));
+ }
+ if (!(oldval & P5_PPC_RESET) && (regval & P5_PPC_RESET)) {
+ static int warned;
+ write_log(_T("PPC reset cleared. Someone wants to run PPC programs..\n"));
+ if (!warned) {
+ gui_message(_T("WARNING: unemulated PPC CPU started!"));
+ warned = 1;
+ }
}
if (!(regval & P5_M68K_RESET)) {
m68k_reset();
io_reg[addr] |= P5_M68K_RESET;
+ write_log(_T("CPUBoard M68K Reset\n"));
}
} else if (addr == CSIII_REG_SHADOW) {
- if (is_cs() && ((oldval ^ regval) & 1)) {
+ if (is_csmk3() && ((oldval ^ regval) & 1)) {
maprom_state = (regval & 1) ? 0 : 1;
cyberstorm_copymaprom();
+ cyberstorm_maprom();
}
+// if ((oldval ^ regval) & 7) {
+// activate_debugger();
+// }
}
cpuboard_rethink();
}
special_mem |= S_WRITE;
#endif
if (is_blizzard()) {
+ write_log(_T("CS IO WPUT %08x %04x\n"), addr, v);
if((addr & 65535) == (BLIZZARD_BOARD_DISABLE & 65535)) {
if (v != 0xcafe)
return;
write_log(_T("Blizzard board disable!\n"));
cpu_halt(4); // not much choice..
}
- } else if (is_cs() || is_blizzardppc()) {
+ } else if (is_csmk3() || is_blizzardppc()) {
write_log(_T("CS IO WPUT %08x %04x\n"), addr, v);
+ } else if (is_csmk2()) {
+ write_log(_T("CS IO WPUT %08x %04x\n"), addr, v);
+ if (addr == CSMK2_BOARD_DISABLE) {
+ if (v != 0xcafe)
+ return;
+ write_log(_T("CSMK2 board disable!\n"));
+ cpu_halt(4); // not much choice..
+ }
}
}
static void REGPARAM2 blizzardio_lput(uaecptr addr, uae_u32 v)
#ifdef JIT
special_mem |= S_WRITE;
#endif
- if (is_cs() || is_blizzardppc()) {
- write_log(_T("CS IO LPUT %08x %08x\n"), addr, v);
+ write_log(_T("CS IO LPUT %08x %08x\n"), addr, v);
+ if (is_csmk1()) {
+ if (addr == 0x80f80000) {
+ maprom_state = 1;
+ cyberstormmk1_copymaprom();
+ }
+ }
+ if (is_blizzard2060() && currprefs.maprom) {
+ if (addr & 0x10000000) {
+ maprom_state = 0;
+ } else {
+ maprom_state = 1;
+ }
}
}
-static addrbank blizzardio_bank = {
- blizzardio_lget, blizzardio_wget, blizzardio_bget,
- blizzardio_lput, blizzardio_wput, blizzardio_bput,
- default_xlate, default_check, NULL, _T("CPUBoard IO"),
- blizzardio_wget, blizzardio_bget, ABFLAG_IO
-};
void cpuboard_vsync(void)
{
map_banks(&blizzardf0_bank, 0xf00000 >> 16, 0x60000 >> 16, 0);
map_banks(&blizzardio_bank, 0xf60000 >> 16, (2 * 65536) >> 16, 0);
map_banks(&blizzardf0_bank, 0xf70000 >> 16, 0x10000 >> 16, 0);
- cyberstorm_maprom();
+ blizzardppc_maprom();
}
}
- if (is_cs()) {
+ if (is_csmk3()) {
map_banks(&blizzardf0_bank, 0xf00000 >> 16, 262144 >> 16, 0);
map_banks(&blizzardio_bank, 0xf50000 >> 16, (3 * 65536) >> 16, 0);
cyberstorm_maprom();
+ if (!(io_reg[CSIII_REG_SHADOW] & P5_SHADOW))
+ cyberstorm_copymaprom();
+ }
+ if (is_csmk2()) {
+ map_banks(&blizzardio_bank, 0x88000000 >> 16, 65536 >> 16, 0);
+ map_banks(&blizzardio_bank, 0x83000000 >> 16, 65536 >> 16, 0);
+ map_banks(&blizzardf0_bank, 0xf00000 >> 16, 65536 >> 16, 0);
+ cyberstormmk2_maprom();
+ }
+ if (is_csmk1()) {
+ map_banks(&blizzardio_bank, 0x80f80000 >> 16, 65536 >> 16, 0);
+ map_banks(&blizzardf0_bank, 0xf00000 >> 16, 65536 >> 16, 0);
+ map_banks(&blizzardmaprom_bank, 0x07f80000 >> 16, 524288 >> 16, 0);
+ }
+ if (is_blizzard2060()) {
+ map_banks(&blizzardf0_bank, 0xf00000 >> 16, 65536 >> 16, 0);
+ map_banks(&blizzardio_bank, 0x80000000 >> 16, 0x10000000 >> 16, 0);
+ if (currprefs.maprom)
+ map_banks_nojitdirect(&blizzardmaprom_bank, (a3000hmem_bank.start + a3000hmem_bank.allocated - 524288) >> 16, 524288 >> 16, 0);
}
}
configured = false;
delayed_rom_protect = 0;
currprefs.cpuboardmem1_size = changed_prefs.cpuboardmem1_size;
- if (hardreset || !currprefs.maprom)
+ if (hardreset || (!currprefs.maprom && (is_blizzard() || is_blizzard2060())))
maprom_state = 0;
- if (is_cs() || is_blizzardppc()) {
+ if (is_csmk3() || is_blizzardppc()) {
if (hardreset)
memset(io_reg, 0x7f, sizeof io_reg);
io_reg[CSIII_REG_RESET] = 0x7f;
io_reg[CSIII_REG_IRQ] = 0x7f;
- maprom_state = 0;
}
flash_unlocked = 0;
} else {
xfree(blizzardram_nojit_bank.baseaddr);
}
+ if (blizzardmaprom_bank_mapped)
+ mapped_free(blizzardmaprom_bank.baseaddr);
+
blizzardram_bank.baseaddr = NULL;
blizzardram_nojit_bank.baseaddr = NULL;
blizzardmaprom_bank.baseaddr = NULL;
+ blizzardmaprom2_bank.baseaddr = NULL;
+ blizzardmaprom_bank_mapped = false;
mapped_free(blizzardf0_bank.baseaddr);
blizzardf0_bank.baseaddr = NULL;
}
blizzardram_nojit_bank.baseaddr = blizzardram_bank.baseaddr;
- blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
- blizzardmaprom_bank.start = BLIZZARD_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
- blizzardmaprom_bank.mask = 524288 - 1;
-
maprom_base = blizzardram_bank.allocated - 524288;
blizzardf0_bank.start = 0x00f00000;
blizzardea_bank.baseaddr = mapped_malloc(blizzardea_bank.allocated, _T("rom_ea"));
}
- } else if (is_cs()) {
+ if (cpuboard_size > 2 * 524288) {
+ if (!is_blizzardppc()) {
+ blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
+ blizzardmaprom_bank.start = BLIZZARD_MAPROM_BASE;
+ blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.mask = 524288 - 1;
+ } else {
+ blizzardmaprom_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 524288;
+ blizzardmaprom_bank.start = CYBERSTORM_MAPROM_BASE;
+ blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.mask = 524288 - 1;
+ blizzardmaprom2_bank.baseaddr = blizzardram_bank.baseaddr + cpuboard_size - 2 * 524288;
+ blizzardmaprom2_bank.start = CYBERSTORM_MAPROM_BASE;
+ blizzardmaprom2_bank.allocated = 524288;
+ blizzardmaprom2_bank.mask = 524288 - 1;
+ }
+ }
+
+ } else if (is_csmk1()) {
+
+ blizzardf0_bank.start = 0x00f00000;
+ blizzardf0_bank.allocated = 65536;
+ blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.baseaddr = mapped_malloc(blizzardf0_bank.allocated, _T("rom_f0"));
+
+ blizzardea_bank.allocated = 65536;
+ blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.baseaddr = mapped_malloc(blizzardea_bank.allocated, _T("rom_ea"));
+
+ blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.baseaddr = mapped_malloc(blizzardmaprom_bank.allocated, _T("csmk1_maprom"));
+ blizzardmaprom_bank.start = 0x07f80000;
+ blizzardmaprom_bank.mask = 524288 - 1;
+ blizzardmaprom_bank_mapped = true;
+
+ } else if (is_csmk2() || is_blizzard2060()) {
+
+ blizzardea_bank.allocated = 2 * 65536;
+ blizzardea_bank.mask = blizzardea_bank.allocated - 1;
+ blizzardea_bank.baseaddr = mapped_malloc(blizzardea_bank.allocated, _T("rom_ea"));
+
+ blizzardf0_bank.start = 0x00f00000;
+ blizzardf0_bank.allocated = 65536;
+ blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
+ blizzardf0_bank.baseaddr = mapped_malloc(blizzardf0_bank.allocated, _T("rom_f0"));
+
+ blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
+ blizzardmaprom_bank.start = a3000hmem_bank.start + a3000hmem_bank.allocated - 524288;
+ blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.mask = 524288 - 1;
+
+ } else if (is_csmk3()) {
blizzardram_bank.start = CS_RAM_BASE;
blizzardram_bank.allocated = cpuboard_size;
blizzardf0_bank.mask = blizzardf0_bank.allocated - 1;
blizzardf0_bank.baseaddr = mapped_malloc(blizzardf0_bank.allocated, _T("rom_f0"));
- blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 524288;
- blizzardmaprom_bank.start = CYBERSTORM_MAPROM_BASE;
- blizzardmaprom_bank.allocated = 524288;
- blizzardmaprom_bank.mask = 524288 - 1;
+ if (a3000hmem_bank.allocated > 2 * 524288) {
+ blizzardmaprom_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 1 * 524288;
+ blizzardmaprom_bank.start = CYBERSTORM_MAPROM_BASE;
+ blizzardmaprom_bank.allocated = 524288;
+ blizzardmaprom_bank.mask = 524288 - 1;
+ blizzardmaprom2_bank.baseaddr = a3000hmem_bank.baseaddr + a3000hmem_bank.allocated - 2 * 524288;
+ blizzardmaprom2_bank.start = CYBERSTORM_MAPROM_BASE;
+ blizzardmaprom2_bank.allocated = 524288;
+ blizzardmaprom2_bank.mask = 524288 - 1;
+ }
}
}
if (is_blizzard() || is_blizzardppc()) {
if (maprom_state)
blizzard_copymaprom();
- } else if (is_cs()) {
+ } else if (is_csmk3()) {
if (!(io_reg[CSIII_REG_SHADOW] & P5_SHADOW))
cyberstorm_copymaprom();
}
return true;
}
+bool cpuboard_08000000(struct uae_prefs *p)
+{
+ switch (p->cpuboard_type)
+ {
+ case BOARD_BLIZZARD_2060:
+ case BOARD_CSMK1:
+ case BOARD_CSMK2:
+ case BOARD_CSMK3:
+ case BOARD_CSPPC:
+ case BOARD_BLIZZARDPPC:
+ case BOARD_WARPENGINE_A4000:
+ return true;
+ }
+ return false;
+}
+
static struct zfile *flashfile_open(const TCHAR *name)
{
struct zfile *f;
return f;
}
+static struct zfile *board_rom_open(int *roms, const TCHAR *name)
+{
+ struct zfile *zf = NULL;
+ struct romlist *rl = getromlistbyids(roms);
+ if (rl)
+ zf = read_rom(rl->rd);
+ if (!zf) {
+ TCHAR path[MAX_DPATH];
+ fetch_rompath(path, sizeof path / sizeof(TCHAR));
+ _tcscat(path, name);
+ zf = zfile_fopen(path, _T("rb"), ZFD_NORMAL);
+ }
+ return zf;
+}
+
addrbank *cpuboard_autoconfig_init(void)
{
struct zfile *autoconfig_rom = NULL;
- int roms[2];
+ int roms[2], roms2[2];
bool autoconf = true;
const TCHAR *romname = NULL;
roms[0] = -1;
roms[1] = -1;
+ roms2[0] = -1;
+ roms2[1] = -1;
switch (currprefs.cpuboard_type)
{
+ case BOARD_BLIZZARD_1230_IV_SCSI:
+ roms2[0] = 94;
case BOARD_BLIZZARD_1230_IV:
roms[0] = 89;
break;
+ case BOARD_BLIZZARD_1260_SCSI:
+ roms2[0] = 94;
case BOARD_BLIZZARD_1260:
roms[0] = 90;
break;
case BOARD_BLIZZARD_2060:
- roms[0] = 91;
+ roms[0] = 92;
break;
case BOARD_WARPENGINE_A4000:
- expamem_next();
- return NULL;
+ return &expamem_null;
+ case BOARD_CSMK1:
+ case BOARD_CSMK2:
case BOARD_CSMK3:
case BOARD_CSPPC:
case BOARD_BLIZZARDPPC:
break;
default:
- expamem_next();
- return NULL;
+ return &expamem_null;
}
struct romlist *rl = getromlistbyids(roms);
autoconfig_rom = read_rom(rl->rd);
}
+ if (currprefs.cpuboard_type == BOARD_CSMK1) {
+ romname = _T("cyberstormmk1.rom");
+ }
+ if (currprefs.cpuboard_type == BOARD_CSMK2) {
+ romname = _T("cyberstormmk2.rom");
+ }
if (currprefs.cpuboard_type == BOARD_CSMK3) {
romname = _T("cyberstormmk3.rom");
}
autoconfig_rom = flashfile_open(romname);
if (!autoconfig_rom) {
write_log(_T("Couldn't open CPU board rom '%s'\n"), romname);
- expamem_next();
- return NULL;
+ return &expamem_null;
}
}
if (!autoconfig_rom && roms[0] != -1) {
- write_log (_T("ROM id %d not found for CPU board emulation\n"));
- expamem_next();
- return NULL;
+ romwarning(roms);
+ write_log (_T("ROM id %d not found for CPU board emulation\n"), roms[0]);
+ return &expamem_null;
}
protect_roms(false);
- if (currprefs.cpuboard_type == BOARD_BLIZZARD_2060) {
+ if (is_blizzard2060()) {
f0rom_size = 65536;
earom_size = 131072;
// 2060 = 2x32k
zfile_fread(&b, 1, 1, autoconfig_rom);
blizzardea_bank.baseaddr[i * 2 + 0] = b;
}
- } else if (is_cs() || is_blizzardppc()) {
+ } else if (is_csmk1()) {
+ f0rom_size = 65536;
+ earom_size = 65536;
+ for (int i = 0; i < 32768; i++) {
+ uae_u8 b = 0xff;
+ zfile_fread(&b, 1, 1, autoconfig_rom);
+ blizzardea_bank.baseaddr[i * 2 + 0] = b;
+ blizzardea_bank.baseaddr[i * 2 + 1] = 0xff;
+ }
+ } else if (is_csmk2()) {
+ earom_size = 131072;
+ f0rom_size = 65536;
+ zfile_fread(blizzardea_bank.baseaddr, earom_size, 1, autoconfig_rom);
+ flashrom = flash_new(blizzardea_bank.baseaddr, earom_size, earom_size, flashrom_file);
+ memcpy(blizzardf0_bank.baseaddr, blizzardea_bank.baseaddr + 65536, 65536);
+ } else if (is_csmk3() || is_blizzardppc()) {
f0rom_size = is_blizzardppc() ? 524288 : 131072;
earom_size = 0;
memset(blizzardf0_bank.baseaddr, 0xff, f0rom_size);
autoconfig_rom = NULL;
}
flashrom = flash_new(blizzardf0_bank.baseaddr, f0rom_size, f0rom_size, flashrom_file);
- }
- else {
+ } else {
+ // 1230 MK IV / 1240/60
f0rom_size = 65536;
earom_size = 131072;
// 12xx = 1x32k
zfile_fread(&b, 1, 1, autoconfig_rom);
blizzardea_bank.baseaddr[i] = b;
}
+ zfile_fclose(autoconfig_rom);
+ autoconfig_rom = NULL;
+ if (roms2[0] != -1) {
+ autoconfig_rom = board_rom_open(roms2, _T("blizzard_scsi_kit_iv.rom"));
+ if (autoconfig_rom) {
+ memset(blizzardea_bank.baseaddr + 0x10000, 0xff, 65536);
+ zfile_fread(blizzardea_bank.baseaddr + 0x10000, 32768, 1, autoconfig_rom);
+ } else {
+ write_log(_T("Blizzard SCSI Kit IV ROM not found\n"));
+ }
+ }
}
protect_roms(true);
zfile_fclose(autoconfig_rom);
if (f0rom_size)
map_banks(&blizzardf0_bank, 0xf00000 >> 16, 262144 >> 16, 0);
- if (!autoconf) {
- expamem_next();
- return NULL;
- }
+ if (!autoconf)
+ return &expamem_null;
return &blizzarde8_bank;
}
static addrbank* (*card_init[MAX_EXPANSION_BOARDS]) (void);
static void (*card_map[MAX_EXPANSION_BOARDS]) (void);
-static TCHAR *card_name[MAX_EXPANSION_BOARDS];
+static const TCHAR *card_name[MAX_EXPANSION_BOARDS];
static int card_flags[MAX_EXPANSION_BOARDS];
static int ecard, cardno, z3num;
}
}
+addrbank expamem_null;
static uae_u32 REGPARAM3 expamem_lget (uaecptr) REGPARAM;
static uae_u32 REGPARAM3 expamem_wget (uaecptr) REGPARAM;
static void call_card_init(int index)
{
addrbank *ab;
- expamem_bank.name = card_name[ecard] ? card_name[ecard] : (TCHAR*)_T("None");
+
+ expamem_bank.name = card_name[ecard] ? card_name[ecard] : _T("None");
ab = (*card_init[ecard]) ();
+ if (ab == &expamem_null) {
+ expamem_next();
+ return;
+ }
if (ab) {
// non-NULL: not using expamem_bank
if ((card_flags[ecard] & 1) && currprefs.cs_z3autoconfig) {
static uae_u32 REGPARAM2 expamem_lget (uaecptr addr)
{
- write_log (_T("warning: Z2 READ.L from address $%lx PC=%x\n"), addr, M68K_GETPC);
+ write_log (_T("warning: Z2 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
return (expamem_wget (addr) << 16) | expamem_wget (addr + 2);
}
static uae_u32 REGPARAM2 expamem_wget (uaecptr addr)
{
uae_u32 v = (expamem_bget (addr) << 8) | expamem_bget (addr + 1);
- write_log (_T("warning: READ.W from address $%lx=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
+ write_log (_T("warning: READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
return v;
}
#ifdef JIT
special_mem |= S_WRITE;
#endif
- write_log (_T("warning: Z2 WRITE.L to address $%lx : value $%lx\n"), addr, value);
+ write_log (_T("warning: Z2 WRITE.L to address $%08x : value $%08x\n"), addr, value);
}
static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value)
if (ecard >= cardno)
return;
if (expamem_type () != zorroIII) {
- write_log (_T("warning: WRITE.W to address $%lx : value $%x\n"), addr, value);
+ write_log (_T("warning: WRITE.W to address $%08x : value $%x\n"), addr, value);
} else {
switch (addr & 0xff) {
case 0x44:
static uae_u32 REGPARAM2 expamemz3_wget (uaecptr addr)
{
uae_u32 v = (expamemz3_bget (addr) << 8) | expamemz3_bget (addr + 1);
- write_log (_T("warning: Z3 READ.W from address $%lx=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
+ write_log (_T("warning: Z3 READ.W from address $%08x=%04x PC=%x\n"), addr, v & 0xffff, M68K_GETPC);
return v;
}
static uae_u32 REGPARAM2 expamemz3_lget (uaecptr addr)
{
- write_log (_T("warning: Z3 READ.L from address $%lx PC=%x\n"), addr, M68K_GETPC);
+ write_log (_T("warning: Z3 READ.L from address $%08x PC=%x\n"), addr, M68K_GETPC);
return (expamemz3_wget (addr) << 16) | expamemz3_wget (addr + 2);
}
static void REGPARAM2 expamemz3_bput (uaecptr addr, uae_u32 value)
#ifdef JIT
special_mem |= S_WRITE;
#endif
- write_log (_T("warning: Z3 WRITE.L to address $%lx : value $%lx\n"), addr, value);
+ write_log (_T("warning: Z3 WRITE.L to address $%08x : value $%08x\n"), addr, value);
}
#ifdef CD32
catweasel_start = ((expamem_hi | (expamem_lo >> 4)) << 16);
if (catweasel_start) {
map_banks (&catweasel_bank, catweasel_start >> 16, 1, 0);
- write_log (_T("Catweasel MK%d: mapped @$%lx\n"), cwc.type, catweasel_start);
+ write_log (_T("Catweasel MK%d: mapped @$%08x\n"), cwc.type, catweasel_start);
}
}
#ifdef JIT
special_mem |= S_WRITE;
#endif
- write_log (_T("filesys_lput called PC=%p\n"), M68K_GETPC);
+ write_log (_T("filesys_lput called PC=%08x\n"), M68K_GETPC);
}
static void REGPARAM2 filesys_wput (uaecptr addr, uae_u32 w)
#ifdef JIT
special_mem |= S_WRITE;
#endif
- write_log (_T("filesys_wput called PC=%p\n"), M68K_GETPC);
+ write_log (_T("filesys_wput called PC=%08x\n"), M68K_GETPC);
}
static void REGPARAM2 filesys_bput (uaecptr addr, uae_u32 b)
if (ab->start) {
map_banks (ab, ab->start >> 16, ab->allocated >> 16, 0);
if (ab->allocated <= 524288)
- write_log (_T("%s: mapped @$%lx: %dKB fast memory\n"), ab->name, ab->start, ab->allocated >> 10);
+ write_log (_T("%s: mapped @$%08x: %dKB fast memory\n"), ab->name, ab->start, ab->allocated >> 10);
else
- write_log (_T("%s: mapped @$%lx: %dMB fast memory\n"), ab->name, ab->start, ab->allocated >> 20);
+ write_log (_T("%s: mapped @$%08x: %dMB fast memory\n"), ab->name, ab->start, ab->allocated >> 20);
}
}
filesys_start = ((expamem_hi | (expamem_lo >> 4)) << 16);
map_banks (&filesys_bank, filesys_start >> 16, 1, 0);
- write_log (_T("Filesystem: mapped memory @$%lx.\n"), filesys_start);
+ write_log (_T("Filesystem: mapped memory @$%08x.\n"), filesys_start);
/* 68k code needs to know this. */
a = here ();
org (rtarea_base + RTAREA_FSBOARD);
gfxmem_bank.start = (expamem_hi | (expamem_lo >> 4)) << 16;
if (gfxmem_bank.start) {
map_banks (&gfxmem_bank, gfxmem_bank.start >> 16, gfxmem_bank.allocated >> 16, gfxmem_bank.allocated);
- write_log (_T("%sUAEGFX-card: mapped @$%lx, %d MB RTG RAM\n"), currprefs.rtgmem_type ? _T("Z3") : _T("Z2"), gfxmem_bank.start, gfxmem_bank.allocated / 0x100000);
+ write_log (_T("%sUAEGFX-card: mapped @$%08x, %d MB RTG RAM\n"), currprefs.rtgmem_type ? _T("Z3") : _T("Z2"), gfxmem_bank.start, gfxmem_bank.allocated / 0x100000);
}
}
b = RTAREA_BACKUP;
if (currprefs.cs_mbdmac == 1 || currprefs.cpuboard_type)
b = RTAREA_BACKUP;
+ // CSPPC enables MMU at boot and remaps 0xea0000->0xeffff.
+ if (currprefs.cpuboard_type == BOARD_BLIZZARDPPC)
+ b = RTAREA_BACKUP_2;
ab = &get_mem_bank (RTAREA_DEFAULT);
if (ab) {
if (valid_address (RTAREA_DEFAULT, 65536))
return v;
}
+#ifdef A2065
static addrbank *expamem_init_a2065(void)
{
-#ifdef A2065
return a2065_init ();
-#else
- return NULL;
-#endif
}
+#endif
+#ifdef CDTV
static addrbank *expamem_init_cdtv(void)
{
-#ifdef CDTV
- cdtv_init ();
-#endif
- return NULL;
+ return cdtv_init ();
}
+#endif
+#ifdef A2091
static addrbank *expamem_init_a2091(void)
{
-#ifdef A2091
return a2091_init (0);
-#else
- return NULL;
-#endif
}
+#endif
+#ifdef A2091
static addrbank *expamem_init_a2091_2(void)
{
-#ifdef A2091
return a2091_init (1);
-#else
- return NULL;
-#endif
}
+#endif
+#ifdef NCR
static addrbank *expamem_init_a4091(void)
{
-#ifdef NCR
return ncr710_a4091_autoconfig_init (0);
-#else
- return NULL;
-#endif
}
static addrbank *expamem_init_a4091_2(void)
{
-#ifdef NCR
return ncr710_a4091_autoconfig_init (1);
-#else
- return NULL;
-#endif
}
static addrbank *expamem_init_warpengine(void)
{
-#ifdef NCR
return ncr710_warpengine_autoconfig_init();
-#else
- return NULL;
-#endif
}
+#endif
+#ifdef GFXBOARD
static addrbank *expamem_init_gfxboard_memory(void)
{
-#ifdef GFXBOARD
return gfxboard_init_memory ();
-#else
- return NULL;
-#endif
}
+#endif
+#ifdef GFXBOARD
static addrbank *expamem_init_gfxboard_registers(void)
{
-#ifdef GFXBOARD
return gfxboard_init_registers ();
-#else
- return NULL;
-#endif
}
+#endif
void expamem_reset (void)
{
do_mount = 0;
if (currprefs.cpuboard_type) {
- // This requires first 128k slot.
+ // This may require first 128k slot.
card_flags[cardno] = 1;
- card_name[cardno] = _T("Blizzard");
+ card_name[cardno] = _T("CPUBoard");
card_init[cardno] = cpuboard_autoconfig_init;
card_map[cardno++] = NULL;
}
gfxmem_bank.start = restore_u32 ();
rtarea_base = restore_u32 ();
fastmem2_bank.start = restore_u32 ();
- if (rtarea_base != 0 && rtarea_base != RTAREA_DEFAULT && rtarea_base != RTAREA_BACKUP)
+ if (rtarea_base != 0 && rtarea_base != RTAREA_DEFAULT && rtarea_base != RTAREA_BACKUP && rtarea_base != RTAREA_BACKUP_2)
rtarea_base = 0;
return src;
}
projects / francis / winuae.git / commitdiff