p->m68k_speed = -1;
p->immediate_blits = 0;
p->produce_sound = 2;
+ p->nr_floppies = 0;
p->floppyslots[0].dfxtype = DRV_NONE;
p->floppyslots[1].dfxtype = DRV_NONE;
+ p->floppyslots[2].dfxtype = DRV_PC_35_ONLY_80;
p->cs_compatible = CP_CASABLANCA;
built_in_chipset_prefs(p);
return configure_rom(p, roms, romcheck);
{
int roms[8];
- roms[0] = 16;
- roms[1] = -1;
-
p->bogomem.size = 0;
p->chipmem.size = 0x200000;
p->cpu_model = 68060;
p->fpu_model = 68060;
p->mmu_model = 68060;
+ p->cpuboardmem1.size = 128 * 1024 * 1024;
p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
p->cpu_compatible = p->address_space_24 = 0;
p->m68k_speed = -1;
p->immediate_blits = 0;
p->produce_sound = 2;
+ p->nr_floppies = 0;
p->floppyslots[0].dfxtype = DRV_NONE;
p->floppyslots[1].dfxtype = DRV_NONE;
+ p->floppyslots[2].dfxtype = DRV_PC_35_ONLY_80;
p->cs_compatible = CP_DRACO;
+ p->cpuboard_type = BOARD_MACROSYSTEM;
+ p->cpuboard_subtype = BOARD_MACROSYSTEM_SUB_DRACO;
+ p->rtgboards[0].rtgmem_type = GFXBOARD_ID_ALTAIS_Z3;
+ p->rtgboards[0].rtgmem_size = 4 * 1024 * 1024;
built_in_chipset_prefs(p);
- return configure_rom(p, roms, romcheck);
+ fetch_nvrampath(p->flashfile, sizeof(p->flashfile) / sizeof(TCHAR));
+ _tcscat(p->flashfile, _T("draco.nvr"));
+ roms[0] = 61;
+ roms[1] = -1;
+ if (!configure_rom(p, roms, romcheck)) {
+ return 0;
+ }
+ roms[0] = 234;
+ roms[1] = 311;
+ roms[2] = -1;
+ if (!configure_rom(p, roms, romcheck)) {
+ return 0;
+ }
+ return 1;
+}
+
+static int bip_macrosystem(struct uae_prefs *p, int config, int compa, int romcheck)
+{
+ if (config == 0) {
+ return bip_draco(p, config, compa, romcheck);
+ } else {
+ return bip_casablanca(p, config - 1, compa, romcheck);
+ }
}
int built_in_prefs (struct uae_prefs *p, int model, int config, int compa, int romcheck)
v = bip_arcadia(p, config, compa, romcheck);
break;
case 12:
- v = bip_casablanca(p, config, compa, romcheck);
+ v = bip_macrosystem(p, config, compa, romcheck);
break;
case 13:
v = bip_super (p, config, compa, romcheck);
break;
- case 14:
- v = bip_draco(p, config, compa, romcheck);
- break;
}
if ((p->cpu_model >= 68020 || !p->cpu_memory_cycle_exact) && !p->immediate_blits)
p->waiting_blits = 1;
case BOARD_MACROSYSTEM_SUB_FALCON040:
romtype = ROMTYPE_CB_FALCON40;
break;
+ case BOARD_MACROSYSTEM_SUB_DRACO:
+ return false;
}
break;
static void *draco_mouse_base, *draco_keyboard;
static uae_u8 *dracorom;
static int dracoromsize;
+static uae_u8 draco_revision, draco_cias;
static uae_u8 draco_intena, draco_intpen, draco_svga_irq_state;
static uae_u16 draco_timer, draco_timer_latch;
static uae_u16 draco_kbd_in_buffer[16];
static int draco_kbd_in_buffer_len;
+#define DRACO_KBD_POLL_VAL 96
+
static void draco_keyboard_reset(void)
{
draco_kbd_buffer_len = 0;
if (draco_kbd_poll == 0) {
draco_reg[3] &= ~DRSTAT_KBDCLKIN;
v &= ~DRSTAT_KBDCLKIN;
- draco_kbd_poll = -4;
+ draco_kbd_poll = -DRACO_KBD_POLL_VAL;
}
draco_reg[3] = v;
return;
if (draco_kbd_poll < 0) {
draco_kbd_poll++;
if (draco_kbd_poll == 0) {
- draco_kbd_poll = 4;
+ draco_kbd_poll = DRACO_KBD_POLL_VAL;
v |= DRSTAT_KBDCLKIN;
uae_u16 bit = (draco_reg[1] & DRCNTRL_KBDDATOUT) ? 0x8000 : 0;
#if KBD_DEBUG > 1
draco_reg[3] |= DRSTAT_KBDCLKIN;
draco_kbd_code = 0;
draco_kbd_state2 = 0;
- draco_kbd_poll = 4;
+ draco_kbd_poll = DRACO_KBD_POLL_VAL;
}
draco_kbd_state = v;
{
uae_u8 *dptr = NULL;
int maxlen = 0;
- if (draco_1wire_cmd == DS_ROM_SEARCH) {
+ if (draco_1wire_cmd == DS_READ_MEMORY) {
dptr = draco_1wire_sram;
maxlen = sizeof(draco_1wire_sram);
} else if (draco_1wire_cmd == DS_READ_SCRATCHPAD) {
#endif
}
+static uaecptr draco_convert_cia_addr(uaecptr addr)
+{
+ uaecptr ciaaddr = 0;
+ addr &= 0xffff;
+ if ((addr & 0x1001) == 0x1001 && (draco_cias & 2)) {
+ ciaaddr = 0xbfe001 + (addr & 0xf00);
+ }
+ if ((addr & 0x1001) == 0x0000 && (draco_cias & 1)) {
+ ciaaddr = 0xbfd000 + (addr & 0xf00);
+ }
+ return ciaaddr;
+}
+
void draco_bustimeout(uaecptr addr)
{
write_log("draco bus timeout %08x\n", addr);
#endif
break;
case 9:
- v = 4;
+ v = draco_revision;
draco_timer_latched = true;
break;
case 0xb:
break;
}
+ // casablanca revision
+ if (addr == 0x020007c3)
+ v = draco_revision;
+
} else if ((addr & 0x07c00000) == 0x02800000) {
// CIA (no CIAs if rev4+)
+ if (draco_cias) {
+ uaecptr cia_addr = draco_convert_cia_addr(addr);
+ if (cia_addr) {
+ v = cia_bank.bget(cia_addr);
+ }
+ }
} else if ((addr & 0x07000000) == 0x01000000) {
} else if ((addr & 0x07c00000) == 0x02800000) {
// CIA (no CIAs if rev4+)
+ if (draco_cias) {
+ uaecptr cia_addr = draco_convert_cia_addr(addr);
+ if (cia_addr) {
+ cia_bank.bput(cia_addr, b);
+ }
+ }
} else if ((addr & 0x07c00000) == 0x02000000) {
draco_reg[3] &= ~DRSTAT_BUSTIMO;
break;
}
+
} else if ((addr & 0x07000000) == 0x01000000) {
// interrupt control
};
-void casablanca_map_overlay(void)
-{
- // Casablanca has ROM at address zero, no chip ram, no overlay.
- map_banks(&kickmem_bank, 524288 >> 16, 524288 >> 16, 0);
- map_banks(&extendedkickmem_bank, 0 >> 16, 524288 >> 16, 0);
- map_banks(&draco_bank, 0x02000000 >> 16, 0x01000000 >> 16, 0);
- // KS ROM is here
- map_banks(&kickmem_bank, 0x02c00000 >> 16, 524288 >> 16, 0);
- map_banks(&draco_bank, 0x03000000 >> 16, 0x01000000 >> 16, 0);
-}
-
void draco_ext_interrupt(bool i6)
{
if (i6) {
void draco_init(void)
{
- if (currprefs.cs_compatible != CP_DRACO) {
- return;
- }
+ if (currprefs.cs_compatible == CP_DRACO) {
+ TCHAR path[MAX_DPATH];
+ cfgfile_resolve_path_out_load(currprefs.flashfile, path, MAX_DPATH, PATH_ROM);
+ struct zfile *draco_flashfile = zfile_fopen(path, _T("rb"), ZFD_NORMAL);
+ if (draco_flashfile) {
+ zfile_fread(draco_1wire_rom, sizeof(draco_1wire_rom), 1, draco_flashfile);
+ zfile_fseek(draco_flashfile, 8, SEEK_CUR);
+ zfile_fread(draco_1wire_sram, sizeof(draco_1wire_sram), 1, draco_flashfile);
+ zfile_fclose(draco_flashfile);
+ }
- TCHAR path[MAX_DPATH];
- cfgfile_resolve_path_out_load(currprefs.flashfile, path, MAX_DPATH, PATH_ROM);
- struct zfile *draco_flashfile = zfile_fopen(path, _T("rb"), ZFD_NORMAL);
- if (draco_flashfile) {
- zfile_fread(draco_1wire_rom, sizeof(draco_1wire_rom), 1, draco_flashfile);
- zfile_fseek(draco_flashfile, 8, SEEK_CUR);
- zfile_fread(draco_1wire_sram, sizeof(draco_1wire_sram), 1, draco_flashfile);
- zfile_fclose(draco_flashfile);
- }
+ draco_revision = (currprefs.cpuboard_settings & 1) ? 4 : 3;
+ draco_cias = draco_revision < 4 ? 2 : 0;
+ if (currprefs.cpuboard_settings & 4) {
+ draco_cias |= 1;
+ }
+ if (currprefs.cpuboard_settings & 8) {
+ draco_cias |= 2;
+ }
+ int idx;
+ const TCHAR *romname = NULL;
+ struct boardromconfig *brc;
+ brc = get_device_rom(&currprefs, ROMTYPE_CPUBOARD, 0, &idx);
+ if (brc) {
+ romname = brc->roms[idx].romfile;
+ dracorom = zfile_load_file(romname, &dracoromsize);
+ }
- int idx;
- const TCHAR *romname = NULL;
- struct boardromconfig *brc;
- brc = get_device_rom(&currprefs, ROMTYPE_CPUBOARD, 0, &idx);
- if (brc) {
- romname = brc->roms[idx].romfile;
- dracorom = zfile_load_file(romname, &dracoromsize);
+ draco_reset(1);
+
+ device_add_rethink(draco_irq);
+ device_add_hsync(draco_hsync);
+ device_add_reset(draco_reset);
}
+ if (currprefs.cs_compatible == CP_CASABLANCA) {
- draco_reset(1);
+ draco_revision = 9;
+ draco_reset(1);
- device_add_rethink(draco_irq);
- device_add_hsync(draco_hsync);
- device_add_reset(draco_reset);
+ device_add_rethink(draco_irq);
+ device_add_hsync(draco_hsync);
+ device_add_reset(draco_reset);
+ }
}
bool draco_mouse(int port, int x, int y, int z, int b)
{
- if (currprefs.cs_compatible == CP_DRACO) {
+ if (currprefs.cs_compatible == CP_DRACO || currprefs.cs_compatible == CP_CASABLANCA) {
if (b < 0)
return true;
mouse_serial_poll(x, y, z, b, draco_mouse_base);
return false;
}
+void casablanca_map_overlay(void)
+{
+ // Casablanca has ROM at address zero, no chip ram, no overlay.
+ map_banks(&kickmem_bank, 524288 >> 16, 524288 >> 16, 0);
+ map_banks(&extendedkickmem_bank, 0 >> 16, 524288 >> 16, 0);
+ map_banks(&draco_bank, 0x02000000 >> 16, 0x01000000 >> 16, 0);
+ // KS ROM is here
+ map_banks(&kickmem_bank, 0x02c00000 >> 16, 524288 >> 16, 0);
+ map_banks(&draco_bank, 0x03000000 >> 16, 0x01000000 >> 16, 0);
+}
+
+
void draco_map_overlay(void)
{
// hide custom registers
NULL
}
};
+static const struct expansionboardsettings draco_settings[] = {
+ {
+ // 0/1
+ _T("Revision\0") _T("3\0") _T("4\0"),
+ _T("hwrev\0") _T("3\0") _T("4\0"),
+ true, false, 0
+ },
+ {
+ // 2
+ _T("CIA-A (Rev3 always includes CIA-A)"),
+ _T("ciaa"),
+ false, false, 1
+ },
+ {
+ // 3
+ _T("CIA-B (Optional)"),
+ _T("ciab"),
+ false, false, 0
+ },
+ {
+ NULL
+ }
+};
static const struct cpuboardsubtype macrosystem_sub[] = {
{
_T("Warp Engine A4000"),
128 * 1024 * 1024,
0,
ncr710_draco_init, NULL, BOARD_NONAUTOCONFIG_BEFORE, 1,
+ draco_settings
+ },
+ {
+ _T("Casablanca"),
+ _T("casablanca"),
+ ROMTYPE_CB_CASAB | ROMTYPE_NONE, 0, 4,
+ draco_add_scsi_unit, EXPANSIONTYPE_SCSI,
+ BOARD_MEMORY_HIGHMEM,
+ 128 * 1024 * 1024,
+ 0,
+ NULL, NULL, BOARD_NONAUTOCONFIG_BEFORE, 1,
},
{
NULL
#define ROMTYPE_CB_HARMS3KP 0x00040020
#define ROMTYPE_CB_A1230S1 0x00040021
#define ROMTYPE_CB_DRACO 0x00040022
+#define ROMTYPE_CB_CASAB 0x00040023
#define ROMTYPE_FREEZER 0x00080000
#define ROMTYPE_AR 0x00080001
DEFEVENTKB(KEY_LEFTBRACKET,_T("Left Bracket"),AM_K,AK_LBRACKET,0x1a)
DEFEVENTKB(KEY_RIGHTBRACKET,_T("Right Bracket"),AM_K,AK_RBRACKET,0x1b)
-DEFEVENTKB(KEY_SEMICOLON,_T("Semicolon"),AM_K,AK_SEMICOLON,0x4c)
-DEFEVENTKB(KEY_SINGLEQUOTE,_T("Single Quote"),AM_K,AK_QUOTE,0x0e)
+DEFEVENTKB(KEY_SEMICOLON,_T("Semicolon"),AM_K,AK_SEMICOLON,0x27)
+DEFEVENTKB(KEY_SINGLEQUOTE,_T("Single Quote"),AM_K,AK_QUOTE,0x28)
DEFEVENTKB(KEY_COMMA,_T("Comma"),AM_K,AK_COMMA,0x33)
DEFEVENTKB(KEY_PERIOD,_T("Period"),AM_K,AK_PERIOD,0x34)
DEFEVENTKB(KEY_DIV,_T("Slash"),AM_K,AK_SLASH,0x35)
/* misc */
-DEFEVENT(KEY_CDTV_STOP,_T("CDTV Stop"),AM_K,0,0,0x72)
-DEFEVENT(KEY_CDTV_PLAYPAUSE,_T("CDTV Play/Pause"),AM_K,0,0,0x73)
-DEFEVENT(KEY_CDTV_PREV,_T("CDTV Previous"),AM_K,0,0,0x74)
-DEFEVENT(KEY_CDTV_NEXT,_T("CDTV Next"),AM_K,0,0,0x75)
-DEFEVENT(KEY_CDTV_REW,_T("CDTV Rewind"),AM_K,0,0,0x76)
-DEFEVENT(KEY_CDTV_FF,_T("CDTV Fast Forward"),AM_K,0,0,0x77)
-
-DEFEVENT(KEY_0E,_T("Keycode 0x0E"),AM_K,0,0,0x0e)
-
-DEFEVENT(KEY_1C,_T("Keycode 0x1C"),AM_K,0,0,0x1c)
-
-DEFEVENT(KEY_2B,_T("Keycode 0x2B"),AM_K,0,0,0x2b)
-
-DEFEVENT(KEY_2C,_T("Keycode 0x2C"),AM_K,0,0,0x2C)
-
-DEFEVENT(KEY_30,_T("Keycode 0x30"),AM_K,0,0,0x30)
-
-DEFEVENT(KEY_3B,_T("Keycode 0x3B"),AM_K,0,0,0x3b)
-
-DEFEVENT(KEY_68,_T("Keycode 0x68"),AM_K,0,0,0x68)
-DEFEVENT(KEY_69,_T("Keycode 0x69"),AM_K,0,0,0x69)
-DEFEVENT(KEY_6A,_T("Keycode 0x6A"),AM_K,0,0,0x6a)
-DEFEVENT(KEY_6C,_T("Keycode 0x6C"),AM_K,0,0,0x6c)
+DEFEVENTKB(KEY_CDTV_STOP,_T("CDTV Stop"),AM_K,0x72,0)
+DEFEVENTKB(KEY_CDTV_PLAYPAUSE,_T("CDTV Play/Pause"),AM_K,0x73,0)
+DEFEVENTKB(KEY_CDTV_PREV,_T("CDTV Previous"),AM_K,0x74,0)
+DEFEVENTKB(KEY_CDTV_NEXT,_T("CDTV Next"),AM_K,0x75,0)
+DEFEVENTKB(KEY_CDTV_REW,_T("CDTV Rewind"),AM_K,0x76,0)
+DEFEVENTKB(KEY_CDTV_FF,_T("CDTV Fast Forward"),AM_K,0x77,0)
+
+DEFEVENTKB(KEY_0E,_T("Keycode 0x0E"),AM_K,0x0e,0)
+DEFEVENTKB(KEY_1C,_T("Keycode 0x1C"),AM_K,0x1c,0)
+DEFEVENTKB(KEY_2B,_T("Keycode 0x2B"),AM_K,0x2b,0x2b)
+DEFEVENTKB(KEY_2C,_T("Keycode 0x2C"),AM_K,0x2c,0)
+DEFEVENTKB(KEY_30,_T("Keycode 0x30"),AM_K,0x30,0x56)
+DEFEVENTKB(KEY_3B,_T("Keycode 0x3B"),AM_K,0x3b,0)
+
+DEFEVENTKB(KEY_68,_T("Keycode 0x68"),AM_K,0x68,0)
+DEFEVENTKB(KEY_69,_T("Keycode 0x69"),AM_K,0x69,0)
+DEFEVENTKB(KEY_6A,_T("Keycode 0x6A"),AM_K,0x6a,0)
+DEFEVENTKB(KEY_6C,_T("Keycode 0x6C"),AM_K,0x6c,0)
DEFEVENTKB(KEY_INSERT,_T("Insert (PC)"),AM_K,0x47,0xe052)
DEFEVENTKB(KEY_PAGEUP,_T("Page Up (PC)"),AM_K,0x48,0xe049)
DEFEVENTKB(KEY_HOME,_T("Home (PC)"),AM_K,0x70,0xe047)
DEFEVENTKB(KEY_END,_T("End (PC)"),AM_K,0x71,0xe04f)
-DEFEVENT(KEY_78,_T("Keycode 0x78 (Reset Warning)"),AM_K,0,0,0x78)
-DEFEVENT(KEY_79,_T("Keycode 0x79"),AM_K,0,0,0x79)
-DEFEVENT(KEY_7A,_T("Keycode 0x7A"),AM_K,0,0,0x7a)
-DEFEVENT(KEY_7B,_T("Keycode 0x7B"),AM_K,0,0,0x7b)
-DEFEVENT(KEY_7C,_T("Keycode 0x7C"),AM_K,0,0,0x7c)
-DEFEVENT(KEY_7D,_T("Keycode 0x7D"),AM_K,0,0,0x7d)
-DEFEVENT(KEY_7E,_T("Keycode 0x7E"),AM_K,0,0,0x7e)
-DEFEVENT(KEY_7F,_T("Keycode 0x7F"),AM_K,0,0,0x7f)
+DEFEVENTKB(KEY_78,_T("Keycode 0x78 (Reset Warning)"),AM_K,0x78,0)
+DEFEVENTKB(KEY_79,_T("Keycode 0x79"),AM_K,0x79,0)
+DEFEVENTKB(KEY_7A,_T("Keycode 0x7A"),AM_K,0x7a,0)
+DEFEVENTKB(KEY_7B,_T("Keycode 0x7B"),AM_K,0x7b,0)
+DEFEVENTKB(KEY_7C,_T("Keycode 0x7C"),AM_K,0x7c,0)
+DEFEVENTKB(KEY_7D,_T("Keycode 0x7D"),AM_K,0x7d,0)
+DEFEVENTKB(KEY_7E,_T("Keycode 0x7E"),AM_K,0x7e,0)
+DEFEVENTKB(KEY_7F,_T("Keycode 0x7F"),AM_K,0x7f,0)
/* special */
a3000hmem_bank.reserved_size = currprefs.mbresmem_high.size;
a3000hmem_bank.mask = a3000hmem_bank.reserved_size - 1;
- if (currprefs.cs_compatible == CP_DRACO) {
+ if (currprefs.cs_compatible == CP_DRACO || currprefs.cs_compatible == CP_CASABLANCA) {
a3000hmem_bank.start = 0x40000000;
} else {
a3000hmem_bank.start = 0x08000000;
if (currprefs.cs_compatible == CP_CASABLANCA) {
casablanca_map_overlay();
return;
- }
- if (currprefs.cs_compatible == CP_DRACO) {
+ } else if (currprefs.cs_compatible == CP_DRACO) {
draco_map_overlay();
return;
}
STRINGTABLE
BEGIN
- IDS_QS_MODELS "A500\nA500+\nA600\nA1000\nA1200\nA3000\nA4000\nCD32\nCDTV\nAmerican Laser Games\nArcadia Multi Select system\nMacrosystem Casablanca/DraCo\nExpanded WinUAE example configuration\n"
+ IDS_QS_MODELS "A500\nA500+\nA600\nA1000\nA1200\nA3000\nA4000\nCD32\nCDTV\nAmerican Laser Games\nArcadia Multi Select system\nMacrosystem\nExpanded WinUAE example configuration\n"
IDS_QS_MODEL_A500 "1.3 ROM, OCS, 512 KB Chip + 512 KB Slow RAM (most common)\nThis configuration is capable of running most games and demos produced for first-generation hardware. Only few exceptions need a different configuration (e.g. the oldest games tend to be incompatible with this configuration).\n1.3 ROM, ECS Agnus, 512 KB Chip RAM + 512 KB Slow RAM\nLater hardware revision of the A500. Nearly 100% compatible with the previous configuration.\n1.3 ROM, ECS Agnus, 1 MB Chip RAM\nFew newer games and demos require this configuration.\n1.3 ROM, OCS Agnus, 512 KB Chip RAM\nVery old (e.g. pre-1988) games and demos may require this configuration.\n1.2 ROM, OCS Agnus, 512 KB Chip RAM\nAs available for the A1000, and installed on the first A500 and A2000 series. Some very old programs only work correctly with this configuration. Note: This system ROM version can only boot from floppy disk (no hard disk boot support).\n1.2 ROM, OCS Agnus, 512 KB Chip RAM + 512 KB Slow RAM\nThis configuration adds expansion memory to the first A500 produced. Try this if your game does not work with newer configurations, but works with the previous one. It could add some features to the game, including faster loading times. Note: This system ROM version can only boot from floppy disk (no hard disk boot support)."
IDS_QS_MODEL_A500P "Basic non-expanded configuration\nThe A500+ adds an ECS Agnus chip, 1 MB of Chip RAM and a 2.0 ROM to the A500. Many A500 games and demos don't work properly on an A500+.\n2 MB Chip RAM expanded configuration\n\n4 MB Fast RAM expanded configuration\n"
IDS_QS_MODEL_A600 "Basic non-expanded configuration\nThe A600 is smaller than the A500+ and has an updated 2.0 ROM.\n2 MB Chip RAM expanded configuration\n\n4 MB Fast RAM expanded configuration\n"
IDS_QS_MODEL_A3000 "1.4 ROM, 2MB Chip + 8MB Fast\n\n2.04 ROM, 2MB Chip + 8MB Fast\n\n3.1 ROM, 2MB Chip + 8MB Fast\n"
IDS_QS_MODEL_A4000 "68030, 3.1 ROM, 2MB Chip + 8MB Fast\n\n68040, 3.1 ROM, 2MB Chip + 8MB Fast\n\nCyberStorm PPC\n"
IDS_QS_MODEL_A4000T "A4000T (test)\nA4000T\n"
- IDS_QS_MODEL_MACROSYSTEM "Macrosystem Casablanca/DraCo\n"
+ IDS_QS_MODEL_MACROSYSTEM "DraCo\n\nCasablanca\n"
IDS_QS_MODEL_ALG "American Laser Games\n"
END
static void load_quickstart (HWND hDlg, int romcheck)
{
bool cdmodel = quickstart_model == 8 || quickstart_model == 9;
+ bool pcmodel = quickstart_model == 12;
ew (guiDlg, IDC_RESETAMIGA, FALSE);
workprefs.nr_floppies = quickstart_floppy;
workprefs.ntscmode = quickstart_ntsc != 0;
}
}
for (int i = 0; i < 2; i++) {
- if (cdmodel) {
+ if (cdmodel || pcmodel) {
quickstart_floppytype[i] = DRV_NONE;
quickstart_floppysubtype[i] = 0;
quickstart_floppysubtypeid[i][0] = 0;
projects / francis / winuae.git / commitdiff