};
static const TCHAR *cdmodes[] = { _T("disabled"), _T(""), _T("image"), _T("ioctl"), _T("spti"), _T("aspi"), 0 };
static const TCHAR *cdconmodes[] = { _T(""), _T("uae"), _T("ide"), _T("scsi"), _T("cdtv"), _T("cd32"), 0 };
-static const TCHAR *specialmonitors[] = { _T("none"), _T("autodetect"), _T("a2024"), _T("graffiti"), 0 };
+static const TCHAR *specialmonitors[] = { _T("none"), _T("autodetect"), _T("a2024"), _T("graffiti"), _T("ham_e"), 0 };
static const TCHAR *rtgtype[] = {
_T("ZorroII"), _T("ZorroIII"),
_T("PicassoII"),
_T("A2630"),
_T("DKB12x0"),
_T("FusionForty"),
+ _T("A3001SI"),
+ _T("A3001SII"),
NULL
};
static const TCHAR *ppc_implementations[] = {
static const TCHAR *lacer[] = { _T("off"), _T("i"), _T("p"), 0 };
static const TCHAR *hdcontrollers[] = {
_T("uae"),
- _T("ide%d"),
+ _T("ide%d"), _T("ide%d_mainboard"), _T("ide%d_a3001"),
_T("scsi%d"), _T("scsi%d_a2091"), _T("scsi%d_a2091-2"), _T("scsi%d_gvp"), _T("scsi%d_gvp-2"), _T("scsi%d_a4091"), _T("scsi%d_a4091-2"),
_T("scsi%d_fastlane"), _T("scsi%d_fastlane-2"),
_T("scsi%d_oktagon2008"), _T("scsi%d_oktagon2008-2"),
if (hdunit < 0 || hdunit > 3)
hdunit = 0;
} else if(_tcslen (hdc) >= 5 && !_tcsncmp (hdc, _T("scsi"), 4)) {
- const TCHAR *ext;
hdcv = HD_CONTROLLER_TYPE_SCSI_AUTO;
hdunit = hdc[4] - '0';
if (hdunit < 0 || hdunit > 7)
hdunit = 0;
- ext = _tcsrchr (hdc, '_');
+ }
+ if (hdcv > HD_CONTROLLER_TYPE_UAE) {
+ const TCHAR *ext = _tcsrchr (hdc, '_');
if (ext) {
ext++;
for (int i = 0; hdcontrollers[i]; i++) {
#define MONITOREMU_AUTO 1
#define MONITOREMU_A2024 2
#define MONITOREMU_GRAFFITI 3
+#define MONITOREMU_HAM_E 4
#define MAX_FILTERSHADERS 4
if (ab->baseaddr == NULL)
return;
- if (rtgmem)
- write_log(_T("x"));
-
if (ab->flags & ABFLAG_INDIRECT) {
while(x) {
if (ab->baseaddr == x->native_address) {
cnt2--;
if (cnt2 <= 0) {
if (currprefs.win32_powersavedisabled)
- SetThreadExecutionState (ES_CONTINUOUS | ES_DISPLAY_REQUIRED);
- else
- SetThreadExecutionState (ES_CONTINUOUS);
+ SetThreadExecutionState (ES_CONTINUOUS | ES_SYSTEM_REQUIRED | ES_DISPLAY_REQUIRED);
cnt2 = 10;
}
}
cnt2--;
if (cnt2 <= 0) {
if (currprefs.win32_powersavedisabled)
- SetThreadExecutionState (ES_CONTINUOUS | ES_DISPLAY_REQUIRED);
- else
- SetThreadExecutionState (ES_CONTINUOUS);
+ SetThreadExecutionState (ES_CONTINUOUS | ES_SYSTEM_REQUIRED | ES_DISPLAY_REQUIRED);
cnt2 = 5;
}
}
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("2")
+#define WINUAEBETA _T("3")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2015, 1, 5)
+#define WINUAEDATE MAKEBD(2015, 1, 11)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
91, -1, -2, // Picasso IV
105, 106, -1, -1, // A2630
+ 114, -1, -1, // A3001
89, -1, -1, // 1230-IV
89, -1, 94, -1, -1, // 1230-IV SCSI
90, -1, -1, // 1260
_T("Picasso IV\0")
_T("A2620/A2630\0")
+ _T("GVP A3001 Series I\0")
_T("Blizzard 1230-IV\0Blizzard 1260\0")
_T("Blizzard 1230-IV/SCSI\0Blizzard 1260/SCSI\0")
_T("Blizzard 2060\0Warp Engine\0TekMagic 2040/2060\0")
ctype = ci->controller_type;
if (ctype >= HD_CONTROLLER_TYPE_IDE_FIRST && ctype <= HD_CONTROLLER_TYPE_IDE_LAST) {
+ const TCHAR *idedevs[] = {
+ _T("IDE:%d"),
+ _T("MB IDE:%d"),
+ _T("GVP IDE:%d")
+ };
_stprintf (blocksize_str, _T("%d"), ci->blocksize);
- _stprintf (devname_str, _T("IDE:%d"), ci->controller_unit);
+ _stprintf (devname_str, idedevs[ctype - HD_CONTROLLER_TYPE_IDE_FIRST], ci->controller_unit);
harddisktype (volname_str, ci);
_tcscpy (bootpri_str, _T("n/a"));
} else if (ctype >= HD_CONTROLLER_TYPE_SCSI_FIRST && ctype <= HD_CONTROLLER_TYPE_SCSI_LAST) {
SendDlgItemMessage (hDlg, IDC_MONITOREMU, CB_ADDSTRING, 0, (LPARAM)buffer);
SendDlgItemMessage (hDlg, IDC_MONITOREMU, CB_ADDSTRING, 0, (LPARAM)_T("A2024"));
SendDlgItemMessage (hDlg, IDC_MONITOREMU, CB_ADDSTRING, 0, (LPARAM)_T("Graffiti"));
+ SendDlgItemMessage (hDlg, IDC_MONITOREMU, CB_ADDSTRING, 0, (LPARAM)_T("HAM-E"));
#ifndef AGA
ew (hDlg, IDC_AGA, FALSE);
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("A2620/A2630"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("DKB 1230/1240"));
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("Fusion Forty"));
+ SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("GVP A3001 Series I"));
+ SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM)_T("GVP A3001 Series II"));
setcpuboardmemsize(hDlg);
case WM_USER:
{
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_RESETCONTENT, 0, 0);
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("UAE"));
- SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("IDE"));
+ SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("IDE (Auto)"));
+ SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("Gayle/A4000 IDE"));
+ SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("GVP A3001 IDE"));
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("SCSI (Auto)"));
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091 SCSI"));
SendDlgItemMessage(hDlg, IDC_HDF_CONTROLLER, CB_ADDSTRING, 0, (LPARAM)_T("A590/A2091 #2 SCSI"));
<ClCompile Include="..\..\flashrom.cpp" />
<ClCompile Include="..\..\gfxboard.cpp" />
<ClCompile Include="..\..\hrtmon.rom.cpp" />
+ <ClCompile Include="..\..\ide.cpp" />
+ <ClCompile Include="..\..\idecontrollers.cpp" />
<ClCompile Include="..\..\inputrecord.cpp" />
<ClCompile Include="..\..\isofs.cpp" />
<ClCompile Include="..\..\logging.cpp" />
<ClCompile Include="..\..\def_icons.cpp">
<Filter>common</Filter>
</ClCompile>
+ <ClCompile Include="..\..\ide.cpp">
+ <Filter>common</Filter>
+ </ClCompile>
+ <ClCompile Include="..\..\idecontrollers.cpp">
+ <Filter>common</Filter>
+ </ClCompile>
</ItemGroup>
<ItemGroup>
<None Include="..\resources\35floppy.ico">
+Beta 3:
+
+- Bitplane DMA sequencer emulation rewritten yet again to again match better with real hardware behavior.
+ DDFSTRT and DDFSTOP seems to use hidden counter that counts 4 cycles ahead of real hpos counter.
+ When DDFSTRT matches, next 4 cycles appears to be idle (probably used to init and fill some bitplane dma
+ sequencer shift register?) and after this delay DMA starts normally. Same for stop. Now programs that write to
+ DDFSTRT or DDFSTOP just before, exactly in same cycle or just after it should match now just work without
+ any extra hacks. (Some kind of 4 stage shift register would also explain why changing number of bitplanes by
+ writing to BPLCON0 mid-line always take effect after exactly 4 cycle delay)
+ Can break anything as usual! Correctly breaks SCX_CoolSpot1.adf's intro on ECS Agnus configurations :)
+- 512k chip + 512k slow ram + ECS Agnus chip mirroring didn't set slow ram bank with "no memory allocated" flag,
+ could have caused crashes when it was attempted to be freed.
+- OCS Agnus 512k chip + 512k+ slow and 1M/0.5+0.5 advanced chipset checkbox checked: move slow ram start at $080000.
+- 68000 bus error and address error exception stack frame's first word undocumented bits 6 to 15 seem to contain
+ opcode of faulted instruction. (from Hatari)
+- IDE/ATAPI emulation decoupled from Gayle emulation and moved to separate source file.
+- Added GVP A3001 board with IDE. Apparently Series I and II have different hardware and drivers. (v4 for Series II)
+ Series I IDE emulation seems to be fully working. Non-DMA, gvpat.device, v3.3 added to ROM scanner.
+ Does not byte swap data words but emulation swaps it automatically to keep HDFs compatible with other controllers.
+- Added ES_SYSTEM_REQUIRED flag to SetThreadExecutionState(), perhaps it keeps screensaver inactive.
+ (ES_DISPLAY_REQUIRED seems to only make sure monitor does not switch to power saving mode)
+- HAM-E emulation added. Because HAM-E "magic cookie" can be nearly anywhere on screen, enabling HAM-E will slow down
+ emulation (It needs to check nearly all pixels every frame) even when HAM-E mode is not active. "Automatic" setting
+ still only does A2024 and Graffiti detection. DCTV emulation: not going happen without image encoding specs.
+
Beta 2:
- Paula audio filter still filtered Toccata audio. Note that stereo separation is after Toccata audio