else
_stprintf(tmp1, _T("%s_options"), name);
if (!_tcsicmp(option, tmp1)) {
- TCHAR *s;
+ TCHAR *s, *s1, *s2;
s = cfgfile_option_get(value, _T("order"));
if (s)
rb->device_order = _tstol(s);
rb->autoconfig[i] = (uae_u8)_tcstol(s2, &endptr, 16);
}
}
+ s1 = cfgfile_option_get(value, _T("start"));
+ s2 = cfgfile_option_get(value, _T("end"));
+ if (s1 && s2) {
+ TCHAR *endptr;
+ rb->start_address = _tcstol(s1, &endptr, 16);
+ rb->end_address = _tcstol(s2, &endptr, 16);
+ if (rb->start_address && rb->end_address > rb->start_address) {
+ rb->manual_config = true;
+ rb->autoconfig_inuse = false;
+ }
+ }
return true;
}
}
ac[8], ac[9], ac[10], ac[11], ac[12], ac[13], ac[14], ac[15]);
p += _tcslen(p);
}
+ if (rb->manual_config && rb->start_address && rb->end_address) {
+ if (tmp2[0])
+ *p++ = ',';
+ _stprintf(p, _T("start=%08x,end=%08x"), rb->start_address, rb->end_address);
+ p += _tcslen(p);
+
+ }
if (tmp2[0]) {
cfgfile_write(f, tmp1, tmp2);
}
static bool mapromconfigured(void)
{
- if (currprefs.maprom)
+ if (currprefs.maprom && !currprefs.cpuboard_type)
return true;
if (currprefs.cpuboard_settings & 1)
return true;
}
return true;
}
+
bool cpuboard_jitdirectompatible(struct uae_prefs *p)
{
if (cpuboard_memorytype(p) == BOARD_MEMORY_BLIZZARD_12xx || cpuboard_memorytype(p) == BOARD_MEMORY_BLIZZARD_PPC) {
return ab;
}
-static void fastmem_autoconfig(struct uae_prefs *p, struct autoconfig_info *aci, int zorro, uae_u8 type, uae_u32 serial, int allocated)
+static bool fastmem_autoconfig(struct uae_prefs *p, struct autoconfig_info *aci, int zorro, uae_u8 type, uae_u32 serial, int allocated)
{
uae_u16 mid = 0;
uae_u8 pid;
}
uae_u8 *forceac = NULL;
+ struct ramboard *rb = NULL;
if (!mid) {
if (zorro <= 2) {
- struct ramboard *rb = &p->fastmem[boardnum];
+ rb = &p->fastmem[boardnum];
if (rb->autoconfig[0]) {
forceac = rb->autoconfig;
} else if (rb->manufacturer) {
expamem_write(0x2c, 0x00); /* ROM-Offset lo */
expamem_write(0x40, 0x00); /* Ctrl/Statusreg.*/
+
+ if (rb && rb->manual_config) {
+ aci->start = rb->start_address;
+ aci->size = rb->end_address - rb->start_address + 1;
+ memcpy(&aci->autoconfig_bytes, ac, sizeof ac);
+ return false;
+ }
+
+ return true;
}
static const uae_u8 a2630_autoconfig[] = { 0xe7, 0x51, 0x40, 0x00, 0x02, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
return true;
}
-static bool expamem_init_fastcard(struct autoconfig_info *aci)
+static bool expamem_init_fastcard_2(struct autoconfig_info *aci, int zorro)
{
struct uae_prefs *p = aci->prefs;
addrbank *bank = &fastmem_bank[aci->devnum];
uae_u8 type = add_memory | zorroII;
int size = p->fastmem[aci->devnum].size;
- aci->label = _T("Z2 Fast RAM");
+ aci->label = zorro == 1 ? _T("Z1 Fast RAM") : _T("Z2 Fast RAM");
+ aci->zorro = zorro;
expamem_init_clear ();
if (size == 65536)
}
}
- fastmem_autoconfig(p, aci, BOARD_AUTOCONFIG_Z2, type, 1, size);
+ if (!fastmem_autoconfig(p, aci, BOARD_AUTOCONFIG_Z2, type, 1, size)) {
+ aci->zorro = -1;
+ }
memcpy(aci->autoconfig_raw, expamem, sizeof aci->autoconfig_raw);
return true;
}
+static bool expamem_init_fastcard(struct autoconfig_info *aci)
+{
+ return expamem_init_fastcard_2(aci, 2);
+}
+static bool expamem_init_fastcard_z1(struct autoconfig_info *aci)
+{
+ return expamem_init_fastcard_2(aci, 1);
+}
+
bool expansion_is_next_board_fastram(void)
{
return ecard + 1 < MAX_EXPANSION_BOARD_SPACE && cards[ecard + 1] && cards[ecard + 1]->map == expamem_map_fastcard;
// can't show dialogs from PPC thread, deadlock danger.
regs.halted = -2;
}
+ mapped_free(&filesys_bank);
filesys_bank.start = expamem_board_pointer;
filesys_bank.mask = filesys_bank.reserved_size - 1;
mapped_malloc(&filesys_bank);
bool ks12 = ks12orolder();
bool hide = currprefs.uae_hide_autoconfig;
- aci->label = _T("UAE FS ROM");
- aci->get_params = get_params_filesys;
- aci->set_params = set_params_filesys;
- aci->addrbank = &filesys_bank;
+ if (aci) {
+ aci->label = ks12 ? _T("Pre-KS 1.3 UAE FS ROM") : _T("UAE FS ROM");
+ aci->get_params = get_params_filesys;
+ aci->set_params = set_params_filesys;
+ aci->addrbank = &filesys_bank;
+ }
#if 0
FILE *f = fopen("d:\\amiga\\amiga\\source\\acap\\autoconf", "rb");
expamem_write (0x40, 0x00); /* Ctrl/Statusreg.*/
- if (!aci->doinit) {
+ if (aci && !aci->doinit) {
memcpy(aci->autoconfig_raw, expamem, sizeof aci->autoconfig_raw);
return true;
}
} else {
fastmem_bank[i].reserved_size = currprefs.fastmem[i].size;
fastmem_bank[i].mask = fastmem_bank[i].reserved_size - 1;
-
+ if (currprefs.fastmem[i].manual_config) {
+ fastmem_bank[i].start = currprefs.fastmem[i].start_address;
+ }
if (fastmem_bank[i].reserved_size && fastmem_bank[i].start != 0xffffffff) {
mapped_malloc (&fastmem_bank[i]);
if (fastmem_bank[i].baseaddr == 0) {
if (cst->init && cst->initzorro == zorro) {
int idx;
struct boardromconfig *brc = get_device_rom(p, ROMTYPE_CPUBOARD, 0, &idx);
- struct romconfig *rc = &brc->roms[idx];
- cards_set[cardno].flags = cst->initflag;
- cards_set[cardno].name = cst->name;
- cards_set[cardno].initrc = cst->init;
- cards_set[cardno].rc = rc;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].cst = cst;
- cards_set[cardno++].map = NULL;
- if (cst->init2) {
- cards_set[cardno].flags = cst->initflag | CARD_FLAG_CHILD;
+ if (brc) {
+ struct romconfig *rc = &brc->roms[idx];
+ cards_set[cardno].flags = cst->initflag;
cards_set[cardno].name = cst->name;
- cards_set[cardno].initrc = cst->init2;
+ cards_set[cardno].initrc = cst->init;
+ cards_set[cardno].rc = rc;
cards_set[cardno].zorro = zorro;
cards_set[cardno].cst = cst;
cards_set[cardno++].map = NULL;
- }
- if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && cst->memory_mid && p->fastmem[fastmem_num].size) {
- cards_set[cardno].flags = (fastmem_num << 16) | CARD_FLAG_CHILD;
- cards_set[cardno].name = _T("Z2Fast");
- cards_set[cardno].initnum = expamem_init_fastcard;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].cst = cst;
- cards_set[cardno++].map = expamem_map_fastcard;
- fastmem_num++;
+ if (cst->init2) {
+ cards_set[cardno].flags = cst->initflag | CARD_FLAG_CHILD;
+ cards_set[cardno].name = cst->name;
+ cards_set[cardno].initrc = cst->init2;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].cst = cst;
+ cards_set[cardno++].map = NULL;
+ }
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && cst->memory_mid && p->fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = (fastmem_num << 16) | CARD_FLAG_CHILD;
+ cards_set[cardno].name = _T("Z2Fast");
+ cards_set[cardno].initnum = expamem_init_fastcard;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].cst = cst;
+ cards_set[cardno++].map = expamem_map_fastcard;
+ fastmem_num++;
+ }
}
}
if (fastmem_nump)
for (int j = 0; j < MAX_DUPLICATE_EXPANSION_BOARDS; j++) {
struct romconfig *rc = get_device_romconfig(p, ert->romtype, j);
if (rc) {
- if (zorro == 1) {
- struct autoconfig_info aci = { 0 };
- aci.prefs = p;
- aci.doinit = true;
- aci.rc = rc;
- ert->init(&aci);
- if (ert->init2) {
- ert->init2(&aci);
- }
- } else {
- int mid = ert->memory_mid;
- bool memory_after = ert->memory_after;
- bool added = false;
- if (ert->subtypes) {
- const struct expansionsubromtype *srt = &ert->subtypes[rc->subtype];
- mid = srt->memory_mid;
- memory_after = srt->memory_after;
- }
+ int mid = ert->memory_mid;
+ bool memory_after = ert->memory_after;
+ bool added = false;
+ if (ert->subtypes) {
+ const struct expansionsubromtype *srt = &ert->subtypes[rc->subtype];
+ mid = srt->memory_mid;
+ memory_after = srt->memory_after;
+ }
- if (mode == 1 && ert->memory_mid)
- continue;
- if (mode == 2 && !ert->memory_mid)
- continue;
- if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && mid && !memory_after && p->fastmem[fastmem_num].size) {
- cards_set[cardno].flags = (fastmem_num << 16);
- cards_set[cardno].name = _T("Z2Fast");
- cards_set[cardno].initnum = expamem_init_fastcard;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].ert = ert;
- cards_set[cardno++].map = expamem_map_fastcard;
- fastmem_num++;
- added = true;
- }
- if (fastmem_num < MAX_RAM_BOARDS && zorro == 3 && mid && !memory_after && p->z3fastmem[fastmem_num].size) {
- cards_set[cardno].flags = CARD_FLAG_CAN_Z3 | (fastmem_num << 16);
- cards_set[cardno].name = _T("Z3Fast");
- cards_set[cardno].initnum = expamem_init_z3fastmem;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].ert = ert;
- cards_set[cardno++].map = expamem_map_z3fastmem;
- fastmem_num++;
- added = true;
- }
- cards_set[cardno].flags = added ? CARD_FLAG_CHILD : 0;
+ if (mode == 1 && ert->memory_mid)
+ continue;
+ if (mode == 2 && !ert->memory_mid)
+ continue;
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && mid && !memory_after && p->fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = (fastmem_num << 16);
+ cards_set[cardno].name = _T("Z2Fast");
+ cards_set[cardno].initnum = expamem_init_fastcard;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].ert = ert;
+ cards_set[cardno++].map = expamem_map_fastcard;
+ fastmem_num++;
+ added = true;
+ }
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 3 && mid && !memory_after && p->z3fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = CARD_FLAG_CAN_Z3 | (fastmem_num << 16);
+ cards_set[cardno].name = _T("Z3Fast");
+ cards_set[cardno].initnum = expamem_init_z3fastmem;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].ert = ert;
+ cards_set[cardno++].map = expamem_map_z3fastmem;
+ fastmem_num++;
+ added = true;
+ }
+ cards_set[cardno].flags = added ? CARD_FLAG_CHILD : 0;
+ cards_set[cardno].name = ert->name;
+ cards_set[cardno].initrc = ert->init;
+ cards_set[cardno].rc = rc;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno++].map = NULL;
+ if (ert->init2) {
+ cards_set[cardno].flags = CARD_FLAG_CHILD;
cards_set[cardno].name = ert->name;
- cards_set[cardno].initrc = ert->init;
+ cards_set[cardno].initrc = ert->init2;
cards_set[cardno].rc = rc;
cards_set[cardno].zorro = zorro;
cards_set[cardno++].map = NULL;
- if (ert->init2) {
- cards_set[cardno].flags = CARD_FLAG_CHILD;
- cards_set[cardno].name = ert->name;
- cards_set[cardno].initrc = ert->init2;
- cards_set[cardno].rc = rc;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno++].map = NULL;
- }
- if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && mid && memory_after && p->fastmem[fastmem_num].size) {
- cards_set[cardno].flags = (fastmem_num << 16) | CARD_FLAG_CHILD;
- cards_set[cardno].name = _T("Z2Fast");
- cards_set[cardno].initnum = expamem_init_fastcard;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].ert = ert;
- cards_set[cardno++].map = expamem_map_fastcard;
- fastmem_num++;
- }
- if (fastmem_num < MAX_RAM_BOARDS && zorro == 3 && mid && memory_after && p->z3fastmem[fastmem_num].size) {
- cards_set[cardno].flags = CARD_FLAG_CAN_Z3 | (fastmem_num << 16) | CARD_FLAG_CHILD;
- cards_set[cardno].name = _T("Z3Fast");
- cards_set[cardno].initnum = expamem_init_z3fastmem;
- cards_set[cardno].zorro = zorro;
- cards_set[cardno].ert = ert;
- cards_set[cardno++].map = expamem_map_z3fastmem;
- fastmem_num++;
- }
+ }
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 1 && mid && p->fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = (fastmem_num << 16) | CARD_FLAG_CHILD;
+ cards_set[cardno].name = _T("Z1Fast");
+ cards_set[cardno].initnum = expamem_init_fastcard_z1;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].ert = ert;
+ cards_set[cardno++].map = NULL;
+ fastmem_num++;
+ }
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 2 && mid && memory_after && p->fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = (fastmem_num << 16) | CARD_FLAG_CHILD;
+ cards_set[cardno].name = _T("Z2Fast");
+ cards_set[cardno].initnum = expamem_init_fastcard;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].ert = ert;
+ cards_set[cardno++].map = expamem_map_fastcard;
+ fastmem_num++;
+ }
+ if (fastmem_num < MAX_RAM_BOARDS && zorro == 3 && mid && memory_after && p->z3fastmem[fastmem_num].size) {
+ cards_set[cardno].flags = CARD_FLAG_CAN_Z3 | (fastmem_num << 16) | CARD_FLAG_CHILD;
+ cards_set[cardno].name = _T("Z3Fast");
+ cards_set[cardno].initnum = expamem_init_z3fastmem;
+ cards_set[cardno].zorro = zorro;
+ cards_set[cardno].ert = ert;
+ cards_set[cardno++].map = expamem_map_z3fastmem;
+ fastmem_num++;
}
}
}
if (p->mbresmem_high_size)
expamem_highmem_pointer = 0x08000000 + p->mbresmem_high_size;
- if (p->mbresmem_high_size >= 128 * 1024 * 102)
+ if (p->mbresmem_high_size >= 128 * 1024 * 1024)
expamem_z3_pointer_uae += (p->mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024;
expamem_z3_pointer_uae += p->z3chipmem_size;
expamem_board_pointer = 0;
reset_ac(p);
- if (p == &currprefs && do_mount < 0 && ks11orolder()) {
- filesys_bank.start = 0xe90000;
- mapped_malloc(&filesys_bank);
- map_banks_z2(&filesys_bank, filesys_bank.start >> 16, 1);
- expamem_init_filesys(0);
- expamem_map_filesys_update();
- }
-
if (p->cpuboard_type) {
// This may require first 128k slot.
cards_set[cardno].flags = 1;
add_expansions(p, BOARD_NONAUTOCONFIG_BEFORE, NULL, 0);
fastmem_num = 0;
+ add_expansions(p, BOARD_PROTOAUTOCONFIG, &fastmem_num, 0);
add_cpu_expansions(p, BOARD_AUTOCONFIG_Z2, &fastmem_num);
// immediately after Z2Fast so that it can be emulated as A590/A2091 with fast ram.
add_expansions(p, BOARD_AUTOCONFIG_Z2, &fastmem_num, 0);
add_cpu_expansions(p,BOARD_NONAUTOCONFIG_AFTER_Z3, NULL);
add_expansions(p, BOARD_NONAUTOCONFIG_AFTER_Z3, NULL, 0);
+
}
void expansion_scan_autoconfig(struct uae_prefs *p, bool log)
expansion_autoconfig_sort(&currprefs);
expansion_parse_cards(&currprefs, true);
- if (currprefs.z3chipmem_size)
- map_banks_z3(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16);
-
if (cardno == 0 || savestate_state)
expamem_init_clear_zero ();
else
uaeboard_bank.reserved_size = 0x10000;
mapped_malloc(&uaeboard_bank);
}
+
}
void expansion_cleanup (void)
#endif
}
+void expansion_map(void)
+{
+ map_banks(&expamem_bank, 0xE8, 1, 0);
+ // map non-autoconfig ram boards
+ for (int i = 0; i < MAX_RAM_BOARDS; i++) {
+ struct ramboard *rb = &currprefs.fastmem[i];
+ if (rb->manual_config) {
+ map_banks(&fastmem_bank[i], rb->start_address >> 16, (rb->end_address - rb->start_address + 1) >> 16, 0);
+ }
+ rb = &currprefs.z3fastmem[i];
+ if (rb->manual_config) {
+ map_banks(&z3fastmem_bank[i], rb->start_address >> 16, (rb->end_address - rb->start_address + 1) >> 16, 0);
+ }
+ }
+ if (currprefs.z3chipmem_size) {
+ map_banks_z3(&z3chipmem_bank, z3chipmem_bank.start >> 16, currprefs.z3chipmem_size >> 16);
+ }
+ if (do_mount < 0 && ks11orolder()) {
+ filesys_bank.start = 0xe90000;
+ mapped_free(&filesys_bank);
+ mapped_malloc(&filesys_bank);
+ map_banks_z2(&filesys_bank, filesys_bank.start >> 16, 1);
+ expamem_init_filesys(0);
+ expamem_map_filesys_update();
+ }
+}
+
static void clear_bank (addrbank *ab)
{
if (!ab->baseaddr || !ab->allocated_size)
false, EXPANSIONTYPE_SCSI,
18260, 8, 0, true
},
+ {
+ _T("scram8490"), _T("SCRAM (DP8490V)"), _T("MegaMicro"),
+ scram5380_init, NULL, scram5380_add_scsi_unit, ROMTYPE_SCRAM5380, 0, 0, BOARD_AUTOCONFIG_Z2, false,
+ NULL, 0,
+ true, EXPANSIONTYPE_SCSI,
+ 4096, 4, 0, false, NULL,
+ false, 0, NULL,
+ { 0xd1, 3, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00 }
+ },
+ {
+ _T("scram5394"), _T("SCRAM (NCR53C94)"), _T("MegaMicro"),
+ ncr_scram5394_init, NULL, scram5394_add_scsi_unit, ROMTYPE_SCRAM5394, 0, 0, BOARD_AUTOCONFIG_Z2, false,
+ NULL, 0,
+ true, EXPANSIONTYPE_SCSI,
+ 4096, 4, 0, false, NULL,
+ false, 0, NULL,
+ { 0xd1, 7, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00 }
+ },
{
_T("paradox"), _T("Paradox SCSI"), _T("Mainhattan Data"),
paradox_init, NULL, paradox_add_scsi_unit, ROMTYPE_PARADOX | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, false,
{ 0xc1, 2, 0x00, 0x00, 0x03, 0xf2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 },
},
+ {
+ _T("filecard2000"), _T("Filecard 2000/OSSI 500"), _T("Otronic"),
+ ossi_init, NULL, ossi_add_scsi_unit, ROMTYPE_OSSI, 0, 0, BOARD_AUTOCONFIG_Z2, true,
+ NULL, 0,
+ true, EXPANSIONTYPE_SCSI,
+ 0, 0, 0, false, NULL,
+ false, 0, NULL,
+ { 0xc1, 1, 0x00, 0x00, 0x07, 0xf4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
+ },
{
_T("fastlane"), _T("Fastlane"), _T("Phase 5"),
ncr_fastlane_autoconfig_init, NULL, fastlane_add_scsi_unit, ROMTYPE_FASTLANE, 0, 0, BOARD_AUTOCONFIG_Z3, false,
},
{
_T("tecmar"), _T("T-Card/T-Disk"), _T("Tecmar"),
- tecmar_init, NULL, tecmar_add_scsi_unit, ROMTYPE_TECMAR | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
+ tecmar_init, NULL, tecmar_add_scsi_unit, ROMTYPE_TECMAR | ROMTYPE_NOT, 0, 0, BOARD_PROTOAUTOCONFIG, true,
NULL, 0,
- false, EXPANSIONTYPE_SASI | EXPANSIONTYPE_SCSI
+ false, EXPANSIONTYPE_SASI | EXPANSIONTYPE_SCSI,
+ 1001, 1, 0
},
{
_T("system2000"), _T("System 2000"), _T("Vortex"),
const struct memoryboardtype memoryboards[]
{
// z2
+ {
+ _T("DKB"), _T("Insider I/II"),
+ 2, 0x800000, 0xffff, 0xff
+ },
{
_T("GVP"), _T("Impact A2000-RAM8"),
- 2, 2077, 9
+ 2, 0, 2077, 9
},
{
_T("Kupke"), _T("Golem RAM-Card"),
- 2, 2073, 3
+ 2, 0, 2073, 3
},
{
_T("Supra"), _T("SupraRAM 500RX"),
- 2, 1056, 10
+ 2, 0, 1056, 10
},
{
_T("Supra"), _T("SupraRAM 2000"),
- 2, 1056, 9
+ 2, 0, 1056, 9
},
// z3
{
_T("E3B"), _T("ZorRAM"),
- 3, 3643, 32
+ 3, 0, 3643, 32
},
+
{
NULL
}
extern bool expansion_can_move(struct uae_prefs *p, int index);
extern bool alloc_expansion_bank(addrbank *bank, struct autoconfig_info *aci);
extern void free_expansion_bank(addrbank *bank);
+extern void expansion_map(void);
extern void uaegfx_install_code (uaecptr);
const TCHAR *man;
const TCHAR *name;
uae_u8 z;
+ uae_u32 address;
uae_u16 manufacturer;
uae_u8 product;
uae_u8 autoconfig[16];
extern int inputdevice_getjoyportdevice (int port, int val);
extern void inputdevice_validate_jports (struct uae_prefs *p, int changedport, bool *fixedports);
extern void inputdevice_fix_prefs(struct uae_prefs *p, bool userconfig);
-extern void inputdevice_config_load_start(struct uae_prefs *p);
extern void inputdevice_init (void);
extern void inputdevice_close (void);
extern void free_fastmemory (int);
extern void set_roms_modified (void);
extern void reload_roms(void);
+extern bool read_kickstart_version(struct uae_prefs *p);
#define longget(addr) (call_mem_get_func(get_mem_bank(addr).lget, addr))
#define wordget(addr) (call_mem_get_func(get_mem_bank(addr).wget, addr))
extern void ematrix_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void multievolution_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void golemfast_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+extern void scram5394_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern bool ncr_fastlane_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_oktagon_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_dkb_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_ematrix_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_multievolution_init(struct autoconfig_info *aci);
+extern bool ncr_scram5394_init(struct autoconfig_info *aci);
extern void cpuboard_ncr9x_scsi_put(uaecptr, uae_u32);
extern uae_u32 cpuboard_ncr9x_scsi_get(uaecptr);
#define INTERNALEVENT_COUNT 1
+#if 0
+struct uae_input_device_event
+{
+ uae_s16 eventid[MAX_INPUT_SUB_EVENT_ALL];
+ TCHAR *custom[MAX_INPUT_SUB_EVENT_ALL];
+ uae_u64 flags[MAX_INPUT_SUB_EVENT_ALL];
+ uae_u8 port[MAX_INPUT_SUB_EVENT_ALL];
+ uae_s16 extra;
+};
+#endif
+
struct uae_input_device {
TCHAR *name;
TCHAR *configname;
uae_u8 product;
uae_u8 autoconfig[16];
bool autoconfig_inuse;
+ bool manual_config;
int device_order;
+ uae_u32 start_address;
+ uae_u32 end_address;
};
struct expansion_params
{
#define ROMTYPE_BUDDHA 0x0010004f
#define ROMTYPE_NE2KISA 0x00100050
#define ROMTYPE_BLIZKIT3 0x00100051
+#define ROMTYPE_SCRAM5380 0x00100052
+#define ROMTYPE_SCRAM5394 0x00100053
+#define ROMTYPE_OSSI 0x00100054
#define ROMTYPE_NOT 0x00800000
#define ROMTYPE_QUAD 0x01000000
bool trumpcardpro_init(struct autoconfig_info*);
void trumpcardpro_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+bool scram5380_init(struct autoconfig_info*);
+void scram5380_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+
+bool ossi_init(struct autoconfig_info*);
+void ossi_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+
void x86_xt_hd_bput(int, uae_u8);
uae_u8 x86_xt_hd_bget(int);
bool x86_xt_hd_init(struct autoconfig_info *aci);
y = get_word(ib + 68);
}
+ //write_log("%dx%d\n", x, y);
+
if (x || y)
isnonzero = 1;
if (!isnonzero)
cfgfile_compatibility_rtg(p);
cfgfile_compatibility_romtype(p);
+ read_kickstart_version(p);
+
if (p->cpuboard_type && p->cpuboardmem1_size > cpuboard_maxmemory(p)) {
error_log(_T("Unsupported accelerator board memory size %d (0x%x).\n"), p->cpuboardmem1_size, p->cpuboardmem1_size);
p->cpuboardmem1_size = cpuboard_maxmemory(p);
if (((p->maprom & 0xff000000) && p->address_space_24) || (p->maprom && p->mbresmem_high_size >= 0x08000000)) {
p->maprom = 0x00e00000;
}
+ if (p->maprom && p->cpuboard_type) {
+ error_log(_T("UAE Maprom and accelerator board emulation are not compatible."));
+ p->maprom = 0;
+ }
+
if (p->tod_hack && p->cs_ciaatod == 0)
p->cs_ciaatod = p->ntscmode ? 2 : 1;
}
memset (mem, 0, size);
- for (i = 0; i < 8; i++)
- mem[size - 16 + i * 2 + 1] = 0x18 + i;
- mem[size - 20] = size >> 24;
- mem[size - 19] = size >> 16;
- mem[size - 18] = size >> 8;
- mem[size - 17] = size >> 0;
+ if (size >= 131072) {
+ for (i = 0; i < 8; i++) {
+ mem[size - 16 + i * 2 + 1] = 0x18 + i;
+ }
+ mem[size - 20] = size >> 24;
+ mem[size - 19] = size >> 16;
+ mem[size - 18] = size >> 8;
+ mem[size - 17] = size >> 0;
+ }
i = zfile_fread (mem, 1, size, f);
if (!decode_rom (mem, size, cr, i))
return 0;
}
+
+ if (size <= 256)
+ return size;
+
if (currprefs.cs_a1000ram && i < ROM_SIZE_256) {
int off = 0;
if (!a1000_bootrom)
return true;
}
-static int load_kickstart (void)
+static struct zfile *get_kickstart_filehandle(struct uae_prefs *p)
{
struct zfile *f;
TCHAR tmprom[MAX_DPATH], tmprom2[MAX_DPATH];
- cloanto_rom = 0;
- if (!_tcscmp (currprefs.romfile, _T(":AROS")))
- return load_kickstart_replacement ();
- f = read_rom_name (currprefs.romfile);
- _tcscpy (tmprom, currprefs.romfile);
+ f = read_rom_name(p->romfile);
+ _tcscpy(tmprom, p->romfile);
if (f == NULL) {
- _stprintf (tmprom2, _T("%s%s"), start_path_data, currprefs.romfile);
- f = rom_fopen (tmprom2, _T("rb"), ZFD_NORMAL);
+ _stprintf(tmprom2, _T("%s%s"), start_path_data, p->romfile);
+ f = rom_fopen(tmprom2, _T("rb"), ZFD_NORMAL);
if (f == NULL) {
- _stprintf (currprefs.romfile, _T("%sroms/kick.rom"), start_path_data);
- f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
+ _stprintf(p->romfile, _T("%sroms/kick.rom"), start_path_data);
+ f = rom_fopen(p->romfile, _T("rb"), ZFD_NORMAL);
if (f == NULL) {
- _stprintf (currprefs.romfile, _T("%skick.rom"), start_path_data);
- f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
+ _stprintf(p->romfile, _T("%skick.rom"), start_path_data);
+ f = rom_fopen(p->romfile, _T("rb"), ZFD_NORMAL);
if (f == NULL) {
- _stprintf (currprefs.romfile, _T("%s../shared/rom/kick.rom"), start_path_data);
- f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
+ _stprintf(p->romfile, _T("%s../shared/rom/kick.rom"), start_path_data);
+ f = rom_fopen(p->romfile, _T("rb"), ZFD_NORMAL);
if (f == NULL) {
- _stprintf (currprefs.romfile, _T("%s../System/rom/kick.rom"), start_path_data);
- f = rom_fopen (currprefs.romfile, _T("rb"), ZFD_NORMAL);
+ _stprintf(p->romfile, _T("%s../System/rom/kick.rom"), start_path_data);
+ f = rom_fopen(p->romfile, _T("rb"), ZFD_NORMAL);
if (f == NULL)
- f = read_rom_name_guess (tmprom);
+ f = read_rom_name_guess(tmprom);
}
}
}
} else {
- _tcscpy (currprefs.romfile, tmprom2);
+ _tcscpy(p->romfile, tmprom2);
}
}
+ return f;
+}
+
+static int load_kickstart (void)
+{
+ TCHAR tmprom[MAX_DPATH];
+ cloanto_rom = 0;
+ if (!_tcscmp(currprefs.romfile, _T(":AROS"))) {
+ return load_kickstart_replacement();
+ }
+ _tcscpy(tmprom, currprefs.romfile);
+ struct zfile *f = get_kickstart_filehandle(&currprefs);
addkeydir (currprefs.romfile);
if (f == NULL) /* still no luck */
goto err;
static int recurse;
if (ab->allocated_size) {
- write_log(_T("mapped_malloc with memory bank '%s' already allocated!?"), ab->name);
+ write_log(_T("mapped_malloc with memory bank '%s' already allocated!?\n"), ab->name);
}
ab->allocated_size = 0;
protect_roms (true);
}
+bool read_kickstart_version(struct uae_prefs *p)
+{
+ kickstart_version = 0;
+ cloanto_rom = 0;
+ struct zfile *z = get_kickstart_filehandle(p);
+ if (!z)
+ return false;
+ uae_u8 mem[32] = { 0 };
+ read_kickstart(z, mem, sizeof mem, 0, 0);
+ zfile_fclose(z);
+ kickstart_version = (mem[12] << 8) | mem[13];
+ if (kickstart_version == 0xffff) {
+ // 1.0-1.1 and older
+ kickstart_version = (mem[16] << 8) | mem[17];
+ if (kickstart_version > 33)
+ kickstart_version = 0;
+ }
+ write_log(_T("KS ver = %04x\n"), kickstart_version);
+ return true;
+}
+
void reload_roms(void)
{
if (roms_modified)
a1000_handle_kickstart (1);
#ifdef AUTOCONFIG
- map_banks (&expamem_bank, 0xE8, 1, 0);
+ expansion_map();
#endif
if (a3000_f0)
static struct ncr9x_state *ncr_ematrix530_scsi;
static struct ncr9x_state *ncr_multievolution_scsi;
static struct ncr9x_state *ncr_golemfast_scsi[MAX_DUPLICATE_EXPANSION_BOARDS];
+static struct ncr9x_state *ncr_scram5394_scsi[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ncr9x_state *ncr_units[MAX_NCR9X_UNITS + 1];
sd->data_len = 0;
scsi_start_transfer(sd);
scsi_emulate_analyze(sd);
-#if 0
+#if NCR_DEBUG
write_log (_T("%02x.%02x.%02x.%02x.%02x.%02x\n"), sd->cmd[0], sd->cmd[1], sd->cmd[2], sd->cmd[3], sd->cmd[4], sd->cmd[5]);
#endif
if (sd->direction <= 0)
SCSIDevice *scsiesp_device_find(SCSIBus *bus, int channel, int target, int lun)
{
struct ncr9x_state *ncr = (struct ncr9x_state*)bus->privdata;
- if (lun != 0 || target < 0 || target >= 8)
+ if (lun != 0 || target < 0 || target >= 8) {
+#if NCR_DEBUG
+ write_log(_T("Selected not supported: %d-%d-%d\n"), channel, target, lun);
+#endif
return NULL;
+ }
+#if NCR_DEBUG
+ if (ncr->scsid[target])
+ write_log(_T("Selected: %d-%d-%d\n"), channel, target, lun);
+ else
+ write_log(_T("Selected non-existing: %d-%d-%d\n"), channel, target, lun);
+#endif
return ncr->scsid[target];
}
void scsiesp_req_cancel(SCSIRequest *req)
uaecptr oldaddr = addr;
addr &= ncr->board_mask;
- if (ncr == ncr_multievolution_scsi) {
+
+ if (isncr(ncr, ncr_scram5394_scsi)) {
+
+ if (addr >= 0x8000 && addr < 0xa000) {
+ if (ncr->fakedma_data_offset < ncr->fakedma_data_size) {
+ ncr->fakedma_data_buf[ncr->fakedma_data_offset++] = val;
+ if (ncr->fakedma_data_offset == ncr->fakedma_data_size) {
+ memcpy(ncr->fakedma_data_write_buffer, ncr->fakedma_data_buf, ncr->fakedma_data_size);
+ esp_fake_dma_done(ncr->devobject.lsistate);
+ }
+ }
+ return;
+ }
+ if (addr & 1) {
+ return;
+ }
+ if (addr < 0x6000 || addr >= 0xc000) {
+ return;
+ }
+ reg_shift = 1;
+
+ } else if (ncr == ncr_multievolution_scsi) {
+
reg_shift = 1;
if (addr & 0x1000) {
if (ncr->fakedma_data_offset < ncr->fakedma_data_size) {
addr &= ncr->board_mask;
- if (ncr == ncr_multievolution_scsi) {
+ if (isncr(ncr, ncr_scram5394_scsi)) {
+
+ if (addr >= 0x8000 && addr < 0xa000) {
+ if (ncr->fakedma_data_offset >= ncr->fakedma_data_size)
+ return 0;
+ v = ncr->fakedma_data_buf[ncr->fakedma_data_offset++];
+ if (ncr->fakedma_data_offset == ncr->fakedma_data_size) {
+ esp_fake_dma_done(ncr->devobject.lsistate);
+ }
+ return v;
+ }
+ if (addr & 1)
+ return v;
+ if (addr == 0) {
+ v = ncr->rom[0];
+ v |= !ncr->chipirq ? 0x80 : 0x00;
+ return v;
+ }
+ if (addr < 0x4000 || addr >= 0xc000) {
+ v = ncr->rom[(addr >> 1) & 8191];
+ return v;
+ }
+ if (addr < 0x6000)
+ return v;
+ reg_shift = 1;
+
+ } else if (ncr == ncr_multievolution_scsi) {
reg_shift = 1;
if (addr & 0x1000) {
}
if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end))
return v;
- return ncr9x_io_bget(ncr, addr);
+
+ v = ncr9x_io_bget(ncr, addr);
+
+#if NCR_DEBUG > 5
+ write_log(_T("ncr9x_bget2 %08x %02x %08x\n"), addr, (uae_u8)v, M68K_GETPC);
+#endif
+
+ return v;
}
static void ncr9x_bput2(struct ncr9x_state *ncr, uaecptr addr, uae_u32 val)
{
uae_u32 v = val;
+
+#if NCR_DEBUG > 5
+ write_log(_T("ncr9x_bget2 %08x %02x %08x\n"), addr, (uae_u8)val, M68K_GETPC);
+#endif
+
addr &= ncr->board_mask;
if (ncr->io_end && (addr < ncr->io_start || addr >= ncr->io_end))
return;
return true;
}
-
bool ncr_dkb_autoconfig_init(struct autoconfig_info *aci)
{
if (!aci->doinit) {
ncr9x_reset_board(ncr);
}
+bool ncr_scram5394_init(struct autoconfig_info *aci)
+{
+ const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_SCRAM5394);
+
+ if (!aci->doinit) {
+ aci->autoconfigp = ert->autoconfig;
+ return true;
+ }
+
+ struct ncr9x_state *ncr = getscsi(aci->rc);
+ if (!ncr)
+ return false;
+
+ ncr->enabled = true;
+ ncr->bank = &ncr9x_bank_generic;
+ ncr->board_mask = 65535;
+
+ xfree(ncr->rom);
+ ncr->rom = xcalloc(uae_u8, 8192);
+ load_rom_rc(aci->rc, ROMTYPE_SCRAM5394, 8192, 0, ncr->rom, 8192, 0);
+ for (int i = 0; i < 16; i++) {
+ uae_u8 b = ert->autoconfig[i];
+ ew(ncr, i * 4, b);
+ }
+
+ ncr9x_reset_board(ncr);
+ aci->addrbank = ncr->bank;
+ return true;
+}
+
static void ncr9x_esp_scsi_init(struct ncr9x_state *ncr, ESPDMAMemoryReadWriteFunc read, ESPDMAMemoryReadWriteFunc write, void (*irq_func)(struct ncr9x_state*), int mode)
{
ncr->board_mask = 0xffff;
esp_dma_enable(ncr_golemfast_scsi[ci->controller_type_unit]->devobject.lsistate, 1);
}
+void scram5394_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ ncr9x_add_scsi_unit(&ncr_scram5394_scsi[ci->controller_type_unit], ch, ci, rc);
+ ncr9x_esp_scsi_init(ncr_scram5394_scsi[ci->controller_type_unit], fake_dma_read, fake_dma_write, set_irq2, 0);
+ esp_dma_enable(ncr_scram5394_scsi[ci->controller_type_unit]->devobject.lsistate, 1);
+}
+
#endif
#include <signal.h>
#else
/* Need to have these somewhere */
-bool check_prefs_changed_comp (void) { return false; }
+bool check_prefs_changed_comp (bool checkonly) { return false; }
#endif
/* For faster JIT cycles handling */
uae_s32 pissoff = 0;
#define IDS_CHIPSET2 20
#define IDS_GAMEPORTS 21
#define IDS_EXPANSION 22
-#define IDS_STRING23 23
#define IDS_EXPANSION2 23
#define IDS_BOARD 24
#define IDS_EXTTEXT 100
#define IDS_SELECTTAPE 391
#define IDS_TAPE 392
#define IDS_SCREEN_NATIVE 392
-#define IDS_STRING393 393
#define IDS_SCREEN_RTG 393
#define IDS_DISPLAYMODE_NATIVE 394
#define IDS_CURRENT_CONFIGURATION 395
#define IDS_SLIRP 398
#define IDD_EXPANSION2 398
#define IDS_SLIRP_INBOUND 399
-#define IDD_DIALOG2 399
#define IDD_BOARDS 399
#define IDS_FILTER_PAL_EXTRA 400
#define IDS_FILTER_3D_EXTRA 401
#define IDS_AUTOSCALE_OVERSCAN_BLANK 408
#define IDS_SCREEN_ADAPTIVE_SYNC 409
#define IDS_NUMSG_NOMEMORY 410
+#define IDS_EXPANSION_CATEGORY 411
#define IDS_QS_MODELS 1000
#define IDS_QS_MODEL_A500 1001
#define IDS_QS_MODEL_A500P 1002
#define IDC_RTG_DISPLAYSELECT 1809
#define IDC_FASTMEMAUTOCONFIGUSE 1809
#define IDC_MISCLIST 1810
+#define IDC_FASTMEMNOAUTOCONFIG 1810
#define IDC_STATENAME 1811
#define IDC_SAMPLER_STEREO 1812
#define IDC_LISTDIALOG_LIST 1813
#define IDC_AUTOCONFIG_DATA 1851
#define IDC_AUTOCONFIGCUSTOMSORT 1851
#define IDC_BOARDS_DOWN 1852
+#define IDC_RAM_ADDRESS 1852
#define IDC_BOARDS_UP 1853
+#define IDC_RAM_ADDRESS2 1853
#define ID__FLOPPYDRIVES 40004
#define ID_FLOPPYDRIVES_DF0 40005
#define ID_ST_CONFIGURATION 40010
CONTROL "Monochrome video out",IDC_GRAYSCALE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,11,167,139,10
END
-IDD_MEMORY DIALOGEX 0, 0, 396, 247
+IDD_MEMORY DIALOGEX 0, 0, 396, 266
STYLE DS_LOCALEDIT | DS_SETFONT | DS_3DLOOK | DS_CONTROL | WS_CHILD
EXSTYLE WS_EX_CONTEXTHELP
FONT 8, "MS Sans Serif", 0, 0, 0x1
CONTROL "",IDC_Z3CHIPMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,248,71,60,20
EDITTEXT IDC_Z3CHIPRAM,311,76,40,12,ES_CENTER | ES_READONLY
EDITTEXT IDC_MAX32RAM,14,99,366,12,ES_CENTER | ES_READONLY
- GROUPBOX "Advanced Memory Settings",IDC_STATIC,1,128,393,115
+ GROUPBOX "Advanced Memory Settings",IDC_STATIC,1,128,393,137
CONTROL "",IDC_MEMORYMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,253,145,68,20
EDITTEXT IDC_MEMORYRAM,328,148,40,12,ES_CENTER | ES_READONLY
- LTEXT "Z3 mapping mode:",IDC_STATIC,263,194,115,15,SS_CENTERIMAGE
- COMBOBOX IDC_Z3MAPPING,262,216,117,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+ LTEXT "Z3 mapping mode:",IDC_STATIC,263,215,115,15,SS_CENTERIMAGE
+ COMBOBOX IDC_Z3MAPPING,262,237,117,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
COMBOBOX IDC_MEMORYSELECT,14,151,228,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
EDITTEXT IDC_AUTOCONFIG_MANUFACTURER,78,175,45,13,ES_AUTOHSCROLL
EDITTEXT IDC_AUTOCONFIG_PRODUCT,196,175,45,13,ES_AUTOHSCROLL
CONTROL "Edit Autoconfig data",IDC_FASTMEMAUTOCONFIGUSE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,177,103,8
RTEXT "Memory board",IDC_STATIC,15,216,53,15,SS_CENTERIMAGE
COMBOBOX IDC_MEMORYBOARDSELECT,77,216,165,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+ CONTROL "Manual configuration",IDC_FASTMEMNOAUTOCONFIG,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,195,103,8
+ RTEXT "Address range",IDC_STATIC,10,237,57,15,SS_CENTERIMAGE
+ EDITTEXT IDC_RAM_ADDRESS,77,237,79,13,ES_AUTOHSCROLL
+ EDITTEXT IDC_RAM_ADDRESS2,164,237,79,13,ES_AUTOHSCROLL
END
IDD_CPU DIALOGEX 0, 0, 396, 317
IDD_MEMORY, DIALOG
BEGIN
+ BOTTOMMARGIN, 265
END
IDD_CPU, DIALOG
IDS_AUTOSCALE_OVERSCAN_BLANK "Overscan blanking"
IDS_SCREEN_ADAPTIVE_SYNC "Variable Sync"
IDS_NUMSG_NOMEMORY "Out of memory or too much Z3 autoconfig space configured.\nIf 64-bit, make sure RTG board is first in board list."
+ IDS_EXPANSION_CATEGORY "Built-in expansions\nSCSI controllers\nIDE controllers\nSASI controllers\nCustom controllers\nPCI bridgeboards\nx86 bridgeboards\nRTG boards\nSound cards\nNetwork adapters\nDisk controllers"
END
#endif // English resources
#define LANG_DLL_FULL_VERSION_MATCH 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("6")
+#define WINUAEBETA _T("7")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2016, 9, 11)
+#define WINUAEDATE MAKEBD(2016, 9, 17)
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
case IDC_ROMFILE:
_tcscpy (workprefs.romfile, full_path);
fullpath (workprefs.romfile, MAX_DPATH);
+ read_kickstart_version(&workprefs);
break;
case IDC_ROMFILE2:
_tcscpy (workprefs.romextfile, full_path);
static void enable_for_memorydlg (HWND hDlg)
{
int z3 = workprefs.address_space_24 == false;
+ bool ac = fastram_select_ramboard && fastram_select_ramboard->autoconfig_inuse;
+ bool manual = fastram_select_ramboard && fastram_select_ramboard->manual_config;
+ bool size = fastram_select_ramboard && fastram_select_ramboard->size != 0;
#ifndef AUTOCONFIG
z3 = FALSE;
ew (hDlg, IDC_FASTTEXT, true);
bool isfast = fastram_select < 2 * MAX_RAM_BOARDS && fastram_select_ramboard && fastram_select_ramboard->size;
- ew(hDlg, IDC_AUTOCONFIG_MANUFACTURER, isfast);
- ew(hDlg, IDC_AUTOCONFIG_PRODUCT, isfast);
+ ew(hDlg, IDC_AUTOCONFIG_MANUFACTURER, isfast && !manual);
+ ew(hDlg, IDC_AUTOCONFIG_PRODUCT, isfast && !manual);
ew(hDlg, IDC_MEMORYBOARDSELECT, isfast);
- ew(hDlg, IDC_AUTOCONFIG_DATA, fastram_select_ramboard && fastram_select_ramboard->autoconfig_inuse && fastram_select_ramboard->size);
+ ew(hDlg, IDC_AUTOCONFIG_DATA, ac && size);
ew(hDlg, IDC_FASTMEMAUTOCONFIGUSE, isfast);
+ ew(hDlg, IDC_FASTMEMNOAUTOCONFIG, isfast);
ew(hDlg, IDC_MEMORYRAM, true);
ew(hDlg, IDC_MEMORYMEM, true);
+ ew(hDlg, IDC_RAM_ADDRESS, manual && size);
+ ew(hDlg, IDC_RAM_ADDRESS2, false);
}
static void setfastram_ramboard(HWND hDlg, int zram)
{
if (!fastram_select_ramboard)
return;
- int idx = 0;
+ int idx = 1;
for (int i = 0; memoryboards[i].name; i++) {
const struct memoryboardtype *mbt = &memoryboards[i];
if (mbt->z == zram) {
- if (mbt->manufacturer == fastram_select_ramboard->manufacturer && mbt->product == fastram_select_ramboard->product) {
+ if ((mbt->manufacturer == fastram_select_ramboard->manufacturer && mbt->product == fastram_select_ramboard->product) || (mbt->address && mbt->address == fastram_select_ramboard->start_address)) {
SendDlgItemMessage(hDlg, IDC_MEMORYBOARDSELECT, CB_SETCURSEL, idx, 0);
break;
}
expansion_generate_autoconfig_info(&workprefs);
struct ramboard *rb = fastram_select_ramboard;
+ setchecked(hDlg, IDC_FASTMEMAUTOCONFIGUSE, rb && rb->autoconfig_inuse);
+ setchecked(hDlg, IDC_FASTMEMNOAUTOCONFIG, rb && rb->manual_config);
if (rb) {
+ if (rb->manual_config) {
+ rb->end_address = rb->start_address + rb->size - 1;
+ } else {
+ rb->start_address = 0;
+ rb->end_address = 0;
+ }
if (fastram_select_ramboard_old != fastram_select_ramboard || mode < 0) {
if (zram) {
ew(hDlg, IDC_MEMORYBOARDSELECT, TRUE);
SendDlgItemMessage(hDlg, IDC_MEMORYBOARDSELECT, CB_RESETCONTENT, 0, 0);
+ SendDlgItemMessage(hDlg, IDC_MEMORYBOARDSELECT, CB_ADDSTRING, 0, (LPARAM)_T("-"));
for (int i = 0; memoryboards[i].name; i++) {
const struct memoryboardtype *mbt = &memoryboards[i];
if (mbt->z == zram) {
}
}
}
+ if (mode != 3) {
+ if (aci && !rb->manual_config) {
+ _stprintf(tmp, _T("%08x"), aci->start);
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS, tmp);
+ _stprintf(tmp, _T("%08x"), aci->start + aci->size - 1);
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS2, tmp);
+ } else if (rb->manual_config) {
+ _stprintf(tmp, _T("%08x"), rb->start_address);
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS, tmp);
+ _stprintf(tmp, _T("%08x"), rb->end_address);
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS2, tmp);
+ } else {
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS, _T(""));
+ SetDlgItemText(hDlg, IDC_RAM_ADDRESS2, _T(""));
+ }
+ }
+
if (mode == 1 && rb->autoconfig_inuse) {
rb->autoconfig[1] = rb->product;
rb->autoconfig[4] = (rb->manufacturer >> 8) & 0xff;
ew(hDlg, IDC_SCSIROMID, ert->id_jumper);
const struct expansionboardsettings *cbs = ert->settings;
create_expansionrom_gui(hDlg, &expansion_gui_item, cbs, brc ? brc->roms[index].device_settings : 0, IDC_EXPANSIONBOARDITEMSELECTOR, IDC_EXPANSIONBOARDSELECTOR, IDC_EXPANSIONBOARDCHECKBOX);
+ } else {
+ reset_expansionrom_gui(hDlg, &expansion_gui_item, IDC_EXPANSIONBOARDITEMSELECTOR, IDC_EXPANSIONBOARDSELECTOR, IDC_EXPANSIONBOARDCHECKBOX);
}
static INT_PTR CALLBACK Expansion2DlgProc(HWND hDlg, UINT msg, WPARAM wParam, LPARAM lParam)
{
int v, val;
- TCHAR tmp[100];
+ TCHAR tmp[MAX_DPATH];
static int recursive = 0;
static int enumerated;
SendDlgItemMessage(hDlg, IDC_CPUBOARD_TYPE, CB_ADDSTRING, 0, (LPARAM) cpuboards[i].name);
}
+ WIN32GUI_LoadUIString(IDS_EXPANSION_CATEGORY, tmp, sizeof tmp / sizeof(TCHAR));
SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_RESETCONTENT, 0, 0);
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("Built-in CD/HD Controllers"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("SCSI Controllers"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("IDE Controllers"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("SASI Controllers"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("Custom Controllers"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("PCI Bridgeboards"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("x86 Bridgeboards"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("RTG boards"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("Sound cards"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("Network adapters"));
- SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)_T("Disk controllers"));
+ _tcscat(tmp, _T("\n"));
+ TCHAR *p1 = tmp;
+ for (;;) {
+ TCHAR *p2 = _tcschr(p1, '\n');
+ if (p2 && _tcslen(p2) > 0) {
+ *p2++ = 0;
+ SendDlgItemMessage(hDlg, IDC_SCSIROMSELECTCAT, CB_ADDSTRING, 0, (LPARAM)p1);
+ p1 = p2;
+ } else
+ break;
+ }
reset_expansionrom_gui(hDlg, &expansion_gui_item, IDC_EXPANSIONBOARDITEMSELECTOR, IDC_EXPANSIONBOARDSELECTOR, IDC_EXPANSIONBOARDCHECKBOX);
reset_expansionrom_gui(hDlg, &accelerator_gui_item, IDC_ACCELERATORBOARDITEMSELECTOR, IDC_ACCELERATORBOARDSELECTOR, IDC_ACCELERATORBOARDCHECKBOX);
return FALSE;
}
+static const struct memoryboardtype* getmemoryboardselect(HWND hDlg)
+{
+ int v = SendDlgItemMessage(hDlg, IDC_MEMORYBOARDSELECT, CB_GETCURSEL, 0, 0L);
+ if (v == CB_ERR)
+ return NULL;
+ int idx = 1;
+ for (int i = 0; memoryboards[i].name; i++) {
+ const struct memoryboardtype *mbt = &memoryboards[i];
+ if ((fastram_select < MAX_RAM_BOARDS && mbt->z == 2) || (fastram_select >= MAX_RAM_BOARDS && mbt->z == 3)) {
+ if (idx == v) {
+ return mbt;
+ }
+ }
+ idx++;
+ }
+ return NULL;
+}
+
static INT_PTR CALLBACK MemoryDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LPARAM lParam)
{
recursive++;
switch (LOWORD(wParam))
{
- case IDC_FASTMEMAUTOCONFIGUSE:
+ case IDC_FASTMEMAUTOCONFIGUSE:
+ if (fastram_select_ramboard) {
+ struct ramboard *rb = fastram_select_ramboard;
+ rb->autoconfig_inuse = ischecked(hDlg, IDC_FASTMEMAUTOCONFIGUSE);
+ rb->manual_config = false;
+ setfastram_selectmenu(hDlg, 0);
+ }
+ break;
+ case IDC_FASTMEMNOAUTOCONFIG:
if (fastram_select_ramboard) {
struct ramboard *rb = fastram_select_ramboard;
- rb->autoconfig_inuse = ischecked(hDlg, IDC_FASTMEMAUTOCONFIGUSE);
+ rb->manual_config = ischecked(hDlg, IDC_FASTMEMNOAUTOCONFIG);
+ rb->autoconfig_inuse = false;
+ const struct memoryboardtype *mbt = getmemoryboardselect(hDlg);
+ if (mbt && fastram_select_ramboard->manual_config && mbt->address) {
+ fastram_select_ramboard->start_address = mbt->address;
+ fastram_select_ramboard->end_address = mbt->address + fastram_select_ramboard->size - 1;
+ }
setfastram_selectmenu(hDlg, 0);
}
break;
break;
case IDC_MEMORYBOARDSELECT:
if (fastram_select_ramboard) {
- v = SendDlgItemMessage(hDlg, IDC_MEMORYBOARDSELECT, CB_GETCURSEL, 0, 0L);
- if (v != CB_ERR) {
- int idx = 0;
- for (int i = 0; memoryboards[i].name; i++) {
- const struct memoryboardtype *mbt = &memoryboards[i];
- if ((fastram_select < MAX_RAM_BOARDS && mbt->z == 2) || (fastram_select >= MAX_RAM_BOARDS && mbt->z == 3)) {
- if (idx == v) {
- fastram_select_ramboard->manufacturer = mbt->manufacturer;
- fastram_select_ramboard->product = mbt->product;
- setfastram_selectmenu(hDlg, 0);
- break;
- }
- idx++;
- }
+ const struct memoryboardtype *mbt = getmemoryboardselect(hDlg);
+ if (mbt) {
+ if (mbt->manufacturer != 0xffff) {
+ fastram_select_ramboard->manufacturer = mbt->manufacturer;
+ fastram_select_ramboard->product = mbt->product;
+ } else {
+ fastram_select_ramboard->autoconfig_inuse = false;
+ fastram_select_ramboard->manual_config = true;
+ }
+ if (fastram_select_ramboard->manual_config && mbt->address) {
+ fastram_select_ramboard->start_address = mbt->address;
+ fastram_select_ramboard->end_address = mbt->address + fastram_select_ramboard->size - 1;
}
+ setfastram_selectmenu(hDlg, 0);
+ break;
}
}
break;
}
- } else if (HIWORD(wParam) == EN_CHANGE) {
+ } else if (HIWORD(wParam) == EN_CHANGE || HIWORD(wParam) == EN_KILLFOCUS) {
switch (LOWORD(wParam))
{
case IDC_AUTOCONFIG_MANUFACTURER:
setfastram_selectmenu(hDlg, 1);
}
break;
+ case IDC_RAM_ADDRESS:
+ case IDC_RAM_ADDRESS2:
+ if (fastram_select_ramboard) {
+ TCHAR *endptr;
+ GetDlgItemText(hDlg, IDC_RAM_ADDRESS, tmp, sizeof tmp / sizeof(TCHAR));
+ fastram_select_ramboard->start_address = _tcstol(tmp, &endptr, 16);
+ setfastram_selectmenu(hDlg, HIWORD(wParam) == EN_KILLFOCUS ? 0 : 3);
+ }
+ break;
case IDC_AUTOCONFIG_DATA:
if (fastram_select_ramboard && fastram_select_ramboard->autoconfig_inuse) {
struct ramboard *rb = fastram_select_ramboard;
getromfile(hDlg, IDC_ROMFILE2, workprefs.romextfile, sizeof(workprefs.romextfile) / sizeof(TCHAR));
getromfile(hDlg, IDC_CARTFILE, workprefs.cartfile, sizeof(workprefs.cartfile) / sizeof(TCHAR));
+ read_kickstart_version(&workprefs);
int v = SendDlgItemMessage(hDlg, IDC_UAEBOARD_TYPE, CB_GETCURSEL, 0, 0);
if (v > 0) {
workprefs.uaeboard = v - 1;
static void init_kickstart (HWND hDlg)
{
-#if !defined(AUTOCONFIG)
- ew (hDlg, IDC_MAPROM), FALSE);
-#endif
+ ew (hDlg, IDC_MAPROM, workprefs.cpuboard_type == 0);
#if !defined (CDTV) && !defined (CD32)
ew (hDlg, IDC_FLASHFILE), FALSE);
ew (hDlg, IDC_ROMFILE2), FALSE);
<?xml version="1.0" encoding="utf-8"?>
<Project DefaultTargets="Build" ToolsVersion="14.0" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
- <Import Project="packages\VisualCppTools.14.0.24509-Pre\build\native\VisualCppTools.props" Condition="Exists('packages\VisualCppTools.14.0.24509-Pre\build\native\VisualCppTools.props')" />
+ <Import Project="packages\VisualCppTools.14.0.24515-Pre\build\native\VisualCppTools.props" Condition="Exists('packages\VisualCppTools.14.0.24515-Pre\build\native\VisualCppTools.props')" />
<ItemGroup Label="ProjectConfigurations">
<ProjectConfiguration Include="Debug|Win32">
<Configuration>Debug</Configuration>
<PropertyGroup>
<ErrorText>This project references NuGet package(s) that are missing on this computer. Use NuGet Package Restore to download them. For more information, see http://go.microsoft.com/fwlink/?LinkID=322105. The missing file is {0}.</ErrorText>
</PropertyGroup>
- <Error Condition="!Exists('packages\VisualCppTools.14.0.24509-Pre\build\native\VisualCppTools.props')" Text="$([System.String]::Format('$(ErrorText)', 'packages\VisualCppTools.14.0.24509-Pre\build\native\VisualCppTools.props'))" />
+ <Error Condition="!Exists('packages\VisualCppTools.14.0.24515-Pre\build\native\VisualCppTools.props')" Text="$([System.String]::Format('$(ErrorText)', 'packages\VisualCppTools.14.0.24515-Pre\build\native\VisualCppTools.props'))" />
</Target>
</Project>
\ No newline at end of file
- RTG VRAM is outside of reserved natmem space. Workaround: Move RTG in earlier position using Hardware info GUI panel.\r
Note that in 64-bit version RTG VRAM must be inside of reserved natmem space. (Outside = error message and return back to GUI)\r
\r
+- CD32 FMV ROM image was not loaded correctly from pre-3.4 config files.\r
+- CD32 first CD audio track play attempt from the beginning was confused with TOC subchannel read.\r
+- Z2/Z3 autoconfig data first byte's upper 5 bits was not editable. Only low 3 size bits should be forced (board size).\r
+- Implemented non-autoconfig RAM board definition support. Added DKB Insider I/II.\r
+- CD emulation didn't automatically load TOC when accessing the CD for the first time and program didn't request TOC previously. (Fixes\r
+ Buddha ATAPI device not reading CD in non-image mode)\r
+- Added manual (non-autoconfig) GUI memory board support. Any Z2 or Z3 board can be configured as manually mapped.\r
+- Pre-KS1.2 boot support works again. Now expansion tree is build before emulation starts but pre-KS1.2 boot support obviously needs\r
+ to know KS version before emulation starts but KS won't be loaded until emulation starts..\r
+- Fixed harmless "SCSI command xx, no direction specified!" messages when attempting to play audio CD using hardware SCSI/ATAPI emulation.\r
+- Fixed unstable Portaudio audio in vsync modes.\r
+- Tecmar T-Card RAM works again. First Z2 RAM is emulated as Tecmar autoconfig RAM board.\r
+- Shortcuts with SHIFT work again in optimized builds. It was buffer overflow (reading past end of buffer) very deep in input handling.\r
+- Both SCRAM 500/2000 SCSI board variants emulated (DP8490V = 53C80 and NCR53C94).\r
+- More ESP/NCR5394/FAS216 updates, FIFO in PIO mode only can contain max 1 byte. (SCRAM NCR53C94 fix)\r
+- Otronic Filecard 2000/OSSI 500 emulation. (Official ROM is MIA, Aminet replacement rom works but it needs to be merged first)\r
+- Automatically loaded default.uae with unplugged input device: set it to none, not layout A.\r
+- Include CD/FMV audio caused infinite loop when playing CD audio.\r
+- Disable ROM panel UAE MapROM option if accelerator board emulation is enabled. They are incompatible.\r
+- Accelerator boards that required ROM but nothing was selected: crashed during expansion tree building.\r
+- DD-only drive + turbo floppy mode + standard ADF HD floppy image: valid MFM was returned.\r
+- Ignore all write attempts if standard ADF HD image in DD-only flpppy drive.\r
+\r
Beta 6:\r
\r
- Workaround for possible NCR53C720+ emulation bug when read is shorter than command's allocation size. CSPPC SCSI driver gets confused\r
- Compiled again with pre-release MSVC compiler. Does speed now match 3.3.0? (Few reported that 3.4 betas have slower performance)\r
This breaks most SHIFT+<something> shortcuts.. (It appears to be optimizer bug related to 64-bit variables in 32-bit mode)\r
Temporary change, either I'll add workaround or I'll use official version or final/fixed version will be released soon.\r
- Only confirming if this helps with performance.\r
+ Only confirming if this helps with performance. (3.3.0 was accidentally compiled with pre-release version..)\r
\r
Beta 5:\r
\r
#define NCR5380_PHOENIXBOARD 25
#define NCR5380_TRUMPCARDPRO 26
#define NCR5380_IVSVECTOR 27 // nearly identical to trumpcard pro
-#define NCR_LAST 28
+#define NCR5380_SCRAM 28
+#define NCR5380_OSSI 29
+#define NCR_LAST 30
extern int log_scsiemu;
static const int outcmd[] = { 0x04, 0x0a, 0x0c, 0x2a, 0xaa, 0x15, 0x55, 0x0f, -1 };
static const int incmd[] = { 0x01, 0x03, 0x08, 0x12, 0x1a, 0x5a, 0x25, 0x28, 0x34, 0x37, 0x42, 0x43, 0xa8, 0x51, 0x52, 0xb9, 0xbd, 0xbe, -1 };
-static const int nonecmd[] = { 0x00, 0x05, 0x09, 0x0b, 0x11, 0x16, 0x17, 0x19, 0x1b, 0x1e, 0x2b, 0x35, 0xe0, 0xe3, 0xe4, -1 };
+static const int nonecmd[] = { 0x00, 0x05, 0x09, 0x0b, 0x11, 0x16, 0x17, 0x19, 0x1b, 0x1d, 0x1e, 0x2b, 0x35, 0x45, 0x47, 0x48, 0x49, 0x4b, 0x4e, 0xa5, 0xa9, 0xba, 0xbc, 0xe0, 0xe3, 0xe4, -1 };
static const int scsicmdsizes[] = { 6, 10, 10, 12, 16, 12, 10, 6 };
static void scsi_illegal_command(struct scsi_data *sd)
len = 4;
memset(sd->buffer, 0, len);
int tlen = sd->sense_len > len ? len : sd->sense_len;
- if (log_scsiemu)
- write_log(_T("REQUEST SENSE %d (%d -> %d)\n"), sd->cmd[4], sd->sense_len, tlen);
memcpy(sd->buffer, sd->sense, tlen);
if (!sasi && sd->sense_len == 0) {
+ // at least 0x12 bytes if SCSI and no sense
+ tlen = len > 0x12 ? 0x12 : len;
sd->buffer[0] = 0x70;
+ sd->sense_len = tlen;
}
+ if (log_scsiemu)
+ write_log(_T("REQUEST SENSE %d (%d -> %d)\n"), sd->cmd[4], sd->sense_len, tlen);
showsense (sd);
sd->data_len = tlen;
scsi_clear_sense(sd);
{
struct raw_scsi *r = &scsi->rscsi;
- scsi->irq = true;
memset(scsi->regs, 0, sizeof scsi->regs);
raw_scsi_reset_bus(scsi);
scsi->regs[1] = 0x80;
+ ncr5380_set_irq(scsi);
}
uae_u8 ncr5380_bget(struct soft_scsi *scsi, int reg)
return reg;
}
+static int ossi_reg(struct soft_scsi *ncr, uaecptr addr)
+{
+ int reg = -1;
+ if (!(addr & 1))
+ return -1;
+ if ((addr & 0x8020) == 0x8020)
+ return 8;
+ if ((addr & 0x8010) != 0x8010)
+ return -1;
+ reg = (addr >> 1) & 7;
+ return reg;
+}
+
static int phoenixboard_reg(struct soft_scsi *ncr, uaecptr addr)
{
if (addr & 1)
v = ncr->rom[addr];
}
+ } else if (ncr->type == NCR5380_SCRAM) {
+
+ if (addr < 0x4000 || addr >= 0xc000) {
+ v = 0xff;
+ if (!(addr & 1))
+ v = ncr->rom[(addr >> 1) & 8191];
+ } else if (addr >= 0x8000 && addr < 0xa000) {
+ if (!(addr & 1))
+ v = ncr5380_bget(ncr, 8);
+ } else if (addr >= 0x6000 && addr < 0x8000) {
+ if (!(addr & 1)) {
+ reg = (addr >> 1) & 7;
+ v = ncr5380_bget(ncr, reg);
+ }
+ }
+
+ } else if (ncr->type == NCR5380_OSSI) {
+
+ if (!(addr & 0x8000)) {
+ v = ncr->rom[addr & 16383];
+ } else {
+ reg = ossi_reg(ncr, addr);
+ if (reg >= 0)
+ v = ncr5380_bget(ncr, reg);
+ }
+
} else if (ncr->type == NCR5380_TRUMPCARDPRO || ncr->type == NCR5380_IVSVECTOR) {
reg = trumpcardpro_reg(ncr, addr, ncr->type == NCR5380_IVSVECTOR);
ncr->rom[addr] = val & (0x80 | 0x40 | 0x02);
} else if (addr == 0x1024) {
// memory board memory address reg
+ write_log(_T("TECMAR RAM %08x-%08x\n"), val << 16, (val << 16) + currprefs.fastmem[0].size);
if (currprefs.fastmem[0].size)
map_banks_z2(&fastmem_bank[0], val, currprefs.fastmem[0].size >> 16);
}
ncr5380_bput(ncr, reg, val);
}
+ } else if (ncr->type == NCR5380_SCRAM) {
+
+ if (addr >= 0x6000 && addr < 0x8000) {
+ if (!(addr & 1)) {
+ reg = (addr >> 1) & 7;
+ ncr5380_bput(ncr, reg, val);
+ }
+ } else if (addr >= 0x8000 && addr < 0xc000) {
+ if (!(addr & 1))
+ ncr5380_bput(ncr, 8, val);
+ }
+
+ } else if (ncr->type == NCR5380_OSSI) {
+
+ reg = ossi_reg(ncr, addr);
+ if (reg >= 0)
+ ncr5380_bput(ncr, reg, val);
+
} else if (ncr->type == NCR5380_TRUMPCARDPRO || ncr->type == NCR5380_IVSVECTOR) {
reg = trumpcardpro_reg(ncr, addr, ncr->type == NCR5380_IVSVECTOR);
bool tecmar_init(struct autoconfig_info *aci)
{
- static const uae_u8 ac[16] = { 0x40, 0xff, 0, 0, 1001 >> 8, (uae_u8)1001 };
+ static const uae_u8 ac[16] = { 0x40, 0x00, 0, 0, 1001 >> 8, (uae_u8)1001 };
aci->hardwired = true;
if (!aci->doinit) {
return true;
}
+
+bool scram5380_init(struct autoconfig_info *aci)
+{
+ const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_SCRAM5380);
+ if (!aci->doinit) {
+ aci->autoconfigp = ert->autoconfig;
+ return true;
+ }
+
+ struct soft_scsi *scsi = getscsi(aci->rc);
+ if (!scsi)
+ return false;
+
+ scsi->intena = true;
+
+ load_rom_rc(aci->rc, ROMTYPE_SCRAM5380, 8192, 0, scsi->rom, 8192, 0);
+ for (int i = 0; i < 16; i++) {
+ uae_u8 b = ert->autoconfig[i];
+ ew(scsi, i * 4, b);
+ }
+ aci->addrbank = scsi->bank;
+ return true;
+}
+
+void scram5380_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ generic_soft_scsi_add(ch, ci, rc, NCR5380_SCRAM, 65536, 8192, ROMTYPE_SCRAM5380);
+}
+
+bool ossi_init(struct autoconfig_info *aci)
+{
+ const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_OSSI);
+ if (!aci->doinit) {
+ if (!load_rom_rc(aci->rc, ROMTYPE_OSSI, 32768, aci->rc->autoboot_disabled ? 16384 : 0, aci->autoconfig_raw, 128, 0))
+ aci->autoconfigp = ert->autoconfig;
+ return true;
+ }
+
+ struct soft_scsi *scsi = getscsi(aci->rc);
+ if (!scsi)
+ return false;
+
+ if (load_rom_rc(aci->rc, ROMTYPE_OSSI, 32768, aci->rc->autoboot_disabled ? 16384 : 0, scsi->rom, 16384, 0)) {
+ memcpy(scsi->acmemory, scsi->rom, sizeof scsi->acmemory);
+ } else {
+ for (int i = 0; i < 16; i++) {
+ uae_u8 b = ert->autoconfig[i];
+ ew(scsi, i * 4, b);
+ }
+ }
+ aci->addrbank = scsi->bank;
+ return true;
+}
+
+void ossi_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ generic_soft_scsi_add(ch, ci, rc, NCR5380_OSSI, 65536, 16384, ROMTYPE_OSSI);
+}
projects / francis / winuae.git / commitdiff