4900b41

diff --git a/newcpu.cpp b/newcpu.cpp
index e8f76cf4a6370dcc2983c5ad0d8c84134011369d..4c286c6975cd8e5c1b5b01b98ea748033f6f09bd 100644 (file)
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -8175,7 +8175,7 @@ void mem_access_delay_long_write_ce020 (uaecptr addr, uae_u32 v)
                wait_cpu_cycle_write_ce020 (addr + 2, 1, (v >>  0) & 0xffff);
                break;
        case CE_MEMBANK_CHIP32:
-               if ((addr & 3) == 3) {
+               if ((addr & 3) != 0) {
                        wait_cpu_cycle_write_ce020 (addr + 0, 1, (v >> 16) & 0xffff);
                        wait_cpu_cycle_write_ce020 (addr + 2, 1, (v >>  0) & 0xffff);
                } else {

diff --git a/od-win32/win32.h b/od-win32/win32.h
index 00eba07094b7ce784c0b11fee5847e737f64d7c4..935d52821561326c2c5668e844464ec23c302f66 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -20,12 +20,12 @@
 #define LANG_DLL_FULL_VERSION_MATCH 1
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("Beta 40 (RC1)")
+#define WINUAEBETA _T("Beta 41 (RC2)")
 #else
 #define WINUAEBETA _T("")
 #endif
 
-#define WINUAEDATE MAKEBD(2021, 11, 14)
+#define WINUAEDATE MAKEBD(2021, 11, 21)
 
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index 1c3396f49ed14033689723f3adc718934057d7c1..1969bf1f517fda8a07b207ebf5cd40b85382d92e 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -1,4 +1,12 @@
 
+Beta 41 (RC2):
+
+- Sprite processing was exited early if sprite horizontal start was zero (which is correct normally). But when combined with FMODE SSCAN2-bit, only "original" sprite is invisible but "doubled" sprite is still visible. Fixes Fantastic Dizzy CD32 background glitch.
+- Improve Denise/Lisa internal bitplane pipeline logic, previously undocumented combined plane change + bitplane shift changes mid scanline are now working correctly.
+- Above behavior also revealed yet another undocumented chipset feature/bug: if ECS Denise or AGA and bitplane plane count is lowered mid scan line and disabled plane's last bit out of bitplane shifter was one: last pixel appears twice. OCS Denise is unaffected. This is emulated only in subpixel mode.
+- Clear all internal display emulation buffers at reset, previously some of them was not cleared. (Possibly could have caused temporary on screen garbage when loading statefile on the fly)
+
+
 Beta 40 (RC1):
 
 - A2065 emulation quit/reset crash fix, A2065 RAM was freed too early, when it was still possible to receive new ethernet frames.