*.ini
release
debug
+bin
+obj
fullrelease
Release
Debug
#include "savestate.h"
#include "crc32.h"
#include "akiko.h"
+#include "picasso96.h"
#define DEBUG
#ifdef DEBUG
static void cartridge_enter (void)
{
#ifdef PICASSO96
- stored_picasso_on = picasso_on;
+ stored_picasso_on = picasso_requested_on;
picasso_requested_on = 0;
#endif
}
static void cartridge_exit (void)
{
#ifdef PICASSO96
- if (stored_picasso_on >= 0)
- picasso_requested_on = stored_picasso_on != 0;
+ if (stored_picasso_on > 0)
+ picasso_requested_on = 1;
stored_picasso_on = -1;
#endif
}
last_custom_value1 = w;
if (!(log_blitter & 4)) {
chipmem_wput_indirect (addr, w);
- debug_wputpeekdma (addr, w);
+ debug_wputpeekdma_chipram (addr, w);
}
}
return;
last_custom_value1 = blt_info.bltddat;
chipmem_wput_indirect (bltdpt, blt_info.bltddat);
- debug_wputpeekdma (bltdpt, blt_info.bltddat);
+ debug_wputpeekdma_chipram (bltdpt, blt_info.bltddat);
}
bltstate = BLT_next;
}
int track;
int size;
int skipsize; // bytes to skip after each block
+ int index1; // distance between index0 and index1
+ int pregap; // sectors of silence
+ int postgap; // sectors of silence
audenc enctype;
int writeoffset;
int subcode;
sector = *sectorp;
for (i = 0; i <= cdu->tracks; i++) {
struct cdtoc *t = &cdu->toc[i];
- if (t->address > sector) {
+ if (t->address - t->index1 > sector) {
if (i == 0) {
*sectorp = 0;
return t;
}
t--;
- sector -= t->address;
+ sector -= t->address - t->index1;
+ if (sector < t->pregap)
+ return NULL; // pregap silence
*sectorp = sector;
return t;
}
int idleframes;
bool foundsub;
struct cdunit *cdu = (struct cdunit*)v;
+ int oldtrack = -1;
while (cdu->cdda_play == 0)
Sleep (10);
write_log (_T("IMAGE CDDA: illegal sector number %d\n"), cdu->cdda_start);
setstate (cdu, AUDIO_STATUS_PLAY_ERROR);
} else {
- write_log (_T("IMAGE CDDA: playing from %d to %d, track %d ('%s', offset %lld, secoffset %d)\n"),
- cdu->cdda_start, cdu->cdda_end, t->track, t->fname, t->offset, sector);
+ write_log (_T("IMAGE CDDA: playing from %d to %d, track %d ('%s', offset %lld, secoffset %d (%d))\n"),
+ cdu->cdda_start, cdu->cdda_end, t->track, t->fname, t->offset, sector, t->index1);
+ oldtrack = t->track;
// do this even if audio is not compressed, t->handle also could be
// compressed and we want to unpack it in background too
while (cdimage_unpack_active == 1)
t = findtoc (cdu, §or);
if (t) {
+ if (t->track != oldtrack) {
+ oldtrack = t->track;
+ write_log (_T("IMAGE CDDA: track %d ('%s', offset %lld, secoffset %d (%d))\n"),
+ t->track, t->fname, t->offset, sector, t->index1);
+ }
if (!(t->ctrl & 4)) {
if (t->enctype == ENC_CHD) {
do_read (cdu, t, dst, sector, 0, t->size);
}
} else if (t->handle) {
int totalsize = t->size + t->skipsize;
- if ((t->enctype == AUDENC_MP3 || t->enctype == AUDENC_FLAC) && t->data) {
- if (t->filesize >= sector * totalsize + t->offset + t->size)
- memcpy (dst, t->data + sector * totalsize + t->offset, t->size);
- } else if (t->enctype == AUDENC_PCM) {
- if (sector * totalsize + t->offset + totalsize < t->filesize) {
- zfile_fseek (t->handle, (uae_u64)sector * totalsize + t->offset, SEEK_SET);
- zfile_fread (dst, t->size, 1, t->handle);
+ int offset = t->offset;
+ if (offset >= 0) {
+ if ((t->enctype == AUDENC_MP3 || t->enctype == AUDENC_FLAC) && t->data) {
+ if (t->filesize >= sector * totalsize + offset + t->size)
+ memcpy (dst, t->data + sector * totalsize + offset, t->size);
+ } else if (t->enctype == AUDENC_PCM) {
+ if (sector * totalsize + offset + totalsize < t->filesize) {
+ zfile_fseek (t->handle, (uae_u64)sector * totalsize + offset, SEEK_SET);
+ zfile_fread (dst, t->size, 1, t->handle);
+ }
}
}
}
static int parsecue (struct cdunit *cdu, struct zfile *zcue, const TCHAR *img)
{
- int tracknum, pregap;
+ int tracknum, pregap, postgap, lastpregap, lastpostgap;
int newfile, secoffset;
- uae_s64 offset, index0;
+ uae_s64 fileoffset;
+ int index0;
TCHAR *fname, *fnametype;
audenc fnametypeid;
int ctrl;
fname = NULL;
fnametype = NULL;
tracknum = 0;
- offset = 0;
+ fileoffset = 0;
secoffset = 0;
newfile = 0;
ctrl = 0;
index0 = -1;
pregap = 0;
+ postgap = 0;
+ lastpregap = 0;
+ lastpostgap = 0;
fnametypeid = AUDENC_NONE;
write_log (_T("CUE TOC: '%s'\n"), img);
fnametypeid = AUDENC_MP3;
else if (!_tcsicmp (fnametype, _T("FLAC")))
fnametypeid = AUDENC_FLAC;
- offset = 0;
+ fileoffset = 0;
newfile = 1;
ctrl = 0;
} else if (!_tcsnicmp (p, _T("FLAGS"), 5)) {
TCHAR *tracktype;
p += 5;
- //pregap = 0;
index0 = -1;
+ lastpregap = 0;
+ lastpostgap = 0;
tracknum = _tstoi (nextstring (&p));
tracktype = nextstring (&p);
if (!tracktype)
tn += _tstoi (tt + 3) * 75;
tn += _tstoi (tt + 6);
pregap += tn;
+ lastpregap = tn;
+ } else if (!_tcsnicmp (p, _T("POSTGAP"), 7)) {
+ struct cdtoc *t = &cdu->toc[tracknum - 1];
+ TCHAR *tt;
+ int tn;
+ p += 7;
+ tt = nextstring (&p);
+ tn = _tstoi (tt) * 60 * 75;
+ tn += _tstoi (tt + 3) * 75;
+ tn += _tstoi (tt + 6);
+ postgap += tn;
+ lastpostgap = tn;
} else if (!_tcsnicmp (p, _T("INDEX"), 5)) {
int idxnum;
int tn = 0;
if (!t->address) {
t->address = tn + secoffset;
t->address += pregap;
- if (tracknum > 1) {
- offset += t->address - t[-1].address;
- } else {
- offset += t->address;
+ t->pregap = lastpregap;
+ t->postgap = lastpostgap;
+ if (index0 >= 0) {
+ t->index1 = tn - index0;
+ }
+ if (lastpregap) {
+ t->index1 = lastpregap;
+ }
+ int blockoffset = t->address - t->index1;
+ if (tracknum > 1)
+ blockoffset -= t[-1].address - t[-1].index1;
+ fileoffset += blockoffset * t[-1].size;
+ if (!secoffset) {
+ // secoffset == 0: same file contained also previous track
+ t->offset = fileoffset - pregap * t->size;
}
- if (!secoffset)
- t->offset = offset * t->size;
+ t->address += postgap;
if (fnametypeid == AUDENC_PCM && t->handle) {
struct zfile *zf = t->handle;
uae_u8 buf[16] = { 0 };
struct cdtoc *t = &cdu->toc[cdu->tracks - 1];
uae_s64 size = t->filesize;
if (!secoffset)
- size -= offset * t->size;
+ size -= fileoffset;
if (size < 0)
size = 0;
- cdu->toc[cdu->tracks].address = t->address + (int)(size / t->size);
+ size /= t->size;
+ cdu->toc[cdu->tracks].address = t->address + (int)size;
xfree (fname);
for (i = 0; i <= cdu->tracks; i++) {
struct cdtoc *t = &cdu->toc[i];
- uae_u32 msf = lsn2msf (t->address);
+ uae_u32 msf;
+ if (t->pregap) {
+ msf = lsn2msf (t->pregap - 150);
+ write_log (_T(" PREGAP : %02d:%02d:%02d\n"), (msf >> 16) & 0x7fff, (msf >> 8) & 0xff, (msf >> 0) & 0xff);
+ }
+ if (t->index1) {
+ msf = lsn2msf (t->index1 - 150);
+ write_log (_T(" INDEX1 : %02d:%02d:%02d\n"), (msf >> 16) & 0x7fff, (msf >> 8) & 0xff, (msf >> 0) & 0xff);
+ }
if (i < cdu->tracks)
write_log (_T("%2d: "), i + 1);
else
write_log (_T(" "));
+ msf = lsn2msf (t->address);
write_log (_T("%7d %02d:%02d:%02d"),
t->address, (msf >> 16) & 0x7fff, (msf >> 8) & 0xff, (msf >> 0) & 0xff);
if (i < cdu->tracks) {
write_log (_T(" - %s\n"), t->fname);
if (t->handle && !t->filesize)
t->filesize = zfile_size (t->handle);
+ if (t->postgap) {
+ msf = lsn2msf (t->postgap - 150);
+ write_log (_T(" POSTGAP: %02d:%02d:%02d\n"), (msf >> 16) & 0x7fff, (msf >> 8) & 0xff, (msf >> 0) & 0xff);
+ }
}
cdu->blocksize = 2048;
static const TCHAR *specialmonitors[] = { _T("none"), _T("autodetect"), _T("a2024"), _T("graffiti"), 0 };
static const TCHAR *rtgtype[] = {
_T("ZorroII"), _T("ZorroIII"),
- _T("PicassoII"), _T("PicassoII+"),
- _T("Piccolo_Z2"), _T("Piccolo_Z3"), _T("PiccoloSD64_Z2"), _T("PiccoloSD64_Z3"),
+ _T("PicassoII"),
+ _T("PicassoII+"),
+ _T("Piccolo_Z2"), _T("Piccolo_Z3"),
_T("PiccoloSD64_Z2"), _T("PiccoloSD64_Z3"),
_T("Spectrum28/24_Z2"), _T("Spectrum28/24_Z3"),
_T("PicassoIV_Z2"), _T("PicassoIV_Z3"),
cfgfile_write_str (f, _T("ghostscript_parameters"), p->ghostscript_parameters);
cfgfile_write (f, _T("parallel_autoflush"), _T("%d"), p->parallel_autoflush_time);
cfgfile_dwrite (f, _T("uae_hide"), _T("%d"), p->uae_hide);
+ cfgfile_dwrite_bool (f, _T("uae_hide_autoconfig"), p->uae_hide_autoconfig);
cfgfile_dwrite_bool (f, _T("magic_mouse"), p->input_magic_mouse);
cfgfile_dwrite_str (f, _T("magic_mousecursor"), magiccursors[p->input_magic_mouse_cursor]);
cfgfile_dwrite_str (f, _T("absolute_mouse"), abspointers[p->input_tablet]);
|| cfgfile_yesno (option, value, _T("comp_lowopt"), &p->comp_lowopt)
|| cfgfile_yesno (option, value, _T("rtg_nocustom"), &p->picasso96_nocustom)
|| cfgfile_yesno (option, value, _T("floppy_write_protected"), &p->floppy_read_only)
+ || cfgfile_yesno (option, value, _T("uae_hide_autoconfig"), &p->uae_hide_autoconfig)
|| cfgfile_yesno (option, value, _T("uaeserial"), &p->uaeserial))
return 1;
p->parallel_autoflush_time = 5;
p->ghostscript_parameters[0] = 0;
p->uae_hide = 0;
+ p->uae_hide_autoconfig = false;
p->mountitems = 0;
for (i = 0; i < MOUNT_CONFIG_SIZE; i++) {
RethinkICRA ();
}
-static int checkalarm (unsigned long tod, unsigned long alarm, int inc)
+static int checkalarm (unsigned long tod, unsigned long alarm, bool inc)
{
if (tod == alarm)
return 1;
return 0;
}
-STATIC_INLINE void ciab_checkalarm (int inc)
+STATIC_INLINE bool ciab_checkalarm (bool inc, bool irq)
{
// hack: do not trigger alarm interrupt if KS code and both
// tod and alarm == 0. This incorrectly triggers on non-cycle exact
// old value.
if ((munge24 (m68k_getpc ()) & 0xFFF80000) == 0xF80000) {
if (ciabtod == 0 && ciabalarm == 0)
- return;
+ return false;
}
if (checkalarm (ciabtod, ciabalarm, inc)) {
#if CIAB_DEBUG_IRQ
write_log (_T("CIAB tod %08x %08x\n"), ciabtod, ciabalarm);
#endif
- ciabicr |= 4;
- RethinkICRB ();
+ if (irq) {
+ ciabicr |= 4;
+ RethinkICRB ();
+ }
+ return true;
}
+ return false;
}
-STATIC_INLINE void ciaa_checkalarm (int inc)
+STATIC_INLINE void ciaa_checkalarm (bool inc)
{
if (checkalarm (ciaatod, ciaaalarm, inc)) {
#if CIAA_DEBUG_IRQ
ciaatod++;
ciaatod &= 0x00ffffff;
tod_hack_tod_last = ciaatod;
- ciaa_checkalarm (0);
+ ciaa_checkalarm (false);
}
}
RethinkICRA ();
}
-void CIA_hsync_posthandler (bool dotod)
+/* All this complexity to lazy evaluate TOD increase.
+ * Only increase it cycle-exactly if it is visible to running program:
+ * causes interrupt or program is reading or writing TOD registers
+ */
+
+static int ciab_tod_hoffset;
+static int ciab_tod_event_state;
+
+static void CIAB_tod_inc (uae_u32 v)
{
+ ciab_tod_event_state = 3; // done
+ ciabtod++;
+ ciabtod &= 0xFFFFFF;
+ ciab_checkalarm (true, true);
+}
- if (ciabtodon && dotod) {
- ciabtod++;
- ciabtod &= 0xFFFFFF;
- ciab_checkalarm (1);
+// Someone reads or writes TOD registers, sync TOD increase
+static void CIAB_tod_check (void)
+{
+ if (ciab_tod_event_state != 1 || !ciabtodon)
+ return;
+ int hpos = current_hpos ();
+ hpos -= ciab_tod_hoffset;
+ if (hpos >= 0 || currprefs.m68k_speed < 0) {
+ // Program should see the changed TOD
+ CIAB_tod_inc (0);
+ return;
}
+ // Not yet, add event to guarantee exact TOD inc position
+ ciab_tod_event_state = 2; // event active
+ event2_newevent_xx (-1, -hpos, 0, CIAB_tod_inc);
+}
+
+void CIAB_tod_handler (int hoffset)
+{
+ uae_u32 v;
+
+ ciab_tod_hoffset = hoffset;
+ if (!ciabtodon)
+ return;
+ ciab_tod_event_state = 1; // TOD inc needed
+ v = ciabtod;
+ ciabtod++;
+ ciabtod &= 0xFFFFFF;
+ bool irq = ciab_checkalarm (false, false);
+ ciabtod = v;
+ if (irq) {
+ // causes interrupt on this line, add event
+ ciab_tod_event_state = 2; // event active
+ event2_newevent_xx (-1, hoffset, 0, CIAB_tod_inc);
+ }
+}
+
+void CIA_hsync_posthandler (bool dotod)
+{
+ // Previous line was supposed to increase TOD but
+ // no one cared. Do it now at the start of next line.
+ if (ciab_tod_event_state == 1)
+ CIAB_tod_inc (0);
+ ciab_tod_event_state = 0;
if (currprefs.tod_hack && ciaatodon)
do_tod_hack (dotod);
static void write_battclock (void);
void CIA_vsync_prehandler (void)
{
+ if (heartbeat_cnt > 0)
+ heartbeat_cnt--;
if (rtc_delayed_write < 0) {
rtc_delayed_write = 50;
} else if (rtc_delayed_write > 0) {
}
}
-void CIA_vsync_posthandler (bool dotod)
+void CIAA_tod_handler (void)
{
- if (heartbeat_cnt > 0)
- heartbeat_cnt--;
#ifdef TOD_HACK
if (currprefs.tod_hack && tod_hack_enabled == 1)
return;
#endif
- if (ciaatodon && dotod) {
+ if (ciaatodon) {
ciaatod++;
ciaatod &= 0xFFFFFF;
- ciaa_checkalarm (1);
+ ciaa_checkalarm (true);
}
-#if 0
- if (vpos == 0) {
- write_log (_T("%d\n"), vsync_counter);
- dumpcia ();
- }
-#endif
}
static void bfe001_change (void)
case 7:
return (uae_u8)((ciabtb - ciabtb_passed) >> 8);
case 8:
+ CIAB_tod_check ();
if (ciabtlatch) {
ciabtlatch = 0;
return (uae_u8)ciabtol;
} else
return (uae_u8)ciabtod;
case 9:
+ CIAB_tod_check ();
if (ciabtlatch)
return (uae_u8)(ciabtol >> 8);
else
return (uae_u8)(ciabtod >> 8);
case 10:
+ CIAB_tod_check ();
if (!ciabtlatch) {
/* no latching if ALARM is set */
if (!(ciabcrb & 0x80))
} else {
ciaatod = (ciaatod & ~0xff) | val;
ciaatodon = 1;
- ciaa_checkalarm (0);
+ ciaa_checkalarm (false);
}
break;
case 9:
CIA_calctimers ();
break;
case 8:
+ CIAB_tod_check ();
if (ciabcrb & 0x80) {
ciabalarm = (ciabalarm & ~0xff) | val;
} else {
ciabtod = (ciabtod & ~0xff) | val;
ciabtodon = 1;
- ciab_checkalarm (0);
+ ciab_checkalarm (false, true);
}
break;
case 9:
+ CIAB_tod_check ();
if (ciabcrb & 0x80) {
ciabalarm = (ciabalarm & ~0xff00) | (val << 8);
} else {
}
break;
case 10:
+ CIAB_tod_check ();
if (ciabcrb & 0x80) {
ciabalarm = (ciabalarm & ~0xff0000) | (val << 16);
} else {
oldled = true;
resetwarning_phase = resetwarning_timer = 0;
heartbeat_cnt = 0;
+ ciab_tod_event_state = 0;
if (!savestate_state) {
oldovl = true;
cia_lget, cia_wget, cia_bget,
cia_lput, cia_wput, cia_bput,
default_xlate, default_check, NULL, _T("CIA"),
- cia_lgeti, cia_wgeti, ABFLAG_IO, 0x3f00
+ cia_lgeti, cia_wgeti, ABFLAG_IO, 0x3f00, 0xbfc000
};
// Gayle or Fat Gary does not enable CIA /CS lines if both CIAs are selected
clock_lget, clock_wget, clock_bget,
clock_lput, clock_wput, clock_bput,
default_xlate, default_check, NULL, _T("Battery backed up clock (none)"),
- dummy_lgeti, dummy_wgeti, ABFLAG_IO
+ dummy_lgeti, dummy_wgeti, ABFLAG_IO, 0x3f, 0xd80000
};
static unsigned int clock_control_d;
{
int v;
- value = debug_wputpeekdma (0xdff000 + addr, value);
+ value = debug_wputpeekdma_chipset (0xdff000 + addr, value);
copper_access = 1;
v = custom_wput_1 (hpos, addr, value, noget);
copper_access = 0;
#endif
}
+static void CIAA_tod_inc (uae_u32 v)
+{
+ CIAA_tod_handler ();
+}
+
STATIC_INLINE bool is_last_line (void)
{
return vpos + 1 == maxvpos + lof_store;
bool ciavsyncs = !(bplcon0 & 2) || ((bplcon0 & 2) && currprefs.genlock && genlockvtoggle);
CIA_hsync_posthandler (ciahsyncs);
+ if (ciahsyncs)
+ CIAB_tod_handler ((beamcon0 & 0x80) ? hsstop : 18);
if (currprefs.cs_ciaatod > 0) {
#if 0
static uae_s32 oldtick;
}
#else
static int cia_hsync;
- cia_hsync -= 256;
- if (cia_hsync <= 0) {
- CIA_vsync_posthandler (true);
- cia_hsync += ((MAXVPOS_PAL * MAXHPOS_PAL * 50 * 256) / (maxhpos * (currprefs.cs_ciaatod == 2 ? 60 : 50)));
+ if (cia_hsync < maxhpos) {
+ event2_newevent_xx (-1, cia_hsync, 1, CIAA_tod_inc);
+ int newcount = (vblank_hz * MAXVPOS_PAL * MAXHPOS_PAL) / (currprefs.cs_ciaatod == 2 ? 60 : 50);
+ cia_hsync += newcount;
+ } else {
+ cia_hsync -= maxhpos;
}
#endif
- } else if (currprefs.cs_ciaatod == 0 && vpos == (currprefs.ntscmode ? VSYNC_ENDLINE_NTSC : VSYNC_ENDLINE_PAL)) {
- CIA_vsync_posthandler (ciavsyncs);
+ } else if (currprefs.cs_ciaatod == 0 && ciavsyncs) {
+ // CIA-A TOD counter increases when vsync pulse ends
+ if (beamcon0 & 0x80) {
+ if (vpos == vsstop)
+ event2_newevent_xx (-1, lof_store ? hsstop : hsstop + hcenter, 0, CIAA_tod_inc);
+ } else {
+ if (vpos == (currprefs.ntscmode ? VSYNC_ENDLINE_NTSC : VSYNC_ENDLINE_PAL)) {
+ event2_newevent_xx (-1, lof_store ? 132 : 18, 0, CIAA_tod_inc);
+ }
+ }
}
inputdevice_hsync ();
custom_lget, custom_wget, custom_bget,
custom_lput, custom_wput, custom_bput,
default_xlate, default_check, NULL, _T("Custom chipset"),
- custom_lgeti, custom_wgeti, ABFLAG_IO, 0x1ff
+ custom_lgeti, custom_wgeti, ABFLAG_IO, 0x1ff, 0xdff000
};
static uae_u32 REGPARAM2 custom_wgeti (uaecptr addr)
static int debug_mem_off (uaecptr *addrp)
{
uaecptr addr = *addrp;
+ addrbank *ba;
int offset = munge24 (addr) >> 16;
- addr &= debug_mem_banks[offset]->mask;
+ ba = debug_mem_banks[offset];
+ addr = (addr & ba->mask) | ba->startmask;
*addrp = addr;
return offset;
}
return debug_mem_banks[munge24 (addr) >> 16]->xlateaddr (addr);
}
-uae_u16 debug_wputpeekdma (uaecptr addr, uae_u32 v)
+uae_u16 debug_wputpeekdma_chipset (uaecptr addr, uae_u32 v)
{
if (!memwatch_enabled)
return v;
+ addr &= 0x1fe;
+ addr += 0xdff000;
+ memwatch_func (addr, 2, 2, &v);
+ return v;
+}
+uae_u16 debug_wputpeekdma_chipram (uaecptr addr, uae_u32 v)
+{
+ if (!memwatch_enabled)
+ return v;
+ if (debug_mem_banks[addr >> 16] == NULL)
+ return v;
if (!currprefs.z3chipmem_size)
addr &= chipmem_bank.mask;
memwatch_func (addr & chipmem_bank.mask, 2, 2, &v);
return v;
}
-uae_u16 debug_wgetpeekdma (uaecptr addr, uae_u32 v)
+uae_u16 debug_wgetpeekdma_chipram (uaecptr addr, uae_u32 v)
{
uae_u32 vv = v;
if (!memwatch_enabled)
return v;
+ if (debug_mem_banks[addr >> 16] == NULL)
+ return v;
if (!currprefs.z3chipmem_size)
addr &= chipmem_bank.mask;
memwatch_func (addr, 1, 2, &vv);
static uae_u32 REGPARAM2 filesys_diagentry (TrapContext *context)
{
uaecptr resaddr = m68k_areg (regs, 2) + 0x10;
+ uaecptr expansion = m68k_areg (regs, 5);
uaecptr start = resaddr;
uaecptr residents, tmp;
m68k_areg (regs, 0) = residents;
+ if (currprefs.uae_hide_autoconfig) {
+ bool found = true;
+ while (found) {
+ uaecptr node = get_long (expansion + 0x3c);
+ found = false;
+ while (get_long (node)) {
+ if (get_word (node + 0x10 + 4) == 2011) {
+ uae_u8 prod = get_byte (node + 0x10 + 1);
+ if (prod != 2) {
+ // remove all 2011 boards except filesystem
+ found = true;
+ uaecptr succ = get_long (node);
+ uaecptr pred = get_long (node + 4);
+ put_long (pred, succ);
+ put_long (succ + 4, pred);
+ break;
+ }
+ // replace filesystem with A590/A2091 IDs..
+ put_byte (node + 0x10 + 1, 3);
+ put_word (node + 0x10 + 4, 514);
+ }
+ node = get_long (node);
+ }
+ }
+ }
+
return 1;
}
*
*/
+#define VRAMLOG 0
+#define MEMLOGR 0
+#define MEMLOGW 0
+#define MEMDEBUG 0
+#define MEMDEBUGMASK 0x7fffff
+#define MEMDEBUGTEST 0x280000
+
+
#include "sysconfig.h"
#include "sysdeps.h"
{
_T("Piccolo Zorro II"),
BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO, BOARD_MODEL_REGISTERS_PICCOLO,
- 0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, false, 6, true
+ 0x00000000, 0x00100000, 0x00200000, 0x00400000, CIRRUS_ID_CLGD5426, false, 6, true
},
{
_T("Piccolo Zorro III"),
BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO, BOARD_MODEL_REGISTERS_PICCOLO,
- 0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, true, 6, true
+ 0x00000000, 0x00100000, 0x00200000, 0x00400000, CIRRUS_ID_CLGD5426, true, 6, true
},
{
_T("Piccolo SD64 Zorro II"),
vram_enabled = true;
vram_offset_enabled = false;
vram = mapped_malloc (vramsize, board->z3 ? _T("z3_gfx") : _T("z2_gfx"));
+ gfxmem_bank.baseaddr = vram;
vga.vga.vram_size_mb = currprefs.rtgmem_size >> 20;
vgaioregion.opaque = &vgaioregionptr;
vgavramregion.opaque = &vgavramregionptr;
picasso_allocatewritewatch (currprefs.rtgmem_size);
}
+
+bool gfxboard_toggle (int mode)
+{
+ if (vram == NULL)
+ return false;
+ if (monswitch) {
+ monswitch = false;
+ picasso_requested_on = 0;
+ return true;
+ } else {
+ monswitch = true;
+ picasso_requested_on = 1;
+ return true;
+ }
+ return false;
+}
+
static bool gfxboard_setmode (void)
{
int bpp, width, height;
return;
if (monswitch && (modechanged || gfxboard_checkchanged ())) {
- if (!gfxboard_setmode ())
+ if (!gfxboard_setmode ()) {
+ picasso_requested_on = 0;
return;
+ }
init_hz_p96 ();
modechanged = false;
- picasso_requested_on = true;
+ picasso_requested_on = 1;
return;
}
if (monswitch) {
picasso_getwritewatch ();
+ if (fullrefresh)
+ vga.vga.graphic_mode = -1;
vga.vga.hw_ops->gfx_update(&vga);
}
picasso_statusline (gfxboard_surface);
}
}
+ if (fullrefresh > 0)
+ fullrefresh--;
}
if (gfxboard_surface)
INTREQ (0x8000 | 0x2000);
}
- if (fullrefresh > 0)
- fullrefresh--;
}
double gfxboard_get_vsync (void)
#endif
vram_offset[0] = offset0;
vram_offset[1] = offset1;
-#if 0
+#if VRAMLOG
if (vram_enabled != enabled)
write_log (_T("VRAM state=%d\n"), enabled);
#endif
#endif
// offset==0 and offset1==0x8000: linear vram mapping
vram_offset_enabled = offset0 != 0 || offset1 != 0x8000;
-#if 0
+#if VRAMLOG
if (vram_offset_enabled)
write_log (_T("VRAM offset %08x and %08x\n"), offset0, offset1);
#endif
static uaecptr fixaddr (uaecptr addr, int mask)
{
- if (vram_offset_enabled && vram_enabled) {
#ifdef JIT
+ if (vram_offset || !vram_enabled)
special_mem |= mask;
#endif
+ if (vram_offset_enabled) {
if (addr & 0x8000) {
addr += vram_offset[1] & ~0x8000;
} else {
return addr;
}
-static const MemoryRegionOps *getvgabank (uaecptr *paddr)
+STATIC_INLINE const MemoryRegionOps *getvgabank (uaecptr *paddr)
{
uaecptr addr = *paddr;
addr &= memory_mask;
*paddr = addr;
-// if (!(vga.vga.sr[0x07] & 0x01))
- if (addr < 0x10000)
- return vgalowram;
+// if (addr < 0x100000)
+// return vgalowram;
return vgaram;
}
static uae_u32 REGPARAM2 gfxboard_lget_mem (uaecptr addr)
{
+ uae_u32 v;
uae_u8 *m;
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_READ);
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
- uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;
-#endif
addr &= memory_mask;
v = bank->read (&vga, addr + 0, 1) << 24;
v |= bank->read (&vga, addr + 1, 1) << 16;
v |= bank->read (&vga, addr + 2, 1) << 8;
v |= bank->read (&vga, addr + 3, 1) << 0;
- return v;
} else {
- addr = fixaddr (addr, S_READ);
m = vram + addr;
- return do_get_mem_long ((uae_u32 *)m);
+ v = do_get_mem_long ((uae_u32 *)m);
}
+#if MEMLOGR
+ write_log (_T("R %08X L %08X\n"), addr, v);
+#endif
+ return v;
}
static uae_u32 REGPARAM2 gfxboard_wget_mem (uaecptr addr)
{
+ uae_u32 v;
uae_u8 *m;
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_READ);
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
- uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;;
-#endif
v = bank->read (&vga, addr + 0, 1) << 8;
v |= bank->read (&vga, addr + 1, 1) << 0;
- return v;
} else {
- addr = fixaddr (addr, S_READ);
m = vram + addr;
- return do_get_mem_word ((uae_u16 *)m);
+ v = do_get_mem_word ((uae_u16 *)m);
}
+#if MEMLOGR
+ write_log (_T("R %08X W %08X\n"), addr, v & 0xffff);
+#endif
+ return v;
}
static uae_u32 REGPARAM2 gfxboard_bget_mem (uaecptr addr)
{
+ uae_u32 v;
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_READ);
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
- uae_u32 v;
-#ifdef JIT
- special_mem |= S_READ;;
-#endif
v = bank->read (&vga, addr + 0, 1);
- return v;
} else {
- addr = fixaddr (addr, S_READ);
- return vram[addr];
+ v = vram[addr];
}
+#if MEMLOGR
+ write_log (_T("R %08X B %02X\n"), addr, v);
+#endif
+ return v;
}
-#define MEMDEBUG 0
-#define MEMDEBUGMASK 0xffffff
-#define MEMDEBUGTEST 0x1fc000
-
static void REGPARAM2 gfxboard_lput_mem (uaecptr addr, uae_u32 l)
{
uae_u8 *m;
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_WRITE);
#if MEMDEBUG
if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && l)
write_log (_T("%08X L %08X\n"), addr, l);
+#endif
+#if MEMLOGW
+ write_log (_T("W %08X L %08X\n"), addr, l);
#endif
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
bank->write (&vga, addr + 0, l >> 24, 1);
bank->write (&vga, addr + 1, l >> 16, 1);
bank->write (&vga, addr + 2, l >> 8, 1);
bank->write (&vga, addr + 3, l >> 0, 1);
} else {
- addr = fixaddr (addr, S_WRITE);
m = vram + addr;
do_put_mem_long ((uae_u32 *) m, l);
}
{
uae_u8 *m;
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_WRITE);
#if MEMDEBUG
if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && w)
write_log (_T("%08X W %04X\n"), addr, w & 0xffff);
+#endif
+#if MEMLOGW
+ write_log (_T("W %08X W %04X\n"), addr, w & 0xffff);
#endif
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
-#ifdef JIT
- special_mem |= S_WRITE;
-#endif
bank->write (&vga, addr + 0, w >> 8, 1);
bank->write (&vga, addr + 1, w >> 0, 1);
} else {
- addr = fixaddr (addr, S_WRITE);
m = vram + addr;
do_put_mem_word ((uae_u16 *)m, w);
}
static void REGPARAM2 gfxboard_bput_mem (uaecptr addr, uae_u32 b)
{
addr -= gfxboardmem_start & memory_mask;
+ addr = fixaddr (addr, S_WRITE);
#if MEMDEBUG
if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && b)
write_log (_T("%08X B %02X\n"), addr, b & 0xff);
+#endif
+#if MEMLOGW
+ write_log (_T("W %08X B %02X\n"), addr, b & 0xff);
#endif
if (!vram_enabled) {
const MemoryRegionOps *bank = getvgabank (&addr);
#endif
bank->write (&vga, addr, b, 1);
} else {
- addr = fixaddr (addr, S_WRITE);
vram[addr] = b;
}
}
// wakeup register
return 0;
}
- write_log (_T("GFXBOARD: %d unknown IO address %x\n"), write, addr);
+ write_log (_T("GFXBOARD: %c unknown IO address %x\n"), write ? 'W' : 'R', addr);
return 0;
}
if (addr >= 0x1000) {
}
}
if ((addr & 0xfff) < 0x3b0) {
- write_log (_T("GFXBOARD: %d unknown IO address %x\n"), write, addr);
+ write_log (_T("GFXBOARD: %c unknown IO address %x\n"), write ? 'W' : 'R', addr);
return 0;
}
addr++;
return 0;
}
if (addr < 0x3b0) {
- write_log (_T("GFXBOARD: %d unknown IO address %x\n"), write, addr);
+ write_log (_T("GFXBOARD: %c unknown IO address %x\n"), write ? 'W' : 'R', addr);
return 0;
}
addr -= 0x3b0;
{
case BOARD_MANUFACTURER_PICASSO:
{
- int idx = addr >> 12;
- if (idx == 11)
- monswitch = false;
- else if (idx == 10)
- monswitch = true;
+ if ((addr & 1) == 0) {
+ int idx = addr >> 12;
+ if (idx == 0x0b || idx == 0x09)
+ monswitch = false;
+ else if (idx == 0x0a || idx == 0x08)
+ monswitch = true;
+ }
}
break;
case BOARD_MANUFACTURER_PICCOLO:
board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE];
memory_mask = currprefs.rtgmem_size - 1;
}
- if (vram)
+ if (vram) {
mapped_free (vram);
+ gfxmem_bank.baseaddr = NULL;
+ }
vram = NULL;
xfree (fakesurface_surface);
fakesurface_surface = NULL;
void gfxboard_init_memory (void)
{
- int vram = currprefs.rtgmem_size;
+ int bank;
uae_u8 z2_flags, z3_flags, type;
gfxboard_init ();
z2_flags = 0x05;
z3_flags = 0x06;
- vram /= 0x00100000;
- while (vram > 1) {
+ bank = board->banksize;
+ bank /= 0x00100000;
+ while (bank > 1) {
z2_flags++;
z3_flags++;
- vram >>= 1;
+ bank >>= 1;
}
if (board->z3) {
type = 0x00 | 0x08 | 0x80; // 16M Z3
extern void CIA_reset (void);
extern void CIA_vsync_prehandler (void);
extern void CIA_hsync_prehandler (void);
-extern void CIA_vsync_posthandler (bool);
extern void CIA_hsync_posthandler (bool);
extern void CIA_handler (void);
+extern void CIAA_tod_handler (void);
+extern void CIAB_tod_handler (int);
extern void diskindex_handler (void);
extern void cia_parallelack (void);
extern void memwatch_dump2 (TCHAR *buf, int bufsize, int num);
-uae_u16 debug_wgetpeekdma (uaecptr addr, uae_u32 v);
-uae_u16 debug_wputpeekdma (uaecptr addr, uae_u32 v);
+uae_u16 debug_wgetpeekdma_chipram (uaecptr addr, uae_u32 v);
+uae_u16 debug_wputpeekdma_chipram (uaecptr addr, uae_u32 v);
+uae_u16 debug_wputpeekdma_chipset (uaecptr addr, uae_u32 v);
void debug_lgetpeek (uaecptr addr, uae_u32 v);
void debug_wgetpeek (uaecptr addr, uae_u32 v);
void debug_bgetpeek (uaecptr addr, uae_u32 v);
extern bool gfxboard_need_byteswap (int type);
extern double gfxboard_get_vsync (void);
extern void gfxboard_refresh (void);
+extern bool gfxboard_toggle (int mode);
#define GFXBOARD_UAE_Z2 0
#define GFXBOARD_UAE_Z3 1
AKS_DECREASEREFRESHRATE,
AKS_INCREASEREFRESHRATE,
AKS_ARCADIADIAGNOSTICS, AKS_ARCADIAPLY1, AKS_ARCADIAPLY2, AKS_ARCADIACOIN1, AKS_ARCADIACOIN2,
- AKS_TOGGLEMOUSEGRAB, AKS_SWITCHINTERPOL,
+ AKS_TOGGLEMOUSEGRAB, AKS_SWITCHINTERPOL, AKS_TOGGLERTG,
AKS_INPUT_CONFIG_1,AKS_INPUT_CONFIG_2,AKS_INPUT_CONFIG_3,AKS_INPUT_CONFIG_4,
AKS_DISKSWAPPER_NEXT,AKS_DISKSWAPPER_PREV,
AKS_DISKSWAPPER_INSERT0,AKS_DISKSWAPPER_INSERT1,AKS_DISKSWAPPER_INSERT2,AKS_DISKSWAPPER_INSERT3,
mem_get_func lgeti, wgeti;
int flags;
uae_u32 mask;
+ uae_u32 startmask;
uae_u32 start;
uae_u32 allocated;
} addrbank;
int uae_hide;
bool clipboard_sharing;
bool native_code;
+ bool uae_hide_autoconfig;
int mountitems;
struct uaedev_config_data mountconfig[MOUNT_CONFIG_SIZE];
extern void setup_brkhandler (void);
extern int isfullscreen (void);
extern void toggle_fullscreen (int);
+extern bool toggle_rtg (int);
extern void toggle_mousegrab (void);
extern void desktop_coords (int *dw, int *dh, int *x, int *y, int *w, int *h);
extern bool vsync_switchmode (int);
case AKS_TOGGLEMOUSEGRAB:
toggle_mousegrab ();
break;
+ case AKS_TOGGLERTG:
+ toggle_rtg (-1);
+ break;
case AKS_ENTERDEBUGGER:
activate_debugger ();
break;
DEFEVENT(SPC_DECREASE_REFRESHRATE,_T("Decrease emulation speed"),AM_K,0,0,AKS_DECREASEREFRESHRATE)
DEFEVENT(SPC_INCREASE_REFRESHRATE,_T("Increase emulation speed"),AM_K,0,0,AKS_INCREASEREFRESHRATE)
DEFEVENT(SPC_SWITCHINTERPOL,_T("Switch between audio interpolation methods"),AM_K,0,0,AKS_SWITCHINTERPOL)
+DEFEVENT(SPC_TOGGLERTG,_T("Toggle chipset/RTG screen"),AM_K,0,0,AKS_TOGGLERTG)
DEFEVENT(SPC_DISKSWAPPER_NEXT,_T("Next slot in Disk Swapper"),AM_K,0,0,AKS_DISKSWAPPER_NEXT)
DEFEVENT(SPC_DISKSWAPPER_PREV,_T("Previous slot in Disk Swapper"),AM_K,0,0,AKS_DISKSWAPPER_PREV)
if (p->rtgmem_type >= GFXBOARD_HARDWARE) {
if (p->rtgmem_size < gfxboard_get_vram_min (p->rtgmem_type))
p->rtgmem_size = gfxboard_get_vram_min (p->rtgmem_type);
+ if (p->address_space_24 && gfxboard_is_z3 (p->rtgmem_type)) {
+ p->rtgmem_type = GFXBOARD_UAE_Z2;
+ p->rtgmem_size = 0;
+ }
}
if (p->address_space_24 && p->rtgmem_size && p->rtgmem_type == GFXBOARD_UAE_Z3)
p->rtgmem_type = GFXBOARD_UAE_Z2;
uae_sem_t sub_sem, sub_sem2;
bool open;
bool usesptiread;
+ bool changed;
};
static struct dev_info_ioctl ciw32[MAX_TOTAL_SCSI_DEVICES];
while (cnt-- > 0) {
if (!DeviceIoControl (ciw->h, IOCTL_CDROM_GET_DRIVE_GEOMETRY, NULL, 0, &geom, sizeof (geom), &len, NULL)) {
DWORD err = GetLastError ();
+ ciw->changed = true;
if (err == ERROR_WRONG_DISK) {
if (win32_error (ciw, unitnum, _T("IOCTL_CDROM_GET_DRIVE_GEOMETRY")) < 0)
continue;
t->paddress = th->lastaddress;
t++;
+ for (i = th->first_track_offset; i <= th->last_track_offset + 1; i++) {
+ uae_u32 addr;
+ uae_u32 msf;
+ t = &th->toc[i];
+ if (i <= th->last_track_offset) {
+ write_log (_T("%2d: "), t->track);
+ addr = t->paddress;
+ msf = lsn2msf (addr);
+ } else {
+ write_log (_T(" "));
+ addr = th->toc[th->last_track_offset + 2].paddress;
+ msf = lsn2msf (addr);
+ }
+ write_log (_T("%7d %02d:%02d:%02d"),
+ addr, (msf >> 16) & 0x7fff, (msf >> 8) & 0xff, (msf >> 0) & 0xff);
+ if (i <= th->last_track_offset) {
+ write_log (_T(" %s %x"),
+ (t->control & 4) ? _T("DATA ") : _T("CDA "), t->control);
+ }
+ write_log (_T("\n"));
+ }
+
memcpy (tocout, th, sizeof (struct cd_toc_head));
return 1;
}
if (fetch_geometry (ciw, unitnum, di)) { // || ioctl_command_toc (unitnum))
di->media_inserted = 1;
}
- ioctl_command_toc2 (unitnum, &di->toc, true);
+ if (ciw->changed) {
+ ioctl_command_toc2 (unitnum, &di->toc, true);
+ ciw->changed = false;
+ }
di->removable = ciw->type == DRIVE_CDROM ? 1 : 0;
di->write_protected = ciw->type == DRIVE_CDROM ? 1 : 0;
di->type = ciw->type == DRIVE_CDROM ? INQ_ROMD : INQ_DASD;
if (ciw->drvletter == driveletter && ciw->di.media_inserted != insert) {
write_log (_T("IOCTL: media change %s %d\n"), ciw->drvlettername, insert);
ciw->di.media_inserted = insert;
+ ciw->changed = true;
int unitnum = getunitnum (ciw);
if (unitnum >= 0) {
update_device_info (unitnum);
if (amode && scancode == DIK_F11 && currprefs.win32_ctrl_F11_is_quit && ctrlpressed ())
code = AKS_QUIT;
+ if (scancode == DIK_F9 && specialpressed ()) {
+ if (newstate)
+ toggle_rtg (-1);
+ return;
+ }
+
scancode_new = scancode;
if (!specialpressed () && inputdevice_iskeymapped (keyboard, scancode))
scancode = 0;
static int interrupt_enabled;
double p96vblank;
static int rtg_clear_flag;
+static bool picasso_active;
static int uaegfx_old, uaegfx_active;
static uae_u32 reserved_gfxmem;
full_refresh = 1;
}
+bool picasso_is_active (void)
+{
+ return picasso_active;
+}
+
/* Clear our screen, since we've got a new Picasso screen-mode, and refresh with the proper contents
* This is called on several occasions:
* 1. Amiga-->Picasso transition, via SetSwitch()
* desired state, and wait for custom.c to call picasso_enablescreen
* whenever it is ready to change the screen state. */
picasso_requested_on = flag != 0;
+ picasso_active = picasso_requested_on;
p96text[0] = 0;
if (flag)
_stprintf (p96text, _T("Picasso96 %dx%dx%d (%dx%dx%d)"),
extern void picasso_handle_vsync (void);
extern void picasso_trigger_vblank (void);
extern void picasso_reset (void);
+extern bool picasso_is_active (void);
extern int picasso_setwincursor (void);
extern int picasso_palette (void);
extern bool picasso_flushpixels (uae_u8 *src, int offset);
copy winuaesrc.zip d:\amiga\winuaepackets\winuaesrc%1.zip
move winuaesrc.zip d:\amiga
cd c:\projects\winuae\src\od-win32
-zip -9 winuaedebug%1 winuae_msvc11\release\winuae.pdb winuae_msvc11\fullrelease\winuae.pdb
+zip -9 winuaedebug%1 winuae_msvc10\release\winuae.pdb winuae_msvc10\fullrelease\winuae.pdb
move winuaedebug%1.zip d:\amiga\winuaepackets\debug\
-copy winuae_msvc11\fullrelease\winuae.pdb d:\amiga\dump
+copy winuae_msvc10\fullrelease\winuae.pdb d:\amiga\dump
copy d:\amiga\winuae.exe d:\amiga\dump
for (int i = 0; hotkeys[i] >= 0; i++)
RegisterHotKey (hAmigaWnd, hotkeys[i], 0, hotkeys[i]);
#endif
- if (WIN32GFX_IsPicassoScreen ())
- WIN32GFX_EnablePicasso ();
getcapslock ();
wait_keyrelease ();
inputdevice_acquire (TRUE);
#define LANG_DLL 1
#if WINUAEPUBLICBETA
-#define WINUAEBETA _T("2")
+#define WINUAEBETA _T("3")
#else
#define WINUAEBETA _T("")
#endif
-#define WINUAEDATE MAKEBD(2013, 7, 18)
+#define WINUAEDATE MAKEBD(2013, 7, 21)
#define WINUAEEXTRA _T("")
//#define WINUAEEXTRA _T("AmiKit Preview")
//#define WINUAEEXTRA _T("Amiga Forever Edition")
#include "parser.h"
#include "lcd.h"
#include "sampler.h"
+#include "gfxboard.h"
#ifdef RETROPLATFORM
#include "rp.h"
#endif
return screen_is_picasso;
}
-void WIN32GFX_DisablePicasso (void)
-{
- picasso_requested_on = 0;
- picasso_on = 0;
-}
-
-void WIN32GFX_EnablePicasso (void)
-{
- picasso_requested_on = 1;
-}
-
int isscreen (void)
{
return hMainWnd ? 1 : 0;
set_config_changed ();
}
+bool toggle_rtg (int mode)
+{
+ if (mode == 0) {
+ if (!picasso_on)
+ return false;
+ } else if (mode > 0) {
+ if (picasso_on)
+ return false;
+ }
+ if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
+ return gfxboard_toggle (mode);
+ } else {
+ // can always switch from RTG to custom
+ if (picasso_requested_on && picasso_on) {
+ picasso_requested_on = false;
+ return true;
+ }
+ if (picasso_on)
+ return false;
+ // can only switch from custom to RTG if there is some mode active
+ if (picasso_is_active ()) {
+ picasso_requested_on = true;
+ return true;
+ }
+ }
+ return false;
+}
+
void toggle_fullscreen (int mode)
{
int *p = picasso_on ? &changed_prefs.gfx_apmode[1].gfx_fullscreen : &changed_prefs.gfx_apmode[0].gfx_fullscreen;
int WIN32GFX_GetHeight(void);
int WIN32GFX_GetDepth (int real);
void WIN32GFX_DisplayChangeRequested (int);
-void WIN32GFX_DisablePicasso (void);
-void WIN32GFX_EnablePicasso (void);
void DX_Invalidate (int x, int y, int width, int height);
RGBFTYPE WIN32GFX_FigurePixelFormats (RGBFTYPE colortype);
{ 0, 1, _T("Minimize when focus is lost"), &workprefs.win32_minimize_inactive },
{ 0, 1, _T("100/120Hz VSync black frame insertion"), &workprefs.lightboost_strobo },
{ 0, 0, _T("Master floppy write protection"), &workprefs.floppy_read_only },
+ { 0, 0, _T("Hide all UAE autoconfig boards"), &workprefs.uae_hide_autoconfig },
{ 0, NULL }
};
EndProject
Project("{8BC9CEB8-8B4A-11D0-8D11-00A0C91BC942}") = "unpackers", "..\unpackers\unpackers.vcxproj", "{98BA115B-829F-4085-9729-ABD0D779A60A}"
EndProject
+Project("{930C7802-8A8C-48F9-8165-68863BCCD9DD}") = "wix", "..\wix\wix.wixproj", "{BE211CE1-3955-4674-A664-5038FC791980}"
+EndProject
Global
GlobalSection(SolutionConfigurationPlatforms) = preSolution
+ Debug|Mixed Platforms = Debug|Mixed Platforms
Debug|Win32 = Debug|Win32
Debug|x64 = Debug|x64
+ Debug|x86 = Debug|x86
+ FullRelease|Mixed Platforms = FullRelease|Mixed Platforms
FullRelease|Win32 = FullRelease|Win32
FullRelease|x64 = FullRelease|x64
+ FullRelease|x86 = FullRelease|x86
+ Release|Mixed Platforms = Release|Mixed Platforms
Release|Win32 = Release|Win32
Release|x64 = Release|x64
+ Release|x86 = Release|x86
EndGlobalSection
GlobalSection(ProjectConfigurationPlatforms) = postSolution
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{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Debug|Win32.ActiveCfg = Debug|Win32
{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Debug|Win32.Build.0 = Debug|Win32
{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Debug|x64.ActiveCfg = Debug|x64
{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Debug|x64.Build.0 = Debug|x64
+ {4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Debug|x86.ActiveCfg = Debug|x64
+ {4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.FullRelease|Mixed Platforms.ActiveCfg = FullRelease|x64
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{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.FullRelease|Win32.ActiveCfg = FullRelease|Win32
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{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.FullRelease|x64.Build.0 = FullRelease|x64
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+ {4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Release|Mixed Platforms.ActiveCfg = Release|x64
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{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Release|Win32.ActiveCfg = Release|Win32
{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Release|Win32.Build.0 = Release|Win32
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{4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Release|x64.Build.0 = Release|x64
+ {4ADAA943-1AC8-4FB5-82E5-4FB753B6C2DA}.Release|x86.ActiveCfg = Release|x64
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{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.Debug|Win32.ActiveCfg = Debug|Win32
{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.Debug|x64.ActiveCfg = Debug|Win32
+ {DEF7ACF7-050E-4069-BB99-5B5D93F60521}.Debug|x86.ActiveCfg = Debug|Win32
+ {DEF7ACF7-050E-4069-BB99-5B5D93F60521}.FullRelease|Mixed Platforms.ActiveCfg = FullRelease|Win32
{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.FullRelease|Win32.ActiveCfg = FullRelease|Win32
{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.FullRelease|x64.ActiveCfg = FullRelease|Win32
+ {DEF7ACF7-050E-4069-BB99-5B5D93F60521}.FullRelease|x86.ActiveCfg = FullRelease|Win32
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{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.Release|Win32.ActiveCfg = Release|Win32
{DEF7ACF7-050E-4069-BB99-5B5D93F60521}.Release|x64.ActiveCfg = Release|Win32
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{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.Debug|Win32.ActiveCfg = Debug|Win32
{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.Debug|x64.ActiveCfg = Debug|Win32
+ {54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.Debug|x86.ActiveCfg = Debug|Win32
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{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.FullRelease|Win32.ActiveCfg = FullRelease|Win32
{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.FullRelease|x64.ActiveCfg = FullRelease|Win32
+ {54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.FullRelease|x86.ActiveCfg = FullRelease|Win32
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{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.Release|Win32.ActiveCfg = Release|Win32
{54197DFF-9CAA-4A9F-B9C2-2881EA04EACB}.Release|x64.ActiveCfg = Release|Win32
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{765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.Debug|x64.ActiveCfg = Debug|Win32
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{765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.FullRelease|Win32.ActiveCfg = FullRelease|Win32
{765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.FullRelease|x64.ActiveCfg = FullRelease|Win32
+ {765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.FullRelease|x86.ActiveCfg = FullRelease|Win32
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{765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.Release|Win32.ActiveCfg = Release|Win32
{765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.Release|x64.ActiveCfg = Release|Win32
+ {765B0AF0-B8D3-4998-89AF-D6F939E1CD18}.Release|x86.ActiveCfg = Release|Win32
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{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.Debug|Win32.ActiveCfg = Debug|Win32
{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.Debug|x64.ActiveCfg = Debug|Win32
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{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.FullRelease|Win32.ActiveCfg = FullRelease|Win32
{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.FullRelease|x64.ActiveCfg = FullRelease|Win32
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{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.Release|Win32.ActiveCfg = Release|Win32
{AF3DBBDE-E006-4DC3-9A26-CB0D7D82AE3C}.Release|x64.ActiveCfg = Release|Win32
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{DAF2EB1A-546A-41B3-9755-187562C01E3C}.Debug|x64.ActiveCfg = Debug|Win32
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{DAF2EB1A-546A-41B3-9755-187562C01E3C}.FullRelease|x64.ActiveCfg = FullRelease|Win32
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{DAF2EB1A-546A-41B3-9755-187562C01E3C}.Release|Win32.ActiveCfg = Release|Win32
{DAF2EB1A-546A-41B3-9755-187562C01E3C}.Release|x64.ActiveCfg = Release|Win32
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{C85288FB-A035-42CA-B5FB-8E6214319E97}.Debug|x64.ActiveCfg = Debug|Win32
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{C85288FB-A035-42CA-B5FB-8E6214319E97}.FullRelease|x64.ActiveCfg = FullRelease|Win32
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{C85288FB-A035-42CA-B5FB-8E6214319E97}.Release|x64.ActiveCfg = Release|Win32
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{960E83B5-9118-4EBD-AF50-18EFC1DC764B}.FullRelease|x64.ActiveCfg = FullRelease|Win32
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{2C44DD04-F5D6-4CC3-B0D6-1F4E51A0D962}.Release|x64.ActiveCfg = Release|x64
+ {2C44DD04-F5D6-4CC3-B0D6-1F4E51A0D962}.Release|x86.ActiveCfg = Release|x64
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Debug|Mixed Platforms.ActiveCfg = Debug|x64
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Debug|Mixed Platforms.Build.0 = Debug|x64
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Debug|Win32.ActiveCfg = Debug|Win32
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Debug|x64.ActiveCfg = Debug|Win32
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Debug|x86.ActiveCfg = Debug|x64
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.FullRelease|Mixed Platforms.ActiveCfg = Release|x64
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.FullRelease|Win32.ActiveCfg = Release|Win32
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.FullRelease|x64.ActiveCfg = Release|Win32
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.FullRelease|x86.ActiveCfg = Release|x64
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Release|Mixed Platforms.ActiveCfg = Release|x64
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Release|Win32.ActiveCfg = Release|Win32
{8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Release|x64.ActiveCfg = Release|x64
+ {8627DA33-98D1-4F60-B404-ECCEE0EE7BF9}.Release|x86.ActiveCfg = Release|x64
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.Debug|Mixed Platforms.ActiveCfg = Debug|x64
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.Debug|Mixed Platforms.Build.0 = Debug|x64
{98BA115B-829F-4085-9729-ABD0D779A60A}.Debug|Win32.ActiveCfg = Debug|Win32
{98BA115B-829F-4085-9729-ABD0D779A60A}.Debug|x64.ActiveCfg = Debug|Win32
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.Debug|x86.ActiveCfg = Debug|x64
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.FullRelease|Mixed Platforms.ActiveCfg = Release|x64
{98BA115B-829F-4085-9729-ABD0D779A60A}.FullRelease|Win32.ActiveCfg = Release|Win32
{98BA115B-829F-4085-9729-ABD0D779A60A}.FullRelease|x64.ActiveCfg = Release|Win32
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.FullRelease|x86.ActiveCfg = Release|x64
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.Release|Mixed Platforms.ActiveCfg = Release|x64
{98BA115B-829F-4085-9729-ABD0D779A60A}.Release|Win32.ActiveCfg = Release|Win32
{98BA115B-829F-4085-9729-ABD0D779A60A}.Release|x64.ActiveCfg = Release|x64
+ {98BA115B-829F-4085-9729-ABD0D779A60A}.Release|x86.ActiveCfg = Release|x64
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|Mixed Platforms.ActiveCfg = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|Mixed Platforms.Build.0 = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|Win32.ActiveCfg = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|x64.ActiveCfg = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|x86.ActiveCfg = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Debug|x86.Build.0 = Debug|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.FullRelease|Mixed Platforms.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.FullRelease|Win32.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.FullRelease|x64.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.FullRelease|x86.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.FullRelease|x86.Build.0 = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Release|Mixed Platforms.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Release|Win32.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Release|x64.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Release|x86.ActiveCfg = Release|x86
+ {BE211CE1-3955-4674-A664-5038FC791980}.Release|x86.Build.0 = Release|x86
EndGlobalSection
GlobalSection(SolutionProperties) = preSolution
HideSolutionNode = FALSE
- restore only single input target to default.
+- Disable Z3 Cirrus Logic RTG board if 24-bit address space.
+- Hard reset and CL board enabled crashed.
+- Added Chipset/RTG screen toggle input event ("Toggle chipset/RTG screen"). Only works when RTG mode is active,
+ supports both Cirrus Logic emulation and uaegfx. NOTE: temporarily also hardwired to END + F9.
+- VGA planar modes (<=16 colors) work now.
+- VGA text modes confirmed working (NetBSD and OpenBSD enable VGA console automatically if supported board detected)
+- Piccolo appears to have 4M address space (VRAM alias). Fixes EGS 7.4 graphics bugs and missing mouse cursor.
+- >1024 pixel tall modes work now correctly, including cursor vertical positioning (see below).
+- GD542x documentation says hardware cursor can't be used if "Multiply Vertical Registers by Two" bit is set
+ (allows >1024 pixel tall modes, wasn't emulated in original qemu code) unless chip is GD5429 or later. But
+ CGX4 does use it with boards that only had GD5426 or GD5428. I guess it only happens when cgxmode is used
+ to create impossible modes that no real monitor or chip can support...
+
+- Added misc panel "Hide all UAE autoconfig boards" option. It deletes all UAE-only autoconfig
+ board ConfigDev nodes in ExpansionBase.
+- Rewritten .cue decoding, some CD images with audio tracks had incorrect audio positioning,
+ for example Tie Break Tennis CDTV and Falcon CDTV.
+- Log also physical/virtual CD drive track information.
+- CIA-A vsync TOD counting is now cycle-exact. (if cycle values in Commodore's Agnus sync pulse timing sheet
+ are correct, they appear to be because it is standard PAL/NTSC)
+- CIA-B hsync TOD counting is also positioned cycle-exactly now (end of hsync pulse), was at the start of
+ scanline previously.
+
+Beta 2:
+
+- Fixed Piccolo SD64 Z2 wrong address space size.
+- Piccolo is Z2/Z3 board.
+- Fixed Z3 board subsize.
+- Improved QEMU CL emulation glue code, VRAM banking/offsets supported.
+- Some modes had invisible hardware sprite (mouse cursor).
+- Implemented Piccolo/SD64/Spectrum vblank interrupts. Picasso96 won't hang anymore.
+- Reset didn't reset all necessary graphics board variables.
+- Force 32-bit host display mode if byteswapped board is selected (Any board except PicassoII/II+)
+ Cirrus Logic emulation code supports byteswapping only in 32-bit mode.
+- Note: Most VGA planar modes (16 colors or less) are not working. Includes also mouse cursor.
+
+- Rewritten memory bank handling, moved all memory variables (start address, mask, size, etc)
+ to addrbank stucture. Standard RAM bank code duplication replaced with macros.
+- Debugger memwatch points now also detect hits in aliased addresses and only bank(s) that have
+ watched addresses are redirected to debugger.
+- CDTV SCSI option works again.
+- Some uaenet.device improvements.
+- It was not possible to write to Amithlon-style partitions.
+- 5:4 aspect ratio had disappeared.
+- CIA-A TOD counts (if vsync timed) on line 5 (PAL) or line 6 (NTSC), not line 0.
+ (This is not 100% accurate yet, horizontal position is still wrong, will be
+ improved in later betas)
+- Installer update also coming, will be built with WiX (msi installer).
+
Beta 1:
- Hardware Cirrus Logic based SVGA Zorro II/III RTG board emulation.
--- /dev/null
+<?xml version="1.0" encoding="UTF-8"?>
+<Wix xmlns="http://schemas.microsoft.com/wix/2006/wi">
+ <Product Id="18550701-62DA-4256-B2EA-5F7E8FA564CE" Name="WinUAE" Language="1033" Version="2.7.0.0" Manufacturer="Arabuusimiehet" UpgradeCode="88C6D045-E416-4AEA-9EE9-0B7A53EE0F16">
+ <Package InstallerVersion="200" Compressed="yes" InstallScope="perMachine" />
+
+ <MajorUpgrade DowngradeErrorMessage="A newer version of [ProductName] is already installed." />
+ <MediaTemplate EmbedCab="yes"/>
+
+ <Icon Id="ICON" SourceFile="$(var.winuae.ProjectDir)/../resources/winuae.ico"/>
+ <Property Id="ARPPRODUCTICON" Value="ICON" />
+
+ <UIRef Id="WixUI_FeatureTree" />
+ <UIRef Id="WixUI_ErrorProgressText" />
+ <Property Id="WIXUI_INSTALLDIR" Value="APPLICATIONROOTDIRECTORY" />
+
+ <WixVariable Id="WixUIBannerBmp" Value="$(var.winuae.ProjectDir)/../graphics/amiga_header.bmp" />
+ <WixVariable Id="WixUIDialogBmp" Value="$(var.winuae.ProjectDir)/../graphics/amiga_welcome.bmp" />
+
+ <Directory Id="TARGETDIR" Name="SourceDir">
+ <Directory Id="ProgramFilesFolder">
+ <Directory Id="APPLICATIONROOTDIRECTORY" Name="WinUAE">
+ <Directory Id="CONFIGURATIONS" Name="Configurations"/>
+ <Directory Id="DOCS" Name="Docs"/>
+ <Directory Id="AMIGAPROGRAMS" Name="Amiga Programs"/>
+ </Directory>
+ </Directory>
+ </Directory>
+
+ <DirectoryRef Id="APPLICATIONROOTDIRECTORY">
+ <Component Id="winuae.exe" Guid="AE2CD6FB-A066-43B4-8C96-C75E3948367F">
+ <File Source="$(var.winuae.TargetPath)" KeyPath="yes" Checksum="yes"/>
+ </Component>
+ </DirectoryRef>
+
+ <DirectoryRef Id="AMIGAPROGRAMS">
+ <Component Id="AdditionalFiles" Guid="D6062FDF-E323-43B6-A506-344FEDD06081">
+ <File Source="$(var.winuae.ProjectDir)/../winuaechangelog.txt" KeyPath="yes"/>
+ </Component>
+ </DirectoryRef>
+
+ <DirectoryRef Id="CONFIGURATIONS">
+ <Component Id="ConfigFiles" Guid="F529ED5F-DA94-4871-8616-0207DCAA9859">
+ <File Source="$(var.winuae.ProjectDir)/../asm.cmd" KeyPath="yes"/>
+ </Component>
+ </DirectoryRef>
+
+ <DirectoryRef Id="TARGETDIR">
+ <Component Id="RegistryEntries" Guid="9C6F7B8F-7A9E-45DC-BF16-85A034CCE1FB">
+ <RegistryKey Root="HKCU" Key="Software\Arabuusimiehet\WinUAE">
+ <RegistryValue Type="string" Name="InstallPath" Value="[TARGETDIR]" KeyPath="yes"/>
+ </RegistryKey>
+ </Component>
+ </DirectoryRef>
+
+ <Feature Id="MainApplication" Title="WinUAE" Description="WinUAE executable" Level="1" ConfigurableDirectory="APPLICATIONROOTDIRECTORY" Absent="disallow" AllowAdvertise="no">
+ <ComponentRef Id="winuae.exe" />
+ <ComponentRef Id="RegistryEntries" />
+ </Feature>
+
+ <Feature Id="ConfigFiles" Title="Configuration files" Description="Example host configuration files" Level="1000" AllowAdvertise="no">
+ <ComponentRef Id="ConfigFiles" />
+ </Feature>
+
+ <Feature Id="AdditionalFiles" Title="Amiga files" Description="Miscellaneous utilities" Level="1001" AllowAdvertise="no">
+ <ComponentRef Id="AdditionalFiles" />
+ </Feature>
+
+ </Product>
+</Wix>
--- /dev/null
+<?xml version="1.0" encoding="utf-8"?>
+<Project ToolsVersion="4.0" DefaultTargets="Build" xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+ <PropertyGroup>
+ <Configuration Condition=" '$(Configuration)' == '' ">Debug</Configuration>
+ <Platform Condition=" '$(Platform)' == '' ">x86</Platform>
+ <ProductVersion>3.7</ProductVersion>
+ <ProjectGuid>be211ce1-3955-4674-a664-5038fc791980</ProjectGuid>
+ <SchemaVersion>2.0</SchemaVersion>
+ <OutputName>winuae</OutputName>
+ <OutputType>Package</OutputType>
+ <WixTargetsPath Condition=" '$(WixTargetsPath)' == '' AND '$(MSBuildExtensionsPath32)' != '' ">$(MSBuildExtensionsPath32)\Microsoft\WiX\v3.x\Wix.targets</WixTargetsPath>
+ <WixTargetsPath Condition=" '$(WixTargetsPath)' == '' ">$(MSBuildExtensionsPath)\Microsoft\WiX\v3.x\Wix.targets</WixTargetsPath>
+ </PropertyGroup>
+ <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Debug|x86' ">
+ <OutputPath>bin\$(Configuration)\</OutputPath>
+ <IntermediateOutputPath>obj\$(Configuration)\</IntermediateOutputPath>
+ <DefineConstants>Debug</DefineConstants>
+ </PropertyGroup>
+ <PropertyGroup Condition=" '$(Configuration)|$(Platform)' == 'Release|x86' ">
+ <OutputPath>bin\$(Configuration)\</OutputPath>
+ <IntermediateOutputPath>obj\$(Configuration)\</IntermediateOutputPath>
+ </PropertyGroup>
+ <ItemGroup>
+ <Compile Include="Product.wxs" />
+ </ItemGroup>
+ <ItemGroup>
+ <ProjectReference Include="..\winuae_msvc11\winuae_msvc.vcxproj">
+ <Name>winuae</Name>
+ <Project>{4adaa943-1ac8-4fb5-82e5-4fb753b6c2da}</Project>
+ <Private>True</Private>
+ <DoNotHarvest>True</DoNotHarvest>
+ <RefProjectOutputGroups>Binaries;Content;Satellites</RefProjectOutputGroups>
+ <RefTargetDir>INSTALLFOLDER</RefTargetDir>
+ </ProjectReference>
+ </ItemGroup>
+ <ItemGroup>
+ <WixExtension Include="WixUIExtension">
+ <HintPath>$(WixExtDir)\WixUIExtension.dll</HintPath>
+ <Name>WixUIExtension</Name>
+ </WixExtension>
+ </ItemGroup>
+ <Import Project="$(WixTargetsPath)" />
+ <!--
+ To modify your build process, add your task inside one of the targets below and uncomment it.
+ Other similar extension points exist, see Wix.targets.
+ <Target Name="BeforeBuild">
+ </Target>
+ <Target Name="AfterBuild">
+ </Target>
+ -->
+</Project>
\ No newline at end of file
int width, height;
depth = s->vga.get_bpp(&s->vga) / 8;
+ if (depth == 0) // VGA mode depth == 0. TW.
+ depth = 1;
s->vga.get_resolution(&s->vga, &width, &height);
- /* TW FIXME! */
+ /* cirrus_blt_srcpitch and cirrus_blt_dstpitch can be zero. TW. */
/* extra x, y */
sx = s->cirrus_blt_srcpitch ? (src % ABS(s->cirrus_blt_srcpitch)) / depth : 0;
sy = s->cirrus_blt_srcpitch ? (src / ABS(s->cirrus_blt_srcpitch)) : 0;
old_value = s->vga.gr[0x31];
s->vga.gr[0x31] = reg_value;
- if (((old_value & CIRRUS_BLT_RESET) != 0) &&
- ((reg_value & CIRRUS_BLT_RESET) == 0)) {
+ if (((old_value & CIRRUS_BLT_RESET) == 0) &&
+ ((reg_value & CIRRUS_BLT_RESET) != 0)) {
cirrus_bitblt_reset(s);
}
// Blitter will start if old = CIRRUS_BLT_RESET and new = CIRRUS_BLT_START. TW.
line_compare = s->vga.cr[0x18] |
((s->vga.cr[0x07] & 0x10) << 4) |
((s->vga.cr[0x09] & 0x40) << 3);
+ /* multiply vertical registers by two. TW. */
+ if (s->vga.cr[0x17] & 0x04)
+ line_compare <<= 1;
*pline_compare = line_compare;
}
int width, height;
width = (s->cr[0x01] + 1) * 8;
- /* TW: if 16 bit mode but SR7 bit 7 == 0: 2x width and palette mode */
+ /* if 16 bit mode but SR7 bit 7 == 0: 2x width and palette mode. TW. */
if ((cs->cirrus_hidden_dac_data & 0x80) == 0) {
switch (s->sr[0x07] & CIRRUS_SR7_BPP_MASK) {
case CIRRUS_SR7_BPP_16_DOUBLEVCLK:
/* interlace support */
if (s->cr[0x1a] & 0x01)
height *= 2;
- /* TW multiply vertical registers by two */
+ /* multiply vertical registers by two. TW. */
if (s->cr[0x17] & 0x04)
height *= 2;
case 0xf1: // Graphics Cursor Y
s->vga.sr[0x11] = val;
s->hw_cursor_y = (val << 3) | (s->vga.sr_index >> 5);
+ /* This is probably a hack. TW.
+ * CL-GD542x documentation says CR17[2] won't work with
+ * hardware cursor except in GD5429 and later revisions
+ * but Amiga CyberGraphX v4 does use it with GD5426
+ * based board when height is >1024 pixels.
+ * Probably it is a bug in CGX when using impossible
+ * resolutions that real chip or monitor would not support.
+ */
+ if (s->vga.cr[0x17] & 0x04)
+ s->hw_cursor_y <<= 1;
break;
case 0x07: // Extended Sequencer Mode
cirrus_update_memory_access(s);
s->vga.dac_sub_index = 0;
s->vga.dac_read_index++;
}
- return val;
+#if 0
+ write_log ("READ PAL: %d %d: %02X\n", s->vga.dac_read_index, s->vga.dac_sub_index, val);
+#endif
+ return val;
}
static void cirrus_vga_write_palette(CirrusVGAState * s, int reg_value)
{
-#ifdef DEBUG_CIRRUS
- if (s->vga.dac_write_index < 16)
- write_log ("PAL: %d %d: %02X\n", s->vga.dac_write_index, s->vga.dac_sub_index, reg_value);
+#if 0
+ write_log ("WRITE PAL: %d %d: %02X\n", s->vga.dac_write_index, s->vga.dac_sub_index, reg_value);
#endif
s->vga.dac_cache[s->vga.dac_sub_index] = reg_value;
if (++s->vga.dac_sub_index == 3) {
case 0x2c: // BLT SRC ADDR 0x0000ff
case 0x2d: // BLT SRC ADDR 0x00ff00
case 0x2f: // BLT WRITEMASK
- case 0x30: // BLT MODE
case 0x32: // RASTER OP
case 0x33: // BLT MODEEXT
case 0x34: // BLT TRANSPARENT COLOR 0x00ff
s->vga.gr[reg_index] = reg_value;
break;
case 0x21: // BLT WIDTH 0x001f00
- case 0x23: // BLT HEIGHT 0x001f00
+ reg_value &= 0x1f;
+ if (s->device_id < CIRRUS_ID_CLGD5434)
+ reg_value &= 0x07;
+ s->vga.gr[reg_index] = reg_value;
+ break;
+ case 0x23: // BLT HEIGHT 0x001f00
+ reg_value &= 0x1f;
+ if (s->device_id < CIRRUS_ID_CLGD5434)
+ reg_value &= 0x03;
+ s->vga.gr[reg_index] = reg_value;
+ break;
case 0x25: // BLT DEST PITCH 0x001f00
+ reg_value &= 0x1f;
+ if (s->device_id <= CIRRUS_ID_CLGD5428)
+ reg_value &= 0x0f;
+ s->vga.gr[reg_index] = reg_value;
+ break;
case 0x27: // BLT SRC PITCH 0x001f00
- s->vga.gr[reg_index] = reg_value & 0x1f;
+ reg_value &= 0x1f;
+ if (s->device_id <= CIRRUS_ID_CLGD5428)
+ reg_value &= 0x0f;
+ s->vga.gr[reg_index] = reg_value;
break;
case 0x2a: // BLT DEST ADDR 0x3f0000
- s->vga.gr[reg_index] = reg_value & 0x3f;
+ reg_value &= 0x3f;
+ if (s->device_id < CIRRUS_ID_CLGD5434)
+ reg_value &= 0x1f;
+ s->vga.gr[reg_index] = reg_value;
/* if auto start mode, starts bit blt now */
if (s->vga.gr[0x31] & CIRRUS_BLT_AUTOSTART) {
cirrus_bitblt_start(s);
}
break;
case 0x2e: // BLT SRC ADDR 0x3f0000
- s->vga.gr[reg_index] = reg_value & 0x3f;
+ reg_value &= 0x3f;
+ if (s->device_id < CIRRUS_ID_CLGD5434)
+ reg_value &= 0x1f;
+ s->vga.gr[reg_index] = reg_value;
+ break;
+ case 0x30: // BLT MODE
+ if (s->device_id < CIRRUS_ID_CLGD5434)
+ reg_value &= ~0x20;
+ s->vga.gr[reg_index] = reg_value;
break;
- case 0x31: // BLT STATUS/START
+ case 0x31: // BLT STATUS/START
cirrus_write_bitblt(s, reg_value);
break;
default:
addr &= s->cirrus_addr_mask;
- if (((s->vga.sr[0x17] & 0x44) == 0x44) &&
+ // linear vram also need planar handling. TW.
+ if ((s->vga.sr[0x07] & 0x01) == 0) {
+ return vga_mem_readb(&s->vga, addr);
+ }
+
+ if (((s->vga.sr[0x17] & 0x44) == 0x44) &&
((addr & s->linear_mmio_mask) == s->linear_mmio_mask)) {
/* memory-mapped I/O */
ret = cirrus_mmio_blt_read(s, addr & 0xff);
addr &= s->cirrus_addr_mask;
+ // linear vram also need planar handling. TW.
+ if ((s->vga.sr[0x07] & 0x01) == 0) {
+ vga_mem_writeb(&s->vga, addr, val);
+ return;
+ }
+
if (((s->vga.sr[0x17] & 0x44) == 0x44) &&
((addr & s->linear_mmio_mask) == s->linear_mmio_mask)) {
/* memory-mapped I/O */
+#include "sysconfig.h"
+#include "sysdeps.h"
+
#include "qemuuaeglue.h"
#include "vga_int.h"
{
return 0;
}
+int64_t qemu_get_clock_ms(QEMUClock *clock)
+{
+ struct timeval tv;
+ gettimeofday (&tv, NULL);
+ return (uae_u64)tv.tv_sec * 1000 + tv.tv_usec / 1000;
+}
+int64_t get_ticks_per_sec(void)
+{
+ return 1000000;
+}
+
void portio_list_init(PortioList *piolist,
const struct MemoryRegionPortio *callbacks,
typedef uint32_t QEMUClock;
extern QEMUClock *vm_clock;
-static inline int64_t qemu_get_clock_ms(QEMUClock *clock)
-{
- return 0;
-}
-static inline int64_t get_ticks_per_sec(void)
-{
- return 1000000000LL;
-}
int64_t qemu_get_clock_ns(QEMUClock *clock);
-
+int64_t qemu_get_clock_ms(QEMUClock *clock);
+int64_t get_ticks_per_sec(void);
#define isa_mem_base 0
}
}
+#if 0
+
static uint32_t vbe_ioport_read_index(void *opaque, uint32_t addr)
{
VGACommonState *s = (VGACommonState*)opaque;
}
}
+#endif
+
/* called for accesses between 0xa0000 and 0xc0000 */
uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr)
{
/* convert to VGA memory offset */
memory_map_mode = (s->gr[VGA_GFX_MISC] >> 2) & 3;
- addr &= 0x1ffff;
+ addr &= ((s->vram_size / 4) - 1); // TW
switch(memory_map_mode) {
case 0:
break;
case 1:
- if (addr >= 0x10000)
- return 0xff;
+// FIXME: Correct checks. TW.
+// if (addr >= 0x10000)
+// return 0xff;
addr += s->bank_offset;
break;
case 2:
addr -= 0x10000;
- if (addr >= 0x8000)
- return 0xff;
+// if (addr >= 0x8000)
+// return 0xff;
break;
default:
case 3:
addr -= 0x18000;
- if (addr >= 0x8000)
- return 0xff;
+// if (addr >= 0x8000)
+// return 0xff;
break;
}
#endif
/* convert to VGA memory offset */
memory_map_mode = (s->gr[VGA_GFX_MISC] >> 2) & 3;
- addr &= 0x1ffff;
+ addr &= ((s->vram_size / 4) - 1); // TW
switch(memory_map_mode) {
case 0:
break;
case 1:
- if (addr >= 0x10000)
- return;
+// if (addr >= 0x10000)
+// return;
addr += s->bank_offset;
break;
case 2:
addr -= 0x10000;
- if (addr >= 0x8000)
- return;
+// if (addr >= 0x8000)
+// return;
break;
default:
case 3:
addr -= 0x18000;
- if (addr >= 0x8000)
- return;
+// if (addr >= 0x8000)
+// return;
break;
}
shift_control = (s->gr[VGA_GFX_MODE] >> 5) & 3;
- // cirrus hack TW
+ // Cirrus hack. If extended modes enabled, make sure we don't emulate
+ // standard VGA modes. SR7[0] isn't set by all software I tested. TW
if (s->sr[7] & 1)
shift_control = 2;
PORTIO_END_OF_LIST(),
};
+#if 0
static const MemoryRegionPortio vbe_portio_list[] = {
{ 0, 1, 2, vbe_ioport_read_index, vbe_ioport_write_index },
# ifdef TARGET_I386
{ 2, 1, 2, vbe_ioport_read_data, vbe_ioport_write_data },
PORTIO_END_OF_LIST(),
};
+#endif
/* Used by both ISA and PCI */
MemoryRegion *vga_init_io(VGACommonState *s,
{
MemoryRegion *vga_mem;
- *vga_ports = vga_portio_list;
+#if 0
+ *vga_ports = vga_portio_list;
*vbe_ports = vbe_portio_list;
+#endif
vga_mem = (MemoryRegion*)g_malloc(sizeof(*vga_mem));
memory_region_init_io(vga_mem, &vga_mem_ops, s,
projects / francis / winuae.git / commitdiff