NULL, 0,
true, EXPANSIONTYPE_IDE
},
+ {
+ _T("mtecmastercard"), _T("Mastercard"), _T("M-Tec"),
+ NULL, ncr_mtecmastercard_init, NULL, mtecmastercard_add_scsi_unit, ROMTYPE_MASTERCARD, 0, 0, BOARD_AUTOCONFIG_Z2, false,
+ NULL, 0,
+ true, EXPANSIONTYPE_SCSI
+ },
{
_T("masoboshi"), _T("MasterCard"), _T("Masoboshi"),
NULL, masoboshi_init, NULL, masoboshi_add_idescsi_unit, ROMTYPE_MASOBOSHI | ROMTYPE_NONE, 0, 0, BOARD_AUTOCONFIG_Z2, false,
extern void alf3_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void typhoon2scsi_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern void squirrel_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
+extern void mtecmastercard_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc);
extern bool ncr_fastlane_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_oktagon_autoconfig_init(struct autoconfig_info *aci);
extern bool ncr_scram5394_init(struct autoconfig_info *aci);
extern bool ncr_rapidfire_init(struct autoconfig_info *aci);
extern bool ncr_alf3_autoconfig_init(struct autoconfig_info *aci);
+extern bool ncr_mtecmastercard_init(struct autoconfig_info *aci);
extern bool typhoon2scsi_init(struct autoconfig_info *aci);
extern void cpuboard_ncr9x_scsi_put(uaecptr, uae_u32);
#define ROMTYPE_PCMCIASRAM 0x00100080
#define ROMTYPE_PCMCIAIDE 0x00100081
#define ROMTYPE_SSQUIRREL 0x00100082
+#define ROMTYPE_MASTERCARD 0x00100083
#define ROMTYPE_NOT 0x00800000
#define ROMTYPE_QUAD 0x01000000
static struct ncr9x_state *ncr_rapidfire_scsi[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ncr9x_state *ncr_trifecta_scsi[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ncr9x_state *ncr_squirrel_scsi;
+static struct ncr9x_state *ncr_mtec_mastercard;
static struct ncr9x_state *ncr_units[MAX_NCR9X_UNITS + 1];
write_log(_T("DKB IO %08X PUT %02x %08x\n"), addr, val & 0xff, M68K_GETPC);
return;
}
- } else if (ISCPUBOARD(BOARD_MTEC, BOARD_MTEC_SUB_EMATRIX530) || ISCPUBOARD(BOARD_DCE, BOARD_DCE_SUB_TYPHOON2)) {
+ } else if (ISCPUBOARD(BOARD_MTEC, BOARD_MTEC_SUB_EMATRIX530) || ISCPUBOARD(BOARD_DCE, BOARD_DCE_SUB_TYPHOON2) || ncr == ncr_mtec_mastercard) {
if ((addr & 0xf000) >= 0xe000) {
if ((addr & 0x3ff) <= 7) {
if (ncr->fakedma_data_offset < ncr->fakedma_data_size) {
return;
if (addr & 1)
return;
- if (currprefs.cpuboard_settings & 1)
+ if ((currprefs.cpuboard_settings & 1) && ncr != ncr_mtec_mastercard)
return;
reg_shift = 3;
}
write_log(_T("DKB IO GET %08x %08x\n"), addr, M68K_GETPC);
return 0;
}
- } else if (ISCPUBOARD(BOARD_MTEC, BOARD_MTEC_SUB_EMATRIX530) || ISCPUBOARD(BOARD_DCE, BOARD_DCE_SUB_TYPHOON2)) {
+ } else if (ISCPUBOARD(BOARD_MTEC, BOARD_MTEC_SUB_EMATRIX530) || ISCPUBOARD(BOARD_DCE, BOARD_DCE_SUB_TYPHOON2) || ncr == ncr_mtec_mastercard) {
if ((addr & 0xf000) >= 0xe000) {
if ((addr & 0x3ff) <= 7) {
if (ncr->fakedma_data_offset >= ncr->fakedma_data_size) {
}
if (addr & 1)
return 0x7f;
- if (currprefs.cpuboard_settings & 1)
+ if ((currprefs.cpuboard_settings & 1) && ncr != ncr_mtec_mastercard)
return 0x7f;
if (addr < 0xc000 || addr >= 0xe000)
return 0x7f;
return true;
}
+bool ncr_mtecmastercard_init(struct autoconfig_info *aci)
+{
+ uae_u8 *rom = xcalloc(uae_u8, 65536);
+ load_rom_rc(aci->rc, ROMTYPE_MASTERCARD, 32768, 0, rom, 65536, LOADROM_EVENONLY_ODDONE);
+ memcpy(aci->autoconfig_raw, aci->rc->autoboot_disabled ? rom + 256 : rom, 128);
+ if (!aci->doinit) {
+ xfree(rom);
+ return true;
+ }
+
+ struct ncr9x_state *ncr = getscsi(aci->rc);
+ if (!ncr) {
+ xfree(rom);
+ return false;
+ }
+
+ xfree(ncr->rom);
+ ncr->rom = rom;
+
+ ncr->enabled = true;
+ memcpy(ncr->acmemory, aci->autoconfig_raw, sizeof aci->autoconfig_raw);
+ ncr->rom_start = 0;
+ ncr->rom_offset = 0;
+ ncr->rom_end = 0x8000;
+ ncr->io_start = 0x8000;
+ ncr->io_end = 0x10000;
+ ncr->bank = &ncr9x_bank_generic;
+ ncr->board_mask = 65535;
+
+ ncr9x_reset_board(ncr);
+
+ aci->addrbank = ncr->bank;
+ return true;
+}
+
bool ncr_rapidfire_init(struct autoconfig_info *aci)
{
const struct expansionromtype *ert = get_device_expansion_rom(ROMTYPE_RAPIDFIRE);
ncr9x_esp_scsi_init(ncr_squirrel_scsi, fake2_dma_read, fake2_dma_write, set_irq2, 0);
esp_dma_enable(ncr_squirrel_scsi->devobject.lsistate, 1);
}
+
+void mtecmastercard_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ ncr9x_add_scsi_unit(&ncr_mtec_mastercard, ch, ci, rc);
+ ncr9x_esp_scsi_init(ncr_mtec_mastercard, fake_dma_read_ematrix, fake_dma_write_ematrix, set_irq2, 0);
+ esp_dma_enable(ncr_mtec_mastercard->devobject.lsistate, 1);
+}
#endif
return NULL;
}
-#define NEXT_ROM_ID 254
+#define NEXT_ROM_ID 255
#define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \
{ _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e },
0x3eb87eb3, 0xff41889e,0x641114e5,0x5ec1f784,0xd79216ce,0xe9a74a40, NULL, NULL },
{ _T("Trifecta v4.31"), 0, 0, 0, 0, _T("TRIFECTA\0"), 32768, 253, 0, 0, ROMTYPE_TRIFECTA, 0, 0, NULL,
0x591c3cd4, 0x681b8a67,0x3775dd0c,0x8f13b641,0x8852a51e,0xf3a29da3, NULL, NULL },
+ { _T("Mastercard v2.3"), 0, 0, 0, 0, _T("MTECMASTERCARD\0"), 32768, 254, 0, 0, ROMTYPE_MASTERCARD, 0, 0, NULL,
+ 0xfb4d20c6, 0xdd1a38eb,0xe87a44f7,0x46cb400f,0xbd761d2e,0x9ebd31ef, NULL, NULL },
{ _T("CyberStorm MK I 68040"), 0, 0, 0, 0, _T("CSMKI\0"), 32768, 95, 0, 0, ROMTYPE_CB_CSMK1, 0, 0, NULL,
0, 0, 0, 0, 0, 0, NULL, _T("cyberstormmk1_040.rom") },