DIVU.W, DIVS.W and CHK.W 68000 undefined flag fixes.

diff --git a/gencpu.cpp b/gencpu.cpp
index 01be24c33b97f06300ee75a8de4ae2f65a47f973..b89f6a9f4aa33078751143d43e3e0147150c270f 100644 (file)
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -4117,8 +4117,9 @@ static void gen_opcode (unsigned int opcode)
                        genastore ("src", Apdi, "7", sz_long, "old");
                } else {
                        addop_ce020 (curi, 0);
-                       genamode (NULL, Apdi, "7", sz_long, "old", 2, 0, GF_AA);
                        genamode (NULL, curi->smode, "srcreg", sz_long, "src", 1, 0, GF_AA);
+                       // smode must be first in case it is A7.
+                       genamode(NULL, Apdi, "7", sz_long, "old", 2, 0, GF_AA);
                        genamode (NULL, curi->dmode, "dstreg", curi->size, "offs", 1, 0, 0);
                        genastore ("src", Apdi, "7", sz_long, "old");
                        genastore ("m68k_areg (regs, 7)", curi->smode, "srcreg", sz_long, "src");
@@ -4498,8 +4499,7 @@ bccl_not68020:
                        curi->dmode, "dstreg", sz_long, "dst", 1, 0);
                printf ("\tCLEAR_CZNV ();\n");
                printf ("\tif (src == 0) {\n");
-               if (cpu_level > 1)
-                       printf ("\t\tdivbyzero_special (0, dst);\n");
+               printf ("\t\tdivbyzero_special (0, dst);\n");
                incpc ("%d", m68k_pc_offset);
                printf ("\t\tException_cpu(5);\n");
                printf ("\t\tgoto %s;\n", endlabelstr);
@@ -4536,8 +4536,7 @@ bccl_not68020:
                        curi->smode, "srcreg", sz_word, "src", 1, 0,
                        curi->dmode, "dstreg", sz_long, "dst", 1, 0);
                printf ("\tif (src == 0) {\n");
-               if (cpu_level > 1)
-                       printf ("\t\tdivbyzero_special (1, dst);\n");
+               printf ("\t\tdivbyzero_special (1, dst);\n");
                incpc ("%d", m68k_pc_offset);
                printf ("\t\tException_cpu(5);\n");
                printf ("\t\tgoto %s;\n", endlabelstr);
@@ -4627,17 +4626,18 @@ bccl_not68020:
                genamode (curi, curi->dmode, "dstreg", curi->size, "dst", 1, 0, 0);
                sync_m68k_pc ();
                addcycles000 (4);
-               printf ("\tif (dst > src) {\n");
-               printf ("\t\tSET_NFLG (0);\n");
-               printf ("\t\tException_cpu(6);\n");
-               printf ("\t\tgoto %s;\n", endlabelstr);
-               printf ("\t}\n");
+               printf("\tsetchkundefinedflags(src, dst);\n");
+               printf("\tif ((uae_s32)dst < 0) {\n");
+               printf("\t\tSET_NFLG (1);\n");
+               printf("\t\tException_cpu(6);\n");
+               printf("\t\tgoto %s;\n", endlabelstr);
+               printf("\t}\n");
                addcycles000 (2);
-               printf ("\tif ((uae_s32)dst < 0) {\n");
-               printf ("\t\tSET_NFLG (1);\n");
-               printf ("\t\tException_cpu(6);\n");
-               printf ("\t\tgoto %s;\n", endlabelstr);
-               printf ("\t}\n");
+               printf("\tif (dst > src) {\n");
+               printf("\t\tSET_NFLG (0);\n");
+               printf("\t\tException_cpu(6);\n");
+               printf("\t\tgoto %s;\n", endlabelstr);
+               printf("\t}\n");
                fill_prefetch_next ();
                need_endlabel = 1;
                break;

diff --git a/include/newcpu.h b/include/newcpu.h
index 727acfa6763b54f70fd2e5a3f881eac8d780c552..8988eb079281e4280f17b237116b9509ab803f43 100644 (file)
--- a/include/newcpu.h
+++ b/include/newcpu.h
@@ -680,6 +680,7 @@ extern int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor);
 extern void divbyzero_special(bool issigned, uae_s32 dst);
 extern void setdivuoverflowflags(uae_u32 dividend, uae_u16 divisor);
 extern void setdivsoverflowflags(uae_s32 dividend, uae_s16 divisor);
+extern void setchkundefinedflags(uae_s16 src, uae_s16 dst);
 extern void protect_roms (bool);
 extern void unprotect_maprom (void);
 extern bool is_hardreset(void);

diff --git a/newcpu_common.cpp b/newcpu_common.cpp
index 5843c36ae0a43762de8c0b117e982f6b43e68b36..47ae3a55e505a737a62418723af05e83ed564d8b 100644 (file)
--- a/newcpu_common.cpp
+++ b/newcpu_common.cpp
@@ -747,9 +747,12 @@ int getDivs68kCycles (uae_s32 dividend, uae_s16 divisor)
        return mcycles * 2;
 }
 
-/* 68000 Z=1. NVC=0
+/* DIV divide by zero
+ *
+ * 68000 Signed: NVC=0 Z=1. Unsigned: VC=0 N=(dst>>16)<0 Z=(dst>>16)==0
  * 68020 and 68030: Signed: Z=1 NVC=0. Unsigned: V=1, N<dst, Z=!N, C=0.
  * 68040/68060 C=0.
+ *
  */
 void divbyzero_special (bool issigned, uae_s32 dst)
 {
@@ -768,6 +771,15 @@ void divbyzero_special (bool issigned, uae_s32 dst)
        } else {
                // 68000/010
                CLEAR_CZNV ();
+               if (issigned) {
+                       SET_ZFLG(1);
+               } else {
+                       uae_s16 d = dst >> 16;
+                       if (d < 0)
+                               SET_NFLG(1);
+                       else if (d == 0)
+                               SET_ZFLG(1);
+               }
        }
 }
 
@@ -829,6 +841,19 @@ void setdivsoverflowflags(uae_s32 dividend, uae_s16 divisor)
        }
 }
 
+/*
+ * CHK.W undefined flags
+ *
+ * 68000: CV=0, Z if dst==0.
+ *
+ */
+void setchkundefinedflags(uae_s16 src, uae_s16 dst)
+{
+       CLEAR_CZNV();
+       if (dst == 0)
+               SET_ZFLG(1);
+}
+
 #ifndef CPUEMU_68000_ONLY
 
 #if !defined (uae_s64)