#define ATEAM_IDE (DATAFLYERPLUS_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
#define FASTATA4K_IDE (ATEAM_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
#define ELSATHD_IDE (FASTATA4K_IDE + 2 * MAX_DUPLICATE_EXPANSION_BOARDS)
-#define TOTAL_IDE (ELSATHD_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
+#define ACCESSX_IDE (ELSATHD_IDE + 2 * MAX_DUPLICATE_EXPANSION_BOARDS)
+#define TOTAL_IDE (ACCESSX_IDE + MAX_DUPLICATE_EXPANSION_BOARDS)
#define ALF_ROM_OFFSET 0x0100
#define GVP_IDE_ROM_OFFSET 0x8000
static struct ide_board *arriba_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_board *fastata4k_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_board *elsathd_board[MAX_DUPLICATE_EXPANSION_BOARDS];
+static struct ide_board *accessx_board[MAX_DUPLICATE_EXPANSION_BOARDS];
static struct ide_hdf *idecontroller_drive[TOTAL_IDE * 2];
static struct ide_thread_state idecontroller_its;
}
} else {
if (ide_rethink(ide_boards[i], false))
- safe_interrupt_set(IRQ_SOURCE_IDE, i, false);
+ safe_interrupt_set(IRQ_SOURCE_IDE, i, ide_boards[i]->intlev6);
}
}
}
return addr;
}
+static int get_accessx_reg(uaecptr addr, struct ide_board *board)
+{
+ if (!(addr & 0x8000))
+ return -1;
+ if ((addr & 1))
+ return -1;
+ if (addr & 0x400) {
+ int reg = (addr >> 6) & 7;
+ if (addr & 0x200)
+ reg |= IDE_SECONDARY;
+ return reg;
+ }
+ return -1;
+}
+
static int getidenum(struct ide_board *board, struct ide_board **arr)
{
for (int i = 0; i < MAX_DUPLICATE_EXPANSION_BOARDS; i++) {
v = board->rom[(offset + 0) & board->rom_mask];
}
}
+
+ } else if (board->type == ACCESSX_IDE) {
+
+ int reg = get_accessx_reg(addr, board);
+ if (reg >= 0) {
+ v = get_ide_reg(board, reg);
+ } else if (board->rom && !(addr & 0x8000)) {
+ int offset = addr & 0x7fff;
+ v = board->rom[offset];
+ }
+
}
return v;
v |= board->rom[(offset + 1) & board->rom_mask];
}
+ } else if (board->type == ACCESSX_IDE) {
+
+ int reg = get_accessx_reg(addr, board);
+ if (reg == 0) {
+ v = get_ide_reg_multi(board, IDE_DATA, 0, 1);
+ } else if (reg > 0) {
+ v = get_ide_reg(board, reg);
+ } else if (board->rom && !(addr & 0x8000)) {
+ int offset = addr & 0x7fff;
+ v = board->rom[(offset + 0) & board->rom_mask];
+ v <<= 8;
+ v |= board->rom[(offset + 1) & board->rom_mask];
+ }
}
}
put_ide_reg_multi(board, reg, v, portnum, 1);
}
+ } else if (board->type == ACCESSX_IDE) {
+
+ int reg = get_accessx_reg(addr, board);
+ if (reg >= 0) {
+ put_ide_reg(board, reg, v);
+ }
+
}
}
if (reg == 0) {
put_ide_reg_multi(board, IDE_DATA, v, portnum, 1);
}
+
+ } else if (board->type == ACCESSX_IDE) {
+
+ int reg = get_accessx_reg(addr, board);
+ if (!reg) {
+ put_ide_reg_multi(board, IDE_DATA, v, 0, 1);
+ } else if (reg > 0) {
+ put_ide_reg(board, reg, v & 0xff);
+ }
}
}
}
add_ide_standard_unit(ch, ci, rc, elsathd_board, ELSATHD_IDE, true, false, 2);
}
+bool accessx_init(struct autoconfig_info *aci)
+{
+ uae_u8 *rom;
+ int rom_size = 32768;
+
+ rom = xcalloc(uae_u8, rom_size);
+ memset(rom, 0xff, rom_size);
+ load_rom_rc(aci->rc, ROMTYPE_ACCESSX, 32768, aci->rc->autoboot_disabled ? 0x4000 : 0x0000, rom, 32768, LOADROM_EVENONLY_ODDONE | LOADROM_FILL);
+
+ if ((rom[0] != 0xd0 && rom[2] != 0x10) && (rom[0] != 0xc0 && rom[2] != 0x10)) {
+ // descramble
+ uae_u8 rom2[32768];
+ memcpy(rom2, rom, 32768);
+ for (int i = 0; i < 16384; i++) {
+ int addr = 0;
+ addr |= ((i >> 5) & 1) << 0;
+ addr |= ((i >> 4) & 1) << 1;
+ addr |= ((i >> 3) & 1) << 2;
+ addr |= ((i >> 6) & 1) << 3;
+ addr |= ((i >> 1) & 1) << 4;
+ addr |= ((i >> 0) & 1) << 5;
+ addr |= ((i >> 9) & 1) << 6;
+ addr |= ((i >> 11) & 1) << 7;
+ addr |= ((i >> 10) & 1) << 8;
+ addr |= ((i >> 8) & 1) << 9;
+ addr |= ((i >> 2) & 1) << 10;
+ addr |= ((i >> 7) & 1) << 11;
+ addr |= ((i >> 13) & 1) << 12;
+ addr |= ((i >> 12) & 1) << 13;
+ addr |= ((i >> 14) & 1) << 14;
+ uae_u8 b = rom2[addr * 2];
+ uae_u8 v = 0;
+ v |= ((b >> 0) & 1) << 1;
+ v |= ((b >> 1) & 1) << 2;
+ v |= ((b >> 2) & 1) << 3;
+ v |= ((b >> 3) & 1) << 0;
+ rom[i * 2] = v << 4;
+ }
+ }
+
+ if (!aci->doinit) {
+ memcpy(aci->autoconfig_raw, rom, sizeof aci->autoconfig_raw);
+ xfree(rom);
+ return true;
+ }
+
+ struct ide_board *ide = getide(aci);
+
+ ide->configured = 0;
+ ide->intena = true;
+ ide->intlev6 = true;
+ ide->keepautoconfig = false;
+ ide->bank = &ide_bank_generic;
+ ide->mask = 65536 - 1;
+
+ ide->rom = rom;
+ ide->rom_size = rom_size;
+ ide->rom_mask = rom_size - 1;
+ memcpy(ide->acmemory, ide->rom, sizeof ide->acmemory);
+
+ aci->addrbank = ide->bank;
+ return true;
+}
+
+void accessx_add_ide_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
+{
+ add_ide_standard_unit(ch, ci, rc, accessx_board, ACCESSX_IDE, false, false, 2);
+}
+
extern void x86_xt_ide_bios(struct zfile*, struct romconfig*);
static bool x86_at_hd_init(struct autoconfig_info *aci, int type)
{
return NULL;
}
-#define NEXT_ROM_ID 242
+#define NEXT_ROM_ID 244
#define ALTROM(id,grp,num,size,flags,crc32,a,b,c,d,e) \
{ _T("X"), 0, 0, 0, 0, 0, size, id, 0, 0, flags, (grp << 16) | num, 0, NULL, crc32, a, b, c, d, e },
0xc5ae45d4, 0x8d682bc1,0x72bd2d35,0x4ba2db5c,0x9f6745a4,0x8937782c, NULL, NULL },
{ _T("C-Ltd Kronos"), 1, 0, 1, 0, _T("KRONOS\0"), 8192, 235, 0, 0, ROMTYPE_KRONOS, 0, 0, NULL,
0x9366d357, 0x7113add0,0x4c782ed7,0xa56a74ba,0x3378d55c,0x5605eaf6, NULL, NULL },
+ { _T("AccessX 500 v2.1"), 2, 1, 2, 1, _T("ACCESSX\0"), 32768, 242, 0, 0, ROMTYPE_ACCESSX, 0, 0, NULL,
+ 0x039a14a7, 0x1a710b94, 0xcc1bd217, 0xb0c310af, 0x4b0f6d0a, 0x1125b05a, NULL, NULL },
+ { _T("AccessX 500 v2.1 (descrambled)"), 2, 1, 2, 1, _T("ACCESSX\0"), 32768, 243, 0, 0, ROMTYPE_ACCESSX, 0, 0, NULL,
+ 0x415a5cae, 0x15c8c15f, 0x3700e867, 0xd1dbe2ee, 0xcbb7c7cd, 0x245555fa, NULL, NULL },
{ _T("CyberStorm MK I 68040"), 0, 0, 0, 0, _T("CSMKI\0"), 32768, 95, 0, 0, ROMTYPE_CB_CSMK1, 0, 0, NULL,
0, 0, 0, 0, 0, 0, NULL, _T("cyberstormmk1_040.rom") },