]> git.unchartedbackwaters.co.uk Git - francis/libjit.git/commitdiff
Treat dead blocks as empty when peepholing branches to the next block.
authorRhys Weatherley <rweather@southern-storm.com.au>
Fri, 21 May 2004 00:22:19 +0000 (00:22 +0000)
committerRhys Weatherley <rweather@southern-storm.com.au>
Fri, 21 May 2004 00:22:19 +0000 (00:22 +0000)
ChangeLog
jit/jit-gen-arm.c
jit/jit-gen-arm.h

index d1d964ba9f790ff1d2cd340c5b21e9f55d83777d..831ed90a3635637a964c9dc207fb500b21d3113c 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,4 +1,9 @@
 
+2004-05-21  Rhys Weatherley  <rweather@southern-storm.com.au>
+
+       * jit/jit-gen-arm.c, jit/jit-gen-arm.h: modify the ARM codegen
+       macros so that they can be used for branch elimination.
+
 2004-05-20  Rhys Weatherley  <rweather@southern-storm.com.au>
 
        * include/jit/jit-value.h, jit/jit-insn.c, jit/jit-value.c:
index 938f5924c9270588d262916ace944f7423b04470..dd08ae86343651974d227697e4a85ade232d9481 100644 (file)
  */
 
 #include "jit-internal.h"
-#include "jit-gen-arm.h"
 
 #if defined(__arm) || defined(__arm__)
 
-arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value)
+#define        arm_execute             execute_prefix
+#define        arm_execute_cc  (execute_prefix | (1 << 20))
+#define        arm_execute_imm (execute_prefix | (1 << 25))
+
+#include "jit-gen-arm.h"
+
+arm_inst_ptr _arm_mov_reg_imm
+       (arm_inst_ptr inst, int reg, int value, int execute_prefix)
 {
        /* Handle bytes in various positions */
        if((value & 0x000000FF) == value)
@@ -122,9 +128,9 @@ arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value)
        return inst;
 }
 
-arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc,
-                                                 int dreg, int sreg, int imm,
-                                                 int saveWork)
+arm_inst_ptr _arm_alu_reg_imm
+       (arm_inst_ptr inst, int opc, int dreg,
+        int sreg, int imm, int saveWork, int execute_prefix)
 {
        int tempreg;
        if(saveWork)
@@ -147,7 +153,7 @@ arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc,
        {
                tempreg = ARM_WORK;
        }
-       _arm_mov_reg_imm(inst, tempreg, imm);
+       _arm_mov_reg_imm(inst, tempreg, imm, execute_prefix);
        arm_alu_reg_reg(inst, opc, dreg, sreg, tempreg);
        if(saveWork)
        {
index 0b0f368668a1cd6aee1f86d591bb79e1da03dfad..bc18b8ba2f41ff132c8c7e641c0b5e89d5075717 100644 (file)
@@ -146,12 +146,23 @@ typedef unsigned int *arm_inst_ptr;
 #define        arm_always_cc           (arm_build_prefix(ARM_CC_AL, (1 << 20)))
 #define        arm_always_imm          (arm_build_prefix(ARM_CC_AL, (1 << 25)))
 
+/*
+ * Wrappers for "arm_always*" that allow higher-level routines
+ * to change code generation to be based on a condition.  This is
+ * used to perform branch elimination.
+ */
+#ifndef arm_execute
+#define        arm_execute                     arm_always
+#define        arm_execute_cc          arm_always_cc
+#define        arm_execute_imm         arm_always_imm
+#endif
+
 /*
  * Arithmetic or logical operation which doesn't set condition codes.
  */
 #define        arm_alu_reg_reg(inst,opc,dreg,sreg1,sreg2)      \
                        do { \
-                               *(inst)++ = arm_always | \
+                               *(inst)++ = arm_execute | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg1)) << 16) | \
@@ -159,7 +170,7 @@ typedef unsigned int *arm_inst_ptr;
                        } while (0)
 #define        arm_alu_reg_imm8(inst,opc,dreg,sreg,imm)        \
                        do { \
-                               *(inst)++ = arm_always_imm | \
+                               *(inst)++ = arm_execute_imm | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg)) << 16) | \
@@ -175,27 +186,30 @@ typedef unsigned int *arm_inst_ptr;
                        } while (0)
 #define        arm_alu_reg_imm8_rotate(inst,opc,dreg,sreg,imm,rotate)  \
                        do { \
-                               *(inst)++ = arm_always_imm | \
+                               *(inst)++ = arm_execute_imm | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg)) << 16) | \
                                                        (((unsigned int)(rotate)) << 8) | \
                                                         ((unsigned int)((imm) & 0xFF)); \
                        } while (0)
-extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
-                                                                int sreg, int imm, int saveWork);
+extern arm_inst_ptr _arm_alu_reg_imm
+               (arm_inst_ptr inst, int opc, int dreg,
+                int sreg, int imm, int saveWork, int execute_prefix);
 #define        arm_alu_reg_imm(inst,opc,dreg,sreg,imm) \
                        do { \
                                int __alu_imm = (int)(imm); \
                                if(__alu_imm >= 0 && __alu_imm < 256) \
                                { \
                                        arm_alu_reg_imm8 \
-                                               ((inst), (opc), (dreg), (sreg), __alu_imm); \
+                                               ((inst), (opc), (dreg), (sreg), __alu_imm, \
+                                                arm_execute); \
                                } \
                                else \
                                { \
                                        (inst) = _arm_alu_reg_imm \
-                                               ((inst), (opc), (dreg), (sreg), __alu_imm, 0); \
+                                               ((inst), (opc), (dreg), (sreg), __alu_imm, 0, \
+                                                arm_execute); \
                                } \
                        } while (0)
 #define        arm_alu_reg_imm_save_work(inst,opc,dreg,sreg,imm)       \
@@ -209,12 +223,13 @@ extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
                                else \
                                { \
                                        (inst) = _arm_alu_reg_imm \
-                                               ((inst), (opc), (dreg), (sreg), __alu_imm_save, 1); \
+                                               ((inst), (opc), (dreg), (sreg), __alu_imm_save, 1, \
+                                                arm_execute); \
                                } \
                        } while (0)
 #define arm_alu_reg(inst,opc,dreg,sreg)        \
                        do { \
-                               *(inst)++ = arm_always | \
+                               *(inst)++ = arm_execute | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                         ((unsigned int)(sreg)); \
@@ -232,7 +247,7 @@ extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
  */
 #define        arm_alu_cc_reg_reg(inst,opc,dreg,sreg1,sreg2)   \
                        do { \
-                               *(inst)++ = arm_always_cc | \
+                               *(inst)++ = arm_execute_cc | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg1)) << 16) | \
@@ -240,7 +255,7 @@ extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
                        } while (0)
 #define        arm_alu_cc_reg_imm8(inst,opc,dreg,sreg,imm)     \
                        do { \
-                               *(inst)++ = arm_always_imm | arm_always_cc | \
+                               *(inst)++ = arm_execute_imm | arm_execute_cc | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg)) << 16) | \
@@ -248,7 +263,7 @@ extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
                        } while (0)
 #define arm_alu_cc_reg(inst,opc,dreg,sreg)     \
                        do { \
-                               *(inst)++ = arm_always_cc | \
+                               *(inst)++ = arm_execute_cc | \
                                                        (((unsigned int)(opc)) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                         ((unsigned int)(sreg)); \
@@ -301,7 +316,8 @@ extern arm_inst_ptr _arm_alu_reg_imm(arm_inst_ptr inst, int opc, int dreg,
                                arm_alu_reg_imm8_rotate((inst), ARM_MOV, (reg), \
                                                                                0, (imm), (rotate)); \
                        } while (0)
-extern arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value);
+extern arm_inst_ptr _arm_mov_reg_imm
+       (arm_inst_ptr inst, int reg, int value, int execute_prefix);
 #define        arm_mov_reg_imm(inst,reg,imm)   \
                        do { \
                                int __imm = (int)(imm); \
@@ -311,7 +327,8 @@ extern arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value);
                                } \
                                else if((reg) == ARM_PC) \
                                { \
-                                       (inst) = _arm_mov_reg_imm((inst), ARM_WORK, __imm); \
+                                       (inst) = _arm_mov_reg_imm \
+                                               ((inst), ARM_WORK, __imm, arm_execute); \
                                        arm_mov_reg_reg((inst), ARM_PC, ARM_WORK); \
                                } \
                                else if(__imm > -256 && __imm < 0) \
@@ -321,7 +338,8 @@ extern arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value);
                                } \
                                else \
                                { \
-                                       (inst) = _arm_mov_reg_imm((inst), (reg), __imm); \
+                                       (inst) = _arm_mov_reg_imm \
+                                               ((inst), (reg), __imm, arm_execute); \
                                } \
                        } while (0)
 
@@ -343,7 +361,7 @@ extern arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value);
  */
 #define        arm_shift_reg_reg(inst,opc,dreg,sreg1,sreg2) \
                        do { \
-                               *(inst)++ = arm_always | \
+                               *(inst)++ = arm_execute | \
                                                        (((unsigned int)ARM_MOV) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(sreg2)) << 8) | \
@@ -353,7 +371,7 @@ extern arm_inst_ptr _arm_mov_reg_imm(arm_inst_ptr inst, int reg, int value);
                        } while (0)
 #define        arm_shift_reg_imm8(inst,opc,dreg,sreg,imm) \
                        do { \
-                               *(inst)++ = arm_always | \
+                               *(inst)++ = arm_execute | \
                                                        (((unsigned int)ARM_MOV) << 21) | \
                                                        (((unsigned int)(dreg)) << 12) | \
                                                        (((unsigned int)(opc)) << 5) | \