EDITTEXT IDC_CHIPRAM,135,44,40,12,ES_CENTER | ES_READONLY
RTEXT "Z2 Fast:",IDC_STATIC,8,68,60,15,SS_CENTERIMAGE
CONTROL "Slider1",IDC_FASTMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,68,66,60,20
- EDITTEXT IDC_FASTRAM,135,72,40,12,ES_CENTER | ES_READONLY
+ EDITTEXT IDC_FASTRAM,135,69,40,12,ES_CENTER | ES_READONLY
RTEXT "Slow:",IDC_STATIC,179,44,66,15,SS_CENTERIMAGE
CONTROL "Slider1",IDC_SLOWMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,248,41,60,20
EDITTEXT IDC_SLOWRAM,311,44,40,12,ES_CENTER | ES_READONLY
LTEXT "Z3 mapping mode:",IDC_STATIC,263,256,115,15,SS_CENTERIMAGE
COMBOBOX IDC_Z3MAPPING,262,276,117,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
CONTROL "Slow RAM",IDC_FASTMEMSLOW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,238,103,8
+ RTEXT "Processor slot:",IDC_STATIC,8,93,60,15,SS_CENTERIMAGE
+ CONTROL "",IDC_CPUSLOTMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,68,93,60,20
+ EDITTEXT IDC_CPUSLOTRAM,135,93,40,12,ES_CENTER | ES_READONLY
END
IDD_CPU DIALOGEX 0, 0, 396, 316
CONTROL "Native/RTG autoswitch",IDC_RTG_SWITCHER,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,195,130,95,10
COMBOBOX IDC_MONITOREMU_ACTIVEMON,316,37,65,65,CBS_DROPDOWNLIST | NOT WS_VISIBLE | WS_VSCROLL | WS_TABSTOP
LTEXT "Active output:",IDC_STATIC,249,37,62,10,NOT WS_VISIBLE,WS_EX_RIGHT
- CONTROL "Override initial native chipset display",IDC_RTG_INITIAL_MONITOR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,249,63,131,10
+ CONTROL "Override initial native chipset display",IDC_RTG_INITIAL_MONITOR,
+ "Button",BS_AUTOCHECKBOX | WS_TABSTOP,249,63,131,10
END
IDD_INPUTMAP DIALOGEX 0, 0, 421, 293
z3 = FALSE;
fast = FALSE;
#endif
- ew (hDlg, IDC_Z3TEXT, z3);
- ew (hDlg, IDC_Z3FASTRAM, z3);
- ew (hDlg, IDC_Z3FASTMEM, z3);
- ew (hDlg, IDC_Z3CHIPRAM, z3);
- ew (hDlg, IDC_Z3CHIPMEM, z3);
- ew (hDlg, IDC_FASTMEM, true);
- ew (hDlg, IDC_FASTRAM, true);
- ew (hDlg, IDC_Z3MAPPING, z3);
- ew (hDlg, IDC_FASTTEXT, true);
+ ew(hDlg, IDC_Z3TEXT, z3);
+ ew(hDlg, IDC_Z3FASTRAM, z3);
+ ew(hDlg, IDC_Z3FASTMEM, z3);
+ ew(hDlg, IDC_Z3CHIPRAM, z3);
+ ew(hDlg, IDC_Z3CHIPMEM, z3);
+ ew(hDlg, IDC_FASTMEM, true);
+ ew(hDlg, IDC_FASTRAM, true);
+ ew(hDlg, IDC_CPUSLOTMEM, z3);
+ ew(hDlg, IDC_CPUSLOTRAM, z3);
+ ew(hDlg, IDC_Z3MAPPING, z3);
+ ew(hDlg, IDC_FASTTEXT, true);
bool isfast = fastram_select >= MAX_STANDARD_RAM_BOARDS && fastram_select < MAX_STANDARD_RAM_BOARDS + 2 * MAX_RAM_BOARDS && fastram_select_ramboard && fastram_select_ramboard->size;
ew(hDlg, IDC_AUTOCONFIG_MANUFACTURER, isfast && !manual);
xSendDlgItemMessage (hDlg, IDC_Z3CHIPMEM, TBM_SETPOS, TRUE, mem_size);
SetDlgItemText (hDlg, IDC_Z3CHIPRAM, memsize_names[msi_z3chip[mem_size]]);
+
#if 0
mem_size = 0;
switch (workprefs.mbresmem_low_size) {
}
xSendDlgItemMessage (hDlg, IDC_MBMEM1, TBM_SETPOS, TRUE, mem_size);
SetDlgItemText (hDlg, IDC_MBRAM1, memsize_names[msi_gfx[mem_size]]);
+#endif
mem_size = 0;
- switch (workprefs.mbresmem_high_size) {
+ switch (workprefs.mbresmem_high.size) {
case 0x00000000: mem_size = 0; break;
case 0x00100000: mem_size = 1; break;
case 0x00200000: mem_size = 2; break;
case 0x04000000: mem_size = 7; break;
case 0x08000000: mem_size = 8; break;
}
- xSendDlgItemMessage (hDlg, IDC_MBMEM2, TBM_SETPOS, TRUE, mem_size);
- SetDlgItemText (hDlg, IDC_MBRAM2, memsize_names[msi_gfx[mem_size]]);
-#endif
- setmax32bitram (hDlg);
+ xSendDlgItemMessage (hDlg, IDC_CPUSLOTMEM, TBM_SETPOS, TRUE, mem_size);
+ SetDlgItemText (hDlg, IDC_CPUSLOTRAM, memsize_names[msi_cpuboard[mem_size]]);
+ setmax32bitram (hDlg);
}
static void fix_values_memorydlg (void)
recursive++;
pages[MEMORY_ID] = hDlg;
currentpage = MEMORY_ID;
- xSendDlgItemMessage (hDlg, IDC_CHIPMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CHIP_MEM, MAX_CHIP_MEM));
- xSendDlgItemMessage (hDlg, IDC_FASTMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_FAST_MEM, MAX_FAST_MEM));
- xSendDlgItemMessage (hDlg, IDC_SLOWMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_SLOW_MEM, MAX_SLOW_MEM));
- xSendDlgItemMessage (hDlg, IDC_Z3FASTMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_Z3_MEM, MAX_Z3_MEM));
- xSendDlgItemMessage (hDlg, IDC_Z3CHIPMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_Z3_MEM, MAX_Z3_CHIPMEM));
- xSendDlgItemMessage (hDlg, IDC_Z3MAPPING, CB_RESETCONTENT, 0, 0);
+ xSendDlgItemMessage(hDlg, IDC_CHIPMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_CHIP_MEM, MAX_CHIP_MEM));
+ xSendDlgItemMessage(hDlg, IDC_FASTMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_FAST_MEM, MAX_FAST_MEM));
+ xSendDlgItemMessage(hDlg, IDC_SLOWMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_SLOW_MEM, MAX_SLOW_MEM));
+ xSendDlgItemMessage(hDlg, IDC_Z3FASTMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_Z3_MEM, MAX_Z3_MEM));
+ xSendDlgItemMessage(hDlg, IDC_Z3CHIPMEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_Z3_MEM, MAX_Z3_CHIPMEM));
+ xSendDlgItemMessage(hDlg, IDC_CPUSLOTMEM, TBM_SETRANGE, TRUE, MAKELONG(MIN_MB_MEM, MAX_MBH_MEM));
+ xSendDlgItemMessage(hDlg, IDC_Z3MAPPING, CB_RESETCONTENT, 0, 0);
WIN32GUI_LoadUIString (IDS_AUTOMATIC, tmp, sizeof tmp / sizeof (TCHAR));
_tcscat(tmp, _T(" (*)"));
xSendDlgItemMessage (hDlg, IDC_Z3MAPPING, CB_ADDSTRING, 0, (LPARAM)tmp);
if (v != workprefs.chipmem.size) {
change1 = true;
workprefs.chipmem.size = v;
+ if (full_property_sheet && !(workprefs.chipset_mask & CSMASK_ECS_AGNUS) && v > 512 * 1024) {
+ workprefs.chipset_mask |= CSMASK_ECS_AGNUS;
+ }
}
v = memsizes[msi_bogo[SendMessage (GetDlgItem (hDlg, IDC_SLOWMEM), TBM_GETPOS, 0, 0)]];
if (v != workprefs.bogomem.size) {
change1 = true;
workprefs.z3chipmem.size = v;
}
+ v = memsizes[msi_cpuboard[SendMessage(GetDlgItem(hDlg, IDC_CPUSLOTMEM), TBM_GETPOS, 0, 0)]];
+ if (v != workprefs.mbresmem_high.size) {
+ change1 = true;
+ workprefs.mbresmem_high.size = v;
+ }
if (!change1 && fastram_select_pointer) {
v = memsizes[fastram_select_msi[SendMessage(GetDlgItem(hDlg, IDC_MEMORYMEM), TBM_GETPOS, 0, 0)]];
if (*fastram_select_pointer != v) {