Move RTG board gui and config strings to gfxboard structure. Added non-mapped vram...

diff --git a/cfgfile.cpp b/cfgfile.cpp
index b98e2d2a61759f39bda9ff8027c0773a6568b8bd..9dfa373f88a0dbbe7479281213589cbd0a4a1b6b 100644 (file)
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -203,16 +203,6 @@ static const TCHAR *cdconmodes[] = { _T(""), _T("uae"), _T("ide"), _T("scsi"), _
 static const TCHAR *specialmonitors[] = { _T("none"), _T("autodetect"), _T("a2024"), _T("graffiti"),
 _T("ham_e"), _T("ham_e_plus"), _T("videodac18"), _T("avideo12"), _T("avideo24"), _T("firecracker24"), _T("dctv"), 0 };
 static const TCHAR *genlockmodes[] = { _T("none"), _T("noise"), _T("testcard"), NULL };
-static const TCHAR *rtgtype[] = {
-       _T("ZorroII"), _T("ZorroIII"),
-       _T("PicassoII"),
-       _T("PicassoII+"),
-       _T("Piccolo_Z2"), _T("Piccolo_Z3"),
-       _T("PiccoloSD64_Z2"), _T("PiccoloSD64_Z3"),
-       _T("Spectrum28/24_Z2"), _T("Spectrum28/24_Z3"),
-       _T("PicassoIV_Z2"), _T("PicassoIV_Z3"),
-       _T("A2410"),
-       0 };
 static const TCHAR *ppc_implementations[] = {
        _T("auto"),
        _T("dummy"),
@@ -307,6 +297,8 @@ static const TCHAR *obsolete[] = {
        _T("pcibridge_rom_file"),
        _T("pcibridge_rom_options"),
 
+       _T("cpuboard_ext_rom_file"),
+
        NULL
 };
 
@@ -1675,7 +1667,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
        cfgfile_dwrite(f, _T("cpuboardmem1_size"), _T("%d"), p->cpuboardmem1_size / 0x100000);
        cfgfile_dwrite(f, _T("cpuboardmem2_size"), _T("%d"), p->cpuboardmem2_size / 0x100000);
        cfgfile_write(f, _T("gfxcard_size"), _T("%d"), p->rtgmem_size / 0x100000);
-       cfgfile_write_str(f, _T("gfxcard_type"), rtgtype[p->rtgmem_type]);
+       cfgfile_write_str(f, _T("gfxcard_type"), gfxboard_get_configname(p->rtgmem_type));
        cfgfile_write_bool(f, _T("gfxcard_hardware_vblank"), p->rtg_hardwareinterrupt);
        cfgfile_write_bool (f, _T("gfxcard_hardware_sprite"), p->rtg_hardwaresprite);
        cfgfile_write (f, _T("chipmem_size"), _T("%d"), p->chipmem_size == 0x20000 ? -1 : (p->chipmem_size == 0x40000 ? 0 : p->chipmem_size / 0x80000));
@@ -4221,7 +4213,6 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
                || cfgfile_intval (option, value, _T("z3mem_start"), &p->z3autoconfig_start, 1)
                || cfgfile_intval (option, value, _T("bogomem_size"), &p->bogomem_size, 0x40000)
                || cfgfile_intval (option, value, _T("gfxcard_size"), &p->rtgmem_size, 0x100000)
-               || cfgfile_strval(option, value, _T("gfxcard_type"), &p->rtgmem_type, rtgtype, 0)
                || cfgfile_intval(option, value, _T("rtg_modes"), &p->picasso96_modeflags, 1)
                || cfgfile_intval (option, value, _T("floppy_speed"), &p->floppy_speed, 1)
                || cfgfile_intval (option, value, _T("cd_speed"), &p->cd_speed, 1)
@@ -4277,6 +4268,23 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
                || cfgfile_string (option, value, _T("ghostscript_parameters"), p->ghostscript_parameters, sizeof p->ghostscript_parameters / sizeof (TCHAR)))
                return 1;
 
+       if (cfgfile_string(option, value, _T("gfxcard_type"), tmpbuf, sizeof tmpbuf / sizeof(TCHAR))) {
+               p->rtgmem_type = 0;
+               i = 0;
+               for (;;) {
+                       const TCHAR *t = gfxboard_get_configname(i);
+                       if (!t)
+                               break;
+                       if (!_tcsicmp(t, tmpbuf)) {
+                               p->rtgmem_type = i;
+                               break;
+                       }
+                       i++;
+               }
+               return 1;
+       }
+
+
        if (cfgfile_string(option, value, _T("cpuboard_type"), tmpbuf, sizeof tmpbuf / sizeof(TCHAR))) {
                p->cpuboard_type = 0;
                p->cpuboard_subtype = 0;

diff --git a/expansion.cpp b/expansion.cpp
index 412fbd4039bc3ccc1762f82f8f6117b1b894674f..73144275504c55186163950a56027cb493615394 100644 (file)
--- a/expansion.cpp
+++ b/expansion.cpp
@@ -1964,7 +1964,7 @@ void expamem_reset (void)
        }
 #endif
 #ifdef GFXBOARD
-       if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && !gfxboard_is_z3 (currprefs.rtgmem_type)) {
+       if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(currprefs.rtgmem_type) <= 2) {
                cards[cardno].flags = 4;
                if (currprefs.rtgmem_type == GFXBOARD_A2410) {
                        cards[cardno].name = _T("Gfxboard A2410");
@@ -2031,7 +2031,7 @@ void expamem_reset (void)
                }
 #endif
 #ifdef GFXBOARD
-               if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_is_z3 (currprefs.rtgmem_type)) {
+               if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE && gfxboard_get_configtype(currprefs.rtgmem_type) == 3) {
                        cards[cardno].flags = 4 | 1;
                        cards[cardno].name = _T ("Gfxboard VRAM Zorro III");
                        cards[cardno++].initnum = gfxboard_init_memory;
@@ -2553,13 +2553,13 @@ const struct expansionromtype expansionroms[] = {
                false, EXPANSIONTYPE_SCSI
        },
        {
-               _T("gvp1"), _T("Series I"), _T("GVP"),
+               _T("gvp1"), _T("GVP Series I"), _T("Great Valley Products"),
                gvp_init_s1, NULL, gvp_s1_add_scsi_unit, ROMTYPE_GVPS1 | ROMTYPE_NONE, ROMTYPE_GVPS12, 0, BOARD_AUTOCONFIG_Z2, false,
                gvp1_sub, 1,
                true, EXPANSIONTYPE_SCSI
        },
        {
-               _T("gvp"), _T("Series II"), _T("GVP"),
+               _T("gvp"), _T("GVP Series II"), _T("Great Valley Products"),
                gvp_init_s2, NULL, gvp_s2_add_scsi_unit, ROMTYPE_GVPS2 | ROMTYPE_NONE, ROMTYPE_GVPS12, 0, BOARD_AUTOCONFIG_Z2, false,
                NULL, 0,
                true, EXPANSIONTYPE_SCSI,
@@ -3023,7 +3023,7 @@ const struct cpuboardtype cpuboards[] = {
        },
        {
                BOARD_GVP,
-               _T("GVP"),
+               _T("Great Valley Products"),
                gvpboard_sub, 0
        },
        {

diff --git a/gfxboard.cpp b/gfxboard.cpp
index ae060095c8b0c08472d99af15e9b3a65eca2682b..4508eaa6d3a4193a893532cf05135075baba5fd8 100644 (file)
--- a/gfxboard.cpp
+++ b/gfxboard.cpp
@@ -86,6 +86,8 @@ extern addrbank gfxboard_bank_nbsmemory;
 struct gfxboard
 {
        TCHAR *name;
+       TCHAR *manufacturername;
+       TCHAR *configname;
        int manufacturer;
        int model_memory;
        int model_registers;
@@ -94,7 +96,7 @@ struct gfxboard
        int vrammax;
        int banksize;
        int chiptype;
-       bool z3;
+       int configtype;
        int irq;
        bool swap;
 };
@@ -110,60 +112,63 @@ struct gfxboard
 static struct gfxboard boards[] =
 {
        {
-               _T("Picasso II"),
+               _T("Picasso II"), _T("Village Tronic"), _T("PicassoII"),
                BOARD_MANUFACTURER_PICASSO, BOARD_MODEL_MEMORY_PICASSOII, BOARD_MODEL_REGISTERS_PICASSOII,
-               0x00020000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, false, 0, false
+               0x00020000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, 2, 0, false
        },
        {
-               _T("Picasso II+"),
+               _T("Picasso II+"), _T("Village Tronic"), _T("PicassoII+"),
                BOARD_MANUFACTURER_PICASSO, BOARD_MODEL_MEMORY_PICASSOII, BOARD_MODEL_REGISTERS_PICASSOII,
-               0x00100000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, false, 2, false
+               0x00100000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, 2, 2, false
        },
        {
-               _T("Piccolo Zorro II"),
+               _T("Piccolo Zorro II"), _T("Ingenieurbüro Helfrich"), _T("Piccolo_Z2"),
                BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO, BOARD_MODEL_REGISTERS_PICCOLO,
-               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, false, 6, true
+               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, 2, 6, true
        },
        {
-               _T("Piccolo Zorro III"),
+               _T("Piccolo Zorro III"), _T("Ingenieurbüro Helfrich"), _T("Piccolo_Z3"),
                BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO, BOARD_MODEL_REGISTERS_PICCOLO,
-               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, true, 6, true
+               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5426, 3, 6, true
        },
        {
-               _T("Piccolo SD64 Zorro II"),
+               _T("Piccolo SD64 Zorro II"), _T("Ingenieurbüro Helfrich"), _T("PiccoloSD64_Z2"),
                BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO64, BOARD_MODEL_REGISTERS_PICCOLO64,
-               0x00000000, 0x00200000, 0x00400000, 0x00400000, CIRRUS_ID_CLGD5434, false, 6, true
+               0x00000000, 0x00200000, 0x00400000, 0x00400000, CIRRUS_ID_CLGD5434, 2, 6, true
        },
        {
-               _T("Piccolo SD64 Zorro III"),
+               _T("Piccolo SD64 Zorro III"), _T("Ingenieurbüro Helfrich"), _T("PiccoloSD64_Z3"),
                BOARD_MANUFACTURER_PICCOLO, BOARD_MODEL_MEMORY_PICCOLO64, BOARD_MODEL_REGISTERS_PICCOLO64,
-               0x00000000, 0x00200000, 0x00400000, 0x04000000, CIRRUS_ID_CLGD5434, true, 6, true
+               0x00000000, 0x00200000, 0x00400000, 0x04000000, CIRRUS_ID_CLGD5434, 3, 6, true
        },
        {
-               _T("Spectrum 28/24 Zorro II"),
+               _T("Spectrum 28/24 Zorro II"), _T("Great Valley Products"), _T("Spectrum28/24_Z2"),
                BOARD_MANUFACTURER_SPECTRUM, BOARD_MODEL_MEMORY_SPECTRUM, BOARD_MODEL_REGISTERS_SPECTRUM,
-               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, false, 6, true
+               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, 2, 6, true
        },
        {
-               _T("Spectrum 28/24 Zorro III"),
+               _T("Spectrum 28/24 Zorro III"), _T("Great Valley Products"), _T("Spectrum28/24_Z3"),
                BOARD_MANUFACTURER_SPECTRUM, BOARD_MODEL_MEMORY_SPECTRUM, BOARD_MODEL_REGISTERS_SPECTRUM,
-               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, true, 6, true
+               0x00000000, 0x00100000, 0x00200000, 0x00200000, CIRRUS_ID_CLGD5428, 3, 6, true
        },
        {
-               _T("Picasso IV Zorro II"),
+               _T("Picasso IV Zorro II"), _T("Village Tronic"), _T("PicassoIV_Z2"),
                BOARD_MANUFACTURER_PICASSO, BOARD_MODEL_MEMORY_PICASSOIV, BOARD_MODEL_REGISTERS_PICASSOIV,
-               0x00000000, 0x00400000, 0x00400000, 0x00400000, CIRRUS_ID_CLGD5446, false, 2, false
+               0x00000000, 0x00400000, 0x00400000, 0x00400000, CIRRUS_ID_CLGD5446, 2, 2, false
        },
        {
                // REG:00600000 IO:00200000 VRAM:01000000
-               _T("Picasso IV Zorro III"),
+               _T("Picasso IV Zorro III"), _T("Village Tronic"), _T("PicassoIV_Z3"),
                BOARD_MANUFACTURER_PICASSO, BOARD_MODEL_MEMORY_PICASSOIV, 0,
-               0x00000000, 0x00400000, 0x00400000, 0x04000000, CIRRUS_ID_CLGD5446, true, 2, false
+               0x00000000, 0x00400000, 0x00400000, 0x04000000, CIRRUS_ID_CLGD5446, 3, 2, false
        },
        {
-               _T("A2410"),
+               _T("A2410"), _T("Commodore"), _T("A2410"),
                1030, 0, 0,
-               0x00000000, 0x00200000, 0x00200000, 0x00000000, 0,false, 2, false
+               0x00000000, 0x00200000, 0x00200000, 0x00000000, 0, 0, 2, false
+       },
+       {
+               NULL
        }
 };
 
@@ -223,7 +228,7 @@ static void init_board (void)
        vram_offset[0] = vram_offset[1] = 0;
        vram_enabled = true;
        vram_offset_enabled = false;
-       gfxmem_bank.label = board->z3 ? _T("z3_gfx") : _T("z2_gfx");
+       gfxmem_bank.label = board->configtype == 3 ? _T("z3_gfx") : _T("z2_gfx");
        gfxmem_bank.allocated = vramsize;
        mapped_malloc (&gfxmem_bank);
        vram = gfxmem_bank.baseaddr;
@@ -1331,7 +1336,7 @@ static void REGPARAM2 gfxboard_wput_mem_autoconfig (uaecptr addr, uae_u32 b)
 #ifdef JIT
        special_mem |= S_WRITE;
 #endif
-       if (!board->z3)
+       if (board->configtype == 2)
                return;
        b &= 0xffff;
        addr &= 65535;
@@ -1381,7 +1386,7 @@ static void REGPARAM2 gfxboard_bput_mem_autoconfig (uaecptr addr, uae_u32 b)
        b &= 0xff;
        addr &= 65535;
        if (addr == 0x48) {
-               if (!board->z3) {
+               if (board->configtype == 2) {
                        addrbank *ab;
                        if (ISP4()) {
                                ab = &gfxboard_bank_nbsmemory;
@@ -1618,6 +1623,10 @@ static void REGPARAM2 gfxboard_bput_regs_autoconfig (uaecptr addr, uae_u32 b)
 
 void gfxboard_free(void)
 {
+       if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+               tms_free();
+               return;
+       }
        if (vram) {
                gfxmem_bank.baseaddr = vramrealstart;
                mapped_free (&gfxmem_bank);
@@ -1640,13 +1649,17 @@ void gfxboard_free(void)
 
 void gfxboard_reset (void)
 {
+       if (currprefs.rtgmem_type == GFXBOARD_A2410) {
+               tms_reset();
+               return;
+       }
        if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
                board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE];
                gfxmem_bank.mask = currprefs.rtgmem_size - 1;
        }
        gfxboard_free();
        if (board) {
-               if (board->z3)
+               if (board->configtype == 3)
                        gfxboard_bank_memory.wput = gfxboard_wput_mem_autoconfig;
                if (reset_func) 
                        reset_func (reset_parm);
@@ -2042,14 +2055,42 @@ addrbank gfxboard_bank_special = {
        default_xlate, default_check, NULL, NULL, _T("Picasso IV MISC"),
        dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
 };
-bool gfxboard_is_z3 (int type)
+
+const TCHAR *gfxboard_get_name(int type)
 {
        if (type == GFXBOARD_UAE_Z2)
-               return false;
+               return _T("UAE Zorro II");
        if (type == GFXBOARD_UAE_Z3)
-               return true;
+               return _T("UAE Zorro III (*)");
+       return boards[type - GFXBOARD_HARDWARE].name;
+}
+
+const TCHAR *gfxboard_get_manufacturername(int type)
+{
+       if (type == GFXBOARD_UAE_Z2)
+               return NULL;
+       if (type == GFXBOARD_UAE_Z3)
+               return NULL;
+       return boards[type - GFXBOARD_HARDWARE].manufacturername;
+}
+
+const TCHAR *gfxboard_get_configname(int type)
+{
+       if (type == GFXBOARD_UAE_Z2)
+               return _T("ZorroII");
+       if (type == GFXBOARD_UAE_Z3)
+               return _T("ZorroIII");
+       return boards[type - GFXBOARD_HARDWARE].configname;
+}
+
+int gfxboard_get_configtype(int type)
+{
+       if (type == GFXBOARD_UAE_Z2)
+               return 2;
+       if (type == GFXBOARD_UAE_Z3)
+               return 3;
        board = &boards[type - GFXBOARD_HARDWARE];
-       return board->z3;
+       return board->configtype;
 }
 
 bool gfxboard_need_byteswap (int type)
@@ -2072,7 +2113,6 @@ int gfxboard_get_vram_min (int type)
        if (type < GFXBOARD_HARDWARE)
                return -1;
        board = &boards[type - GFXBOARD_HARDWARE];
-       //return board->vrammax;
        return board->vrammin;
 }
 
@@ -2184,7 +2224,7 @@ addrbank *gfxboard_init_memory (int devnum)
                z3_flags++;
                bank >>= 1;
        }
-       if (board->z3) {
+       if (board->configtype == 3) {
                type = 0x00 | 0x08 | 0x80; // 16M Z3
                ew (0x08, z3_flags | 0x10 | 0x20);
        } else {
@@ -2223,8 +2263,8 @@ addrbank *gfxboard_init_memory (int devnum)
                }
                if (p4rom) {
                        zfile_fread (p4autoconfig, sizeof p4autoconfig, 1, p4rom);
-                       copyp4autoconfig (board->z3 ? 192 : 0);
-                       if (board->z3) {
+                       copyp4autoconfig (board->configtype == 3 ? 192 : 0);
+                       if (board->configtype == 3) {
                                loadp4rom ();
                                p4_mmiobase = 0x200000;
                                p4_special_mask = 0x7fffff;
@@ -2259,7 +2299,7 @@ addrbank *gfxboard_init_memory (int devnum)
 
 addrbank *gfxboard_init_memory_p4_z2 (int devnum)
 {
-       if (board->z3)
+       if (board->configtype == 3)
                return &expamem_null;
 
        copyp4autoconfig (64);

diff --git a/include/gfxboard.h b/include/gfxboard.h
index fe1e227b3a6743ca398f0e4267986573d24f0d06..9f2c18b2d0d94d35404f4da9da138bdb4ef4878a 100644 (file)
--- a/include/gfxboard.h
+++ b/include/gfxboard.h
@@ -9,7 +9,7 @@ extern void gfxboard_free (void);
 extern void gfxboard_reset (void);
 extern void gfxboard_vsync_handler (void);
 extern void gfxboard_hsync_handler(void);
-extern bool gfxboard_is_z3 (int);
+extern int gfxboard_get_configtype (int);
 extern bool gfxboard_is_registers (int);
 extern int gfxboard_get_vram_min (int);
 extern int gfxboard_get_vram_max (int);
@@ -19,8 +19,13 @@ extern double gfxboard_get_vsync (void);
 extern void gfxboard_refresh (void);
 extern bool gfxboard_toggle (int mode);
 extern int gfxboard_num_boards (int type);
+extern const TCHAR *gfxboard_get_name(int);
+extern const TCHAR *gfxboard_get_manufacturername(int); 
+extern const TCHAR *gfxboard_get_configname(int);
 
 extern addrbank *tms_init(int devnum);
+extern void tms_free(void);
+extern void tms_reset(void);
 extern void tms_hsync_handler(void);
 extern void tms_vsync_handler(void);
 extern bool tms_toggle(int);

diff --git a/main.cpp b/main.cpp
index 5ad217fc6661938454251cba4adfd384cc68d278..c2525e16b3f9551d4996ead0a346e67ce4bfeb33 100644 (file)
--- a/main.cpp
+++ b/main.cpp
@@ -438,7 +438,7 @@ void fixup_prefs (struct uae_prefs *p)
                p->chipmem_size = 0x200000;
                err = 1;
        }
-       if (p->chipmem_size > 0x200000 && p->rtgmem_size && !gfxboard_is_z3(p->rtgmem_type)) {
+       if (p->chipmem_size > 0x200000 && p->rtgmem_size && gfxboard_get_configtype(p->rtgmem_type) == 2) {
                error_log(_T("You can't use Zorro II RTG and more than 2MB chip at the same time."));
                p->chipmem_size = 0x200000;
                err = 1;
@@ -462,7 +462,7 @@ void fixup_prefs (struct uae_prefs *p)
                                p->rtgmem_size, p->rtgmem_size, gfxboard_get_vram_min(p->rtgmem_type), gfxboard_get_vram_min(p->rtgmem_type));
                        p->rtgmem_size = gfxboard_get_vram_min (p->rtgmem_type);
                }
-               if (p->address_space_24 && gfxboard_is_z3 (p->rtgmem_type)) {
+               if (p->address_space_24 && gfxboard_get_configtype(p->rtgmem_type) == 3) {
                        p->rtgmem_type = GFXBOARD_UAE_Z2;
                        p->rtgmem_size = 0;
                        error_log (_T("Z3 RTG and 24-bit address space are not compatible."));

diff --git a/memory.cpp b/memory.cpp
index 72faf29ccffc0b9f68444a456da13dc1379effd4..11d0e06490c8a970c4fe89d032689856f3949f3c 100644 (file)
--- a/memory.cpp
+++ b/memory.cpp
@@ -2207,7 +2207,7 @@ uae_s32 getz2size (struct uae_prefs *p)
 {
        ULONG start;
        start = p->fastmem_size;
-       if (p->rtgmem_size && !gfxboard_is_z3 (p->rtgmem_type)) {
+       if (p->rtgmem_size && gfxboard_get_configtype(p->rtgmem_type) == 2) {
                while (start & (p->rtgmem_size - 1) && start < 8 * 1024 * 1024)
                        start += 1024 * 1024;
                if (start + p->rtgmem_size > 8 * 1024 * 1024)
@@ -2221,7 +2221,7 @@ ULONG getz2endaddr (void)
 {
        ULONG start;
        start = currprefs.fastmem_size;
-       if (currprefs.rtgmem_size && !gfxboard_is_z3 (currprefs.rtgmem_type)) {
+       if (currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 2) {
                if (!start)
                        start = 0x00200000;
                while (start & (currprefs.rtgmem_size - 1) && start < 4 * 1024 * 1024)

diff --git a/od-win32/mman.cpp b/od-win32/mman.cpp
index 7f155a6d99c9f0b1fbc419399913856af552efb7..cc1b4057c9dd1136b82e65a096c76139bf6da41e 100644 (file)
--- a/od-win32/mman.cpp
+++ b/od-win32/mman.cpp
@@ -314,7 +314,7 @@ static int doinit_shm (void)
                othersize = 0;
                size = 0x1000000;
                startbarrier = changed_prefs.mbresmem_high_size >= 128 * 1024 * 1024 ? (changed_prefs.mbresmem_high_size - 128 * 1024 * 1024) + 16 * 1024 * 1024 : 0;
-               z3rtgmem_size = gfxboard_is_z3 (changed_prefs.rtgmem_type) ? changed_prefs.rtgmem_size : 0;
+               z3rtgmem_size = gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3 ? changed_prefs.rtgmem_size : 0;
                if (changed_prefs.cpu_model >= 68020)
                        size = 0x10000000;
                z3size = ((changed_prefs.z3fastmem_size + align) & ~align) + ((changed_prefs.z3fastmem2_size + align) & ~align) + ((changed_prefs.z3chipmem_size + align) & ~align);
@@ -376,14 +376,16 @@ static int doinit_shm (void)
        p96mem_size = z3rtgmem_size;
        p96base_offset = 0;
        uae_u32 z3rtgallocsize = 0;
-       if (changed_prefs.rtgmem_size && gfxboard_is_z3 (changed_prefs.rtgmem_type)) {
+       if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3) {
                z3rtgallocsize = gfxboard_get_autoconfig_size(changed_prefs.rtgmem_type) < 0 ? changed_prefs.rtgmem_size : gfxboard_get_autoconfig_size(changed_prefs.rtgmem_type);
                if (changed_prefs.z3autoconfig_start == Z3BASE_UAE)
                        p96base_offset = natmemsize + startbarrier + z3offset;
                else
                        p96base_offset = expansion_startaddress(natmemsize + startbarrier + z3offset, z3rtgallocsize);
-       } else if (changed_prefs.rtgmem_size && !gfxboard_is_z3 (changed_prefs.rtgmem_type)) {
+       } else if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 2) {
                p96base_offset = getz2rtgaddr (changed_prefs.rtgmem_size);
+       } else if (changed_prefs.rtgmem_size && gfxboard_get_configtype(changed_prefs.rtgmem_type) == 1) {
+               p96base_offset = 0xa80000;
        }
        if (p96base_offset) {
                if (jit_direct_compatible_memory) {
@@ -401,7 +403,7 @@ static int doinit_shm (void)
                        addr = expansion_startaddress(addr, changed_prefs.z3fastmem2_size);
                        addr += changed_prefs.z3fastmem2_size;
                        addr = expansion_startaddress(addr, z3rtgallocsize);
-                       if (gfxboard_is_z3(changed_prefs.rtgmem_type)) {
+                       if (gfxboard_get_configtype(changed_prefs.rtgmem_type) == 3) {
                                p96base_offset = addr;
                                // adjust p96mem_offset to beginning of natmem
                                // by subtracting start of original p96mem_offset from natmem_offset
@@ -625,7 +627,7 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg)
                                shmaddr=natmem_offset + 0xec0000;
                        } else {
                                shmaddr=natmem_offset + 0x200000;
-                               if (!(currprefs.rtgmem_size && gfxboard_is_z3 (currprefs.rtgmem_type)))
+                               if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
                                        size += BARRIER;
                        }
                } else if(!_tcscmp (shmids[shmid].name, _T("fast2"))) {
@@ -636,13 +638,13 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg)
                                shmaddr=natmem_offset + 0x200000;
                                if (currprefs.fastmem_size >= 524288)
                                        shmaddr=natmem_offset + 0x200000 + currprefs.fastmem_size;
-                               if (!(currprefs.rtgmem_size && gfxboard_is_z3 (currprefs.rtgmem_type)))
+                               if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
                                        size += BARRIER;
                        }
                } else if(!_tcscmp (shmids[shmid].name, _T("fast2"))) {
                        shmaddr=natmem_offset + 0x200000;
                        got = TRUE;
-                       if (!(currprefs.rtgmem_size && gfxboard_is_z3 (currprefs.rtgmem_type)))
+                       if (!(currprefs.rtgmem_size && gfxboard_get_configtype(currprefs.rtgmem_type) == 3))
                                size += BARRIER;
                } else if(!_tcscmp (shmids[shmid].name, _T("z2_gfx"))) {
                        ULONG start = getz2rtgaddr (size);
@@ -769,8 +771,8 @@ void *shmat (addrbank *ab, int shmid, void *shmaddr, int shmflg)
                        shmaddr = natmem_offset + 0x00e00000;
                        size += BARRIER;
                        got = TRUE;
-               } else if (!_tcscmp(shmids[shmid].name, _T("x_a0"))) {
-                       shmaddr = natmem_offset + 0x00a00000;
+               } else if (!_tcscmp(shmids[shmid].name, _T("ram_a8"))) {
+                       shmaddr = natmem_offset + 0x00a80000;
                        size += BARRIER;
                        got = TRUE;
                }