add JIT_OP_ISIGN and JIT_OP_LSIGN, optimize JIT_OP_LNEG;

fix bug freeing stack registers;

diff --git a/ChangeLog b/ChangeLog
index bb29b9e274f7d33fc989f3c104e8c8e90b099b57..68c2456c498105764089b95f6af77485487f6bcc 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,14 @@
+2006-11-25  Aleksey Demakov  <ademakov@gmail.com>
+
+       * jit/jit-reg-alloc.c (exch_stack_top, free_value): fix freeing
+       stack registers.
+
+2006-11-25  Kirill Kononenko  <Kirill.Kononenko@gmail.com>
+
+       * jit/jit-rules-x86.ins: add JIT_OP_ISIGN and JIT_OP_LSIGN rules
+       (patch #5533), optimize JIT_OP_LNEG rule (patch #5555). [with
+       some modifications by Aleksey Demakov.]
+
 2006-11-11  Aleksey Demakov  <ademakov@gmail.com>
 
        * jit/jit-rules-x86.ins: add JIT_OP_IABS and JIT_OP_LABS rules.

diff --git a/jit/jit-reg-alloc.c b/jit/jit-reg-alloc.c
index 0d1b3b8de7b57f59b7d3dcaa81e2273fed232be2..8a444e81d74ed1345baae36626aca63fea8602a9 100644 (file)
--- a/jit/jit-reg-alloc.c
+++ b/jit/jit-reg-alloc.c
@@ -1740,6 +1740,7 @@ exch_stack_top(jit_gencode_t gen, int reg, int pop)
                {
                        if(value2)
                        {
+                               value2->in_register = 0;
                                value2->reg = -1;
                        }
                        gen->contents[top].values[index] = 0;
@@ -1806,6 +1807,7 @@ free_value(jit_gencode_t gen, jit_value_t value, int reg, int other_reg, int tem
                {
                        /* Free stack register. */
                        exch_stack_top(gen, reg, 1);
+                       return;
                }
 #endif
        }

diff --git a/jit/jit-rules-x86.ins b/jit/jit-rules-x86.ins
index b4f5720e6935ab0ee882a80bf68380451fe1be06..361b8b1562993568d6f0722c16ffeafaef1bd6b5 100644 (file)
--- a/jit/jit-rules-x86.ins
+++ b/jit/jit-rules-x86.ins
@@ -722,10 +722,18 @@ JIT_OP_LSUB: binary
 
 JIT_OP_LNEG: unary
        [lreg] -> {
-               x86_not_reg(inst, $1);
-               x86_not_reg(inst, %1);
-               x86_alu_reg_imm(inst, X86_ADD, $1, 1);
+               /* TODO: gcc generates the first variant while
+                  AoA suggests the second. Figure out if one
+                  is better than other. */
+#if 1
+               x86_neg_reg(inst, $1);
                x86_alu_reg_imm(inst, X86_ADC, %1, 0);
+               x86_neg_reg(inst, %1);
+#else
+               x86_neg_reg(inst, %1);
+               x86_neg_reg(inst, $1);
+               x86_alu_reg_imm(inst, X86_SBB, %1, 0);
+#endif
        }
 
 JIT_OP_FADD, JIT_OP_DADD, JIT_OP_NFADD: binary, stack
@@ -1274,6 +1282,41 @@ JIT_OP_FABS, JIT_OP_DABS, JIT_OP_NFABS: unary, stack
                x86_fabs(inst);
        }
 
+JIT_OP_ISIGN:
+       [=reg, imm] -> {
+               if($2 < 0)
+               {
+                       x86_mov_reg_imm(inst, $1, -1);
+               }
+               else
+               {
+                       x86_clear_reg(inst, $1);
+               }
+       }
+       [reg] -> {
+               x86_shift_reg_imm(inst, X86_SAR, $1, 31);
+       }
+
+JIT_OP_LSIGN:
+       [=reg, imm] -> {
+               jit_int value = ((jit_int *)($2))[0];
+               if(value < 0)
+               {
+                       x86_mov_reg_imm(inst, $1, -1);
+               }
+               else
+               {
+                       x86_clear_reg(inst, $1);
+               }
+       }
+       [=reg, lreg] -> {
+               if($1 != $2)
+               {
+                       x86_mov_reg_reg(inst, $1, %2, 4);
+               }
+               x86_shift_reg_imm(inst, X86_SAR, $1, 31);
+       }
+
 /*
  * Pointer check opcodes.
  */