cfgfile_write_bool (f, _T("cpu_data_cache"), p->cpu_data_cache);
/* do not reorder end */
cfgfile_dwrite_bool(f, _T("cpu_reset_pause"), p->reset_delay);
+ cfgfile_dwrite_bool(f, _T("cpu_halt_auto_reset"), p->crash_auto_reset);
cfgfile_dwrite_bool(f, _T("cpu_threaded"), p->cpu_thread);
if (p->ppc_mode)
cfgfile_write_str(f, _T("ppc_implementation"), ppc_implementations[p->ppc_implementation]);
|| cfgfile_yesno(option, value, _T("cpu_threaded"), &p->cpu_thread)
|| cfgfile_yesno(option, value, _T("cpu_24bit_addressing"), &p->address_space_24)
|| cfgfile_yesno(option, value, _T("cpu_reset_pause"), &p->reset_delay)
+ || cfgfile_yesno(option, value, _T("cpu_halt_auto_reset"), &p->crash_auto_reset)
|| cfgfile_yesno(option, value, _T("parallel_on_demand"), &p->parallel_demand)
|| cfgfile_yesno (option, value, _T("parallel_postscript_emulation"), &p->parallel_postscript_emulation)
|| cfgfile_yesno (option, value, _T("parallel_postscript_detection"), &p->parallel_postscript_detection)
// id > 0: emulation halted.
if (!regs.halted) {
write_log (_T("CPU halted: reason = %d PC=%08x\n"), id, M68K_GETPC);
+ if (currprefs.crash_auto_reset) {
+ write_log(_T("Forcing hard reset\n"));
+ uae_reset(true, false);
+ quit_program = -quit_program;
+ set_special(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE);
+ return;
+ }
regs.halted = id;
gui_data.cpu_halted = id;
gui_led(LED_CPU, 0, -1);