}
}
-STATIC_INLINE int GETVPOS(void)
+static int GETVPOS(void)
{
return islightpentriggered() ? vpos_lpen : vpos;
}
-STATIC_INLINE int GETHPOS(void)
+static int GETHPOS(void)
{
- return islightpentriggered() ? hpos_lpen : agnus_hpos;
+ if (islightpentriggered()) {
+ return hpos_lpen;
+ }
+ if (!eventtab[ev_sync].active) {
+ return agnus_hpos;
+ }
+ evt_t c = get_cycles();
+ int hp = (c - eventtab[ev_sync].oldcycles) / CYCLE_UNIT;
+ return hp;
}
static void setmaxhpos(void)
if (changed & (DMA_MASTER | DMA_AUD3 | DMA_AUD2 | DMA_AUD1 | DMA_AUD0)) {
audio_state_machine();
}
-
-#if 0
- if (changed & (DMA_MASTER | DMA_BITPLANE)) {
- // if ECS, DDFSTRT has already passed but DMA was off and DMA gets turned on: BPRUN actvates 1 cycle earlier
- bool bpl = (dmacon & DMA_BITPLANE) && (dmacon & DMA_MASTER);
- //event2_newevent_xx(-1, CYCLE_UNIT, dmacon, bitplane_dma_change);
- dmacon_bpl = bpl;
- if (ecs_agnus && bpl && !dmacon_bpl && ddf_enable_on > 0) {
- dmacon_bpl = true;
- } else {
- dmacon_bpl = true;
- event2_newevent_xx(-1, CYCLE_UNIT, dmacon, bitplane_dma_change);
- }
- SET_LINE_CYCLEBASED(hpos);
- }
-#endif
}
static int irq_forced;
return false;
}
+// return if register is in Agnus or Denise (or both)
static int get_reg_chip(int reg)
{
if (reg == 0x100 || reg == 0x1fc) {
}
}
-#if 0
-static void reset_scandoubler_sync(int hpos)
-{
- last_decide_line_hpos = hpos;
- last_decide_sprite_hpos = hpos;
- last_fetch_hpos = hpos;
- last_copper_hpos = hpos;
- last_diw_hpos = hpos;
- last_sprite_hpos = hpos;
- sprites_enabled_this_line = false;
- plfstrt_sprite = 0x100;
- bprun = 0;
- bprun_cycle = 0;
- ddf_stopping = 0;
- int hnew = hpos - (REFRESH_FIRST_HPOS - HARDWIRED_DMA_TRIGGER_HPOS + 2);
- hdiw_denisecounter = ((hnew + 0) & 0xff) << CCK_SHRES_SHIFT;
- last_sprite_hpos = last_sprite_point = (((hnew + 0) & 0xff) << 1) + 1;
-}
-#endif
-
-
-/*
-
-0 0 -
-1 1 --
-2 2 -
-3 3 --
-4 4 -
-5 5 --
-
-0 x -+
-1 0 --
-2 1 -
-3 2 --
-4 3 -
-5 4 --
-
-*/
-
-#if 0
-static void hsync_scandoubler(int hpos)
-{
- uae_u16 odmacon = dmacon;
- int ocop = copper_enabled_thisline;
- uaecptr bpltmp[MAX_PLANES], bpltmpx[MAX_PLANES];
- int lof = lof_display;
-
- if (vb_start_line > 2) {
- return;
- }
-
- scandoubled_line = 1;
- line_disabled |= 8;
- last_hdiw = 0 - 1;
-
- for (int i = 0; i < MAX_PLANES; i++) {
- bpltmp[i] = bplpt[i];
- bpltmpx[i] = bplptx[i];
- uaecptr pb1 = prevbpl[lof][vpos][i];
- uaecptr pb2 = prevbpl[1 - lof][vpos][i];
- if (pb1 && pb2) {
- int diff = pb1 - pb2;
- if (lof) {
- if (bplcon0 & 4) {
- bplpt[i] = pb1 - diff;
- }
- } else {
- if (bplcon0 & 4) {
- bplpt[i] = pb1;
- } else {
- bplpt[i] = bplpt[i] - diff;
- }
- }
- }
- }
-
- uae_u8 cycle_line_slot_tmp[MAX_CHIPSETSLOTS];
- uae_u16 cycle_line_pipe_tmp[MAX_CHIPSETSLOTS];
-
- memcpy(cycle_line_slot_tmp, cycle_line_slot, sizeof(uae_u8) * MAX_CHIPSETSLOTS);
- memcpy(cycle_line_pipe_tmp, cycle_line_pipe, sizeof(uae_u16) * MAX_CHIPSETSLOTS);
-
- reset_decisions_scanline_start();
- reset_scandoubler_sync(hpos);
- reset_decisions_hsync_start();
-
- // Bitplane and sprites only
- dmacon = odmacon & (DMA_MASTER | DMA_BITPLANE | DMA_SPRITE);
- copper_enabled_thisline = 0;
-
- // copy color changes
- struct draw_info *dip1 = curr_drawinfo + next_lineno - 1;
- for (int idx1 = dip1->first_color_change; idx1 < dip1->last_color_change; idx1++) {
- struct color_change *cs2 = &curr_color_changes[idx1];
- struct color_change *cs1 = &curr_color_changes[next_color_change];
- memcpy(cs1, cs2, sizeof(struct color_change));
- next_color_change++;
- }
- curr_color_changes[next_color_change].regno = -1;
-
- hpos_hsync_extra = 0;
- finish_partial_decision(maxhpos);
- hpos_hsync_extra = maxhpos;
- finish_decisions(hpos);
- hsync_record_line_state(next_lineno, nln_normal, thisline_changed);
-
- scandoubled_line = 0;
- line_disabled &= ~8;
-
- dmacon = odmacon;
- copper_enabled_thisline = ocop;
-
- memcpy(cycle_line_slot, cycle_line_slot_tmp, sizeof(uae_u8) * MAX_CHIPSETSLOTS);
- memcpy(cycle_line_pipe, cycle_line_pipe_tmp, sizeof(uae_u16) * MAX_CHIPSETSLOTS);
-
- for (int i = 0; i < MAX_PLANES; i++) {
- bplpt[i] = bpltmp[i];
- bplptx[i] = bpltmpx[i];
- }
-
- reset_decisions_scanline_start();
- reset_scandoubler_sync(hpos);
-}
-#endif
-
static void dmal_emu_disk(struct rgabuf *rga, int slot, bool w)
{
uae_u16 dat = 0;
} else {
// read from disk
if (disk_fifostatus() >= 0) {
- uaecptr pt = *rga->p;
+ uaecptr pt = rga->pv;
dat = DSKDATR(slot);
#ifdef DEBUGGER
if (debug_dma) {
return 0;
}
+static void start_sync_handler(void)
+{
+ eventtab[ev_sync].active = 1;
+ eventtab[ev_sync].oldcycles = get_cycles();
+ eventtab[ev_sync].evtime = get_cycles() + (maxhpos + lol) * CYCLE_UNIT;
+ events_schedule();
+}
+
static void custom_trigger_start(void)
{
vpos_prev = vpos;
eventtab[ev_sync].active = true;
events_schedule();
}
+
+ if (custom_disabled && !eventtab[ev_sync].active) {
+ start_sync_handler();
+ write_log("Chipset emulation inactive\n");
+ }
+
// if (1 && !can_fast_custom() && custom_fastmode) {
// custom_fastmode = 0;
// }
event2_newevent_xx(-1, CYCLE_UNIT * maxhpos, 0, fakehsync_handler);
}
+#if 0
static void sync_evhandler(void)
{
eventtab[ev_sync].active = false;
return;
}
}
-
+#endif
static bool cck_clock;
static void generate_dma_requests(void)
{
- generate_bpl(cck_clock);
-
- if (bplcon0 & 0x0080) {
- generate_uhres();
- }
-
- if (copper_enabled_thisline) {
- generate_copper();
+ if (!custom_disabled) {
+ generate_bpl(cck_clock);
+ if (bplcon0 & 0x0080) {
+ generate_uhres();
+ }
+ if (copper_enabled_thisline) {
+ generate_copper();
+ }
}
if (blt_info.blit_queued || blitter_delayed_update) {
extern void generate_blitter(void);
generate_blitter();
}
-
}
static void do_cck(bool docycles)
{
get_cck_clock();
- bitplane_rga_ptmod();
+ if (!custom_disabled) {
+ bitplane_rga_ptmod();
+ }
handle_rga_out();
}
+// horizontal sync callback when in RTG mode + fast cpu
+static void sync_evhandler(void)
+{
+ if (!custom_disabled) {
+ eventtab[ev_sync].active = 0;
+ write_log("Chipset emulation active\n");
+ return;
+ }
+
+ custom_trigger_start();
+
+ if (vpos == 0) { // TODO: programmed VB
+ INTREQ_INT(5, 0);
+ }
+
+ process_dmal(0);
+ uae_u32 dmal_d = dmal;
+
+ // "immediate" audio DMA
+ if (dmaen(DMA_AUD0 | DMA_AUD1 | DMA_AUD2 | DMA_AUD3) && ((dmal_d >> (3 * 2)) & 255)) {
+ for (int nr = 0; nr < 4; nr++) {
+ uae_u32 dmalbits = (dmal_d >> ((3 + nr) * 2)) & 3;
+ if (dmalbits) {
+ struct rgabuf r = { 0 };
+ uaecptr *pt = audio_getpt(nr);
+ r.pv = *pt;
+ dmal_emu_audio(&r, nr);
+ *pt += 2;
+ if (dmalbits & 1) {
+ *pt = audio_getloadpt(nr);
+ }
+ }
+ }
+ }
+
+ // "immediate" disk DMA
+ if (dmaen(DMA_DISK) && (((dmal_d >> 0) & 63))) {
+ for (int nr = 0; nr < 3; nr++) {
+ uae_u32 dmalbits = (dmal_d >> (0 + nr * 2)) & 3;
+ if (dmalbits) {
+ int w = (dmalbits & 3) == 3;
+ struct rgabuf r = { 0 };
+ uaecptr *pt = disk_getpt();
+ r.pv = *pt;
+ dmal_emu_disk(&r, nr, w);
+ *pt += 2;
+ }
+ }
+ }
+
+ dmal = 0;
+ dmal_shifter = 0;
+
+ start_sync_handler();
+}
+
+
int do_cycles_cck(int cycles)
{
int c = 0;