This adds #ifdef sections to code, allowing for more minimal versions to be compiled.
#include "cpuboard.h"
#include "rtc.h"
#include "devices.h"
+#ifdef WITH_DSP
#include "dsp3210/dsp_glue.h"
+#endif
#define DMAC_8727_ROM_VECTOR 0x8000
#define CDMAC_ROM_VECTOR 0x2000
break;
case 0x5e:
case 0x80:
+#ifdef WITH_DSP
if (is_dsp_installed) {
dsp_write(val);
}
+#endif
break;
}
}
break;
case 0x5f:
case 0x80:
+#ifdef WITH_DSP
if (is_dsp_installed) {
dsp_write(val);
}
+#endif
break;
default:
if (addr & 1)
break;
case 0x5e:
case 0x80:
+#ifdef WITH_DSP
if (is_dsp_installed) {
v = dsp_read();
}
+#endif
break;
}
#if A3000_DEBUG_IO > 1
break;
case 0x5f:
case 0x80:
+#ifdef WITH_DSP
if (is_dsp_installed) {
v = dsp_read();
}
+#endif
break;
}
#if A3000_DEBUG_IO > 1
static uae_u8 cd32_i2c_direction;
static bool cd32_i2c_data_scl, cd32_i2c_data_sda;
struct zfile *cd32_flashfile;
+#ifdef ARCADIA
extern uae_u8 *cubo_nvram;
+#endif
static void nvram_read (void)
{
+#ifdef ARCADIA
cubo_nvram = NULL;
+#endif
zfile_fclose(cd32_flashfile);
cd32_flashfile = NULL;
eeprom_free(cd32_eeprom);
cd32_nvram = xmalloc(uae_u8, maxlen);
}
memset(cd32_nvram, 0, maxlen);
+#ifdef ARCADIA
if (is_board_enabled(&currprefs, ROMTYPE_CUBO, 0)) {
cubo_nvram = cd32_nvram + currprefs.cs_cd32nvram_size;
}
+#endif
TCHAR path[MAX_DPATH];
cfgfile_resolve_path_out_load(currprefs.flashfile, path, MAX_DPATH, PATH_ROM);
cd32_flashfile = zfile_fopen (path, _T("rb+"), ZFD_NORMAL);
cd32_flashfile = zfile_fopen (path, _T("wb"), 0);
if (cd32_flashfile) {
size_t size = zfile_fread(cd32_nvram, 1, currprefs.cs_cd32nvram_size, cd32_flashfile);
+#ifdef ARCADIA
if (size == currprefs.cs_cd32nvram_size && maxlen > currprefs.cs_cd32nvram_size)
size += zfile_fread(cubo_nvram, 1, maxlen - currprefs.cs_cd32nvram_size, cd32_flashfile);
+#endif
if (size < maxlen)
zfile_fwrite(cd32_nvram + size, 1, maxlen - size, cd32_flashfile);
}
#include "debug.h"
#include "arcadia.h"
#include "zfile.h"
+#ifdef AVIOUTPUT
#include "videograb.h"
+#endif
#include "xwin.h"
#include "drawing.h"
#include "statusline.h"
ld_mode = LD_MODE_PLAY;
ld_direction = 0;
ld_repcnt = -1;
+#ifdef AVIOUTPUT
pausevideograb(0);
+#endif
}
ack();
if (log_ld)
write_log(_T("LD: FAST FORWARD PLAY\n"));
break;
case 0x3f: // STOP '?'
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ld_direction = 0;
ld_repcnt = -1;
ld_mode = LD_MODE_STOP;
ack();
// delay seek status response by 2 frames (Platoon requires this)
ld_wait_seek = arcadia_hsync_cnt + 2 * maxvpos;
+#ifdef AVIOUTPUT
if (ld_address > endpos) {
ld_address = endpos;
getsetpositionvideograb(ld_address);
getsetpositionvideograb(ld_address);
ld_wait_seek_status = 0x01; // COMPLETION
}
+#endif
ld_mode = LD_MODE_STILL;
ld_mode_value = 0;
ld_direction = 0;
break;
case 0x4a: // R-PLAY 'J'
ld_mode = LD_MODE_PLAY;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ld_direction = -1;
ack();
if (log_ld)
break;
case 0x4b: // Fast reverse play 'K'
ld_mode = LD_MODE_PLAY;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ld_direction = -2;
ack();
if (log_ld)
case 0x4f: // STILL 'O'
ld_mode = LD_MODE_STILL;
ld_direction = 0;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ack();
if (log_ld)
write_log(_T("LD: PAUSE\n"));
ld_mode = LD_MODE_STILL;
ld_mode_value = LD_MODE_SEARCH;
ld_direction = 0;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ld_value = 0;
if (log_ld)
write_log(_T("LD: SEARCH\n"));
ack();
ld_mode_value = LD_MODE_REPEAT;
ld_direction = 0;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ld_value = 0;
if (log_ld)
write_log(_T("LD: REPEAT\n"));
case 0x46: // CH-1 ON 'F'
ack();
ld_audio |= 1;
+#ifdef AVIOUTPUT
setchflagsvideograb(ld_audio, false);
+#endif
if (log_ld)
write_log(_T("LD: CH-1 ON\n"));
break;
case 0x48: // CH-2 ON 'H'
ack();
ld_audio |= 2;
+#ifdef AVIOUTPUT
setchflagsvideograb(ld_audio, false);
+#endif
if (log_ld)
write_log(_T("LD: CH-2 ON\n"));
break;
case 0x47: // CH-1 OFF 'G'
ack();
ld_audio &= ~1;
+#ifdef AVIOUTPUT
setchflagsvideograb(ld_audio, false);
+#endif
if (log_ld)
write_log(_T("LD: CH-1 OFF\n"));
break;
case 0x49: // CH-2 OFF 'I'
ack();
ld_audio &= ~2;
+#ifdef AVIOUTPUT
setchflagsvideograb(ld_audio, false);
+#endif
if (log_ld)
write_log(_T("LD: CH-2 OFF\n"));
break;
ld_direction = 0;
ld_video = true;
ld_value = 0;
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ack();
if (log_ld)
write_log(_T("LD: CL\n"));
break;
case 0x60: // ADDR INQ '`'
{
+#ifdef AVIOUTPUT
if (!ld_save_restore && isvideograb() && ld_direction == 0) {
ld_address = (uae_u32)getsetpositionvideograb(-1);
}
+#endif
uae_u32 v = ld_address;
uae_u32 m = 10000;
for (int i = 0; i < 5; i++) {
{
ld_vsync++;
if (ld_save_restore) {
+#ifdef AVIOUTPUT
if (ld_address == 0 || getsetpositionvideograb(ld_address) > 0) {
ld_save_restore = false;
setchflagsvideograb(ld_audio, false);
if (ld_save_restore) {
return;
}
+#endif
}
if (ld_mode == LD_MODE_PLAY) {
+#ifdef AVIOUTPUT
if (log_ld && (ld_vsync & 63) == 0) {
uae_s64 pos = getsetpositionvideograb(-1);
write_log(_T("LD: frame %lld\n"), pos);
}
pausevideograb(0);
+#endif
if (ld_direction < 0) {
if (ld_address > 0) {
ld_address -= (-ld_direction);
if ((ld_vsync & 15) == 0) {
+#ifdef AVIOUTPUT
if (isvideograb()) {
getsetpositionvideograb(ld_address);
}
+#endif
}
}
} else {
ld_address += 1 + ld_direction;
if (ld_direction > 0) {
if ((ld_vsync & 15) == 0) {
+#ifdef AVIOUTPUT
if (isvideograb()) {
getsetpositionvideograb(ld_address);
}
+#endif
}
}
}
+#ifdef AVIOUTPUT
if (ld_repcnt >= 0 || ld_mark >= 0) {
uae_s64 f = getsetpositionvideograb(-1);
if (ld_repcnt >= 0) {
}
} else {
pausevideograb(1);
+#endif
}
if (algmemory_modified > 0) {
algmemory_modified--;
if (alg_picmatic_nova == 1) {
map_banks(&alg_ram_bank, 0xf6, 1, 0);
}
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
currprefs.cs_floppydatapullup = changed_prefs.cs_floppydatapullup = true;
device_add_vsync_pre(arcadia_vsync);
dstbak = dst = xmalloc(uae_u8, 1000);
save_u32(1);
-
+#ifdef AVIOUTPUT
uae_u32 addr = (uae_u32)getsetpositionvideograb(-1);
+#else
+ uae_u32 addr = 0;
+#endif
save_u32(alg_flag);
save_u32(ld_value);
#include "gui.h"
#include "xwin.h"
#include "debug.h"
+#ifdef WITH_SNDBOARD
#include "sndboard.h"
+#endif
#ifdef AVIOUTPUT
#include "avioutput.h"
#endif
#ifdef AHI
#include "traps.h"
#include "ahidsound.h"
+#ifdef AHI_v2
#include "ahidsound_new.h"
#endif
+#endif
#include "threaddep/thread.h"
#include <math.h>
#ifdef AHI
ahi_close_sound ();
+#ifdef AHI_v2
free_ahi_v2 ();
+#endif
#endif
reset_sound ();
memset (sound_filter_state, 0, sizeof sound_filter_state);
sound_cd_volume[0] = sound_cd_volume[1] = (100 - (currprefs.sound_volume_cd < 0 ? 0 : currprefs.sound_volume_cd)) * 32768 / 100;
sound_paula_volume[0] = sound_paula_volume[1] = (100 - currprefs.sound_volume_paula) * 32768 / 100;
+#ifdef WITH_SNDBOARD
sndboard_ext_volume();
+#endif
if (ch >= 0) {
if (currprefs.produce_sound >= 2) {
#include "threaddep/thread.h"
#include "native2amiga.h"
#include "inputdevice.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "devices.h"
/* Commonly used autoconfig strings */
blt_info.blit_queued = 0;
event2_remevent(ev2_blitter);
unset_special(SPCFLAG_BLTNASTY);
+#if BLITTER_DEBUG
if (log_blitter & 1) {
if (blt_info.vblitsize > 100) {
blit_totalcyclecounter, blit_misscyclecounter, blit_totalcyclecounter + blit_misscyclecounter);
}
+#endif
}
static void blitter_done_all(bool all)
//blitter_dump();
blitshifterdebug(bltcon0_old, false);
blit_warned--;
+#ifdef DEBUGGER
if (log_blitter & 16)
activate_debugger();
+#endif
}
}
}
{
int cycles;
- //activate_debugger();
-
+#if BLITTER_DEBUG
if ((log_blitter & 2)) {
if (blt_info.blit_main) {
write_log (_T("blitter was already active! PC=%08x\n"), M68K_GETPC);
}
}
+#endif
bltcon0_old = blt_info.bltcon0;
bltcon1_old = blt_info.bltcon1;
}
#endif
+#if BLITTER_DEBUG
if ((log_blitter & 1) || ((log_blitter & 32) && !blitline)) {
if (1) {
int ch = 0;
blitter_dump();
}
}
+#endif
blit_slowdown = 0;
#ifdef DEBUGGER
debugtest (DEBUGTEST_BLITTER, _T("program does not wait for blitter tc=%d\n"), blit_cyclecounter);
#endif
+#if BLITTER_DEBUG
if (log_blitter)
warned = 0;
if (log_blitter & 2) {
//activate_debugger();
//blitter_done (hpos);
}
+#endif
}
if (blitter_cycle_exact) {
blitter_handler(0);
end:;
+#if BLITTER_DEBUG
if (log_blitter)
blitter_delayed_debug = 1;
+#endif
}
int blitnasty(void)
if (blt_info.blit_main) {
write_log(_T("BLITTER active while saving state\n"));
+#if BLITTER_DEBUG
if (log_blitter)
blitter_dump();
+#endif
}
save_u32((uae_u32)blit_first_cycle);
continue;
if (p->cdslots[i].inuse || p->cdslots[i].name[0]) {
TCHAR *name = p->cdslots[i].name;
+#ifdef _WIN32
if (_tcslen (name) == 3 && name[1] == ':' && name[2] == '\\') {
+#else
+ if (name[0] == '/' && name[1] == 'd' && name[2] == 'e' && name[3] == 'v' && name[4] == '/') {
+#endif
if (currprefs.scsi && (currprefs.win32_uaescsimode == UAESCSI_SPTI || currprefs.win32_uaescsimode == UAESCSI_SPTISCAN))
cdscsidevicetype[i] = SCSI_UNIT_SPTI;
else
return unitnum;
}
device_func_init (SCSI_UNIT_IOCTL);
+#ifdef _WIN32
for (int drive = 'C'; drive <= 'Z'; ++drive) {
TCHAR vol[100];
_stprintf (vol, _T("%c:\\"), drive);
}
}
}
+#endif
if (isaudio) {
TCHAR vol[100];
_stprintf (vol, _T("%c:\\"), isaudio);
if (oldplay != cdu->cdda_play) {
struct cdtoc *t;
int sector, diff;
+#ifdef WIN32
struct _timeb tb1, tb2;
+#else
+#ifdef HAVE_SYS_TIMEB_H
+ struct timespec ts1, ts2;
+#else
+#warning Missing timing functions
+#endif
+#endif
idleframes = 0;
silentframes = 0;
#define MAX_VALUES 32
#define IOBUFFERS 256
+#ifdef DEBUGGER
uae_u32 get_byte_debug(uaecptr addr);
uae_u32 get_word_debug(uaecptr addr);
uae_u32 get_long_debug(uaecptr addr);
int getregidx(TCHAR **c);
uae_u32 returnregx(int regid);
+#endif
static double parsedvaluesd[MAX_VALUES];
static TCHAR *parsedvaluess[MAX_VALUES];
case ':':
v = v1;
break;
+#ifdef DEBUGGER
case 0xf0:
v = get_byte_debug((uaecptr)v1);
break;
case 0xf2:
v = get_long_debug((uaecptr)v1);
break;
-
+#endif
default:
return false;
}
#include "cda_play.h"
#include "archivers/mp2/kjmp2.h"
+
+#ifdef USE_LIBMPEG2
+#if (!defined _WIN32 && !defined ANDROID)
+extern "C" {
+#include "mpeg2dec/mpeg2.h"
+#include "mpeg2dec/mpeg2convert.h"
+}
+#else
#include "mpeg2.h"
#include "mpeg2convert.h"
+#endif
#define FMV_DEBUG 0
static int fmv_audio_debug = 0;
#include "gui.h"
#include "zfile.h"
#include "threaddep/thread.h"
+#ifdef A2091
#include "a2091.h"
+#endif
#include "uae.h"
#include "savestate.h"
#include "scsi.h"
{
if (!(dmac_cntr & CNTR_PDMD)) { // non-scsi dma
write_comm_pipe_u32 (&requests, 0x0100, 1);
- } else {
+ }
+#ifdef A2091
+ else {
scsi_dmac_a2091_start_dma (wd_cdtv);
}
+#endif
}
static void dmac_stop_dma (void)
{
if (!(dmac_cntr & CNTR_PDMD)) { // non-scsi dma
;
- } else {
+ }
+#ifdef A2091
+ else {
scsi_dmac_a2091_stop_dma (wd_cdtv);
}
+#endif
}
void cdtv_getdmadata (uae_u32 *acr)
static void checkint (void)
{
int irq = 0;
-
+#ifdef A2091
if (cdtvscsi && (wdscsi_getauxstatus (&wd_cdtv->wc) & 0x80)) {
dmac_istr |= ISTR_INTS;
if ((dmac_cntr & CNTR_INTEN) && (dmac_istr & ISTR_INTS))
irq = 1;
}
+#endif
if ((dmac_cntr & CNTR_INTEN) && (dmac_istr & ISTR_E_INT))
irq = 1;
if (irq)
v = dmac_cntr;
break;
case 0x91:
+#ifdef A2091
if (cdtvscsi)
v = wdscsi_getauxstatus (&wd_cdtv->wc);
+#endif
break;
case 0x93:
+#ifdef A2091
if (cdtvscsi) {
v = wdscsi_get (&wd_cdtv->wc, wd_cdtv);
checkint ();
}
+#endif
break;
case 0xa1:
sten = 0;
dmac_dawr |= b << 0;
break;
case 0x91:
+#ifdef A2091
if (cdtvscsi) {
wdscsi_sasr (&wd_cdtv->wc, b);
checkint ();
}
+#endif
break;
case 0x93:
+#ifdef A2091
if (cdtvscsi) {
wdscsi_put (&wd_cdtv->wc, wd_cdtv, b);
checkint ();
}
+#endif
break;
case 0xa1:
cdrom_command (b);
if (!aci->doinit)
return true;
cdtvscsi = true;
+#ifdef A2091
init_wd_scsi(wd_cdtv, aci->rc->dma24bit);
wd_cdtv->dmac_type = COMMODORE_DMAC;
+#endif
if (configured > 0)
map_banks_z2(&dmac_bank, configured, 0x10000 >> 16);
return true;
#include "calc.h"
#include "gfxboard.h"
#include "cpuboard.h"
+#ifdef WITH_LUA
#include "luascript.h"
+#endif
#include "ethernet.h"
#include "native2amiga_api.h"
#include "ini.h"
+#ifdef WITH_SPECIALMONITORS
#include "specialmonitors.h"
+#endif
#define cfgfile_warning write_log
#define cfgfile_warning_obsolete write_log
}
}
+#ifdef WITH_LUA
for (i = 0; i < MAX_LUA_STATES; i++) {
if (p->luafiles[i][0]) {
cfgfile_write_path2(f, _T("lua"), p->luafiles[i], PATH_NONE);
}
}
+#endif
if (p->trainerfile[0])
cfgfile_write_path2(f, _T("trainerfile"), p->trainerfile, PATH_NONE);
}
cfgfile_dwrite_str(f, _T("genlock_effects"), tmp);
}
-
-
+#ifdef WITH_SPECIALMONITORS
cfgfile_dwrite_strarr(f, _T("monitoremu"), specialmonitorconfignames, p->monitoremu);
+#endif
cfgfile_dwrite(f, _T("monitoremu_monitor"), _T("%d"), p->monitoremu_mon);
cfgfile_dwrite_coords(f, _T("lightpen_offset"), p->lightpen_offset[0], p->lightpen_offset[1]);
cfgfile_dwrite_bool(f, _T("lightpen_crosshair"), p->lightpen_crosshair);
}
cfgfile_writeramboard(p, f, _T("fastmem"), i, &p->fastmem[i]);
}
+#ifdef DEBUGGER
cfgfile_write(f, _T("debugmem_start"), _T("0x%x"), p->debugmem_start);
cfgfile_write(f, _T("debugmem_size"), _T("%d"), p->debugmem_size / 0x100000);
+#endif
cfgfile_write(f, _T("mem25bit_size"), _T("%d"), p->mem25bit.size / 0x100000);
cfgfile_writeramboard(p, f, _T("mem25bit"), 0, &p->mem25bit);
cfgfile_write(f, _T("a3000mem_size"), _T("%d"), p->mbresmem_low.size / 0x100000);
}
}
+#ifdef WITH_LUA
if (!_tcsicmp (option, _T("lua"))) {
for (i = 0; i < MAX_LUA_STATES; i++) {
if (!p->luafiles[i][0]) {
}
return 1;
}
-
+#endif
+
if (cfgfile_strval (option, value, _T("gfx_autoresolution_min_vertical"), &p->gfx_autoresolution_minv, vertmode, 0)) {
p->gfx_autoresolution_minv--;
return 1;
return 1;
}
+#ifdef DEBUGGER
if (cfgfile_multichoice(option, value, _T("debugging_features"), &p->debugging_features, debugfeatures))
return 1;
+#endif
if (cfgfile_yesno(option, value, _T("gfx_api_hdr"), &vb)) {
if (vb && p->gfx_api == 2) {
|| cfgfile_strval(option, value, _T("comp_trustnaddr"), &p->comptrustnaddr, compmode, 0)
|| cfgfile_strval(option, value, _T("collision_level"), &p->collision_level, collmode, 0)
|| cfgfile_strval(option, value, _T("parallel_matrix_emulation"), &p->parallel_matrix_emulation, epsonprinter, 0)
+#ifdef WITH_SPECIALMONITORS
|| cfgfile_strval(option, value, _T("monitoremu"), &p->monitoremu, specialmonitorconfignames, 0)
+#endif
|| cfgfile_strval(option, value, _T("genlockmode"), &p->genlock_image, genlockmodes, 0)
|| cfgfile_strval(option, value, _T("waiting_blits"), &p->waiting_blits, waitblits, 0)
|| cfgfile_strval(option, value, _T("floppy_auto_extended_adf"), &p->floppy_auto_ext2, autoext2, 0)
/* case 'g': p->use_gfxlib = 1; break; */
case 'G': p->start_gui = 0; break;
+#ifdef DEBUGGER
case 'D': p->start_debugger = 1; break;
+#endif
case 'n':
if (_tcschr (arg, 'i') != 0)
}
}
filesys_shellexecute2(cmd, NULL, NULL, 0, 0, 0, flags, NULL, 0, shellexec_cb, NULL);
- } else if (!_tcsicmp(argc[i], _T("dbg"))) {
+ }
+#ifdef DEBUGGER
+ else if (!_tcsicmp(argc[i], _T("dbg"))) {
debug_parser(argc[i + 1], out, outsize);
- } else if (!inputdevice_uaelib(argc[i], argc[i + 1])) {
+ }
+#endif
+ else if (!inputdevice_uaelib(argc[i], argc[i + 1])) {
if (!cfgfile_parse_uaelib_option(prefs, argc[i], argc[i + 1], 0)) {
if (!cfgfile_parse_option(prefs, argc[i], argc[i + 1], 0)) {
ret = 5;
_tcscpy (p->floppyslots[1].df, _T("df1.adf"));
_tcscpy (p->floppyslots[2].df, _T("df2.adf"));
_tcscpy (p->floppyslots[3].df, _T("df3.adf"));
-
+#ifdef WITH_LUA
for (int i = 0; i < MAX_LUA_STATES; i++) {
p->luafiles[i][0] = 0;
}
-
+#endif
configure_rom (p, roms, 0);
_tcscpy (p->romextfile, _T(""));
_tcscpy (p->romextfile2, _T(""));
p->address_space_24 = 0;
#ifdef JIT
p->cachesize = MAX_JIT_CACHE;
+#else
+ p->cachesize = 0;
#endif
break;
}
p->mmu_model = 68030;
} else {
#ifdef JIT
+ p->mmu_model = 0;
p->cachesize = MAX_JIT_CACHE;
+#else
+ p->mmu_model = 0;
+ p->cachesize = 0;
#endif
}
p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
p->mbresmem_low.size = 8 * 1024 * 1024;
p->cpu_model = 68030;
p->fpu_model = 68882;
+ p->mmu_model = 0;
switch (config)
{
case 1:
case 2:
p->cpu_model = 68060;
p->fpu_model = 68060;
+#ifdef WITH_PPC
p->ppc_mode = 1;
cpuboard_setboard(p, BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_PPC);
p->cpuboardmem1.size = 128 * 1024 * 1024;
int roms_ppc[] = { 98, -1 };
configure_rom(p, roms_ppc, romcheck);
+#endif
break;
}
p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
p->produce_sound = 2;
#ifdef JIT
p->cachesize = MAX_JIT_CACHE;
+#else
+ p->cachesize = 0;
#endif
p->floppyslots[0].dfxtype = DRV_35_HD;
p->floppyslots[1].dfxtype = DRV_35_HD;
p->mbresmem_low.size = 8 * 1024 * 1024;
p->cpu_model = 68030;
p->fpu_model = 68882;
+ p->mmu_model = 0;
if (config > 0) {
p->cpu_model = 68040;
p->fpu_model = 68040;
p->produce_sound = 2;
#ifdef JIT
p->cachesize = MAX_JIT_CACHE;
+#else
+ p->cachesize = 0;
#endif
p->floppyslots[0].dfxtype = DRV_35_HD;
p->floppyslots[1].dfxtype = DRV_35_HD;
static void bip_velvet(struct uae_prefs *p, int config, int compa, int romcheck)
{
+ p->mmu_model = 0;
p->chipset_mask = CSMASK_A1000;
p->bogomem.size = 0;
p->sound_filter = FILTER_SOUND_ON;
roms[0] = 24;
roms[1] = -1;
+ p->mmu_model = 0;
p->chipset_mask = CSMASK_A1000;
p->bogomem.size = 0;
p->sound_filter = FILTER_SOUND_ON;
{
int roms[4];
+ p->mmu_model = 0;
p->bogomem.size = 0;
p->chipmem.size = 0x100000;
p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
if (config >= 2)
return bip_cdtvcr(p, config - 2, compa, romcheck);
+ p->mmu_model = 0;
p->bogomem.size = 0;
p->chipmem.size = 0x100000;
p->chipset_mask = CSMASK_ECS_AGNUS;
p->floppyslots[0].dfxtype = DRV_NONE;
p->floppyslots[1].dfxtype = DRV_NONE;
p->cs_unmapped_space = 1;
+ p->mmu_model = 0;
set_68020_compa (p, compa, 1);
p->cs_compatible = CP_CD32;
built_in_chipset_prefs (p);
roms_bliz[0] = -1;
roms_bliz[1] = -1;
p->cs_rtc = 0;
+ p->mmu_model = 0;
p->cs_compatible = CP_A1200;
built_in_chipset_prefs (p);
- switch (config)
- {
- case 1:
- p->fastmem[0].size = 0x400000;
- p->cs_rtc = 1;
- break;
- case 2:
- cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230IV);
- p->cpuboardmem1.size = 32 * 1024 * 1024;
- p->cpu_model = 68030;
- p->cs_rtc = 1;
- roms_bliz[0] = 89;
- configure_rom(p, roms_bliz, romcheck);
- break;
- case 3:
- cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
- p->cpuboardmem1.size = 32 * 1024 * 1024;
- p->cpu_model = 68040;
- p->fpu_model = 68040;
- p->cs_rtc = 1;
- roms_bliz[0] = 90;
- configure_rom(p, roms_bliz, romcheck);
- break;
- case 4:
- cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
- p->cpuboardmem1.size = 32 * 1024 * 1024;
- p->cpu_model = 68060;
- p->fpu_model = 68060;
- p->cs_rtc = 1;
- roms_bliz[0] = 90;
- configure_rom(p, roms_bliz, romcheck);
- break;
- case 5:
- cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_PPC);
- p->cpuboardmem1.size = 256 * 1024 * 1024;
- p->cpu_model = 68060;
- p->fpu_model = 68060;
- p->ppc_mode = 1;
- p->cs_rtc = 1;
- roms[0] = 15;
- roms[1] = 11;
- roms[2] = -1;
- roms_bliz[0] = 100;
- configure_rom(p, roms_bliz, romcheck);
- break;
- }
+ switch (config)
+ {
+ case 1:
+ p->fastmem[0].size = 0x400000;
+ p->cs_rtc = 1;
+ break;
+#ifdef WITH_CPUBOARD
+ case 2:
+ cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1230IV);
+ p->cpuboardmem1.size = 32 * 1024 * 1024;
+ p->cpu_model = 68030;
+ p->cs_rtc = 1;
+ roms_bliz[0] = 89;
+ configure_rom(p, roms_bliz, romcheck);
+ break;
+ case 3:
+ cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
+ p->cpuboardmem1.size = 32 * 1024 * 1024;
+ p->cpu_model = 68040;
+ p->fpu_model = 68040;
+ p->cs_rtc = 1;
+ roms_bliz[0] = 90;
+ configure_rom(p, roms_bliz, romcheck);
+ break;
+ case 4:
+ cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_1260);
+ p->cpuboardmem1.size = 32 * 1024 * 1024;
+ p->cpu_model = 68060;
+ p->fpu_model = 68060;
+ p->cs_rtc = 1;
+ roms_bliz[0] = 90;
+ configure_rom(p, roms_bliz, romcheck);
+ break;
+#ifdef WITH_PPC
+ case 5:
+ cpuboard_setboard(p, BOARD_BLIZZARD, BOARD_BLIZZARD_SUB_PPC);
+ p->cpuboardmem1.size = 256 * 1024 * 1024;
+ p->cpu_model = 68060;
+ p->fpu_model = 68060;
+ p->ppc_mode = 1;
+ p->cs_rtc = 1;
+ roms[0] = 15;
+ roms[1] = 11;
+ roms[2] = -1;
+ roms_bliz[0] = 100;
+ configure_rom(p, roms_bliz, romcheck);
+ break;
+#endif
+#else
+ case 2:
+ p->fastmem[0].size = 0x800000;
+ p->cs_rtc = 1;
+ break;
+#endif
+ default: break;
+ }
set_68020_compa (p, compa, 0);
return configure_rom (p, roms, romcheck);
}
p->cs_compatible = CP_A600;
p->bogomem.size = 0;
p->chipmem.size = 0x100000;
+ p->mmu_model = 0;
if (config > 0)
p->cs_rtc = 1;
if (config == 1)
p->produce_sound = 2;
#ifdef JIT
p->cachesize = MAX_JIT_CACHE;
+#else
+ p->cachesize = 0;
#endif
p->floppyslots[0].dfxtype = DRV_35_HD;
p->floppyslots[1].dfxtype = DRV_35_HD;
#include "inputdevice.h"
#include "zfile.h"
#include "ar.h"
+#ifdef PARALLEL_PORT
#include "parallel.h"
+#endif
#include "akiko.h"
#include "cdtv.h"
#include "debug.h"
+#ifdef ARCADIA
#include "arcadia.h"
+#endif
#include "audio.h"
#include "keyboard.h"
#include "uae.h"
+#ifdef AMAX
#include "amax.h"
+#endif
#include "sampler.h"
#include "dongle.h"
#include "inputrecord.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "rommgr.h"
#include "scsi.h"
#include "rtc.h"
v |= handle_joystick_buttons(c->pra, c->dra);
v |= (c->pra | (c->dra ^ 3)) & 0x03;
v = dongle_cia_read(0, reg, c->dra, v);
+#ifdef ARCADIA
v = alg_joystick_buttons(c->pra, c->dra, v);
+#endif
// 391078-01 CIA: output mode bits always return PRA contents
if (currprefs.cs_ciatype[0]) {
#endif
c->prb = val;
dongle_cia_write(0, reg, c->drb, val);
+#ifdef ARCADIA
alg_parallel_port(c->drb, val);
+#endif
#ifdef PARALLEL_PORT
if (isprinter()) {
if (isprinter() > 0) {
#include "debug.h"
#include "flashrom.h"
#include "uae.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "uae/vm.h"
#include "idecontrollers.h"
#include "scsi.h"
static bool cpuboard_non_byte_ea;
static uae_u16 a2630_io;
+#ifdef WITH_PPC
static bool ppc_irq_pending;
static void set_ppc_interrupt(void)
return m68kint;
}
+#endif
static bool mapromconfigured(void)
{
ABFLAG_RAM | ABFLAG_THREADSAFE, 0, 0
};
-
+#ifdef WITH_CPUBOARD
DECLARE_MEMORY_FUNCTIONS(blizzardio);
static addrbank blizzardio_bank = {
blizzardio_lget, blizzardio_wget, blizzardio_bget,
blizzardram_nojit_bank.baseaddr[addr] = b;
}
#endif
+#endif // WITH_CPUBOARD
static void no_rom_protect(void)
{
uae_vm_protect(addr, size, UAE_VM_READ);
}
+#ifdef WITH_CPUBOARD
MEMORY_BGET(blizzardmaprom2);
MEMORY_WGET(blizzardmaprom2);
MEMORY_LGET(blizzardmaprom2);
set_roms_modified();
}
}
+#endif
static const uae_u32 gvp_a530_maprom[7] =
{
safe_interrupt_set(IRQ_SOURCE_CPUBOARD, 0, false);
if (currprefs.cachesize)
atomic_or(&uae_int_requested, 0x010000);
+#ifdef WITH_PPC
uae_ppc_wakeup_main();
+#endif
} else if (!(io_reg[CSIII_REG_IRQ] & (P5_IRQ_PPC_1 | P5_IRQ_PPC_2))) {
safe_interrupt_set(IRQ_SOURCE_CPUBOARD, 1, false);
if (currprefs.cachesize)
atomic_or(&uae_int_requested, 0x010000);
+#ifdef WITH_PPC
uae_ppc_wakeup_main();
+#endif
} else {
atomic_and(&uae_int_requested, ~0x010000);
}
+#ifdef WITH_PPC
check_ppc_int_lvl();
ppc_interrupt(intlev());
+#endif
}
}
+#ifdef WITH_CPUBOARD
+
static void blizzardppc_maprom(void)
{
if (cpuboard_size <= 2 * 524288)
}
}
+#endif //WITH_CPUBOARD
+
static void cpuboard_hsync(void)
{
// we should call check_ppc_int_lvl() immediately
// after PPC CPU's interrupt flag is cleared but this
// should be fast enough for now
+#ifdef WITH_PPC
if (is_csmk3(&currprefs) || is_blizzardppc(&currprefs)) {
check_ppc_int_lvl();
}
+#endif
}
static void cpuboard_vsync(void)
return;
bool fallback_cpu = currprefs.cpu_model < 68020;
-
+#ifdef WITH_CPUBOARD
if (is_magnum40(&currprefs)) {
map_banks(&blizzardio_bank, 0x0c0c0000 >> 16, 0x10000 >> 16, 0);
}
if (is_a1230s2(&currprefs)) {
map_banks(&blizzardio_bank, 0x03000000 >> 16, 1, 0);
}
+#endif //WITH_CPUBOARD
}
bool cpuboard_forced_hardreset(void)
flashrom_file = NULL;
// if (blizzard_jit) {
+#ifdef WITH_CPUBOARD
mapped_free(&blizzardram_bank);
+#endif //WITH_CPUBOARD
#if 0
} else {
if (blizzardram_nojit_bank.baseaddr) {
}
}
#endif
+#ifdef WITH_CPUBOARD
if (blizzardmaprom_bank_mapped)
mapped_free(&blizzardmaprom_bank);
if (blizzardmaprom2_bank_mapped)
mapped_free(&blizzardmaprom2_bank);
+#endif //WITH_CPUBOARD
maprom_unwriteprotect();
+#ifdef WITH_CPUBOARD
blizzardram_bank.baseaddr = NULL;
// blizzardram_nojit_bank.baseaddr = NULL;
blizzardmaprom_bank.baseaddr = NULL;
mapped_free(&blizzardea_bank);
blizzardea_bank.baseaddr = NULL;
+#endif //WITH_CPUBOARD
cpuboard_size = cpuboard2_size = -1;
+#ifdef WITH_CPUBOARD
blizzardmaprom_bank.flags &= ~(ABFLAG_INDIRECT | ABFLAG_NOALLOC);
blizzardmaprom2_bank.flags &= ~(ABFLAG_INDIRECT | ABFLAG_NOALLOC);
+#endif //WITH_CPUBOARD
mapped_free(&cpuboardmem1_bank);
mapped_free(&cpuboardmem2_bank);
cpuboard_size = currprefs.cpuboardmem1.size;
cpuboardmem1_bank.reserved_size = 0;
cpuboardmem2_bank.reserved_size = 0;
+#ifdef WITH_CPUBOARD
if (is_kupke(&currprefs) || is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs) || is_dce_typhoon2(&currprefs) || is_apollo630(&currprefs)) {
// plain 64k autoconfig, nothing else.
}
+#endif //WITH_CPUBOARD
if (!cpuboardmem1_bank.baseaddr)
cpuboardmem1_bank.reserved_size = 0;
void cpuboard_overlay_override(void)
{
if (is_a2630(&currprefs) || is_harms_3kp(&currprefs)) {
+#ifdef WITH_CPUBOARD
if (!(a2630_io & 2))
map_banks(&blizzardf0_bank, 0xf80000 >> 16, f0rom_size >> 16, 0);
+#endif //WITH_CPUBOARD
if (mem25bit_bank.allocated_size)
map_banks(&chipmem_bank, (mem25bit_bank.start + mem25bit_bank.allocated_size) >> 16, (1024 * 1024) >> 16, 0);
else
void cpuboard_clear(void)
{
+#ifdef WITH_CPUBOARD
if (blizzardmaprom_bank.baseaddr)
memset(blizzardmaprom_bank.baseaddr, 0, 524288);
if (blizzardmaprom2_bank.baseaddr)
memset(blizzardmaprom2_bank.baseaddr, 0, 524288);
if (is_csmk3(&currprefs)) // SCSI RAM
memset(blizzardf0_bank.baseaddr + 0x40000, 0, 0x10000);
+#endif
}
// Adds resource resident that CSPPC/BPPC flash updater checks.
{
if (!currprefs.cpuboard_type || !cpuboard_size)
return false;
+#ifdef WITH_CPUBOARD
if (is_blizzard(&currprefs) || is_blizzardppc(&currprefs)) {
if (maprom_state)
blizzard_copymaprom();
if (maprom_state)
cyberstorm_copymaprom();
}
+#endif
return true;
}
if (w & 2) {
if (currprefs.mmu_model == 68030) {
// HACK!
+#ifdef CPUEMU_22
mmu030_fake_prefetch = 0x4ed0;
+#endif
}
map_banks(&kickmem_bank, 0xF8, 8, 0);
write_log(_T("A2630 boot rom unmapped\n"));
write_log(_T("CPUBoard '%s' ROM '%s' %lld loaded\n"), boardname, zfile_getname(autoconfig_rom), zfile_size(autoconfig_rom));
}
-
+#ifdef WITH_CPUBOARD
uae_u8 *blizzardea_tmp = blizzardea_bank.baseaddr;
uae_u8 *blizzardf0_tmp = blizzardf0_bank.baseaddr;
if (!aci->doinit) {
} else {
protect_roms(false);
}
+#else
+ protect_roms(false);
+#endif
cpuboard_non_byte_ea = true;
+#ifdef WITH_CPUBOARD
if (is_sx32pro(p)) {
earom_size = 65536;
autoconfig_rom = NULL;
}
+#endif //WITH_CPUBOARD
if (autoconf_stop) {
aci->addrbank = &expamem_none;
} else if (!autoconf) {
aci->zorro = 0;
} else if (autoconfig_data[0]) {
+#ifdef WITH_CPUBOARD
aci->addrbank = &blizzarde8_bank;
memcpy(aci->autoconfig_bytes, autoconfig_data, sizeof aci->autoconfig_bytes);
aci->autoconfigp = aci->autoconfig_bytes;
+#endif
aci->zorro = 2;
aci->autoconfig_automatic = true;
} else {
+#ifdef WITH_CPUBOARD
aci->addrbank = &blizzarde8_bank;
memcpy(aci->autoconfig_raw, blizzardea_bank.baseaddr, sizeof aci->autoconfig_raw);
+#endif
aci->zorro = 2;
}
zfile_fclose(autoconfig_rom);
if (!aci->doinit) {
+#ifdef WITH_CPUBOARD
xfree(blizzardea_bank.baseaddr);
xfree(blizzardf0_bank.baseaddr);
blizzardea_bank.baseaddr = blizzardea_tmp;
blizzardf0_bank.baseaddr = blizzardf0_tmp;
+#endif
flash_free(flashrom);
flashrom = NULL;
return true;
map_banks(&blizzardf0_bank, 0xf00000 >> 16, (f0rom_size > 262144 ? 262144 : f0rom_size) >> 16, 0);
}
}
+#endif //WITH_CPUBOARD
device_add_vsync_pre(cpuboard_vsync);
device_add_hsync(cpuboard_hsync);
#include "enforcer.h"
#endif
#include "threaddep/thread.h"
+#ifdef WITH_LUA
#include "luascript.h"
+#endif
+#include "crc32.h"
#include "devices.h"
#include "rommgr.h"
+#ifdef WITH_SPECIALMONITORS
#include "specialmonitors.h"
+#endif
#define VPOSW_DEBUG 0
events_reset_syncline();
return;
}
+#ifdef WITH_BEAMRACER
if (currprefs.gfx_display_sections <= 1) {
if (vsync_vblank >= 85)
linesync_beam_single_dual();
else
linesync_beam_multi_single();
}
+#endif
}
static void cia_hsync_do(void)
maybe_process_pull_audio();
} else if (isvsync_chipset() < 0) {
-
+#ifdef WITH_BEAMRACER
if (currprefs.gfx_display_sections <= 1) {
if (vsync_vblank >= 85)
input_read_done = linesync_beam_single_dual();
else
input_read_done = linesync_beam_multi_single();
}
-
+#endif
} else if (!currprefs.cpu_thread && !cpu_sleepmode && currprefs.m68k_speed < 0 && !currprefs.cpu_memory_cycle_exact) {
static int sleeps_remaining;
target_reset();
devices_reset(hardreset);
write_log(_T("Reset at %08X. Chipset mask = %08X\n"), M68K_GETPC, currprefs.chipset_mask);
+#ifdef DEBUGGER
memory_map_dump();
+#endif
rga_slot_first_offset = 0;
rga_slot_in_offset = 1;
INTENA(0x8000 | 0x4000 | 0x1000 | 0x2000 | 0x0080 | 0x0010 | 0x0008 | 0x0001);
}
}
-
+#ifdef WITH_SPECIALMONITORS
specialmonitor_reset();
+#endif
update_mirrors();
unset_special(~(SPCFLAG_BRK | SPCFLAG_MODE_CHANGE | SPCFLAG_CHECK));
#endif
default:
-writeonly:;
+writeonly:
/* OCS/ECS:
* reading write-only register causes write with last value in chip
* bus (custom registers, chipram, slowram)
#include "cpummu.h"
#include "cpummu030.h"
#include "ar.h"
+#ifdef WITH_PCI
#include "pci.h"
+#endif
+#ifdef WITH_PPC
#include "ppc/ppcd.h"
#include "uae/io.h"
#include "uae/ppc.h"
+#endif
#include "drawing.h"
#include "devices.h"
#include "blitter.h"
a1 = a2;
}
}
+#ifdef WITH_PCI
pci_dump(log);
+#endif
currprefs.illegal_mem = imold;
}
static void ppc_disasm(uaecptr addr, uaecptr *nextpc, int cnt)
{
+#ifdef WITH_PPC
PPCD_CB disa;
while(cnt-- > 0) {
}
if (nextpc)
*nextpc = addr;
+#endif
}
static void dma_disasm(int frames, int vp, int hp, int frames_end, int vp_end, int hp_end)
!(state & (DEBUGMEM_ALLOCATED | DEBUGMEM_INUSE)) ? 'I' : (state & DEBUGMEM_WRITE) ? 'W' : 'R',
(state & DEBUGMEM_WRITE) ? '*' : (state & DEBUGMEM_INITIALIZED) ? '+' : '-',
dm->unused_start, PAGE_SIZE - dm->unused_end - 1);
-
+#ifdef DEBUGGER
if (peekdma_data.mask && (peekdma_data.addr == addr || (size > 2 && peekdma_data.addr + 2 == addr))) {
console_out_f(_T("DMA DAT=%04x PTR=%04x\n"), peekdma_data.reg, peekdma_data.ptrreg);
}
+#endif
debugmem_break(1);
}
}
console_out_f(_T("\n"));
// always return back to faulted instruction
+#ifdef DEBUGGER
put_long(stack + 6, regs.instruction_pc_user_exception);
debugmem_break_pc(13, regs.instruction_pc_user_exception, 2);
+#endif
}
static struct debugmemallocs *debugmem_reserve(uaecptr addr, uae_u32 size, uae_u32 parentid)
}
console_out_f(_T("Executable load complete.\n"));
-
+#ifdef DEBUGGER
uaecptr execbase = get_long_debug(4);
exec_thistask = get_real_address(execbase + 276);
-
+#endif
setchipbank(true);
chipmem_setindirect();
debugger_scan_libraries();
static void scan_library_list(uaecptr v, int *cntp)
{
+#ifdef DEBUGGER
while ((v = get_long_debug(v))) {
uae_u32 v2;
uae_u8 *p;
//console_out_f(_T("%08x = '%s'\n"), found->base, found->name);
}
}
+#endif
}
void debugger_scan_libraries(void)
{
+#ifdef DEBUGGER
if (!libnamecnt)
return;
uaecptr v = get_long_debug(4);
scan_library_list(v + 350, &cnt);
scan_library_list(v + 336, &cnt);
console_out_f(_T("%d libraries matched with library symbols.\n"), cnt);
+#endif
}
if (!_tcsicmp(name + lnlen + 1, lvo->name)) {
uaecptr addr = libname->base + lvo->value;
// JMP xxxxxxxx?
+#ifdef DEBUGGER
if (get_word_debug(addr) == 0x4ef9)
addr = get_long_debug(addr + 2);
+#endif
*valp = addr;
return true;
}
}
}
if (debugmem_active && debugmem_mapped) {
+#ifdef DEBUGGER
if (!dbg)
m68k_dumpstate(0, 0xffffffff);
+#endif
}
recursive--;
return 0xdeadf00d;
console_out_f(_T("%s read from %08x\n"), size == 4 ? _T("Long") : (size == 2 ? _T("Word") : _T("Byte")), addr, v);
dbg = debugmem_break(9);
}
+#ifdef DEBUGGER
if (!dbg)
m68k_dumpstate(0, 0xffffffff);
+#endif
recursive--;
return true;
}
uae_u32 sregs[16];
memcpy(sregs, regs.regs, sizeof(uae_u32) * 16);
memcpy(regs.regs, sf->regs, sizeof(uae_u32) * 16);
+#ifdef DEBUGGER
m68k_disasm(sf->current_pc, NULL, 0xffffffff, 2);
+#endif
memcpy(regs.regs, sregs, sizeof(uae_u32) * 16);
console_out_f(_T("\n"));
}
#include "threaddep/thread.h"
#include "memory.h"
#include "audio.h"
+#ifdef GFXBOARD
#include "gfxboard.h"
+#endif
#include "scsi.h"
#include "scsidev.h"
#include "sana2.h"
#include "clipboard.h"
#include "cpuboard.h"
+#ifdef WITH_SNDBOARD
#include "sndboard.h"
+#endif
#include "statusline.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#ifdef CD32
#include "cd32_fmv.h"
#include "akiko.h"
#include "uaenative.h"
#endif
#include "tabletlibrary.h"
+#ifdef WITH_LUA
#include "luascript.h"
+#endif
#ifdef DRIVESOUND
#include "driveclick.h"
#endif
+#ifdef WITH_X86
#include "x86.h"
+#endif
#include "ethernet.h"
#include "drawing.h"
+#ifdef AVIOUTPUT
#include "videograb.h"
+#endif
#include "rommgr.h"
#include "newcpu.h"
#ifdef WITH_MIDIEMU
#ifdef RETROPLATFORM
#include "rp.h"
#endif
+#ifdef WITH_DRACO
#include "draco.h"
+#endif
+#ifdef WITH_DSP
#include "dsp3210/dsp_glue.h"
+#endif
#include "keyboard_mcu.h"
#define MAX_DEVICE_ITEMS 64
void devices_update_sound(float clk, float syncadjust)
{
update_sound (clk);
+#ifdef WITH_SNDBOARD
update_sndboard_sound (clk / syncadjust);
+#endif
update_cda_sound(clk / syncadjust);
+#ifdef WITH_X86
x86_update_sound(clk / syncadjust);
+#endif
#ifdef WITH_MIDIEMU
midi_update_sound(clk / syncadjust);
#endif
#ifdef WITH_LUA
uae_lua_free();
#endif
+#ifdef GFXBOARD
gfxboard_free();
+#endif
savestate_free();
memory_cleanup();
free_shm();
void devices_syncchange(void)
{
+#ifdef WITH_X86
x86_bridge_sync_change();
+#endif
}
void devices_pause(void)
#ifdef RETROPLATFORM
rp_pause(1);
#endif
+#ifdef AVIOUTPUT
pausevideograb(1);
+#endif
ethernet_pause(1);
}
#ifdef WITH_DSP
dsp_pause(0);
#endif
+#ifdef AVIOUTPUT
pausevideograb(0);
+#endif
ethernet_pause(0);
}
static TCHAR disasm_pcreg[3], disasm_fpreg[3];
static bool absshort_long = false;
+#ifdef DEBUGGER
void disasm_init(void)
{
_tcscpy(disasm_pcreg, _T("PC"));
struct instr *table = &table68k[opcode];
#ifndef CPU_TESTER
-#if UAE
+#ifdef UAE
if (addr >= 0xe90000 && addr < 0xf00000)
goto skip;
if (addr >= 0xdff000 && addr < 0xe00000)
if (nextpc)
*nextpc = pc;
}
+#endif
#ifdef FDI2RAW
#include "fdi2raw.h"
#endif
+#ifdef CATWEASEL
#include "catweasel.h"
+#endif
#ifdef DRIVESOUND
#include "driveclick.h"
#endif
#endif
#include "crc32.h"
#include "inputrecord.h"
+#ifdef AMAX
#include "amax.h"
+#endif
#ifdef RETROPLATFORM
#include "rp.h"
#endif
drv->buffered_side = -1;
if (!fake) {
drv->dskeject = false;
+#ifdef RETROPLATFORM
gui_disk_image_change (dnum, outname, drv->wrprot);
+#endif
}
if (!drv->motoroff) {
drive_settype_id (drv); /* Back to 35 DD */
if (disk_debug_logging > 0)
write_log (_T("eject drive %ld\n"), drv - &floppy[0]);
+#ifdef RETROPLATFORM
gui_disk_image_change(drv->drvnum, NULL, drv->wrprot);
+#endif
inprec_recorddiskchange (drv->drvnum, NULL, false);
}
for (int dr = 0; dr < MAX_FLOPPY_DRIVES; dr++) {
drive *drv = floppy + dr;
if (drv->amax) {
+#ifdef AMAX
if (amax_active())
st = amax_disk_status (st);
+#endif
} else if (!((selected | disabled) & (1 << dr))) {
if (drive_running (drv)) {
if (drv->catweasel) {
#ifdef FLOPPYBRIDGE
if (drv->bridge && drv->writepending) {
- // With bridge we wait for the disk to commit the data before fireing the DMA
+ // With bridge we wait for the disk to commit the data before firing the DMA
if (drv->bridge->isWriteComplete()) {
disk_dmafinished();
drv->writepending = false;
#endif
if (disk_empty (0))
write_log (_T("No disk in drive 0.\n"));
+#ifdef AMAX
amax_init ();
+#endif
}
void DISK_reset (void)
#include "sysconfig.h"
#include "sysdeps.h"
+#ifdef WITH_DRACO
#include "options.h"
#include "uae.h"
#include "memory.h"
map_banks(&draco_bank, 0x04000000 >> 16, 0x01000000 >> 16, 0);
map_banks(&draco_bank, 0x21000000 >> 16, 0x1f000000 >> 16, 0);
}
+#endif //WITH_DRACO
#ifdef CD32
#include "cd32_fmv.h"
#endif
+#ifdef WITH_SPECIALMONITORS
#include "specialmonitors.h"
+#endif
#include "devices.h"
#include "gfxboard.h"
h = 0;
dy = 0;
}
-
+#ifdef WITH_SPECIALMONITORS
if (specialmonitor_uses_control_lines() || !blank) {
w = -1;
h = -1;
}
+#endif
if (w <= 0 || dx < 0) {
visible_left_start = 0;
struct vidbuf_description *vidinfo = &adisplays[monid].gfxvidinfo;
xlinebuffer = row_map[line];
xlinebuffer_genlock = row_map_genlock[line];
+#ifdef DEBUGGER
debug_draw(xlinebuffer, xlinebuffer_genlock, line, vidinfo->inbuffer->outwidth, vidinfo->inbuffer->outheight, xredcolors, xgreencolors, xbluecolors);
+#endif
}
#define LIGHTPEN_HEIGHT 12
static void draw_frame_extras(struct vidbuffer *vb, int y_start, int y_end)
{
+#ifdef DEBUGGER
if (debug_dma > 1 || debug_heatmap > 1) {
if (denise_lock()) {
for (int i = 0; i < vb->outheight; i++) {
}
}
}
+#endif
if (lightpen_active) {
if (lightpen_active & 1) {
vbout->last_drawn_line = 0;
draw_frame_extras(vbin, -1, -1);
+#ifdef WITH_SPECIALMONITORS
// video port adapters
if (currprefs.monitoremu) {
if (!denise_lock()) {
}
vbcopied = true;
}
+#endif
#ifdef CD32
// cd32 fmv
#endif
// grayscale
+#ifdef WITH_SPECIALMONITORS
if (!currprefs.monitoremu && vidinfo->tempbuffer.bufmem_allocated &&
((!currprefs.genlock && (!bplcolorburst_field && currprefs.cs_color_burst)) || currprefs.gfx_grayscale)) {
if (!denise_lock()) {
}
vbcopied = true;
}
+#endif
if (denise_locked) {
if (!vbcopied) {
#include "DSP3210_emulation.h"
extern void write_log(const char *, ...);
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
/* Typedefs */
typedef union
if (bestpc_idxs[i] == -1) {
for (j = 0; j < 5; j++) {
pospc -= 2;
+#ifdef DEBUGGER
sm68k_disasm (buf, NULL, pospc, &nextpc, 0xffffffff);
+#endif
if (nextpc == temppc) {
bestpc_idxs[i] = j;
bestpc_array[i][j] = bestpc = pospc;
continue;
}
+#ifdef DEBUGGER
sm68k_disasm (buf, instrcode, bestpc, NULL, 0xffffffff);
+#endif
_stprintf (lines[i], _T("%08x : %-20s %s\n"), bestpc, instrcode, buf);
temppc = bestpc;
}
/* Now the instruction after the pc including the pc */
temppc = pc;
for (i = 0; i < (INSTRUCTIONLINES + 1) / 2; i++) {
+#ifdef DEBUGGER
sm68k_disasm (buf, instrcode, temppc, &nextpc, 0xffffffff);
+#endif
_stprintf (enforcer_buf_ptr, _T("%08x : %s %-20s %s\n"), temppc,
(i == 0 ? _T("*") : _T(" ")), instrcode, buf);
enforcer_buf_ptr += _tcslen (enforcer_buf_ptr);
console_out (enforcer_buf);
write_log (_T("%s"), enforcer_buf);
+#ifdef DEBUGGER
if (!debug_enforcer()) {
+#endif
sleep_millis (5);
doflashscreen ();
+#ifdef DEBUGGER
}
+#endif
end:
xfree (native_task_name);
gui_flicker_led(LED_NET, 0, gui_data.net | 2);
switch (ndd->type)
{
+#ifdef WITH_SLIRP
case UAENET_SLIRP:
case UAENET_SLIRP_INBOUND:
{
}
}
return;
+#endif
#ifdef WITH_UAENET_PCAP
case UAENET_PCAP:
uaenet_trigger (vsd);
{
switch (ndd->type)
{
+#ifdef WITH_SLIRP
case UAENET_SLIRP:
case UAENET_SLIRP_INBOUND:
{
uae_slirp_start ();
}
return 1;
+#endif
#ifdef WITH_UAENET_PCAP
case UAENET_PCAP:
if (uaenet_open (vsd, ndd, user, gotfunc, getfunc, promiscuous, mac)) {
return;
switch (ndd->type)
{
+#ifdef WITH_SLIRP
case UAENET_SLIRP:
case UAENET_SLIRP_INBOUND:
if (slirp_data) {
uae_sem_destroy (&slirp_sem2);
}
return;
+#endif
#ifdef WITH_UAENET_PCAP
case UAENET_PCAP:
return uaenet_close (vsd);
#include "events.h"
#include "memory.h"
#include "newcpu.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "xwin.h"
+#ifdef WITH_X86
#include "x86.h"
+#endif
#include "audio.h"
#include "cia.h"
#include "newcpu.h"
#include "savestate.h"
#include "zfile.h"
+#ifdef CATWEASEL
#include "catweasel.h"
+#endif
#include "cdtv.h"
#include "cdtvcr.h"
#include "threaddep/thread.h"
+#ifdef A2091
#include "a2091.h"
+#endif
+#ifdef A2065
#include "a2065.h"
+#endif
#include "gfxboard.h"
#ifdef CD32
#include "cd32_fmv.h"
#endif
+#ifdef NCR
#include "ncr_scsi.h"
+#endif
+#ifdef NCR9X
#include "ncr9x_scsi.h"
+#endif
#include "scsi.h"
#include "debug.h"
#include "gayle.h"
#include "idecontrollers.h"
#include "cpuboard.h"
+#ifdef WITH_SNDBOARD
#include "sndboard.h"
+#endif
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "autoconf.h"
+#ifdef WITH_SPECIALMONITORS
#include "specialmonitors.h"
+#endif
#include "inputdevice.h"
+#ifdef WITH_PCI
#include "pci.h"
+#endif
+#ifdef WITH_X86
#include "x86.h"
+#endif
#include "filesys.h"
#include "ethernet.h"
#include "sana2.h"
+#ifdef ARCADIA
#include "arcadia.h"
+#endif
#include "devices.h"
+#ifdef WITH_DSP
#include "dsp3210/dsp_glue.h"
+#endif
#define CARD_FLAG_CAN_Z3 1
{
expamem_init_clear2 ();
write_log (_T("Memory map after autoconfig:\n"));
+#ifdef DEBUGGER
memory_map_dump ();
+#endif
mman_set_barriers(false);
return NULL;
}
cards_set[cardno].zorro = BOARD_NONAUTOCONFIG_BEFORE;
cards_set[cardno++].map = NULL;
}
-
+#ifdef GFXBOARD
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
struct rtgboardconfig *rbc = &p->rtgboards[i];
int type = gfxboard_get_configtype(rbc);
cards_set[cardno++].initnum = gfxboard_init_memory;
}
}
+#endif
// add possible non-autoconfig boards
add_cpu_expansions(p, BOARD_NONAUTOCONFIG_BEFORE, NULL);
}
}
#endif
+#ifdef WITH_SPECIALMONITORS
if (p->monitoremu == MONITOREMU_FIRECRACKER24) {
cards_set[cardno].flags = 0;
cards_set[cardno].name = _T("FireCracker24");
cards_set[cardno].zorro = 2;
cards_set[cardno++].initnum = specialmonitor_autoconfig_init;
}
+#endif
/* Z3 boards last */
NULL, 0,
false, EXPANSIONTYPE_INTERNAL | EXPANSIONTYPE_SCSI
},
+#ifdef NCR
{
_T("scsi_a4000t"), _T("A4000T SCSI"), _T("Commodore"),
NULL, a4000t_scsi_init, NULL, a4000t_add_scsi_unit, ROMTYPE_SCSI_A4000T | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
NULL, 0,
false, EXPANSIONTYPE_INTERNAL | EXPANSIONTYPE_SCSI
},
+#endif
{
_T("ide_mb"), _T("A600/A1200/A4000 IDE"), _T("Commodore"),
NULL, gayle_ide_init, NULL, gayle_add_ide_unit, ROMTYPE_MB_IDE | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
},
#endif
{
- _T("a1000wom512k"), _T("A1000 512k WOM"), _T("Jörg Huth"),
+ _T("a1000wom512k"), _T("A1000 512k WOM"), _T("Jörg Huth"),
NULL, NULL, NULL, NULL, ROMTYPE_512KWOM | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
NULL, 0,
false, EXPANSIONTYPE_INTERNAL
},
/* PCI Bridgeboards */
+#ifdef WITH_PCI
{
_T("grex"), _T("G-REX"), _T("DCE"),
0, 0, 0, false, NULL,
false, 0, bridge_settings
},
+#endif
/* SCSI/IDE expansion */
false, 0, NULL,
{ 0xd1, 0x30, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
},
+#ifdef NCR9X
{
_T("blizzardscsikitiii"), _T("SCSI Kit III"), _T("Phase 5"),
NULL, NULL, NULL, cpuboard_ncr9x_add_scsi_unit, ROMTYPE_BLIZKIT3, 0, 0, 0, true,
NULL, 0,
false, EXPANSIONTYPE_SCSI
},
+#endif
{
_T("accessx"), _T("AccessX"), _T("Breitfeld Computersysteme"),
NULL, accessx_init, NULL, accessx_add_ide_unit, ROMTYPE_ACCESSX, 0, 0, BOARD_AUTOCONFIG_Z2, false,
0, 0, 0, true, NULL,
false, 2
},
+#ifdef NCR9X
{
_T("oktagon2008"), _T("Oktagon 2008"), _T("BSC/Alfa Data"),
NULL, ncr_oktagon_autoconfig_init, NULL, oktagon_add_scsi_unit, ROMTYPE_OKTAGON, 0, 0, BOARD_AUTOCONFIG_Z2, false,
NULL, 0,
true, EXPANSIONTYPE_SCSI
},
+#endif
{
_T("alfapower"), _T("AlfaPower/AT-Bus 2008"), _T("BSC/Alfa Data"),
NULL, alf_init, NULL, alf_add_ide_unit, ROMTYPE_ALFA, 0, 0, BOARD_AUTOCONFIG_Z2, false,
true, EXPANSIONTYPE_SCSI | EXPANSIONTYPE_CUSTOM_SECONDARY | EXPANSIONTYPE_DMA24,
commodore, commodore_a2091, 0, true, NULL
},
+#ifdef NCR
{
_T("a4091"), _T("A4091"), _T("Commodore"),
NULL, ncr710_a4091_autoconfig_init, NULL, a4091_add_scsi_unit, ROMTYPE_A4091, 0, 0, BOARD_AUTOCONFIG_Z3, false,
0, 0, 0, false, NULL,
true, 0, a4091_settings
},
+#endif
{
_T("comspec"), _T("SA series"), _T("Comspec Communications"),
comspec_preinit, comspec_init, NULL, comspec_add_scsi_unit, ROMTYPE_COMSPEC, 0, 0, BOARD_AUTOCONFIG_Z2, true,
0, 0, 0, false, NULL,
false, 0, comspec_settings
},
+#ifdef NCR9X
{
_T("rapidfire"), _T("RapidFire/SpitFire"), _T("DKB"),
NULL, ncr_rapidfire_init, NULL, rapidfire_add_scsi_unit, ROMTYPE_RAPIDFIRE, 0, 0, BOARD_AUTOCONFIG_Z2, false,
true, 0, NULL,
{ 0xd2, 0x0f ,0x00, 0x00, 0x07, 0xdc, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00 },
},
+#endif
{
_T("fastata4000"), _T("FastATA 4000"), _T("Elbox"),
NULL, fastata4k_init, NULL, fastata4k_add_ide_unit, ROMTYPE_FASTATA4K, 0, 0, BOARD_AUTOCONFIG_Z3, false,
{ 0xd1, 0x31, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 },
},
{
- _T("kommos"), _T("Kommos A500/A2000 SCSI"), _T("Jürgen Kommos"),
+ _T("kommos"), _T("Kommos A500/A2000 SCSI"), _T("Jürgen Kommos"),
NULL, kommos_init, NULL, kommos_add_scsi_unit, ROMTYPE_KOMMOS, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
NULL, 0,
false, EXPANSIONTYPE_SCSI
0, 0, 0, false, NULL,
true, 0, golemfast_settings
},
+#ifdef NCR9X
{
_T("multievolution"), _T("Multi Evolution 500/2000"), _T("MacroSystem"),
NULL, ncr_multievolution_init, NULL, multievolution_add_scsi_unit, ROMTYPE_MEVOLUTION, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
false, EXPANSIONTYPE_SCSI,
18260, 8, 0, true
},
+#endif
{
_T("mastfb"), _T("Fireball"), _T("M.A.S.T."),
NULL, fireball_init, NULL, fireball_add_scsi_unit, ROMTYPE_MASTFB, 0, 0, BOARD_AUTOCONFIG_Z2, false,
false, 0, NULL,
{ 0xd1, 3, 0x40, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00 }
},
+#ifdef NCR9X
{
_T("scram5394"), _T("SCRAM (NCR53C94)"), _T("MegaMicro"),
NULL, ncr_scram5394_init, NULL, scram5394_add_scsi_unit, ROMTYPE_SCRAM5394, 0, 0, BOARD_AUTOCONFIG_Z2, false,
false, 0, NULL,
{ 0xd1, 7, 0x40, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00 }
},
+#endif
{
_T("paradox"), _T("Paradox SCSI"), _T("Mainhattan Data"),
NULL, paradox_init, NULL, paradox_add_scsi_unit, ROMTYPE_PARADOX | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, false,
NULL, 0,
true, EXPANSIONTYPE_IDE
},
+#ifdef NCR9X
{
_T("mtecmastercard"), _T("Mastercard"), _T("M-Tec"),
NULL, ncr_mtecmastercard_init, NULL, mtecmastercard_add_scsi_unit, ROMTYPE_MASTERCARD, 0, 0, BOARD_AUTOCONFIG_Z2, false,
NULL, 0,
true, EXPANSIONTYPE_SCSI
},
+#endif
{
_T("masoboshi"), _T("MasterCard"), _T("Masoboshi"),
NULL, masoboshi_init, NULL, masoboshi_add_idescsi_unit, ROMTYPE_MASOBOSHI | ROMTYPE_NONE, 0, 0, BOARD_AUTOCONFIG_Z2, false,
false, 0, NULL,
{ 0xd1, 16, 0x00, 0x00, 0x08, 0x40, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00 }
},
+#ifdef NCR9X
{
_T("fastlane"), _T("Fastlane"), _T("Phase 5"),
NULL, ncr_fastlane_autoconfig_init, NULL, fastlane_add_scsi_unit, ROMTYPE_FASTLANE, 0, 0, BOARD_AUTOCONFIG_Z3, false,
false, EXPANSIONTYPE_SCSI,
8512, 10, 0, false, fastlane_memory_callback
},
+#endif
{
_T("phoenixboard"), _T("Phoenix Board SCSI"), _T("Phoenix Microtechnologies"),
NULL, phoenixboard_init, NULL, phoenixboard_add_scsi_unit, ROMTYPE_PHOENIXB, 0, 0, BOARD_AUTOCONFIG_Z2, true,
NULL, 0,
false, EXPANSIONTYPE_CUSTOM | EXPANSIONTYPE_SCSI
},
+#ifdef NCR
{
_T("alf3"), _T("A.L.F.3"), _T("Elaborate Bytes"),
NULL, ncr_alf3_autoconfig_init, NULL, alf3_add_scsi_unit, ROMTYPE_ALF3 | ROMTYPE_NONE, 0, 0, BOARD_AUTOCONFIG_Z2, false,
0, 0, 0, false, NULL,
true, 0, alf3_settings
},
+#endif
{
- _T("promigos"), _T("Promigos"), _T("Flesch und Hörnemann"),
+ _T("promigos"), _T("Promigos"), _T("Flesch und Hörnemann"),
NULL, promigos_init, NULL, promigos_add_scsi_unit, ROMTYPE_PROMIGOS | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
NULL, 0,
false, EXPANSIONTYPE_CUSTOM | EXPANSIONTYPE_SCSI
_T("amax"), _T("AMAX ROM dongle"), _T("ReadySoft"),
NULL, NULL, NULL, NULL, ROMTYPE_AMAX | ROMTYPE_NONE, 0, 0, 0, false
},
+#ifdef WITH_X86
{
_T("x86athdprimary"), _T("AT IDE Primary"), NULL,
NULL, x86_at_hd_init_1, NULL, x86_add_at_hd_unit_1, ROMTYPE_X86_AT_HD1 | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_AFTER_Z2, true,
false, 0, x86_rt1000_settings
},
+#endif
#ifndef NDEBUG
{
_T("dev_ide"), _T("DEV IDE"), NULL,
},
/* PC Bridgeboards */
+#ifdef WITH_X86
{
_T("a1060"), _T("A1060 Sidecar"), _T("Commodore"),
0, 0, 0, false, NULL,
false, 0, x86at386_bridge_settings
},
+#endif
// only here for rom selection and settings
{
},
/* Sound Cards */
+#ifdef WITH_TOCCATA
{
_T("prelude"), _T("Prelude"), _T("Albrecht Computer Technik"),
NULL, prelude_init, NULL, NULL, ROMTYPE_PRELUDE | ROMTYPE_NOT, 0, 0, BOARD_AUTOCONFIG_Z2, true,
false, 0, toccata_soundcard_settings,
{ 0xc1, 12, 0, 0, 18260 >> 8, 18260 & 255 }
},
+#endif
+#ifdef WITH_PCI
{
_T("es1370"), _T("ES1370 PCI"), _T("Ensoniq"),
NULL, pci_expansion_init, NULL, NULL, ROMTYPE_ES1370 | ROMTYPE_NOT, 0, 0, BOARD_PCI, true,
NULL, 0,
false, EXPANSIONTYPE_SOUND
},
+#endif
+#ifdef WITH_TOCCATA
{
_T("uaesnd_z2"), _T("UAESND Z2"), NULL,
NULL, uaesndboard_init_z2, NULL, NULL, ROMTYPE_UAESNDZ2 | ROMTYPE_NOT, 0, 0, BOARD_AUTOCONFIG_Z2, true,
false, 0, NULL,
{ 0x80, 2, 0x10, 0x00, 6502 >> 8, 6502 & 255, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
},
+#endif
+#ifdef WITH_X86
{
_T("sb_isa"), _T("SoundBlaster ISA (Creative)"), NULL,
NULL, isa_expansion_init, NULL, NULL, ROMTYPE_SBISA | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
0, 0, 0, false, NULL,
false, 0, sb_isa_settings
},
+#endif
#if 0
false, 0, ethernet_settings,
{ 0xc1, 0xc9, 0x00, 0x00, 2167 >> 8, 2167 & 255, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }
},
+#ifdef WITH_QEMU_CPU
{
_T("ariadne2"), _T("Ariadne II"), _T("Village Tronic"),
NULL, ariadne2_init, NULL, NULL, ROMTYPE_ARIADNE2 | ROMTYPE_NOT, 0, 0, BOARD_AUTOCONFIG_Z2, true,
false, 0, ethernet_settings,
{ 0x82, 0x64, 0x32, 0x00, 4626 >> 8, 4626 & 255, 0x00, 0x00, 0x00, 0x0c, 0x00, 0x00 }
},
+#endif
{
_T("ne2000pcmcia"), _T("RTL8019 PCMCIA (NE2000 compatible)"), NULL,
NULL, gayle_init_board_io_pcmcia, NULL, NULL, ROMTYPE_NE2KPCMCIA | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
0, 0, 0, false, NULL,
false, 0, ethernet_settings,
},
+#ifdef WITH_PCI
{
_T("ne2000_pci"), _T("RTL8029 PCI (NE2000 compatible)"), NULL,
NULL, pci_expansion_init, NULL, NULL, ROMTYPE_NE2KPCI | ROMTYPE_NOT, 0, 0, BOARD_PCI, true,
0, 0, 0, false, NULL,
false, 0, ethernet_settings,
},
+#endif
+#ifdef WITH_X86
{
_T("ne2000_isa"), _T("RTL8019 ISA (NE2000 compatible)"), NULL,
NULL, isa_expansion_init, NULL, NULL, ROMTYPE_NE2KISA | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
0, 0, 0, false, NULL,
false, 0, ne2k_isa_settings
},
+#endif
+#ifdef CATWEASEL
/* Catweasel */
{
_T("catweasel"), _T("Catweasel"), _T("Individual Computers"),
NULL, 0,
false, EXPANSIONTYPE_FLOPPY
},
+#endif
// misc
NULL, 0,
false, EXPANSIONTYPE_CUSTOM | EXPANSIONTYPE_PCMCIA | EXPANSIONTYPE_CUSTOMDISK,
},
+#ifdef WITH_TOCCATA
{
_T("uaeboard_z2"), _T("UAEBOARD Z2"), NULL,
NULL, uaesndboard_init_z2, NULL, NULL, ROMTYPE_UAEBOARDZ2 | ROMTYPE_NOT, 0, 0, BOARD_AUTOCONFIG_Z2, true,
NULL, 0,
false, EXPANSIONTYPE_CUSTOM
},
+#endif
{
_T("cubo"), _T("Cubo CD32"), NULL,
NULL, cubo_init, NULL, NULL, ROMTYPE_CUBO | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
0, 0, 0, false, NULL,
false, 0, cubo_settings,
},
+#ifdef WITH_X86
{
_T("x86_mouse"), _T("x86 Bridgeboard mouse"), NULL,
NULL, isa_expansion_init, NULL, NULL, ROMTYPE_X86MOUSE | ROMTYPE_NOT, 0, 0, BOARD_NONAUTOCONFIG_BEFORE, true,
0, 0, 0, false, NULL,
false, 0, x86_mouse_settings
},
+#endif
{
0,
gvp_init_accelerator, NULL, BOARD_AUTOCONFIG_Z2, 1
},
+#ifdef NCR
{
_T("Tek Magic 2040/2060"),
_T("TekMagic"),
BOARD_MEMORY_HIGHMEM,
128 * 1024 * 1024
},
+#endif
{
_T("A1230 Turbo+"),
_T("A1230SI"),
gvpa1230s2_settings, NULL,
2017, 9, 0, false
},
+#ifdef NCR
{
_T("QuikPak XP"),
_T("quikpakxp"),
BOARD_MEMORY_HIGHMEM,
128 * 1024 * 1024
},
+#endif
{
NULL
}
};
static const struct cpuboardsubtype blizzardboard_sub[] = {
+#ifdef NCR9X
{
_T("Blizzard 1230 I/II"),
_T("Blizzard1230II"),
NULL, NULL, 0, 0,
blizzardboard_settings_mk2
},
+#endif
{
_T("Blizzard 1230 III"),
_T("Blizzard1230III"),
NULL, NULL, 0, 0,
blizzardboard_settings
},
+#ifdef NCR9X
{
_T("Blizzard 2060"),
_T("Blizzard2060"),
BOARD_MEMORY_BLIZZARD_PPC,
256 * 1024 * 1024
},
+#endif
{
NULL
}
NULL, NULL, 0, 0,
NULL
},
+#ifdef NCR9X
{
_T("CyberStorm MK II"),
_T("CyberStormMK2"),
BOARD_MEMORY_HIGHMEM,
128 * 1024 * 1024
},
+#endif
{
NULL
}
}
};
static const struct cpuboardsubtype macrosystem_sub[] = {
+#ifdef NCR
{
_T("Warp Engine A4000"),
_T("WarpEngineA4000"),
ncr710_warpengine_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z3, 1,
warpengine_settings
},
+#endif
{
_T("Falcon 040"),
_T("Falcon040"),
0,
128 * 1024 * 1024,
},
+#ifdef WITH_DRACO
{
_T("DraCo"),
_T("draco"),
0,
NULL, NULL, BOARD_NONAUTOCONFIG_BEFORE, 1,
},
+#endif
{
NULL
}
}
};
static const struct cpuboardsubtype mtec_sub[] = {
+#ifdef NCR9X
{
_T("E-Matrix 530"),
_T("e-matrix530"),
ncr_ematrix_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z2, 1,
mtec_settings
},
+#endif
{
NULL
}
}
};
static const struct cpuboardsubtype dbk_sub[] = {
+#ifdef NCR9X
{
_T("1230/1240/Cobra"),
_T("DKB12x0"),
ncr_dkb_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z2, 0,
cpuboard_dkb_cobra_settings
},
+#ifdef WITH_PCI
{
_T("Wildfire"),
_T("wildfire"),
0,
dkb_wildfire_pci_init, NULL, BOARD_NONAUTOCONFIG_BEFORE, 0
},
+#endif // WITH_PCI
+#endif
{
NULL
}
}
};
static const struct cpuboardsubtype pps_sub[] = {
+#ifdef NCR
{
_T("Zeus 040"),
_T("Zeus"),
zeus040_settings, NULL,
2016, 150, 0, false
},
+#endif
{
NULL
}
};
static const struct cpuboardsubtype csa_sub[] = {
+#ifdef NCR
{
_T("Magnum 40/4"),
_T("Magnum40"),
ncr710_magnum40_autoconfig_init, NULL, BOARD_AUTOCONFIG_Z2, 1,
magnum40_settings, NULL
},
+#endif
{
_T("Twelve Gauge"),
_T("twelvegauge"),
BOARD_MEMORY_CUSTOM_32,
128 * 1024 * 1024
},
+#ifdef NCR9X
{
_T("Typhoon MK2"),
_T("typhoon2"),
0,
typhoon2scsi_init, NULL, BOARD_AUTOCONFIG_Z2, 1
},
+#endif
{
NULL
}
#include "gayle.h"
#include "idecontrollers.h"
#include "savestate.h"
+#ifdef A2091
#include "a2091.h"
+#endif
+#ifdef NCR
#include "ncr_scsi.h"
+#endif
#include "cdtv.h"
#include "sana2.h"
#include "bsdsocket.h"
}
#if defined(CPU_i386) || defined(CPU_x86_64)
+#ifndef __MACH__
init_fpucw_x87();
+#endif
#ifdef MSVC_LONG_DOUBLE
init_fpucw_x87_80();
#endif
static void native_set_fpucw(uae_u32 m68k_cw)
{
+#ifndef __MACH__
#if defined(CPU_i386) || defined(CPU_x86_64)
set_fpucw_x87(m68k_cw);
#endif
+#endif
}
/* Functions for setting host/library modes and getting status */
#include <sys/stat.h>
#endif
+#if defined(STAT_STATVFS) && !defined(__ANDROID__)
+#include <sys/statvfs.h>
+// For osx, sigurbjornl
+#elif defined (__MACH__)
+#include <sys/mount.h>
+#else
+#include <sys/vfs.h>
+#endif
+
#include "fsusage.h"
/* Return the number of TOSIZE-byte blocks used by
# include <sys/mount.h>
#endif
-#if HAVE_SYS_VFS_H
+#if HAVE_SYS_VFS_H and !defined(__MACH__)
# include <sys/vfs.h>
#endif
# include <fcntl.h>
#endif
-#if HAVE_SYS_STATFS_H
+#if HAVE_SYS_STATFS_H and !defined(__MACH__)
# include <sys/statfs.h>
#endif
#include "uae.h"
#include "gui.h"
#include "threaddep/thread.h"
+#ifdef A2091
#include "a2091.h"
+#endif
#include "ncr_scsi.h"
#include "ncr9x_scsi.h"
#include "blkdev.h"
#include "scsi.h"
#include "ide.h"
#include "idecontrollers.h"
+#ifdef WITH_PCI
#include "pci_hw.h"
+#endif
#include "debug.h"
#include "autoconf.h"
#include "rommgr.h"
#include "devices.h"
+#ifdef WITH_DSP
#include "dsp3210/dsp_glue.h"
+#endif
#define PCMCIA_SRAM 1
#define PCMCIA_IDE 2
uaecptr oaddr = addr;
uae_u32 v = 0;
int got = 0;
-
+#ifdef WITH_DSP
if (is_dsp_installed) {
uaecptr daddr = addr & 0xffff;
if (daddr == 0x5f || daddr == 0x80) {
return v;
}
}
+#endif
if (currprefs.cs_ide == IDE_A600A1200) {
if ((addr & 0xA0000) != 0xA0000)
return 0;
{
uaecptr oaddr = addr;
int got = 0;
-
+#ifdef WITH_DSP
if (is_dsp_installed) {
uaecptr daddr = addr & 0xffff;
if (daddr == 0x5f || daddr == 0x80) {
dsp_write(val);
}
}
+#endif
if (currprefs.cs_ide == IDE_A600A1200) {
if ((addr & 0xA0000) != 0xA0000) {
return;
static uae_u8 *pcmcia_attrs;
static int pcmcia_write_min, pcmcia_write_max;
static uae_u16 pcmcia_idedata;
+#ifdef WITH_PCI
static const struct pci_board *ne2000;
static struct pci_board_state *ne2000_board_state;
+#endif
static uaecptr from_gayle_pcmcmia(uaecptr addr)
{
return pcmcia_configuration[offset];
} else if (pcmcia_configured >= 0 && (addr & 0xffff) >= 0x300) {
int reg = get_pcmcmia_ne2000_reg(addr);
+#ifdef WITH_PCI
if (ne2000) {
v = ne2000->bars[0].bget(ne2000_board_state, reg);
}
+#endif
return v;
}
} else if (pcmcia_type == PCMCIA_SURFSQUIRREL) {
+#ifdef NCR9X
if ((addr & 0x20600) == 0x20400) {
int reg = (addr >> 12) & 15;
v = squirrel_ncr9x_scsi_get(reg, 0);
v = squirrel_ncr9x_scsi_get(16, 0);
return v;
}
+#endif
}
if (pcmcia_attrs_full) {
v = pcmcia_attrs[addr];
write_log(_T("PCMCIA NE2000 IO configured = %02x\n"), v);
} else if (pcmcia_configured >= 0 && (addr & 0xffff) >= 0x300) {
int reg = get_pcmcmia_ne2000_reg(addr);
+#ifdef WITH_PCI
if (ne2000) {
ne2000->bars[0].bput(ne2000_board_state, reg, v);
}
+#endif
}
} else if (pcmcia_type == PCMCIA_SURFSQUIRREL) {
+#ifdef NCR9X
if ((addr & 0x20400) == 0x20400) {
int reg = (addr >> 12) & 15;
squirrel_ncr9x_scsi_put(reg, v, 0);
if ((addr & 0x20600) == 0x20200) {
squirrel_ncr9x_scsi_put(16, v, 0);
}
+#endif
}
}
}
}
}
remove_ide_unit(idedrive, PCMCIA_IDE_ID * 2);
+#ifdef WITH_PCI
if (ne2000) {
ne2000->free(ne2000_board_state);
xfree(ne2000_board_state);
ne2000_board_state = NULL;
ne2000 = NULL;
}
+#endif
if (pcmcia_card)
gayle_cs_change (GAYLE_CS_CCDET, 0);
initscideattr (pcmcia_readonly);
} else if (type == PCMCIA_NE2000) {
-
+#ifdef WITH_PCI
ne2000 = &ne2000_pci_board_pcmcia;
ne2000_board_state = xcalloc(pci_board_state, 1);
ne2000_board_state->irq_callback = ne2000_pcmcia_irq_callback;
pcmcia_card = 1;
initne2000attr();
}
+#endif
} else if (type == PCMCIA_ARCHOSHD) {
struct romconfig *rc = get_device_romconfig(&currprefs, ROMTYPE_SSQUIRREL, 0);
if (rc) {
+#ifdef NCR9X
ncr_squirrel_init(rc, 0xa00000);
+#endif
}
if (reset && path) {
+#ifdef NCR9X
squirrel_add_scsi_unit(0, uci, rc);
+#endif
}
}
return pcmcia_idedata;
}
} else if (pcmcia_type == PCMCIA_NE2000) {
+#ifdef WITH_PCI
int reg = get_pcmcmia_ne2000_reg(addr);
if (reg >= 0) {
if (ne2000) {
}
return v;
}
+#endif
}
}
return;
}
} else if (pcmcia_type == PCMCIA_NE2000) {
+#ifdef WITH_PCI
int reg = get_pcmcmia_ne2000_reg(addr);
if (reg >= 0) {
if (ne2000) {
}
return;
}
+#endif
}
}
static void gayle_hsync(void)
{
+#ifdef WITH_PCI
if (ne2000)
ne2000->hsync(ne2000_board_state);
+#endif
if (ide_interrupt_hsync(idedrive[0]) || ide_interrupt_hsync(idedrive[2]) || ide_interrupt_hsync(idedrive[4]) || checkpcmciane2000irq())
devices_rethink_all(rethink_gayle);
if (archoshd[0])
if (gb->pcemdev && gb->pcemobject) {
int irq = 0;
if (gb->board->bustype == GFXBOARD_BUSTYPE_DRACO) {
+#ifdef WITH_DRACO
void draco_svga_irq(bool state);
draco_svga_irq(gb->gfxboard_intreq);
+#endif
} else if (gb->gfxboard_intena) {
bool intreq = gb->gfxboard_intreq;
if (gb->gfxboard_external_interrupt) {
if (boardnum == GFXBOARD_ID_ALTAIS_Z3) {
if ((addr & 0xffff) < 0x100) {
+#ifdef WITH_DRACO
draco_bustimeout(addr);
+#endif
return;
}
addr &= 0xffff;
if (boardnum == GFXBOARD_ID_ALTAIS_Z3) {
if ((addr & 0xffff) < 0x100) {
+#ifdef WITH_DRACO
draco_bustimeout(addr);
+#endif
return v;
}
addr &= 0xffff;
{
bool irq = false;
for (int i = 0; ide_boards[i]; i++) {
+#ifdef WITH_X86
if (ide_boards[i] == x86_at_ide_board[0] || ide_boards[i] == x86_at_ide_board[1]) {
bool x86irq = ide_rethink(ide_boards[i], true);
if (x86irq && ide_boards[i] == x86_at_ide_board[0]) {
x86_doirq(14);
}
- } else {
+ } else
+#endif
+ {
if (ide_rethink(ide_boards[i], false))
safe_interrupt_set(IRQ_SOURCE_IDE, i, ide_boards[i]->intlev6);
}
v = board->rom[addr & board->rom_mask];
}
} else if ((addr & 0x8700) == 0x8400 || (addr & 0x8700) == 0x8000) {
+#ifdef NCR9X
v = golemfast_ncr9x_scsi_get(oaddr, getidenum(board, golemfast_board));
+#endif
} else if ((addr & 0x8700) == 0x8100) {
int regnum = get_golemfast_reg(addr, board);
if (regnum >= 0) {
}
} else if ((addr >= 0xf000 && addr <= 0xf00f) || (addr >= 0xf100 && addr <= 0xf10f)) {
// scsi dma controller
+#ifdef NCR9X
if (board->subtype)
v = masoboshi_ncr9x_scsi_get(oaddr, getidenum(board, masoboshi_board));
+#endif
} else if (addr == 0xf040) {
v = 1;
if (ide_irq_check(board->ide[0], false)) {
if (regnum >= 0) {
v = get_ide_reg(board, regnum);
} else if (addr >= MASOBOSHI_SCSI_OFFSET && addr < MASOBOSHI_SCSI_OFFSET_END) {
+#ifdef NCR9X
if (board->subtype)
v = masoboshi_ncr9x_scsi_get(oaddr, getidenum(board, masoboshi_board));
else
+#endif
v = 0xff;
}
}
}
}
if (addr >= TRIFECTA_SCSI_OFFSET && addr < TRIFECTA_SCSI_OFFSET_END) {
+#ifdef NCR9X
if (board->subtype)
v = trifecta_ncr9x_scsi_get(oaddr, getidenum(board, trifecta_board));
else
+#endif
v = 0xff;
}
if (addr == 0x401) {
board->configured = 1;
if (board->type == ROCHARD_IDE) {
rochard_scsi_init(board->original_rc, board->baseaddress);
+#ifdef NCR9X
} else if (board->type == MASOBOSHI_IDE) {
ncr_masoboshi_autoconfig_init(board->original_rc, board->baseaddress);
} else if (board->type == GOLEMFAST_IDE) {
ncr_golemfast_autoconfig_init(board->original_rc, board->baseaddress);
+#endif
} else if (board->type == DATAFLYERPLUS_IDE) {
dataflyerplus_scsi_init(board->original_rc, board->baseaddress);
+#ifdef NCR9X
} else if (board->type == TRIFECTA_IDE) {
ncr_trifecta_autoconfig_init(board->original_rc, board->baseaddress);
+#endif
}
expamem_next(ab, NULL);
}
write_log(_T("ALF PUT %08x %02x %d %08x\n"), addr, v, regnum, M68K_GETPC);
#endif
} else if (board->type == GOLEMFAST_IDE) {
-
+#ifdef NCR9X
if ((addr & 0x8700) == 0x8400 || (addr & 0x8700) == 0x8000) {
golemfast_ncr9x_scsi_put(oaddr, v, getidenum(board, golemfast_board));
- } else if ((addr & 0x8700) == 0x8100) {
+ } else
+#endif
+ if ((addr & 0x8700) == 0x8100) {
int regnum = get_golemfast_reg(addr, board);
if (regnum >= 0)
put_ide_reg(board, regnum, v);
if (regnum >= 0) {
put_ide_reg(board, regnum, v);
} else if (addr >= MASOBOSHI_SCSI_OFFSET && addr < MASOBOSHI_SCSI_OFFSET_END) {
+#ifdef NCR9X
if (board->subtype)
masoboshi_ncr9x_scsi_put(oaddr, v, getidenum(board, masoboshi_board));
+#endif
} else if ((addr >= 0xf000 && addr <= 0xf007)) {
+#ifdef NCR9X
if (board->subtype)
masoboshi_ncr9x_scsi_put(oaddr, v, getidenum(board, masoboshi_board));
+#endif
} else if (addr >= 0xf00a && addr <= 0xf00f) {
+#ifdef NCR9X
// scsi dma controller
masoboshi_ncr9x_scsi_put(oaddr, v, getidenum(board, masoboshi_board));
+#endif
} else if (addr >= 0xf040 && addr <= 0xf04f) {
// ide dma controller
if (addr >= 0xf04c && addr < 0xf050) {
}
}
if (addr >= TRIFECTA_SCSI_OFFSET && addr < TRIFECTA_SCSI_OFFSET_END) {
+#ifdef NCR9X
if (board->subtype)
trifecta_ncr9x_scsi_put(oaddr, v, getidenum(board, trifecta_board));
+#endif
}
if (addr >= 0x400 && addr <= 0x407) {
+#ifdef NCR9X
trifecta_ncr9x_scsi_put(oaddr, v, getidenum(board, trifecta_board));
+#endif
}
} else if (board->type == APOLLO_IDE) {
{
if (ch < 0) {
masoboshi_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
masoboshi_add_scsi_unit(ch, ci, rc);
+#endif
} else {
if (ci->controller_type < HD_CONTROLLER_TYPE_SCSI_FIRST)
masoboshi_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
else
masoboshi_add_scsi_unit(ch, ci, rc);
+#endif
}
}
{
if (ch < 0) {
trifecta_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
trifecta_add_scsi_unit(ch, ci, rc);
+#endif
} else {
if (ci->controller_type < HD_CONTROLLER_TYPE_SCSI_FIRST)
trifecta_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
else
trifecta_add_scsi_unit(ch, ci, rc);
+#endif
}
}
{
if (ch < 0) {
golemfast_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
golemfast_add_scsi_unit(ch, ci, rc);
+#endif
} else {
if (ci->controller_type < HD_CONTROLLER_TYPE_SCSI_FIRST)
golemfast_add_ide_unit(ch, ci, rc);
+#ifdef NCR9X
else
golemfast_add_scsi_unit(ch, ci, rc);
+#endif
}
}
add_ide_standard_unit(ch, ci, rc, ripple_board, RIPPLE_IDE, false, false, 4);
}
+#ifdef WITH_X86
extern void x86_xt_ide_bios(struct zfile*, struct romconfig*);
static bool x86_at_hd_init(struct autoconfig_info *aci, int type)
{
}
return v;
}
+#endif
#include "readcpu.h"
#include "machdep/m68k.h"
#include "events.h"
+
+#ifdef WITH_SOFTFLOAT
#include <softfloat/softfloat.h>
+#endif
#ifndef SET_CFLG
typedef struct
{
+#ifdef WITH_SOFTFLOAT
floatx80 fpx;
+#endif
#ifdef MSVC_LONG_DOUBLE
union {
fptype fp;
#include "newcpu.h"
#include "uae.h"
#include "picasso96.h"
+#ifdef CATWEASEL
#include "catweasel.h"
+#endif
#include "debug.h"
#include "ar.h"
#include "gui.h"
#include "audio.h"
#include "sounddep/sound.h"
#include "savestate.h"
+#ifdef ARCADIA
#include "arcadia.h"
+#endif
#include "zfile.h"
#include "cia.h"
#include "autoconf.h"
+#ifdef WITH_X86
#include "x86.h"
+#endif
+#ifdef WITH_DRACO
#include "draco.h"
+#endif
#ifdef RETROPLATFORM
#include "rp.h"
#endif
static int gp_swappeddevices[MAX_INPUT_DEVICES][IDTYPE_MAX];
static int osk_state;
+#ifdef WITH_DRACO
extern int draco_keyboard_get_rate(void);
static int draco_keybord_repeat_cnt, draco_keybord_repeat_code;
+#endif
bool osk_status(void)
{
int inputdevice_get_lightpen_id(void)
{
+#ifdef ARCADIA
if (!alg_flag) {
if (lightpen_enabled2)
return alg_get_player(potgo_value);
} else {
return alg_get_player(potgo_value);
}
+#endif
}
void tablet_lightpen(int tx, int ty, int tmaxx, int tmaxy, int touch, int buttonmask, bool touchmode, int devid, int lpnum)
static int mxd, myd;
if (vsync) {
-
- if (x86_mouse(0, 0, 0, 0, -1) || draco_mouse(0, 0, 0, 0, -1)) {
+#ifdef WITH_DRACO
+ if (
+#ifdef WITH_X86
+ x86_mouse(0, 0, 0, 0, -1) ||
+#endif
+ draco_mouse(0, 0, 0, 0, -1)) {
pcmouse = true;
pct = 1000;
}
-
+#endif
if (mxd < 0) {
if (mouseedge_x > 0)
pc_mouse_buttons[i] |= 4;
else
pc_mouse_buttons[i] &= ~4;
-
+#ifdef WITH_X86
x86_mouse(0, v1, v2, v3, pc_mouse_buttons[i]);
+#endif
+#ifdef WITH_DRACO
draco_mouse(0, v1, v2, v3, pc_mouse_buttons[i]);
+#endif
}
readinput ();
v = getjoystate (0);
v = dongle_joydat (0, v);
+#ifdef ARCADIA
v = alg_joydat(0, v);
+#endif
return v;
}
readinput ();
v = getjoystate (1);
v = dongle_joydat (1, v);
+#ifdef ARCADIA
v = alg_joydat(1, v);
+#endif
return v;
}
// normal second button pressed: always zero. Overrides CD32 mode.
if (getbuttonstate(i, JOYBUTTON_2))
potgor &= ~p9dat;
-
- } else if (alg_flag) {
+#ifdef ARCADIA
+ } else if (alg_flag) {
potgor = alg_potgor(potgo_value);
-
+#endif
} else if (lightpen_enabled2 && lightpen_port_number() == i) {
int button;
set_config_changed ();
} else if (!_tcsnicmp(p, _T("shellexec "), 10)) {
uae_ShellExecute(p + 10);
+#ifdef DEBUGGER
} else if (!_tcsnicmp(p, _T("dbg "), 4)) {
debug_parser(p + 4, NULL, -1);
+#endif
} else if (!_tcsnicmp (p, _T("kbr "), 4)) {
inject_events (p + 4);
} else if (!_tcsnicmp (p, _T("evt "), 4)) {
maybe_read_input();
}
}
+#ifdef WITH_DRACO
if (draco_keybord_repeat_cnt > 0) {
draco_keybord_repeat_cnt--;
if (draco_keybord_repeat_cnt == 0) {
draco_keycode(draco_keybord_repeat_code, 1);
}
}
+#endif
}
static uae_u16 POTDAT (int joy)
isaks = true;
}
+#ifdef DEBUGGER
if (isaks) {
if (debug_trainer_event(ie->data, state))
+ {
return 0;
+ }
} else {
if (debug_trainer_event(nr, state))
+ {
return 0;
+ }
}
-
+#endif
if (!isaks) {
if (input_record && input_record != INPREC_RECORD_PLAYING)
inprec_recordevent (nr, state, max, autofire);
}
lightpen_trigger2 = 0;
cubo_flag = 0;
+#ifdef ARCADIA
alg_flag &= 1;
+#endif
+#ifdef WITH_DRACO
draco_keybord_repeat_cnt = 0;
+#endif
}
static int getoldport (struct uae_input_device *id)
}
}
}
+#ifdef ARCADIA
if (arcadia_bios) {
setcompakb(prefs, keyboard_default_kbmaps[KBR_DEFAULT_MAP_ARCADIA], ip_arcadia, 0, 0);
}
+#endif
if (0 && currprefs.cs_cdtvcd) {
setcompakb(prefs, keyboard_default_kbmaps[KBR_DEFAULT_MAP_CDTV], ip_mediacdtv, 0, 0);
}
void inputdevice_draco_key(int kc)
{
+#ifdef WITH_DRACO
int state = (kc & 1) == 0;
kc >>= 1;
for (int i = 1; events[i].name; i++) {
}
}
}
+#endif
}
static uae_u32 pcs[16];
static uae_u64 pcs2[16];
+#ifdef DEBUGGER
extern void activate_debugger (void);
+#endif
static int warned;
static void setlasthsync (void)
{
int kpb_next = kpb_first + 1;
int kcd = (kc << 7) | (kc >> 1);
-
+#ifdef WITH_DRACO
if (currprefs.cs_compatible == CP_DRACO) {
if (currprefs.cpuboard_settings & 0x10) {
inputdevice_draco_key(kc);
return 1;
}
}
-
+#endif
if (!direct) {
if (key_swap_hack2) {
// $0D <> $0C
#include "sysconfig.h"
#include "sysdeps.h"
-
+#ifdef WITH_LUA
#include <lualib.h>
+#endif
#include "options.h"
#include "savestate.h"
#include "blkdev.h"
#include "consolehook.h"
#include "gfxboard.h"
+#ifdef WITH_LUA
#include "luascript.h"
+#endif
#include "uaenative.h"
#include "tabletlibrary.h"
#include "cpuboard.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "devices.h"
#ifdef JIT
#include "jit/compemu.h"
error_log(_T("Threaded CPU mode is not compatible with PPC emulation, More compatible or Cycle Exact modes. CPU type must be 68020 or higher."));
}
+#ifdef WITH_PPC
// 1 = "automatic" PPC config
if (p->ppc_mode == 1) {
cpuboard_setboard(p, BOARD_CYBERSTORM, BOARD_CYBERSTORM_SUB_PPC);
if (p->cpuboardmem1.size < 8 * 1024 * 1024)
p->cpuboardmem1.size = 8 * 1024 * 1024;
}
+#endif
if (p->cachesize_inhibit) {
p->cachesize = 0;
/* force sound settings change */
currprefs.produce_sound = 0;
+#ifdef SAVESTATE
savestate_init ();
+#endif
keybuf_init (); /* Must come after init_joystick */
#ifdef DEBUGGER
#define LSB_FIRST
extern void write_log(const char *, ...);
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
#define MIN(a, b) ((a) > (b) ? (a) : (b))
return (UINT64)a * (UINT64)b;
}
+#ifndef NULL
#define NULL 0
+#endif
class direct_read_data
{
#include "gui.h"
#include "cdtv.h"
#include "akiko.h"
+#ifdef ARCADIA
#include "arcadia.h"
+#endif
+#ifdef ENFORCER
#include "enforcer.h"
+#endif
#include "threaddep/thread.h"
#include "gayle.h"
#include "debug.h"
#include "debugmem.h"
#include "gfxboard.h"
#include "cpuboard.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "devices.h"
#include "inputdevice.h"
+#ifdef WITH_DRACO
#include "draco.h"
+#endif
bool canbang;
uaecptr highest_ram;
}
write_log (_T("\n"));
}
+#ifdef DEBUGGER
memory_map_dump();
+#endif
}
if (0 || (gary_toenb && (gary_nonrange(addr) || (size > 1 && gary_nonrange(addr + size - 1))))) {
hardware_exception2(addr, 0, true, true, size);
if (romextfile[0] == '\0')
return false;
+#ifdef ARCADIA
if (is_arcadia_rom (romextfile) == ARCADIA_BIOS) {
extendedkickmem_type = EXTENDED_ROM_ARCADIA;
return false;
}
+#endif
f = read_rom_name (romextfile, false);
if (!f) {
notify_user (NUMSG_NOEXTROM);
zfile_fseek (f, 0, SEEK_END);
size = zfile_ftell32(f);
extendedkickmem_bank.reserved_size = ROM_SIZE_512;
+#ifdef ARCADIA
struct romdata *rd = get_alg_rom(romextfile);
if (rd) {
size = rd->size;
type = EXTENDED_ROM_ALG;
}
+#endif
off = 0;
if (type == 0) {
if (currprefs.cs_cd32cd) {
if (a3000hmem_bank.allocated_size > 0)
restore_ram (a3000hmem_filepos, a3000hmem_bank.baseaddr);
} else {
+#ifdef ARCADIA
alg_flag = 0;
+#endif
}
#ifdef AGA
chipmem_bank_ce2.baseaddr = chipmem_bank.baseaddr;
if (chip < 0)
chip = overlay_state;
-
+#ifdef WITH_DRACO
if (currprefs.cs_compatible == CP_CASABLANCA) {
casablanca_map_overlay();
return;
draco_map_overlay();
return;
}
-
+#endif
size = chipmem_bank.allocated_size >= 0x180000 ? (chipmem_bank.allocated_size >> 16) : 32;
if (bogomem_aliasing)
size = 8;
break;
#endif
case EXTENDED_ROM_ALG:
+#ifdef ARCADIA
map_banks_set(&extendedkickmem_bank, 0xF0, 4, 0);
alg_map_banks();
+#endif
break;
}
#include "cpuboard.h"
#include "flashrom.h"
#include "autoconf.h"
+#ifdef WITH_QEMU_CPU
#include "qemuvga/qemuuaeglue.h"
#include "qemuvga/queue.h"
#include "qemuvga/scsi/scsi.h"
#include "qemuvga/scsi/esp.h"
+#endif
#include "gui.h"
#include "devices.h"
#include "zfile.h"
#include "blkdev.h"
#include "cpuboard.h"
+#ifdef WITH_QEMU_CPU
#include "qemuvga/qemuuaeglue.h"
#include "qemuvga/queue.h"
#include "qemuvga/scsi/scsi.h"
+#endif
#include "autoconf.h"
#include "gui.h"
#include "devices.h"
bool ncr710_draco_init(struct autoconfig_info *aci)
{
+#ifdef WITH_DRACO
device_add_reset(ncr_reset);
if (!aci->doinit) {
return true;
aci->addrbank = &ncr_bank_generic;
return true;
+#else
+ return false;
+#endif
}
void draco_add_scsi_unit(int ch, struct uaedev_config_info *ci, struct romconfig *rc)
{
+#ifdef WITH_DRACO
ncr_add_scsi_unit(&ncr_cpuboard, ch, ci, rc, false);
ncr_cpuboard->irq_func = draco_set_scsi_irq;
ncr_cpuboard->irqlevel = true;
ncr_cpuboard->bank = &ncr_bank_generic;
+#endif
}
#endif
#include "audio.h"
#include "fpp.h"
#include "statusline.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "cpuboard.h"
#include "threaddep/thread.h"
+#ifdef WITH_X86
#include "x86.h"
+#endif
#include "bsdsocket.h"
#include "devices.h"
+#ifdef WITH_DRACO
#include "draco.h"
+#endif
#ifdef JIT
#include "jit/compemu.h"
#include <signal.h>
cpu_halt (CPU_HALT_DOUBLE_FAULT);
return;
}
+#ifdef DEBUGGER
write_log(_T("Exception %d (%08x %x) at %x -> %x!\n"),
nr, last_op_for_exception_3, last_addr_for_exception_3, currpc, get_long_debug(4 * nr));
+#endif
if (currprefs.cpu_model == 68000) {
// 68000 bus/address error
uae_u16 mode = (sv ? 4 : 0) | last_fc_for_exception_3;
Exception_build_stack_frame(regs.mmu_fault_addr, currpc, regs.mmu_fslw, vector_nr, 0x4);
} else if (nr == 3) { // address error
Exception_build_stack_frame(last_fault_for_exception_3, currpc, 0, vector_nr, 0x2);
+#ifdef DEBUGGER
write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, last_fault_for_exception_3, currpc, get_long_debug (regs.vbr + 4 * nr));
+#endif
} else if (regs.m && interrupt) { /* M + Interrupt */
Exception_build_stack_frame(oldpc, currpc, regs.mmu_ssw, vector_nr, 0x0);
MakeSR();
Exception_build_stack_frame(oldpc, currpc, ssw, vector_nr, 0x08);
used_exception_build_stack_frame = true;
}
+#ifdef DEBUGGER
write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, regs.instruction_pc, currpc, get_long_debug (regs.vbr + 4 * vector_nr));
+#endif
} else if (regs.m && interrupt) { /* M + Interrupt */
m68k_areg (regs, 7) -= 2;
x_put_word (m68k_areg (regs, 7), vector_nr * 4);
mode |= last_notinstruction_for_exception_3 ? 8 : 0;
exception_in_exception = -1;
Exception_build_68000_address_error_stack_frame(mode, last_op_for_exception_3, last_fault_for_exception_3, last_addr_for_exception_3);
+#ifdef DEBUGGER
write_log (_T("Exception %d (%x) at %x -> %x!\n"), nr, last_fault_for_exception_3, currpc, get_long_debug (regs.vbr + 4 * vector_nr));
+#endif
goto kludge_me_do;
}
}
memcpy(®s, &fallback_regs, sizeof(regs));
restore_banks();
memory_restore();
+#ifdef DEBUGGER
memory_map_dump();
+#endif
m68k_setpc(fallback_regs.pc);
} else {
// 68000/010/EC020
memory_restore();
expansion_cpu_fallback();
+#ifdef DEBUGGER
memory_map_dump();
+#endif
}
}
Exception(8);
} else {
if (warned < 20) {
+#ifdef DEBUGGER
write_log(_T("B-Trap %04X at %08X -> %08X\n"), opcode, pc, get_long_debug(regs.vbr + 0x2c));
+#endif
warned++;
}
Exception(0xB);
}
if ((opcode & 0xF000) == 0xA000) {
if (warned < 20) {
+#ifdef DEBUGGER
write_log(_T("A-Trap %04X at %08X -> %08X\n"), opcode, pc, get_long_debug(regs.vbr + 0x28));
+#endif
warned++;
}
Exception (0xA);
return 4;
}
if (warned < 20) {
+#ifdef DEBUGGER
write_log (_T("Illegal instruction: %04x at %08X -> %08X\n"), opcode, pc, get_long_debug(regs.vbr + 0x10));
+#endif
warned++;
//activate_debugger_new();
}
{
if (i6) {
if (currprefs.cs_compatible == CP_DRACO || currprefs.cs_compatible == CP_CASABLANCA) {
+#ifdef WITH_DRACO
draco_ext_interrupt(true);
+#endif
} else {
INTREQ_f(0x8000 | 0x2000);
}
} else {
if (currprefs.cs_compatible == CP_DRACO || currprefs.cs_compatible == CP_CASABLANCA) {
+#ifdef WITH_DRACO
draco_ext_interrupt(false);
+#endif
} else {
INTREQ_f(0x8000 | 0x0008);
}
atomic_or(&uae_interrupt, 1);
} else {
if (currprefs.cs_compatible == CP_DRACO || currprefs.cs_compatible == CP_CASABLANCA) {
+#ifdef WITH_DRACO
draco_ext_interrupt(i6);
+#endif
} else {
int inum = i6 ? 13 : 3;
uae_u16 v = 1 << inum;
/* We may have been restoring state, but we're done now. */
if (isrestore ()) {
restored = savestate_restore_finish ();
+#ifdef DEBUGGER
memory_map_dump ();
+#endif
if (currprefs.mmu_model == 68030) {
mmu030_decode_tc (tc_030, true);
} else if (currprefs.mmu_model >= 68040) {
#define WINDDK /* Windows DDK available, keyboard leds and harddrive support */
#define CATWEASEL /* Catweasel MK2/3 support */
#define AHI /* AHI sound emulation */
+//#define AHI_v2 // AHI v2 was never completed on the Amiga-side
#define ENFORCER /* UAE Enforcer */
#define ECS_DENISE /* ECS DENISE new features */
#define AGA /* AGA chipset emulation (ECS_DENISE must be enabled) */
#define WITH_MIDIEMU
#define WITH_DSP
#define WITH_DRACO
-
+#define WITH_MIDI
#else
#define WITH_SCSI_IOCTL
#define WITH_SCSI_SPTI
+// Sound boards support
+#define WITH_SNDBOARD
+
+// CPU accelerator board support
+#define WITH_CPUBOARD
+
+// Special Monitors support
+#define WITH_SPECIALMONITORS
+
+//#define VIDEOGRAB 1
+
+// Beam racing support
+//#define WITH_BEAMRACER
+
#define A_ZIP
#define A_RAR
#define A_7Z
#define isnan _isnan
#ifndef LT_MODULE_EXT
+#ifdef _WIN32
#define LT_MODULE_EXT _T(".dll")
+#elif __MACH__
+#define LT_MODULE_EXT _T(".dylib")
+#else
+#define LT_MODULE_EXT _T(".so")
+#endif
#endif
/* Define if you have the bcopy function. */
if (keyboard_mode == 3) {
//val = draco_kbc_translate(val);
}
+#ifdef WITH_DRACO
draco_kdb_queue_add(d, val, state);
+#endif
}
#ifdef _WIN32
#include <windows.h>
+#endif
+
+#ifdef WITH_MIDI
#include "midi.h"
#endif
write_log("%s", buf);
va_end(parms);
}
-
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
void fatal(char const *format, ...)
{
va_list parms;
vsprintf(buf, format, parms);
write_log("PCEMFATAL: %s", buf);
va_end(parms);
+#ifdef DEBUGGER
activate_debugger();
+#endif
}
void video_updatetiming(void)
void midi_write(uint8_t v)
{
+#ifdef WITH_MIDI
if (!midi_open) {
midi_open = Midi_Open();
}
Midi_Parse(midi_output, &v);
+#endif
}
void pcem_close(void)
{
+#ifdef WITH_MIDI
if (midi_open)
Midi_Close();
+#endif
midi_open = 0;
}
#include "vid_svga_render.h"
#include "vid_sdac_ramdac.h"
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
enum
{
#define REG_FBSOURCEDELTA 0x0d88
#define REG_CONFIG 0x0d90
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
typedef struct permedia2_t
{
ai88[c].b = c & 0xff;
}
#ifndef NO_CODEGEN
+#if (defined WIN32 || defined WIN64)
voodoo_codegen_init(voodoo);
+#endif
#endif
voodoo->disp_buffer = 0;
ai88[c].b = c & 0xff;
}
#ifndef NO_CODEGEN
+#if (defined WIN32 || defined WIN64)
voodoo_codegen_init(voodoo);
+#endif
#endif
voodoo->disp_buffer = 0;
free(voodoo->texture_cache[0][c].data);
}
#ifndef NO_CODEGEN
+#if (defined WIN32 || defined WIN64)
voodoo_codegen_close(voodoo);
+#endif
#endif
if (voodoo->type < VOODOO_BANSHEE && voodoo->fb_mem)
{
-
+#ifdef _WIN32
#include <intrin.h>
+#endif
#include <math.h>
#include <stddef.h>
#if (defined i386 || defined __i386 || defined __i386__ || defined _X86_ || defined WIN32 || defined _WIN32 || defined _WIN32) && !(defined __amd64__)
#include "vid_voodoo_codegen_x86.h"
-#elif (defined __amd64__)
+#elif (defined __amd64__ && defined WIN64)
#include "vid_voodoo_codegen_x86-64.h"
#else
int voodoo_recomp = 0;
}
#ifndef NO_CODEGEN
typedef uint8_t(__cdecl *VOODOO_DRAW)(voodoo_state_t*,voodoo_params_t*, int,int);
+#if (defined WIN32 || defined WIN64)
if (voodoo->use_recompiler)
voodoo_draw = (VOODOO_DRAW)voodoo_get_block(voodoo, params, state, odd_even);
else
+#endif
voodoo_draw = NULL;
#endif
#define TRACE(format, ...) write_log(_T("PPC: ") format, ## __VA_ARGS__)
-#ifdef WINUAE
+#ifdef WIN32
#define WIN32_SPINLOCK
#endif
PPCMemoryRegion regions[UAE_MEMORY_REGIONS_MAX];
UaeMemoryMap map;
+#ifdef DEBUGGER
uae_memory_map(&map);
+#endif
for (int i = 0; i < map.num_regions; i++) {
UaeMemoryRegion *r = &map.regions[i];
#include "sysdeps.h"
#include "uae/dlopen.h"
+#ifdef WITH_PPC
#include "uae/ppc.h"
+#endif
#include "uae/qemu.h"
UAE_DEFINE_IMPORT_FUNCTION(qemu_uae_version)
static void init_ppc(UAE_DLHANDLE handle)
{
+#ifdef WITH_PPC
UAE_IMPORT_FUNCTION(handle, qemu_uae_ppc_init);
UAE_IMPORT_FUNCTION(handle, qemu_uae_ppc_in_cpu_thread);
qemu_uae_ppc_init(model_s, hid1);
free(model_s);
}
+#endif
}
#ifdef WITH_QEMU_SLIRP
#include <stdint.h>
#include <stdio.h>
#include <string.h>
+#include "sysconfig.h"
+#ifdef DEBUGGER
extern void activate_debugger(void);
+#endif
//#define DEBUG_VGA_REG
//#define DEBUG_VGA
_stprintf(p->flashfile + _tcslen(p->flashfile), _T("%s.nvr"), rd->name);
clean_path(p->flashfile);
}
+#ifdef ARCADIA
if (rd->type & ROMTYPE_ALG) {
fetch_videopath(p->genlock_video_file, sizeof(p->genlock_video_file) / sizeof(TCHAR));
_stprintf(p->genlock_video_file + _tcslen(p->genlock_video_file), _T("%s.avi"), rd->name);
clean_path(p->genlock_video_file);
}
+#endif
return 1;
}
save_chunk (f, dst, len, _T("CD32"), 0);
xfree (dst);
#endif
+#ifdef ARCADIA
dst = save_alg(&len);
save_chunk(f, dst, len, _T("ALG "), 0);
xfree(dst);
+#endif
#ifdef CDTV
dst = save_cdtv (&len, NULL);
save_chunk (f, dst, len, _T("CDTV"), 0);
#include "uae/endian.h"
#include <stdint.h>
+#if defined __MACH__
+#include <machine/endian.h>
+#include <libkern/OSByteOrder.h>
+#define htobe16(x) OSSwapHostToBigInt16(x)
+#define htole16(x) OSSwapHostToLittleInt16(x)
+#define be16toh(x) OSSwapBigToHostInt16(x)
+#define le16toh(x) OSSwapLittleToHostInt16(x)
+#define htobe32(x) OSSwapHostToBigInt32(x)
+#define htole32(x) OSSwapHostToLittleInt32(x)
+#define be32toh(x) OSSwapBigToHostInt32(x)
+#define le32toh(x) OSSwapLittleToHostInt32(x)
+#define htobe64(x) OSSwapHostToBigInt64(x)
+#define htole64(x) OSSwapHostToLittleInt64(x)
+#define be64toh(x) OSSwapBigToHostInt64(x)
+#define le64toh(x) OSSwapLittleToHostInt64(x)
+#endif
#define MAX_REVS 5
#include "zfile.h"
#include "memory.h"
#include "threaddep/thread.h"
+#ifdef A2091
#include "a2091.h"
+#endif
#include "fsdb.h"
int log_tapeemu = 1;
#include "specialmonitors.h"
#include "debug.h"
#include "zfile.h"
+#ifdef VIDEOGRAB
#include "videograb.h"
+#endif
#include "arcadia.h"
-#define VIDEOGRAB 1
+// We have this in sysconfig.h
+//#define VIDEOGRAB 1
const TCHAR *specialmonitorfriendlynames[] =
{
uae_u8 *genlock_image = NULL;
-#if VIDEOGRAB
+#ifdef VIDEOGRAB
if (currprefs.genlock_image == 5) {
genlock_blank = false;
if ((!genlock_video && !genlock_error) || _tcsicmp(_T(":CAPTURE:"), genlock_video_file)) {
xfree(genlock_image_data);
genlock_image_data = NULL;
}
-#if VIDEOGRAB
+#ifdef VIDEOGRAB
if (genlock_video && currprefs.genlock_image != 4 && currprefs.genlock_image != 5 && currprefs.genlock_image < 6) {
uninitvideograb();
genlock_video = false;
{
if (!currprefs.monitoremu)
return;
+#ifdef VIDEOGRAB
uninitvideograb();
+#endif
specialmonitor_store_fmode(-1, -1, 0);
fc24_reset();
}
#ifndef OS_NAME
#define OS_NAME _T("windows")
#endif
+#else
+#ifdef __MACH__
+#ifndef OS_NAME
+#define OS_NAME _T("macos")
+#endif
+#else
+#ifndef OS_NAME
+#define OS_NAME _T("linux")
+#endif
+#endif
#endif
#if defined(__x86_64__) || defined(_M_AMD64) || defined(_M_X64)
#define ARCH_NAME _T("x86")
#elif defined(__ppc__)
#define ARCH_NAME _T("ppc")
+#elif defined(__arm__)
+ #define ARCH_NAME _T("arm")
#else
#define ARCH_NAME _T("unknown")
#endif
#include <sys/sysctl.h>
#endif
-#if defined(LINUX) && defined(CPU_x86_64)
+//#if defined(LINUX) && defined(CPU_x86_64)
+#if defined(CPU_x86_64) && !defined(__APPLE__)
#define HAVE_MAP_32BIT 1
#endif
int mmap_prot = protect_to_native(protect);
#endif
-#ifndef CPU_64_BIT
+#if !defined(CPU_64_BIT) or defined(__APPLE__)
flags &= ~UAE_VM_32BIT;
#endif
if (flags & UAE_VM_32BIT) {
#include "sysconfig.h"
#include "sysdeps.h"
+#ifdef WITH_X86
+
#include "options.h"
#include "custom.h"
#include "memory.h"
xb->irq_callback = irq_callback;
floppy_hardreset();
}
+
+#endif //WITH_X86
#include "diskutil.h"
#include "fdi2raw.h"
#include "uae/io.h"
+// OS X does not have off64_t, fopen64, fseeko64 or ftello64, the functions are already 64bit
+#ifdef __MACH__
+# define off64_t off_t
+# define fopen64 fopen
+# define fseeko64 fseeko
+# define ftello64 ftello
+#endif
#include "archivers/zip/unzip.h"
#include "archivers/dms/pfile.h"
static SRes SzFileReadImp (void *object, void *buffer, size_t *size)
{
CFileInStream *s = (CFileInStream *)object;
+#ifdef _WIN32
struct zfile *zf = (struct zfile*)s->file.myhandle;
+#else
+ struct zfile *zf = (struct zfile*)s->file.file;
+#endif
*size = zfile_fread (buffer, 1, *size, zf);
return SZ_OK;
}
static SRes SzFileSeekImp(void *object, Int64 *pos, ESzSeek origin)
{
CFileInStream *s = (CFileInStream *)object;
+#ifdef _WIN32
struct zfile *zf = (struct zfile*)s->file.myhandle;
+#else
+ struct zfile *zf =(struct zfile*) s->file.file;
+#endif
int org = 0;
switch (origin)
{
ctx->blockIndex = 0xffffffff;
ctx->archiveStream.s.Read = SzFileReadImp;
ctx->archiveStream.s.Seek = SzFileSeekImp;
+#ifdef _WIN32
ctx->archiveStream.file.myhandle = (void*)z;
+#else
+ ctx->archiveStream.file.file = (FILE*)z;
+#endif
LookToRead_CreateVTable (&ctx->lookStream, False);
ctx->lookStream.realStream = &ctx->archiveStream.s;
LookToRead_Init (&ctx->lookStream);
projects / francis / winuae.git / commitdiff