*/
-static void exception3f(uae_u32 opcode, uaecptr addr, bool writeaccess, bool instructionaccess, bool notinstruction, uaecptr pc, int size, bool plus2, int fc);
+static void exception3f(uae_u32 opcode, uaecptr addr, bool writeaccess, bool instructionaccess, bool notinstruction, uaecptr pc, int size, int fc);
static int iack_cycle(int nr)
{
#endif /* SAVESTATE */
-static void exception3f (uae_u32 opcode, uaecptr addr, bool writeaccess, bool instructionaccess, bool notinstruction, uaecptr pc, int size, bool plus2, int fc)
+static void exception3f (uae_u32 opcode, uaecptr addr, bool writeaccess, bool instructionaccess, bool notinstruction, uaecptr pc, int size, int fc)
{
if (currprefs.cpu_model >= 68040)
addr &= ~1;
last_addr_for_exception_3 = pc;
} else if (pc == 0xffffffff) {
last_addr_for_exception_3 = m68k_getpc ();
- if (plus2)
- last_addr_for_exception_3 += 2;
} else {
last_addr_for_exception_3 = pc;
}
void exception3_notinstruction(uae_u32 opcode, uaecptr addr)
{
last_di_for_exception_3 = 1;
- exception3f (opcode, addr, true, false, true, 0xffffffff, 1, false, -1);
+ exception3f (opcode, addr, true, false, true, 0xffffffff, 1, -1);
}
static void exception3_read_special(uae_u32 opcode, uaecptr addr, int size, int fc)
{
- exception3f(opcode, addr, false, 0, false, 0xffffffff, size, false, fc);
+ exception3f(opcode, addr, false, 0, false, 0xffffffff, size, fc);
}
// Some hardware accepts address error aborted reads or writes as normal reads/writes.
{
x_do_cycles(4 * cpucycleunit);
last_di_for_exception_3 = 0;
- exception3f(opcode, addr, false, true, false, m68k_getpc(), sz_word, false, -1);
+ exception3f(opcode, addr, false, true, false, m68k_getpc(), sz_word, -1);
}
void exception3_read_opcode(uae_u32 opcode, uaecptr addr, int size, int fc)
{
opcode = regs.ir;
}
last_di_for_exception_3 = 1;
- exception3f(opcode, addr, false, ia, ni, 0xffffffff, size, false, fc);
+ exception3f(opcode, addr, false, ia, ni, 0xffffffff, size, fc);
}
void exception3_write(uae_u32 opcode, uaecptr addr, int size, uae_u32 val, int fc)
{
opcode = regs.ir;
}
last_di_for_exception_3 = 1;
- exception3f(opcode, addr, true, ia, ni, 0xffffffff, size, false, fc);
+ exception3f(opcode, addr, true, ia, ni, 0xffffffff, size, fc);
regs.write_buffer = val;
}