]> git.unchartedbackwaters.co.uk Git - francis/winuae.git/commitdiff
JIT: merged flags code and gencomp code
authorFrode Solheim <frode@fs-uae.net>
Mon, 7 Sep 2015 19:13:07 +0000 (21:13 +0200)
committerFrode Solheim <frode@fs-uae.net>
Thu, 17 Sep 2015 17:18:09 +0000 (19:18 +0200)
jit/codegen_x86.cpp
jit/compemu_midfunc_x86.cpp
jit/compemu_midfunc_x86.h
jit/compemu_support.cpp
jit/gencomp.cpp

index 968881821317f7f50d76af3b8abf06ee9ec87c42..8f63d64d64566fc261d118fd24731a8040a13179 100644 (file)
@@ -3140,8 +3140,8 @@ static inline void raw_flags_evicted(int r)
        live.nat[r].nholds=0;
 }
 
-#define FLAG_NREG1 0  /* Set to -1 if any register will do */
-static inline void raw_flags_to_reg(int r)
+#define FLAG_NREG1_FLAGREG 0  /* Set to -1 if any register will do */
+static inline void raw_flags_to_reg_FLAGREG(int r)
 {
        raw_lahf(0);  /* Most flags in AH */
        //raw_setcc(r,0); /* V flag in AL */
@@ -3154,13 +3154,41 @@ static inline void raw_flags_to_reg(int r)
 #endif
 }
 
-#define FLAG_NREG2 0  /* Set to -1 if any register will do */
-static inline void raw_reg_to_flags(int r)
+#define FLAG_NREG2_FLAGREG 0  /* Set to -1 if any register will do */
+static inline void raw_reg_to_flags_FLAGREG(int r)
 {
        raw_cmp_b_ri(r,-127); /* set V */
        raw_sahf(0);
 }
 
+#define FLAG_NREG3_FLAGREG 0  /* Set to -1 if any register will do */
+static __inline__ void raw_flags_set_zero_FLAGREG(int s, int tmp)
+{
+    raw_mov_l_rr(tmp,s);
+    raw_lahf(s); /* flags into ah */
+    raw_and_l_ri(s,0xffffbfff);
+    raw_and_l_ri(tmp,0x00004000);
+    raw_xor_l_ri(tmp,0x00004000);
+    raw_or_l(s,tmp);
+    raw_sahf(s);
+}
+
+static inline void raw_flags_init_FLAGREG(void) { }
+
+#define FLAG_SUFFIX FLAGREG
+
+#define FLAG_GLUE_2(x, y)              x ## _ ## y
+#define FLAG_GLUE_1(x, y)              FLAG_GLUE_2(x, y)
+#define FLAG_GLUE(x)                   FLAG_GLUE_1(x, FLAG_SUFFIX)
+
+#define raw_flags_init                 FLAG_GLUE(raw_flags_init)
+#define FLAG_NREG1                             FLAG_GLUE(FLAG_NREG1)
+#define raw_flags_to_reg               FLAG_GLUE(raw_flags_to_reg)
+#define FLAG_NREG2                             FLAG_GLUE(FLAG_NREG2)
+#define raw_reg_to_flags               FLAG_GLUE(raw_reg_to_flags)
+#define FLAG_NREG3                             FLAG_GLUE(FLAG_NREG3)
+#define raw_flags_set_zero             FLAG_GLUE(raw_flags_set_zero)
+
 /* Apparently, there are enough instructions between flag store and
 flag reload to avoid the partial memory stall */
 static inline void raw_load_flagreg(uae_u32 target, uae_u32 r)
index 347089f882af23cd4ca2b36164620e6a094dea30..d5fa80136c2b8c8934e2995458c9ad55d427cf16 100644 (file)
@@ -750,7 +750,7 @@ MIDFUNC(3,cmov_l_rr,(RW4 d, RR4 s, IMM cc))
        unlock2(d);
 }
 MENDFUNC(3,cmov_l_rr,(RW4 d, RR4 s, IMM cc))
-
+/*
 MIDFUNC(1,setzflg_l,(RW4 r))
 {
        if (setzflg_uses_bsf) {
@@ -776,7 +776,7 @@ MIDFUNC(1,setzflg_l,(RW4 r))
        }
 }
 MENDFUNC(1,setzflg_l,(RW4 r))
-
+*/
 MIDFUNC(3,cmov_l_rm,(RW4 d, IMM s, IMM cc))
 {
        CLOBBER_CMOV;
@@ -807,9 +807,6 @@ MENDFUNC(2,bsf_l_rr,(W4 d, RR4 s))
 MENDFUNC(2,bsf_l_rr,(W4 d, W4 s))
 #endif
 
-#ifdef UAE
-/* FIXME: enable */
-#else
 /* Set the Z flag depending on the value in s. Note that the
    value has to be 0 or -1 (or, more precisely, for non-zero
    values, bit 14 must be set)! */
@@ -823,7 +820,6 @@ MIDFUNC(2,simulate_bsf,(W4 tmp, RW4 s))
     unlock2(s);
 }
 MENDFUNC(2,simulate_bsf,(W4 tmp, RW4 s))
-#endif
 
 MIDFUNC(2,imul_32_32,(RW4 d, RR4 s))
 {
index 6ea19a1060b212d88e1e205f130935bb1c9127dc..d3bda8a7a702501e8f6cb9a3833d7e4c4e85408d 100644 (file)
@@ -81,7 +81,6 @@ DECLARE_MIDFUNC(setcc_m(IMM d, IMM cc));
 DECLARE_MIDFUNC(cmov_b_rr(RW1 d, RR1 s, IMM cc));
 DECLARE_MIDFUNC(cmov_w_rr(RW2 d, RR2 s, IMM cc));
 DECLARE_MIDFUNC(cmov_l_rr(RW4 d, RR4 s, IMM cc));
-DECLARE_MIDFUNC(setzflg_l(RW4 r));
 DECLARE_MIDFUNC(cmov_l_rm(RW4 d, IMM s, IMM cc));
 DECLARE_MIDFUNC(bsf_l_rr(W4 d, RR4 s));
 DECLARE_MIDFUNC(pop_m(IMM d));
index 8ed559f79fec2d9daea699c1fd432ceb3afef3bb..37c22f494abd9addc8ad8779b1adb9f8fddadbc5 100644 (file)
@@ -2314,9 +2314,6 @@ static void fflags_into_flags_internal(uae_u32 tmp)
  * Support functions exposed to gencomp. CREATE time                *
  ********************************************************************/
 
-#ifdef UAE
-/* FIXME: implement */
-#else
 void set_zero(int r, int tmp)
 {
     if (setzflg_uses_bsf)
@@ -2324,7 +2321,6 @@ void set_zero(int r, int tmp)
     else
        simulate_bsf(tmp,r);
 }
-#endif
 
 int kill_rodent(int r)
 {
index 98780cf55669d7ef29a948efa3d5335b63b3d135..386cae96c213567575c4cfd363bdef58739e3991 100644 (file)
@@ -1184,7 +1184,7 @@ genflags (flagtypes type, wordsizes size, const char *value, const char *src, co
                      "\tint one=scratchie++;\n"
                      "\tif (needed_flags&FLAG_Z) {\n"
                      "\tmov_l_ri(zero,0);\n"
-                     "\tmov_l_ri(one,1);\n"
+                     "\tmov_l_ri(one,-1);\n"
                      "\tmake_flags_live();\n"
                      "\tcmov_l_rr(zero,one,%d);\n"
                      "\t}\n",NATIVE_CC_NE);
@@ -1207,7 +1207,7 @@ genflags (flagtypes type, wordsizes size, const char *value, const char *src, co
            comprintf("\tlive_flags();\n");
            comprintf("\tif (needed_flags&FLAG_Z) {\n"
                      "\tcmov_l_rr(zero,one,%d);\n"
-                     "\tsetzflg_l(zero);\n"
+                     "\tset_zero(zero, one);\n" /* No longer need one */
                      "\tlive_flags();\n"
                      "\t}\n",NATIVE_CC_NE);
            comprintf("\tend_needflags();\n");
@@ -1267,6 +1267,7 @@ gen_opcode (unsigned long int opcode)
      case sz_long: ssize="l"; break;
      default: abort();
     }
+    (void)ssize;
 
     switch (curi->mnemo)
     {
@@ -1364,6 +1365,7 @@ gen_opcode (unsigned long int opcode)
        genastore ("dst", curi->smode, "srcreg", curi->size, "src");
        break;
      case i_NEGX:
+       isaddx;
        genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
        start_brace ();
        comprintf("\tint dst=scratchie++;\n");
@@ -1404,6 +1406,7 @@ gen_opcode (unsigned long int opcode)
        genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
        start_brace();
        comprintf("\tint s=scratchie++;\n"
+                 "\tint tmp=scratchie++;\n"
                  "\tmov_l_rr(s,src);\n");
        if (curi->size == sz_byte)
            comprintf("\tand_l_ri(s,7);\n");
@@ -1427,7 +1430,7 @@ gen_opcode (unsigned long int opcode)
                                  "\tdont_care_flags();\n",op);
                if (!noflags) {
                  comprintf("\tstart_needflags();\n"
-                                       "\tsetzflg_l(s);\n"
+                                       "\tset_zero(s,tmp);\n"
                                        "\tlive_flags();\n"
                                        "\tend_needflags();\n");
                }
@@ -1435,43 +1438,7 @@ gen_opcode (unsigned long int opcode)
                genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
        }
        break;
-       /*if (!noflags) {
-           failure;
-           break;
-       }
-       genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
-       genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0);
-       start_brace();
-       comprintf("\tint s=scratchie++;\n"
-                 "\tmov_l_rr(s,src);\n");
-       if (curi->size == sz_byte)
-           comprintf("\tand_l_ri(s,7);\n");
-       else
-           comprintf("\tand_l_ri(s,31);\n");
 
-       {
-           char* op;
-           int need_write=1;
-
-           switch(curi->mnemo) {
-            case i_BCHG: op="btc"; break;
-            case i_BCLR: op="btr"; break;
-            case i_BSET: op="bts"; break;
-            case i_BTST: op="bt"; need_write=0; break;
-           }
-           comprintf("\t%s_l_rr(dst,s);\n"  // Answer now in C
-                     "\tsbb_l(s,s);\n" // s is 0 if bit was 0,  -1 otherwise
-                     "\tmake_flags_live();\n" // Get the flags back
-                     "\tdont_care_flags();\n"
-                     "\tstart_needflags();\n"
-                     "\tbsf_l_rr(s,s);\n"
-                     "\tlive_flags();\n"
-                     "\tend_needflags();\n",op);
-           if (need_write)
-               genastore ("dst", curi->dmode, "dstreg", curi->size, "dst");
-       }
-       break;
-*/
      case i_CMPM:
      case i_CMP:
        genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
@@ -1622,7 +1589,6 @@ gen_opcode (unsigned long int opcode)
        start_brace();
        comprintf("\tint newad=scratchie++;\n"
                  "\treadlong(15,newad,scratchie);\n"
-                 "\tand_l_ri(newad,~1);\n"
                  "\tmov_l_mr((uintptr)&regs.pc,newad);\n"
                  "\tget_n_addr_jmp(newad,PC_P,scratchie);\n"
                  "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
@@ -1652,7 +1618,6 @@ gen_opcode (unsigned long int opcode)
      case i_RTS:
        comprintf("\tint newad=scratchie++;\n"
                  "\treadlong(15,newad,scratchie);\n"
-                 "\tand_l_ri(newad,~1);\n"
                  "\tmov_l_mr((uintptr)&regs.pc,newad);\n"
                  "\tget_n_addr_jmp(newad,PC_P,scratchie);\n"
                  "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
@@ -1678,8 +1643,7 @@ gen_opcode (unsigned long int opcode)
                  "\tmov_l_ri(ret,retadd);\n"
                  "\tsub_l_ri(15,4);\n"
                  "\twritelong_clobber(15,ret,scratchie);\n");
-       comprintf("\tand_l_ri(srca,~1);\n"
-                 "\tmov_l_mr((uintptr)&regs.pc,srca);\n"
+       comprintf("\tmov_l_mr((uintptr)&regs.pc,srca);\n"
                  "\tget_n_addr_jmp(srca,PC_P,scratchie);\n"
                  "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
                  "\tm68k_pc_offset=0;\n");
@@ -1688,19 +1652,15 @@ gen_opcode (unsigned long int opcode)
      case i_JMP:
        isjump;
        genamode (curi->smode, "srcreg", curi->size, "src", 0, 0);
-       comprintf("\tand_l_ri(srca,~1);\n"
-                 "\tmov_l_mr((uintptr)&regs.pc,srca);\n"
+       comprintf("\tmov_l_mr((uintptr)&regs.pc,srca);\n"
                  "\tget_n_addr_jmp(srca,PC_P,scratchie);\n"
                  "\tmov_l_mr((uintptr)&regs.pc_oldp,PC_P);\n"
                  "\tm68k_pc_offset=0;\n");
        gen_update_next_handler();
        break;
      case i_BSR:
-       if (curi->size==sz_long)
-           failure;
        is_const_jump;
        genamode (curi->smode, "srcreg", curi->size, "src", 1, 0);
-       comprintf("\tand_l_ri(src,~1);\n");
        start_brace();
        comprintf("\tuae_u32 retadd=start_pc+((char *)comp_pc_p-(char *)start_pc_p)+m68k_pc_offset;\n");
        comprintf("\tint ret=scratchie++;\n"
@@ -1722,7 +1682,6 @@ gen_opcode (unsigned long int opcode)
         case sz_word: comprintf("\tsign_extend_16_rr(src,src);\n"); break;
         case sz_long: break;
        }
-       comprintf("\tand_l_ri(src,~1);\n");
        comprintf("\tsub_l_ri(src,m68k_pc_offset-m68k_pc_offset_thisinst-2);\n");
        /* Leave the following as "add" --- it will allow it to be optimized
           away due to src being a constant ;-) */
@@ -2416,6 +2375,18 @@ gen_opcode (unsigned long int opcode)
        break;
 
      case i_LSL:
+       mayfail;
+       if (curi->smode==Dreg) {
+               comprintf("if ((uae_u32)srcreg==(uae_u32)dstreg) {\n"
+                               "  FAIL(1);\n"
+#ifdef UAE
+                               "  return 0;\n"
+#else
+                               "  return;\n"
+#endif
+                               "} \n");
+               start_brace();
+       }
        comprintf("\tdont_care_flags();\n");
 
        genamode (curi->smode, "srcreg", curi->size, "cnt", 1, 0);
@@ -3146,7 +3117,6 @@ generate_func (int noflags)
                 "#define PART_7 1\n"
                 "#define PART_8 1\n"
                 "#endif\n\n"
-                "extern void setzflg_l(uae_u32);\n"
                 "extern void comp_fpp_opp();\n"
                 "extern void comp_fscc_opp();\n"
                 "extern void comp_fbcc_opp();\n\n");