return false;
}
-bool mmu_op30_pmove (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra)
+int mmu_op30_pmove(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra)
{
int preg = (next >> 10) & 31;
int rw = (next >> 9) & 1;
int unused = (next & 0xff);
if (mmu_op30_invea(opcode))
- return true;
+ return 1;
// unused low 8 bits must be zeroed
if (unused)
- return true;
+ return 1;
// read and fd set?
if (rw && fd)
- return true;
+ return 1;
#if MMU030_OP_DBG_MSG
switch (preg) {
else {
tc_030 = x_get_long (extra);
if (mmu030_decode_tc(tc_030, true))
- return true;
+ return -1;
}
break;
case 0x12: // SRP
srp_030 = (uae_u64)x_get_long (extra) << 32;
srp_030 |= x_get_long (extra + 4);
if (mmu030_decode_rp(srp_030))
- return true;
+ return -1;
}
break;
case 0x13: // CRP
crp_030 = (uae_u64)x_get_long (extra) << 32;
crp_030 |= x_get_long (extra + 4);
if (mmu030_decode_rp(crp_030))
- return true;
+ return -1;
}
break;
case 0x18: // MMUSR
if (fd) {
// FD must be always zero when MMUSR read or write
- return true;
+ return 1;
}
if (rw)
x_put_word (extra, mmusr_030);
break;
default:
write_log (_T("Bad PMOVE at %08x\n"),m68k_getpc());
- return true;
+ return 1;
}
if (!fd && !rw && preg != 0x18) {
mmu030_flush_atc_all();
}
tt_enabled = (tt0_030 & TT_ENABLE) || (tt1_030 & TT_ENABLE);
- return false;
+ return 0;
}
bool mmu_op30_ptest (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra)
void mmu030_page_fault(uaecptr addr, bool read, int flags, uae_u32 fc);
-bool mmu_op30_pmove (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
-bool mmu_op30_ptest (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
-bool mmu_op30_pflush (uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
+int mmu_op30_pmove(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
+bool mmu_op30_ptest(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
+bool mmu_op30_pflush(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra);
typedef struct {
uae_u32 addr_base;
}
// 68030 (68851) MMU instructions only
-bool mmu_op30 (uaecptr pc, uae_u32 opcode, uae_u16 extra, uaecptr extraa)
+bool mmu_op30(uaecptr pc, uae_u32 opcode, uae_u16 extra, uaecptr extraa)
{
int type = extra >> 13;
- bool fline = false;
+ int fline = 0;
switch (type)
{
case 2:
case 3:
if (currprefs.mmu_model)
- fline = mmu_op30_pmove (pc, opcode, extra, extraa);
+ fline = mmu_op30_pmove(pc, opcode, extra, extraa);
else
- fline = mmu_op30fake_pmove (pc, opcode, extra, extraa);
+ fline = mmu_op30fake_pmove(pc, opcode, extra, extraa);
break;
case 1:
if (currprefs.mmu_model)
- fline = mmu_op30_pflush (pc, opcode, extra, extraa);
+ fline = mmu_op30_pflush(pc, opcode, extra, extraa);
else
- fline = mmu_op30fake_pflush (pc, opcode, extra, extraa);
+ fline = mmu_op30fake_pflush(pc, opcode, extra, extraa);
break;
case 4:
if (currprefs.mmu_model)
- fline = mmu_op30_ptest (pc, opcode, extra, extraa);
+ fline = mmu_op30_ptest(pc, opcode, extra, extraa);
else
- fline = mmu_op30fake_ptest (pc, opcode, extra, extraa);
+ fline = mmu_op30fake_ptest(pc, opcode, extra, extraa);
break;
}
- if (fline) {
+ if (fline > 0) {
m68k_setpc(pc);
op_illg(opcode);
}
- return fline;
+ return fline != 0;
}
/* check if an address matches a ttr */