FPU instructions never have EA in both source and destination, don't need 2 mmufixup...

diff --git a/fpp.cpp b/fpp.cpp
index 1a3a1d6419ca19772eebc6886a62282dc39d87bd..5044d7472d0a309f3bc5128ab6f7dc4d7fbfc459 100644 (file)
--- a/fpp.cpp
+++ b/fpp.cpp
@@ -1012,8 +1012,8 @@ static int put_fp_value (fpdata *value, uae_u32 opcode, uae_u16 extra, uaecptr o
                        break;
                case 3:
                        if (currprefs.mmu_model) {
-                               mmufixup[1].reg = reg;
-                               mmufixup[1].value = m68k_areg (regs, reg);
+                               mmufixup[0].reg = reg;
+                               mmufixup[0].value = m68k_areg (regs, reg);
                                fpu_mmu_fixup = true;
                        }
                        ad = m68k_areg (regs, reg);
@@ -1021,8 +1021,8 @@ static int put_fp_value (fpdata *value, uae_u32 opcode, uae_u16 extra, uaecptr o
                        break;
                case 4:
                        if (currprefs.mmu_model) {
-                               mmufixup[1].reg = reg;
-                               mmufixup[1].value = m68k_areg (regs, reg);
+                               mmufixup[0].reg = reg;
+                               mmufixup[0].value = m68k_areg (regs, reg);
                                fpu_mmu_fixup = true;
                        }
                        m68k_areg (regs, reg) -= reg == 7 ? sz2[size] : sz1[size];
@@ -2370,7 +2370,6 @@ void fpuop_arithmetic (uae_u32 opcode, uae_u16 extra)
        fpuop_arithmetic2 (opcode, extra);
        if (fpu_mmu_fixup) {
                mmufixup[0].reg = -1;
-               mmufixup[1].reg = -1;
        }
 #if 0
        // Any exception status bit and matching exception enable bits set?