2700b5

diff --git a/blkdev_cdimage.cpp b/blkdev_cdimage.cpp
index c73528f2b2af2ea76c878f84b10f0411e0447f78..f0bb1524eadb145c6375795e0ae3a4ce23ff4c4b 100644 (file)
--- a/blkdev_cdimage.cpp
+++ b/blkdev_cdimage.cpp
@@ -387,7 +387,8 @@ static void *cdda_play_func (void *v)
        int bufnum;
        int bufon[2];
        int oldplay;
-       int idleframes;
+       int idleframes = 0;
+       int silentframes = 0;
        bool foundsub;
        struct cdunit *cdu = (struct cdunit*)v;
        int oldtrack = -1;
@@ -409,6 +410,7 @@ static void *cdda_play_func (void *v)
                        struct _timeb tb1, tb2;
 
                        idleframes = 0;
+                       silentframes = 0;
                        foundsub = false;
                        _ftime (&tb1);
                        cdda_pos = cdu->cdda_start;
@@ -416,7 +418,8 @@ static void *cdda_play_func (void *v)
                        sector = cdu->cd_last_pos = cdda_pos;
                        t = findtoc (cdu, &sector);
                        if (!t) {
-                               t = findtoc (cdu, &sector + 2 * 75);
+                               sector = cdu->cd_last_pos = cdda_pos + 2 * 75;
+                               t = findtoc (cdu, &sector);
                                if (!t) {
                                        write_log (_T("IMAGE CDDA: illegal sector number %d\n"), cdu->cdda_start);
                                        setstate (cdu, AUDIO_STATUS_PLAY_ERROR);
@@ -475,6 +478,19 @@ static void *cdda_play_func (void *v)
                        if (idleframes >= 0 && diff < 0 && cdu->cdda_play > 0)
                                Sleep (-diff);
                        setstate (cdu, AUDIO_STATUS_IN_PROGRESS);
+
+                       sector = cdda_pos;
+                       struct cdtoc *t1 = findtoc (cdu, &sector);
+                       struct cdtoc *t2 = findtoc (cdu, &sector + 2 * 75);
+                       if (t1 != t2) {
+                               for (sector = cdda_pos; sector < cdda_pos + 2 * 75; sector++) {
+                                       int sec = sector;
+                                       t = findtoc (cdu, &sec);
+                                       if (t == t2)
+                                               break;
+                                       silentframes++;
+                               }
+                       }
                }
 
                cda->wait(bufnum);
@@ -539,10 +555,14 @@ static void *cdda_play_func (void *v)
                                        getsub_deinterleaved (subbuf, cdu, t, cdda_pos);
                                }
 
-                               if (idleframes > 0) {
-                                       idleframes--;
+                               if (idleframes > 0 || silentframes > 0) {
+                                       if (idleframes > 0) {
+                                               idleframes--;
+                                               memset (subbuf, 0, SUB_CHANNEL_SIZE);
+                                       }
+                                       if (silentframes > 0)
+                                               silentframes--;
                                        memset (dst, 0, 2352);
-                                       memset (subbuf, 0, SUB_CHANNEL_SIZE);
                                }
 
                                if (cdda_pos < cdu->cdda_start && cdu->cdda_scan == 0)

diff --git a/cfgfile.cpp b/cfgfile.cpp
index 77cb6f295eda2869e1275f7390b46917d25188b9..bbcae93175b6a9d0b6dba5fc5e85876a47de6a51 100644 (file)
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -4832,6 +4832,7 @@ void default_prefs (struct uae_prefs *p, int type)
        p->ghostscript_parameters[0] = 0;
        p->uae_hide = 0;
        p->uae_hide_autoconfig = false;
+       p->jit_direct_compatible_memory = true;
 
        p->mountitems = 0;
        for (i = 0; i < MOUNT_CONFIG_SIZE; i++) {

diff --git a/expansion.cpp b/expansion.cpp
index 909172f9b12e8894b4fea58fd46d787a3e3316d2..59b1d25c3b019f788041f21c3d572ad14a8c49bf 100644 (file)
--- a/expansion.cpp
+++ b/expansion.cpp
@@ -362,33 +362,38 @@ static void REGPARAM2 expamem_wput (uaecptr addr, uae_u32 value)
                switch (addr & 0xff) {
                case 0x44:
                        if (expamem_type () == zorroIII) {
-                               uae_u32 p1, p2 = 0;
-                               // +Bernd Roesch & Toni Wilen
-                               p1 = get_word (regs.regs[11] + 0x20);
-                               if (expamem[0] & add_memory) {
-                                       // Z3 RAM expansion
-                                       p2 = 0;
-                                       while (!p2 && z3num < 2) {
-                                               if (z3num == 0 && currprefs.z3fastmem_size)
-                                                       p2 = z3fastmem_bank.start >> 16;
-                                               else if (z3num == 1 && currprefs.z3fastmem2_size)
-                                                       p2 = z3fastmem2_bank.start >> 16;
-                                               if (!p2)
-                                                       z3num++;
+                               if (currprefs.jit_direct_compatible_memory) {
+                                       uae_u32 p1, p2 = 0;
+                                       // +Bernd Roesch & Toni Wilen
+                                       p1 = get_word (regs.regs[11] + 0x20);
+                                       if (expamem[0] & add_memory) {
+                                               // Z3 RAM expansion
+                                               p2 = 0;
+                                               while (!p2 && z3num < 2) {
+                                                       if (z3num == 0 && currprefs.z3fastmem_size)
+                                                               p2 = z3fastmem_bank.start >> 16;
+                                                       else if (z3num == 1 && currprefs.z3fastmem2_size)
+                                                               p2 = z3fastmem2_bank.start >> 16;
+                                                       if (!p2)
+                                                               z3num++;
+                                               }
+                                               z3num++;
+                                       } else {
+                                               // Z3 P96 RAM
+                                               if (gfxmem_bank.start & 0xff000000)
+                                                       p2 = gfxmem_bank.start >> 16;
                                        }
-                                       z3num++;
+                                       put_word (regs.regs[11] + 0x20, p2);
+                                       put_word (regs.regs[11] + 0x28, p2);
+                                       // -Bernd Roesch
+                                       expamem_hi = p2;
+                                       (*card_map[ecard]) ();
+                                       if (p1 != p2)
+                                               write_log (_T("   Card %d remapped %04x0000 -> %04x0000\n"), ecard + 1, p1, p2);
                                } else {
-                                       // Z3 P96 RAM
-                                       if (gfxmem_bank.start & 0xff000000)
-                                               p2 = gfxmem_bank.start >> 16;
+                                       expamem_hi = value & 0xff00;
+                                       (*card_map[ecard]) ();
                                }
-                               put_word (regs.regs[11] + 0x20, p2);
-                               put_word (regs.regs[11] + 0x28, p2);
-                               // -Bernd Roesch
-                               expamem_hi = p2;
-                               (*card_map[ecard]) ();
-                               if (p1 != p2)
-                                       write_log (_T("   Card %d remapped %04x0000 -> %04x0000\n"), ecard + 1, p1, p2);
                                write_log (_T("   Card %d (Zorro%s) done.\n"), ecard + 1, expamem_type () == 0xc0 ? _T("II") : _T("III"));
                                expamem_next ();
                        }
@@ -869,16 +874,20 @@ static void expamem_map_z3fastmem_2 (addrbank *bank, uaecptr *startp, uae_u32 si
        int z3fs = ((expamem_hi | (expamem_lo >> 4)) << 16);
        int start = *startp;
 
-       if (z3fs) {
-               if (start != z3fs) {
+       if (currprefs.jit_direct_compatible_memory) {
+               if (z3fs && start != z3fs) {
                        write_log (_T("WARNING: Z3MEM mapping changed from $%08x to $%08x\n"), start, z3fs);
                        map_banks (&dummy_bank, start >> 16, size >> 16, allocated);
                        *startp = z3fs;
                        map_banks (bank, start >> 16, size >> 16, allocated);
                }
-               write_log (_T("Z3MEM (32bit): mapped @$%08x: %d MB Zorro III %s memory \n"),
-                       start, allocated / 0x100000, chip ? _T("chip") : _T("fast"));
+       } else {
+               map_banks (bank, z3fs >> 16, size >> 16, allocated);
+               start = z3fs;
+               *startp = z3fs;
        }
+       write_log (_T("Z3MEM (32bit): mapped @$%08x: %d MB Zorro III %s memory \n"),
+                       start, allocated / 0x100000, chip ? _T("chip") : _T("fast"));
 }
 
 static void expamem_map_z3fastmem (void)
@@ -1370,12 +1379,14 @@ void expamem_reset (void)
                card_name[cardno] = _T("Z3Fast");
                card_init[cardno] = expamem_init_z3fastmem;
                card_map[cardno++] = expamem_map_z3fastmem;
-               map_banks (&z3fastmem_bank, z3fastmem_bank.start >> 16, currprefs.z3fastmem_size >> 16, z3fastmem_bank.allocated);
+               if (currprefs.jit_direct_compatible_memory)
+                       map_banks (&z3fastmem_bank, z3fastmem_bank.start >> 16, currprefs.z3fastmem_size >> 16, z3fastmem_bank.allocated);
                if (z3fastmem2_bank.baseaddr != NULL) {
                        card_name[cardno] = _T("Z3Fast2");
                        card_init[cardno] = expamem_init_z3fastmem2;
                        card_map[cardno++] = expamem_map_z3fastmem2;
-                       map_banks (&z3fastmem2_bank, z3fastmem2_bank.start >> 16, currprefs.z3fastmem2_size >> 16, z3fastmem2_bank.allocated);
+                       if (currprefs.jit_direct_compatible_memory)
+                               map_banks (&z3fastmem2_bank, z3fastmem2_bank.start >> 16, currprefs.z3fastmem2_size >> 16, z3fastmem2_bank.allocated);
                }
        }
        if (z3chipmem_bank.baseaddr != NULL)

diff --git a/gencpu.cpp b/gencpu.cpp
index 4a74c41e59604d893f71c2a6c4bc4bf8c5bc0dea..2d631e1a93d82f1067a3c499f260a0c226ba37e3 100644 (file)
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -769,17 +769,17 @@ static void genamode2 (amodes mode, char *reg, wordsizes size, char *name, int g
                insn_n_cycles020++;
                switch (size) {
                case sz_byte:
-                       addcycles_ce020 (2);
+                       addcycles_ce020 (2 + 2);
                        printf ("\tuae_s8 %s = %s;\n", name, gen_nextibyte (flags));
                        count_read_ea++;
                        break;
                case sz_word:
-                       addcycles_ce020 (2);
+                       addcycles_ce020 (2 + 2);
                        printf ("\tuae_s16 %s = %s;\n", name, gen_nextiword (flags));
                        count_read_ea++;
                        break;
                case sz_long:
-                       addcycles_ce020 (4);
+                       addcycles_ce020 (4 + 2);
                        gen_nextilong ("uae_s32", name, flags);
                        count_read_ea += 2;
                        break;
@@ -2158,6 +2158,7 @@ static void gen_opcode (unsigned long int opcode)
                fill_prefetch_next ();
                if (curi->size == sz_long && isreg (curi->smode))
                        addcycles000 (4);
+               addcycles_ce020 (isreg (curi->smode) ? 2 : 12);
                start_brace ();
                printf ("\tuae_u32 newv = dst - src - (GET_XFLG () ? 1 : 0);\n");
                genflags (flag_subx, curi->size, "newv", "src", "dst");
@@ -2189,8 +2190,12 @@ static void gen_opcode (unsigned long int opcode)
                        genflags (flag_zn, curi->size, "newv", "", "");
                        printf ("\tSET_VFLG ((tmp_newv & 0x80) != 0 && (newv & 0x80) == 0);\n");
                }
-               if (isreg (curi->smode))
+               if (isreg (curi->smode)) {
                        addcycles000 (2);
+                       addcycles_ce020 (4);
+               } else {
+                       addcycles_ce020 (16);
+               }
                genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
                break;
        case i_ADD:
@@ -2244,6 +2249,7 @@ static void gen_opcode (unsigned long int opcode)
                fill_prefetch_next ();
                if (curi->size == sz_long && isreg (curi->smode))
                        addcycles000 (4);
+               addcycles_ce020 (isreg (curi->smode) ? 2 : 12);
                start_brace ();
                printf ("\tuae_u32 newv = dst + src + (GET_XFLG () ? 1 : 0);\n");
                genflags (flag_addx, curi->size, "newv", "src", "dst");
@@ -2277,8 +2283,12 @@ static void gen_opcode (unsigned long int opcode)
                        genflags (flag_zn, curi->size, "newv", "", "");
                        printf ("\tSET_VFLG ((tmp_newv & 0x80) == 0 && (newv & 0x80) != 0);\n");
                }
-               if (isreg (curi->smode))
+               if (isreg (curi->smode)) {
                        addcycles000 (2);
+                       addcycles_ce020 (4);
+               } else {
+                       addcycles_ce020 (16);
+               }
                genastore ("newv", curi->dmode, "dstreg", curi->size, "dst");
                break;
        case i_NEG:
@@ -2398,6 +2408,7 @@ static void gen_opcode (unsigned long int opcode)
                genamode (curi->smode, "srcreg", curi->size, "src", 1, 0, GF_AA);
                genamode (curi->dmode, "dstreg", curi->size, "dst", 1, 0, GF_AA);
                fill_prefetch_next ();
+               addcycles_ce020 (9);
                start_brace ();
                genflags (flag_cmp, curi->size, "newv", "src", "dst");
                break;
@@ -2415,6 +2426,7 @@ static void gen_opcode (unsigned long int opcode)
                genamode (curi->dmode, "dstreg", sz_long, "dst", 1, 0, 0);
                fill_prefetch_next ();
                addcycles000 (4);
+               addcycles_ce020 (4);
                start_brace ();
                genflags (flag_cmp, sz_long, "newv", "src", "dst");
                break;
@@ -2532,6 +2544,7 @@ static void gen_opcode (unsigned long int opcode)
                // confirmed
                genamode (curi->smode, "srcreg", sz_long, "src", 1, 0, 0);
                fill_prefetch_next ();
+               addcycles_ce020 (4);
                start_brace ();
                switch (curi->size) {
                case sz_byte: printf ("\tuae_u32 dst = (uae_s32)(uae_s8)src;\n"); break;

diff --git a/gfxboard.cpp b/gfxboard.cpp
index 89e1c4438e68651926cf0d3fb0c9341141cd7b0c..ed5afeca86eb7af3d956ca8d393241a23aa52317 100644 (file)
--- a/gfxboard.cpp
+++ b/gfxboard.cpp
@@ -15,6 +15,9 @@
 #define MEMDEBUGTEST 0x280000
 #define PICASSOIV_DEBUG_IO 0
 
+#define BYTESWAP_WORD -1
+#define BYTESWAP_LONG 1
+
 #include "sysconfig.h"
 #include "sysdeps.h"
 
@@ -69,6 +72,9 @@
 #define BOARD_MODEL_REGISTERS_SPECTRUM 2
 
 extern addrbank gfxboard_bank_special;
+extern addrbank gfxboard_bank_wbsmemory;
+extern addrbank gfxboard_bank_lbsmemory;
+extern addrbank gfxboard_bank_nbsmemory;
 
 struct gfxboard
 {
@@ -146,11 +152,15 @@ static struct gfxboard boards[] =
        }
 };
 
+static TCHAR memorybankname[40];
+static TCHAR wbsmemorybankname[40];
+static TCHAR lbsmemorybankname[40];
+static TCHAR regbankname[40];
 
 static int configured_mem, configured_regs;
 static struct gfxboard *board;
 static uae_u32 memory_mask;
-
+static uae_u8 expamem_lo;
 static uae_u8 *automemory;
 
 static uae_u8 picassoiv_bank, picassoiv_flifi;
@@ -159,6 +169,7 @@ static struct zfile *p4rom;
 static bool p4z2;
 static uae_u32 p4_mmiobase;
 static uae_u32 p4_special_mask;
+static uae_u32 p4_vram_bank[2];
 
 static CirrusVGAState vga;
 static uae_u8 *vram;
@@ -171,7 +182,10 @@ static uae_u8 *gfxboard_surface, *vram_address, *fakesurface_surface;
 static bool gfxboard_vblank;
 static bool gfxboard_intena;
 static bool vram_enabled, vram_offset_enabled;
+static bool vram_byteswap;
 static hwaddr vram_offset[2];
+static uae_u8 cirrus_pci[0x44];
+static uae_u8 p4_pci[0x44];
 
 static uae_u32 vgaioregionptr, vgavramregionptr, vgabank0regionptr, vgabank1regionptr;
 
@@ -479,6 +493,36 @@ void qemu_register_reset(QEMUResetHandler *func, void *opaque)
        reset_func (reset_parm);
 }
 
+static void p4_pci_check (void)
+{
+       p4_vram_bank[0] = p4_pci[0x10 + 2] << 16;
+       p4_vram_bank[1] = p4_pci[0x14 + 2] << 16;
+#if PICASSOIV_DEBUG_IO
+       write_log (_T("%08X %08X\n"), p4_vram_bank[0], p4_vram_bank[1]);
+#endif
+}
+
+static void reset_pci (void)
+{
+       cirrus_pci[0] = 0x00;
+       cirrus_pci[1] = 0xb8;
+       cirrus_pci[2] = 0x10;
+       cirrus_pci[3] = 0x13;
+
+       cirrus_pci[4] = 2;
+       cirrus_pci[5] = 0;
+       cirrus_pci[6] = 0;
+       cirrus_pci[7] &= ~(1 | 2 | 32);
+
+       cirrus_pci[8] = 3;
+       cirrus_pci[9] = 0;
+       cirrus_pci[10] = 0;
+       cirrus_pci[11] = 68;
+
+       cirrus_pci[0x10] &= ~1; // B revision
+       cirrus_pci[0x13] &= ~1; // memory
+}
+
 static void picassoiv_checkswitch (void)
 {
        if (ISP4()) {
@@ -564,6 +608,45 @@ int is_surface_bgr(DisplaySurface *surface)
        return board->swap;
 }
 
+static uaecptr fixaddr_bs (uaecptr addr, int mask, int *bs)
+{
+       bool swapped = false;
+       if (p4z2) {
+               if (addr < 0x200000) {
+                       addr |= p4_vram_bank[0];
+                       if (addr >= 0x400000 && addr < 0x600000) {
+                               *bs = BYTESWAP_WORD;
+                               swapped = true;
+                       } else if (addr >= 0x800000 && addr < 0xa00000) {
+                               *bs = BYTESWAP_LONG;
+                               swapped = true;
+                       }
+               } else {
+                       addr |= p4_vram_bank[1];
+                       if (addr >= 0x600000 && addr < 0x800000) {
+                               *bs = BYTESWAP_WORD;
+                               swapped = true;
+                       } else if (addr >= 0xa00000 && addr < 0xc00000) {
+                               *bs = BYTESWAP_LONG;
+                               swapped = true;
+                       }
+               }
+       }
+#ifdef JIT
+       if (vram_offset || !vram_enabled || swapped)
+               special_mem |= mask;
+#endif
+       if (vram_offset_enabled) {
+               if (addr & 0x8000) {
+                       addr += vram_offset[1] & ~0x8000;
+               } else {
+                       addr += vram_offset[0];
+               }
+       }
+       addr &= memory_mask;
+       return addr;
+}
+
 static uaecptr fixaddr (uaecptr addr, int mask)
 {
 #ifdef JIT
@@ -586,57 +669,74 @@ STATIC_INLINE const MemoryRegionOps *getvgabank (uaecptr *paddr)
        uaecptr addr = *paddr;
        addr &= memory_mask;
        *paddr = addr;
-//     if (addr <  0x100000)
-//             return vgalowram;
        return vgaram;
 }
 
-static uae_u32 REGPARAM2 gfxboard_lget_mem (uaecptr addr)
+static uae_u32 gfxboard_lget_vram (uaecptr addr, int bs)
 {
        uae_u32 v;
-       uae_u8 *m;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
                addr &= memory_mask;
-               v  = bank->read (&vga, addr + 0, 1) << 24;
-               v |= bank->read (&vga, addr + 1, 1) << 16;
-               v |= bank->read (&vga, addr + 2, 1) <<  8;
-               v |= bank->read (&vga, addr + 3, 1) <<  0;
+               if (bs < 0) { // WORD
+                       v  = bank->read (&vga, addr + 1, 1) << 24;
+                       v |= bank->read (&vga, addr + 0, 1) << 16;
+                       v |= bank->read (&vga, addr + 3, 1) <<  8;
+                       v |= bank->read (&vga, addr + 2, 1) <<  0;
+               } else if (bs > 0) { // LONG
+                       v  = bank->read (&vga, addr + 3, 1) << 24;
+                       v |= bank->read (&vga, addr + 2, 1) << 16;
+                       v |= bank->read (&vga, addr + 1, 1) <<  8;
+                       v |= bank->read (&vga, addr + 0, 1) <<  0;
+               } else {
+                       v  = bank->read (&vga, addr + 0, 1) << 24;
+                       v |= bank->read (&vga, addr + 1, 1) << 16;
+                       v |= bank->read (&vga, addr + 2, 1) <<  8;
+                       v |= bank->read (&vga, addr + 3, 1) <<  0;
+               }
        } else {
-               m = vram + addr;
-               v = do_get_mem_long ((uae_u32 *)m);
+               uae_u8 *m = vram + addr;
+               if (bs < 0) {
+                       v  = (*((uae_u16*)m)) << 16;
+                       v |= (*((uae_u16*)(m + 2))) << 0;
+               } else if (bs > 0) {
+                       v = *((uae_u32*)m);
+               } else {
+                       v = do_get_mem_long ((uae_u32*)m);
+               }
        }
 #if MEMLOGR
        write_log (_T("R %08X L %08X\n"), addr, v);
 #endif
        return v;
 }
-static uae_u32 REGPARAM2 gfxboard_wget_mem (uaecptr addr)
+static uae_u32 gfxboard_wget_vram (uaecptr addr, int bs)
 {
        uae_u32 v;
-       uae_u8 *m;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
-               v  = bank->read (&vga, addr + 0, 1) <<  8;
-               v |= bank->read (&vga, addr + 1, 1) <<  0;
+               if (bs) {
+                       v  = bank->read (&vga, addr + 0, 1) <<  0;
+                       v |= bank->read (&vga, addr + 1, 1) <<  8;
+               } else {
+                       v  = bank->read (&vga, addr + 0, 1) <<  8;
+                       v |= bank->read (&vga, addr + 1, 1) <<  0;
+               }
        } else {
-               m = vram + addr;
-               v = do_get_mem_word ((uae_u16 *)m);
+               uae_u8 *m = vram + addr;
+               if (bs)
+                       v = *((uae_u16*)m);
+               else
+                       v = do_get_mem_word ((uae_u16*)m);
        }
 #if MEMLOGR
        write_log (_T("R %08X W %08X\n"), addr, v & 0xffff);
 #endif
        return v;
 }
-static uae_u32 REGPARAM2 gfxboard_bget_mem (uaecptr addr)
+static uae_u32 gfxboard_bget_vram (uaecptr addr)
 {
        uae_u32 v;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
                v = bank->read (&vga, addr + 0, 1);
@@ -649,11 +749,8 @@ static uae_u32 REGPARAM2 gfxboard_bget_mem (uaecptr addr)
        return v;
 }
 
-static void REGPARAM2 gfxboard_lput_mem (uaecptr addr, uae_u32 l)
+static void gfxboard_lput_vram (uaecptr addr, uae_u32 l, int bs)
 {
-       uae_u8 *m;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
 #if MEMDEBUG
        if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && l)
                write_log (_T("%08X L %08X\n"), addr, l);
@@ -663,20 +760,36 @@ static void REGPARAM2 gfxboard_lput_mem (uaecptr addr, uae_u32 l)
 #endif
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
-               bank->write (&vga, addr + 0, l >> 24, 1);
-               bank->write (&vga, addr + 1, l >> 16, 1);
-               bank->write (&vga, addr + 2, l >> 8, 1);
-               bank->write (&vga, addr + 3, l >> 0, 1);
+               if (bs < 0) { // WORD
+                       bank->write (&vga, addr + 1, l >> 24, 1);
+                       bank->write (&vga, addr + 0, l >> 16, 1);
+                       bank->write (&vga, addr + 3, l >> 8, 1);
+                       bank->write (&vga, addr + 2, l >> 0, 1);
+               } else if (bs > 0) {
+                       bank->write (&vga, addr + 3, l >> 24, 1);
+                       bank->write (&vga, addr + 2, l >> 16, 1);
+                       bank->write (&vga, addr + 1, l >> 8, 1);
+                       bank->write (&vga, addr + 0, l >> 0, 1);
+               } else {
+                       bank->write (&vga, addr + 0, l >> 24, 1);
+                       bank->write (&vga, addr + 1, l >> 16, 1);
+                       bank->write (&vga, addr + 2, l >> 8, 1);
+                       bank->write (&vga, addr + 3, l >> 0, 1);
+               }
        } else {
-               m = vram + addr;
-               do_put_mem_long ((uae_u32 *) m, l);
+               uae_u8 *m = vram + addr;
+               if (bs < 0) {
+                       *((uae_u16*)m) = l >> 16;
+                       *((uae_u16*)(m + 2)) = l >> 0;
+               } else if (bs > 0) {
+                       *((uae_u32*)m) = l;
+               } else {
+                       do_put_mem_long ((uae_u32*) m, l);
+               }
        }
 }
-static void REGPARAM2 gfxboard_wput_mem (uaecptr addr, uae_u32 w)
+static void gfxboard_wput_vram (uaecptr addr, uae_u32 w, int bs)
 {
-       uae_u8 *m;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
 #if MEMDEBUG
        if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && w)
                write_log (_T("%08X W %04X\n"), addr, w & 0xffff);
@@ -686,17 +799,23 @@ static void REGPARAM2 gfxboard_wput_mem (uaecptr addr, uae_u32 w)
 #endif
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
-               bank->write (&vga, addr + 0, w >> 8, 1);
-               bank->write (&vga, addr + 1, w >> 0, 1);
+               if (bs) {
+                       bank->write (&vga, addr + 0, w >> 0, 1);
+                       bank->write (&vga, addr + 1, w >> 8, 1);
+               } else {
+                       bank->write (&vga, addr + 0, w >> 8, 1);
+                       bank->write (&vga, addr + 1, w >> 0, 1);
+               }
        } else {
-               m = vram + addr;
-               do_put_mem_word ((uae_u16 *)m, w);
+               uae_u8 *m = vram + addr;
+               if (bs)
+                       *((uae_u16*)m) = w;
+               else
+                       do_put_mem_word ((uae_u16*)m, w);
        }
 }
-static void REGPARAM2 gfxboard_bput_mem (uaecptr addr, uae_u32 b)
+static void gfxboard_bput_vram (uaecptr addr, uae_u32 b)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
 #if MEMDEBUG
        if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && b)
                write_log (_T("%08X B %02X\n"), addr, b & 0xff);
@@ -715,6 +834,123 @@ static void REGPARAM2 gfxboard_bput_mem (uaecptr addr, uae_u32 b)
        }
 }
 
+// LONG byteswapped VRAM
+static uae_u32 REGPARAM2 gfxboard_lget_lbsmem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_lget_vram (addr, BYTESWAP_LONG);
+}
+static uae_u32 REGPARAM2 gfxboard_wget_lbsmem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_wget_vram (addr, BYTESWAP_LONG);
+}
+static void REGPARAM2 gfxboard_lput_lbsmem (uaecptr addr, uae_u32 l)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_lput_vram (addr, l, BYTESWAP_LONG);
+}
+static void REGPARAM2 gfxboard_wput_lbsmem (uaecptr addr, uae_u32 w)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_wput_vram (addr, w, BYTESWAP_LONG);
+}
+// WORD byteswapped VRAM
+static uae_u32 REGPARAM2 gfxboard_lget_wbsmem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_lget_vram (addr, BYTESWAP_WORD);
+}
+static uae_u32 REGPARAM2 gfxboard_wget_wbsmem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_wget_vram (addr, BYTESWAP_WORD);
+}
+static void REGPARAM2 gfxboard_lput_wbsmem (uaecptr addr, uae_u32 l)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_lput_vram (addr, l, BYTESWAP_WORD);
+}
+static void REGPARAM2 gfxboard_wput_wbsmem (uaecptr addr, uae_u32 w)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_wput_vram (addr, w, BYTESWAP_WORD);
+}
+// normal or byteswapped (banked) vram
+static uae_u32 REGPARAM2 gfxboard_lget_nbsmem (uaecptr addr)
+{
+       int bs = 0;
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr_bs (addr, S_READ, &bs);
+       return gfxboard_lget_vram (addr, bs);
+}
+static uae_u32 REGPARAM2 gfxboard_wget_nbsmem (uaecptr addr)
+{
+       int bs = 0;
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr_bs (addr, S_READ, &bs);
+       return gfxboard_wget_vram (addr, bs);
+}
+static void REGPARAM2 gfxboard_lput_nbsmem (uaecptr addr, uae_u32 l)
+{
+       int bs = 0;
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr_bs (addr, S_WRITE, &bs);
+       gfxboard_lput_vram (addr, l, bs);
+}
+static void REGPARAM2 gfxboard_wput_nbsmem (uaecptr addr, uae_u32 w)
+{
+       int bs = 0;
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr_bs (addr, S_WRITE, &bs);
+       gfxboard_wput_vram (addr, w, bs);
+}
+// normal vram
+static uae_u32 REGPARAM2 gfxboard_lget_mem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_lget_vram (addr, 0);
+}
+static uae_u32 REGPARAM2 gfxboard_wget_mem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_wget_vram (addr, 0);
+}
+static uae_u32 REGPARAM2 gfxboard_bget_mem (uaecptr addr)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_READ);
+       return gfxboard_bget_vram (addr);
+}
+static void REGPARAM2 gfxboard_lput_mem (uaecptr addr, uae_u32 l)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_lput_vram (addr, l, 0);
+}
+static void REGPARAM2 gfxboard_wput_mem (uaecptr addr, uae_u32 w)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_wput_vram (addr, w, 0);
+}
+static void REGPARAM2 gfxboard_bput_mem (uaecptr addr, uae_u32 b)
+{
+       addr -= gfxboardmem_start & memory_mask;
+       addr = fixaddr (addr, S_WRITE);
+       gfxboard_bput_vram (addr, b);
+}
+
 static int REGPARAM2 gfxboard_check (uaecptr addr, uae_u32 size)
 {
        addr -= gfxboardmem_start & memory_mask;
@@ -750,14 +986,23 @@ static void REGPARAM2 gfxboard_wput_mem_autoconfig (uaecptr addr, uae_u32 b)
        b &= 0xffff;
        addr &= 65535;
        if (addr == 0x44) {
-               put_word (regs.regs[11] + 0x20, gfxmem_bank.start >> 16);
-               put_word (regs.regs[11] + 0x28, gfxmem_bank.start >> 16);
+               uae_u32 start;
+               if (currprefs.jit_direct_compatible_memory) {
+                       start = gfxmem_bank.start;
+                       put_word (regs.regs[11] + 0x20, start >> 16);
+                       put_word (regs.regs[11] + 0x28, start >> 16);
+               } else {
+                       start = (b & 0xff00) | expamem_lo;
+                       gfxmem_bank.start = start << 16;
+               }
                gfxboard_bank_memory.bget = gfxboard_bget_mem;
                gfxboard_bank_memory.bput = gfxboard_bput_mem;
                gfxboard_bank_memory.wput = gfxboard_wput_mem;
                if (ISP4()) {
-                       map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM1) >> 16, currprefs.rtgmem_size >> 16, currprefs.rtgmem_size);
-                       map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM2) >> 16, currprefs.rtgmem_size >> 16, currprefs.rtgmem_size);
+                       map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM1) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
+                       map_banks (&gfxboard_bank_wbsmemory, (gfxmem_bank.start + PICASSOIV_VRAM1 + 0x400000) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
+                       map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM2) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
+                       map_banks (&gfxboard_bank_wbsmemory, (gfxmem_bank.start + PICASSOIV_VRAM2 + 0x400000) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
                        map_banks (&gfxboard_bank_registers, (gfxmem_bank.start + PICASSOIV_REG) >> 16, 0x200000 >> 16, BOARD_REGISTERS_SIZE);
                        map_banks (&gfxboard_bank_special, gfxmem_bank.start >> 16, PICASSOIV_REG >> 16, PICASSOIV_REG);
                        picassoiv_bank = 0;
@@ -791,7 +1036,7 @@ static void REGPARAM2 gfxboard_bput_mem_autoconfig (uaecptr addr, uae_u32 b)
        if (addr == 0x48) {
                if (!board->z3) {
                        if (ISP4()) {
-                               map_banks (&gfxboard_bank_memory, b, 0x00200000 >> 16, 0x00200000);
+                               map_banks (&gfxboard_bank_nbsmemory, b, 0x00200000 >> 16, 0x00200000);
                                if (configured_mem == 0) {
                                        configured_mem = b;
                                        gfxboardmem_start = b << 16;
@@ -808,6 +1053,8 @@ static void REGPARAM2 gfxboard_bput_mem_autoconfig (uaecptr addr, uae_u32 b)
                        }
                        expamem_next ();
                        write_log (_T("%s autoconfigured at 0x00%02X0000\n"), gfxboard_bank_memory.name, b);
+               } else {
+                       expamem_lo = b & 0xff;
                }
                return;
        }
@@ -1050,6 +1297,24 @@ addrbank gfxboard_bank_memory = {
        gfxboard_xlate, gfxboard_check, NULL, NULL,
        gfxboard_lget_mem, gfxboard_wget_mem, ABFLAG_RAM
 };
+addrbank gfxboard_bank_wbsmemory = {
+       gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, gfxboard_bget_mem,
+       gfxboard_lput_wbsmem, gfxboard_wput_wbsmem, gfxboard_bput_mem,
+       gfxboard_xlate, gfxboard_check, NULL, NULL,
+       gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, ABFLAG_RAM
+};
+addrbank gfxboard_bank_lbsmemory = {
+       gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, gfxboard_bget_mem,
+       gfxboard_lput_lbsmem, gfxboard_wput_lbsmem, gfxboard_bput_mem,
+       gfxboard_xlate, gfxboard_check, NULL, NULL,
+       gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, ABFLAG_RAM
+};
+addrbank gfxboard_bank_nbsmemory = {
+       gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, gfxboard_bget_mem,
+       gfxboard_lput_nbsmem, gfxboard_wput_nbsmem, gfxboard_bput_mem,
+       gfxboard_xlate, gfxboard_check, NULL, _T("Picasso IV banked VRAM"),
+       gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, ABFLAG_RAM
+};
 addrbank gfxboard_bank_registers = {
        gfxboard_lget_regs, gfxboard_wget_regs, gfxboard_bget_regs,
        gfxboard_lput_regs, gfxboard_wput_regs, gfxboard_bput_regs,
@@ -1066,6 +1331,30 @@ static uae_u32 REGPARAM2 gfxboards_lget_regs (uaecptr addr)
        special_mem |= S_READ;
 #endif
        addr &= p4_special_mask;
+       // pci config
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+                       v =  p4_pci[addr2 + 0] << 24;
+                       v |= p4_pci[addr2 + 1] << 16;
+                       v |= p4_pci[addr2 + 2] <<  8;
+                       v |= p4_pci[addr2 + 3] <<  0;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI LGET %08x %08x\n"), addr, v);
+#endif
+               } else if (addr2 >= 0x1000 && addr2 < 0x1040) {
+                       addr2 -= 0x1000;
+                       v =  cirrus_pci[addr2 + 0] << 24;
+                       v |= cirrus_pci[addr2 + 1] << 16;
+                       v |= cirrus_pci[addr2 + 2] <<  8;
+                       v |= cirrus_pci[addr2 + 3] <<  0;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV CL PCI LGET %08x %08x\n"), addr, v);
+#endif
+               }
+               return v;
+       }
        if (picassoiv_bank & PICASSOIV_BANK_MAPRAM) {
                // memory mapped io
                if (addr >= p4_mmiobase && addr < p4_mmiobase + 0x8000) {
@@ -1092,6 +1381,26 @@ static uae_u32 REGPARAM2 gfxboards_wget_regs (uaecptr addr)
        special_mem |= S_READ;
 #endif
        addr &= p4_special_mask;
+       // pci config
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+                       v =  p4_pci[addr2 + 0] << 8;
+                       v |= p4_pci[addr2 + 1] << 0;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI WGET %08x %04x\n"), addr, v);
+#endif
+               } else if (addr2 >= 0x1000 && addr2 < 0x1040) {
+                       addr2 -= 0x1000;
+                       v =  cirrus_pci[addr2 + 0] << 8;
+                       v |= cirrus_pci[addr2 + 1] << 0;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV CL PCI WGET %08x %04x\n"), addr, v);
+#endif
+               }
+               return v;
+       }
        if (picassoiv_bank & PICASSOIV_BANK_MAPRAM) {
                // memory mapped io
                if (addr >= p4_mmiobase && addr < p4_mmiobase + 0x8000) {
@@ -1118,16 +1427,30 @@ static uae_u32 REGPARAM2 gfxboards_bget_regs (uaecptr addr)
        addr &= p4_special_mask;
 
        // pci config
-       if (addr >= 0x400000 || (p4z2 && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
                v = 0;
-               addr &= 0xffff;
-               if (addr == 0x802)
-                       v = 2; // ???
-               if (addr == 0x808)
-                       v = 4; // bridge revision
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+                       v =  p4_pci[addr2];
 #if PICASSOIV_DEBUG_IO
-               write_log (_T("PicassoIV PCI BGET %08x %02x\n"), addr, v);
+                       write_log (_T("PicassoIV PCI BGET %08x %02x\n"), addr, v);
 #endif
+               } else if (addr2 >= 0x800 && addr2 <= 0x1000) {
+                       if (addr2 == 0x802)
+                               v = 2; // ???
+                       if (addr2 == 0x808)
+                               v = 4; // bridge revision
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI BGET %08x %02x\n"), addr, v);
+#endif
+               } else if (addr2 >= 0x1000 && addr2 <= 0x1040) {
+                       addr2 -= 0x1000;
+                       v = cirrus_pci[addr2];
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV CL PCI BGET %08x %02x\n"), addr, v);
+#endif
+               }
                return v;
        }
 
@@ -1183,6 +1506,31 @@ static void REGPARAM2 gfxboards_lput_regs (uaecptr addr, uae_u32 l)
        special_mem |= S_WRITE;
 #endif
        addr &= p4_special_mask;
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI LPUT %08x %08x\n"), addr, l);
+#endif
+                       p4_pci[addr2 + 0] = l >> 24;
+                       p4_pci[addr2 + 1] = l >> 16;
+                       p4_pci[addr2 + 2] = l >>  8;
+                       p4_pci[addr2 + 3] = l >>  0;
+                       p4_pci_check ();
+               } else if (addr2 >= 0x1000 && addr2 < 0x1040) {
+                       addr2 -= 0x1000;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV CL PCI LPUT %08x %08x\n"), addr, l);
+#endif
+                       cirrus_pci[addr2 + 0] = l >> 24;
+                       cirrus_pci[addr2 + 1] = l >> 16;
+                       cirrus_pci[addr2 + 2] = l >>  8;
+                       cirrus_pci[addr2 + 3] = l >>  0;
+                       reset_pci ();
+               }
+               return;
+       }
        if (picassoiv_bank & PICASSOIV_BANK_MAPRAM) {
                // memory mapped io
                if (addr >= p4_mmiobase && addr < p4_mmiobase + 0x8000) {
@@ -1207,6 +1555,27 @@ static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 w)
        special_mem |= S_WRITE;
 #endif
        addr &= p4_special_mask;
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI WPUT %08x %04x\n"), addr, w & 0xffff);
+#endif
+                       p4_pci[addr2 + 0] = w >> 8;
+                       p4_pci[addr2 + 1] = w >> 0;
+                       p4_pci_check ();
+               } else if (addr2 >= 0x1000 && addr2 < 0x1040) {
+                       addr2 -= 0x1000;
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV CL PCI WPUT %08x %04x\n"), addr, w & 0xffff);
+#endif
+                       cirrus_pci[addr2 + 0] = w >> 8;
+                       cirrus_pci[addr2 + 1] = w >> 0;
+                       reset_pci ();
+               }
+               return;
+       }
        if (picassoiv_bank & PICASSOIV_BANK_MAPRAM) {
                // memory mapped io
                if (addr >= p4_mmiobase && addr < p4_mmiobase + 0x8000) {
@@ -1241,10 +1610,23 @@ static void REGPARAM2 gfxboards_bput_regs (uaecptr addr, uae_u32 b)
        special_mem |= S_WRITE;
 #endif
        addr &= p4_special_mask;
-       if (addr >= 0x400000 || (p4z2 && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+       if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
+               uae_u32 addr2 = addr & 0xffff;
+               if (addr2 >= 0x0800 && addr2 < 0x840) {
+                       addr2 -= 0x800;
+                       p4_pci[addr2] = b;
+                       p4_pci_check ();
+#if PICASSOIV_DEBUG_IO
+                       write_log (_T("PicassoIV PCI BPUT %08x %02x\n"), addr, b & 0xff);
+#endif
+               } else if (addr2 >= 0x1000 && addr2 < 0x1040) {
+                       addr2 -= 0x1000;
+                       cirrus_pci[addr2] = b;
+                       reset_pci ();
 #if PICASSOIV_DEBUG_IO
-               write_log (_T("PicassoIV PCI BPUT %08x %02X\n"), addr, b & 0xff);
+                       write_log (_T("PicassoIV CL PCI BPUT %08x %02x\n"), addr, b & 0xff);
 #endif
+               }
                return;
        }
        if (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) {
@@ -1283,7 +1665,7 @@ static void REGPARAM2 gfxboards_bput_regs (uaecptr addr, uae_u32 b)
 addrbank gfxboard_bank_special = {
        gfxboards_lget_regs, gfxboards_wget_regs, gfxboards_bget_regs,
        gfxboards_lput_regs, gfxboards_wput_regs, gfxboards_bput_regs,
-       default_xlate, default_check, NULL, _T("Picasso IV"),
+       default_xlate, default_check, NULL, _T("Picasso IV MISC"),
        dummy_lgeti, dummy_wgeti, ABFLAG_IO | ABFLAG_SAFE
 };
 bool gfxboard_is_z3 (int type)
@@ -1350,6 +1732,8 @@ static void gfxboard_init (void)
        p4z2 = false;
        zfile_fclose (p4rom);
        p4rom = NULL;
+       memset (cirrus_pci, 0, sizeof cirrus_pci);
+       reset_pci ();
 }
 
 static void copyp4autoconfig (int startoffset)
@@ -1462,8 +1846,15 @@ void gfxboard_init_memory (void)
                }
        }
 
-       gfxboard_bank_memory.name = board->name;
-       gfxboard_bank_registers.name = board->name;
+       _stprintf (memorybankname, _T("%s VRAM"), board->name);
+       _stprintf (wbsmemorybankname, _T("%s VRAM WORDSWAP"), board->name);
+       _stprintf (lbsmemorybankname, _T("%s VRAM LONGSWAP"), board->name);
+       _stprintf (regbankname, _T("%s REG"), board->name);
+
+       gfxboard_bank_memory.name = memorybankname;
+       gfxboard_bank_wbsmemory.name = wbsmemorybankname;
+       gfxboard_bank_lbsmemory.name = lbsmemorybankname;
+       gfxboard_bank_registers.name = regbankname;
 
        gfxboard_bank_memory.bget = gfxboard_bget_mem_autoconfig;
        gfxboard_bank_memory.bput = gfxboard_bput_mem_autoconfig;

diff --git a/include/options.h b/include/options.h
index 7f54391cc3214a9dbe14d178dc3fcaf301032949..58074cc635254d80046964ec0a9f944f46242a8a 100644 (file)
--- a/include/options.h
+++ b/include/options.h
@@ -483,6 +483,7 @@ struct uae_prefs {
        bool clipboard_sharing;
        bool native_code;
        bool uae_hide_autoconfig;
+       bool jit_direct_compatible_memory;
 
        int mountitems;
        struct uaedev_config_data mountconfig[MOUNT_CONFIG_SIZE];

diff --git a/memory.cpp b/memory.cpp
index c5214aca7147d85b10e3a271279383ab387db212..22c20b55da5610860d7ac5cd135d954e300f16f0 100644 (file)
--- a/memory.cpp
+++ b/memory.cpp
@@ -56,7 +56,9 @@ static bool canjit (void)
 }
 static bool needmman (void)
 {
-#ifdef _WIN32  
+       if (!currprefs.jit_direct_compatible_memory)
+               return false;
+#ifdef _WIN32
        return true;
 #endif
        if (canjit ())

diff --git a/newcpu.cpp b/newcpu.cpp
index 543ba6fbf58c62278263ede953874da13acff241..5aba315b749b489fd42473e71b76e0605d92a151 100644 (file)
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -4570,7 +4570,6 @@ static void m68k_run_3ce (void)
 
                (*cpufunctbl[opcode])(opcode);
 
-cont:
                if (r->spcflags || time_for_interrupt ()) {
                        if (do_specialties (0))
                                exit = true;
@@ -4609,7 +4608,7 @@ static void m68k_run_2ce (void)
                r->cacheholdingdata020 = cputrace.cacheholdingdata020;
                r->cacheholdingaddr020 = cputrace.cacheholdingaddr020;
                r->prefetch020addr = cputrace.prefetch020addr;
-               memcpy (&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16));
+               memcpy (&r->prefetch020, &cputrace.prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u32));
                memcpy (&caches020, &cputrace.caches020, sizeof caches020);
 
                m68k_setpc (cputrace.pc);
@@ -4662,7 +4661,7 @@ static void m68k_run_2ce (void)
                        cputrace.cacheholdingdata020 = r->cacheholdingdata020;
                        cputrace.cacheholdingaddr020 = r->cacheholdingaddr020;
                        cputrace.prefetch020addr = r->prefetch020addr;
-                       memcpy (&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u16));
+                       memcpy (&cputrace.prefetch020, &r->prefetch020, CPU_PIPELINE_MAX * sizeof (uae_u32));
                        memcpy (&cputrace.caches020, &caches020, sizeof caches020);
 
                        cputrace.memoryoffset = 0;
@@ -5602,7 +5601,7 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr)
        else
                dstbak = dst = xmalloc (uae_u8, 1000);
 
-       save_u32 (2 | 4);
+       save_u32 (2 | 4 | 8);
        save_u16 (cputrace.opcode);
        for (int i = 0; i < 16; i++)
                save_u32 (cputrace.regs[i]);
@@ -5644,6 +5643,8 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr)
                save_u32 (cputrace.cacheholdingdata020);
                for (int i = 0; i < CPU_PIPELINE_MAX; i++)
                        save_u16 (cputrace.prefetch020[i]);
+               for (int i = 0; i < CPU_PIPELINE_MAX; i++)
+                       save_u32 (cputrace.prefetch020[i]);
        }
 
        *len = dst - dstbak;
@@ -5695,6 +5696,10 @@ uae_u8 *restore_cpu_trace (uae_u8 *src)
                        cputrace.cacheholdingdata020 = restore_u32 ();
                        for (int i = 0; i < CPU_PIPELINE_MAX; i++)
                                cputrace.prefetch020[i] = restore_u16 ();
+                       if (v & 8) {
+                               for (int i = 0; i < CPU_PIPELINE_MAX; i++)
+                                       cputrace.prefetch020[i] = restore_u32 ();
+                       }
                }
        }
 
@@ -5703,6 +5708,9 @@ uae_u8 *restore_cpu_trace (uae_u8 *src)
                if (currprefs.cpu_model > 68000) {
                        if (v & 4)
                                cpu_tracer = -1;
+                       // old format?
+                       if ((v & (4 | 8)) != (4 | 8))
+                               cpu_tracer = 0;
                } else {
                        cpu_tracer = -1;
                }

diff --git a/od-win32/mman.cpp b/od-win32/mman.cpp
index b22991673cc3b04aa0270bee239e979266687159..741e07b89f02bed5b47f2db3bb6b7c9014d0f197 100644 (file)
--- a/od-win32/mman.cpp
+++ b/od-win32/mman.cpp
@@ -627,6 +627,10 @@ void mapped_free (uae_u8 *mem)
 {
        shmpiece *x = shm_start;
 
+       if (!currprefs.jit_direct_compatible_memory) {
+               xfree (mem);
+               return;
+       }
        if (mem == NULL)
                return;
        if (mem == filesysory) {

diff --git a/od-win32/picasso96_win.cpp b/od-win32/picasso96_win.cpp
index 704dcae3830adbf9ffcb01c9d43fcd0d2c9f910e..2e678b3f9e93509129d132b6d75cfe747525e1c0 100644 (file)
--- a/od-win32/picasso96_win.cpp
+++ b/od-win32/picasso96_win.cpp
@@ -2063,8 +2063,6 @@ bool picasso_is_vram_dirty (uaecptr addr, int size)
        }
        return false;
 }
-       
-
 
 static void init_alloc (TrapContext *ctx, int size)
 {

diff --git a/od-win32/win32.h b/od-win32/win32.h
index 043c93006477b124b8a643a237178924c7808fe2..d1e84b1f7543e907797ad9b5bbfb9b6439120470 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -19,11 +19,11 @@
 #define LANG_DLL 1
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("4")
+#define WINUAEBETA _T("5")
 #else
 #define WINUAEBETA _T("")
 #endif
-#define WINUAEDATE MAKEBD(2013, 7, 31)
+#define WINUAEDATE MAKEBD(2013, 8, 1)
 #define WINUAEEXTRA _T("")
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp
index a3df6e2a4be5fedf9d641a3e6db55a0e51b1c90a..ce6bda4991e74625c0a9ff935d8ae12a452afcc5 100644 (file)
--- a/od-win32/win32gui.cpp
+++ b/od-win32/win32gui.cpp
@@ -7461,6 +7461,7 @@ static INT_PTR CALLBACK ExpansionDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LP
                }
                expansion_net (hDlg);
                init_displays_combo (hDlg, true);
+
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_RESETCONTENT, 0, 0);
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("-"));
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("UAE Zorro II"));
@@ -7471,12 +7472,11 @@ static INT_PTR CALLBACK ExpansionDlgProc (HWND hDlg, UINT msg, WPARAM wParam, LP
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Piccolo Zorro III"));
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Piccolo SD64 Zorro II"));
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Piccolo SD64 Zorro III"));
-               SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Spectrum28/24 Zorro II"));
-               SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Spectrum28/24 Zorro III"));
-#if 1
+               SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("EGS-28/24 Spectrum Zorro II"));
+               SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("EGS-28/24 Spectrum Zorro III"));
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Picasso IV Zorro II"));
                SendDlgItemMessage (hDlg, IDC_RTG_Z2Z3, CB_ADDSTRING, 0, (LPARAM)_T("Picasso IV Zorro III"));
-#endif
+
                WIN32GUI_LoadUIString(IDS_ALL, tmp, sizeof tmp / sizeof (TCHAR));
                SendDlgItemMessage (hDlg, IDC_RTG_8BIT, CB_RESETCONTENT, 0, 0);
                SendDlgItemMessage (hDlg, IDC_RTG_8BIT, CB_ADDSTRING, 0, (LPARAM)_T("(8bit)"));

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index f7944cfddfb5e2d9131673406be82fd44ccfdba8..0841e9e38044cdeedc57d717966f338f983b2535 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -1,6 +1,55 @@
 
 - restore only single input target to default.
 
+Beta 4:
+
+- Picasso IV RTG board emulation implemented. Very important information:
+  - Requires full 128k raw flash rom image, available from
+    http://www.sophisticated-development.de/ (PIV_FlashImageXX), renamed as picasso_iv_flash.rom
+  - Does not use rom scanner system, image file must be located in Paths panel configured rom path.
+  - Very big thanks to Tobias Seiler for answering questions about board's hardware implementation.
+  - Do not bother Tobias (or anyone else) who does not develop UAE with Picasso IV emulation problems.
+  - Only implements basic functionality, flifi or other extra stuff is not emulated.
+  - Real Picasso IV uses flifi when displaying Amiga modes, emulation ignores it and simply displays
+    Amiga modes normally.
+  - Picasso96 and CGX4 confirmed working.
+
+- Piccolo autoconfig size change reverted, problem appears to be caused by EGS 7.4 driver bug.
+- >1024 pixel tall interlace mode fix.
+- CL vertical blank handling fixed, it caused spurious interrupts in some situations.
+- uaegfx driver was enabled if on-disk version was loaded and hardware board emulation was configured.
+
+- CIA TOD counting delay emulated. Time between TICK input going active and TOD increasing has
+  14-16 E-clock cycle delay. Logic analyzer confirmed using ALARM interrupt.
+- Disabled CIA TOD bug emulation. It makes no sense, I have AGA program that refuses to work on
+  my real A1200 (Gets unexpected interrupt and crashes) but there is no way it didn't work 20
+  or so years ago..
+
+- Workaround for hard drive enumeration waking up sleeping drives if one or more harddrives are
+  mounted in configuration and emulation is started. To enable it, all configured real harddrives
+  (or memory cards) need to be re-configured using GUI and config saved to create new config field
+  required to find the drive without enumeration. Falls back to full enumeration if drive's "friendly"
+  name does not match config saved value or new config entry is missing.
+- Simplified CIA interrupt handling, removed some old hack which appears to be obsolete. I hope.
+- Added CPU interrupt level information to visual DMA debugger. Each scanline has extra pixel on left side
+  of DMA usage image that shows scanline's highest CPU interrupt level.
+
+- Rewritten 68020/030 cycle-exact emulation core. Emulates 68020 simultaneous bus controller and
+  instruction execution more accurately. It still runs too fast, but at least it is less fast than
+  previously, still lots of tweaking to do but at least now it should be possible to match real 68020
+  more closely than what was possible with old code.
+- 68020/030 CPU emulation updates, prefetch emulation (also used in cycle-exact mode) should be much
+  more compatible, "more compatible" checked without cycle-exact now also includes instruction cache emulation.
+- 68030+ more compatible (prefetch) and 68040+ "cycle-exact" modes are broken temporarily. Do not use.
+- Restoring old 68020 cycle-exact saved state files may show dialog complaining about mismatched state
+  information and restore may also fail. It is normal, will be fixed later.
+- Cycle-exact CPU accesses to AGA custom registers used 32-bit accesses, not 16-bit.
+- b3 .cue decoding update broke some variants, fixed.
+- Added workaround for Windows returning returning invalid (too small) value when asking for
+  ACM_METRIC_MAX_SIZE_FORMAT. (Output panel crashing)
+
+Beta 3:
+
 - Disable Z3 Cirrus Logic RTG board if 24-bit address space.
 - Hard reset and CL board enabled crashed.
 - Added Chipset/RTG screen toggle input event ("Toggle chipset/RTG screen"). Only works when RTG mode is active,
@@ -23,6 +72,7 @@
   are correct, they appear to be because it is standard PAL/NTSC)
 - CIA-B hsync TOD counting is also positioned cycle-exactly now (end of hsync pulse), was at the start of
   scanline previously.
+- SPTI didn't work, SCSI routing got broken when Tape drive support was added.
 
 Beta 2:
 

diff --git a/qemuvga/cirrus_vga.cpp b/qemuvga/cirrus_vga.cpp
index f504a262427192786ddab1fd68c809313e8cdbe1..5116778158c9b9d799698046e0cc9953e0d7bd78 100644 (file)
--- a/qemuvga/cirrus_vga.cpp
+++ b/qemuvga/cirrus_vga.cpp
@@ -905,9 +905,10 @@ static void cirrus_bitblt_start(CirrusVGAState * s)
             CIRRUS_BLTMODE_COLOREXPAND) {
 
             if (s->cirrus_blt_mode & CIRRUS_BLTMODE_TRANSPARENTCOMP) {
-                if (s->cirrus_blt_modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)
-                    cirrus_bitblt_bgcol(s);
-                else
+// "If color expansion is used with transparency, background pixels are not written" TW.
+//                if (s->cirrus_blt_modeext & CIRRUS_BLTMODEEXT_COLOREXPINV)
+//                    cirrus_bitblt_bgcol(s);
+//                else
                     cirrus_bitblt_fgcol(s);
                 s->cirrus_rop = cirrus_colorexpand_transp[rop_to_index[blt_rop]][s->cirrus_blt_pixelwidth - 1];
             } else {

diff --git a/qemuvga/cirrus_vga_rop2.h b/qemuvga/cirrus_vga_rop2.h
index d28bcc6f2580513cd2c3d1891fa15393b133bc08..c665095a08fe34f1d5a25d36a3ec76b179436531 100644 (file)
--- a/qemuvga/cirrus_vga_rop2.h
+++ b/qemuvga/cirrus_vga_rop2.h
@@ -114,7 +114,8 @@ glue(glue(glue(cirrus_colorexpand_transp_, ROP_NAME), _),DEPTH)
 
     if (s->cirrus_blt_modeext & CIRRUS_BLTMODEEXT_COLOREXPINV) {
         bits_xor = 0xff;
-        col = s->cirrus_blt_bgcol;
+               // Color expansion + transparency: fgcol, not bgcol. TW.
+        col = s->cirrus_blt_fgcol;
     } else {
         bits_xor = 0x00;
         col = s->cirrus_blt_fgcol;
@@ -197,7 +198,8 @@ glue(glue(glue(cirrus_colorexpand_pattern_transp_, ROP_NAME), _),DEPTH)
 
     if (s->cirrus_blt_modeext & CIRRUS_BLTMODEEXT_COLOREXPINV) {
         bits_xor = 0xff;
-        col = s->cirrus_blt_bgcol;
+               // Color expansion + transparency: fgcol, not bgcol. TW.
+        col = s->cirrus_blt_fgcol;
     } else {
         bits_xor = 0x00;
         col = s->cirrus_blt_fgcol;