/*
* UAE - The Un*x Amiga Emulator
*
- * A590/A2091/A3000 (DMAC/SuperDMAC + WD33C93) emulation
+ * A590/A2091/A3000/CDTV SCSI expansion (DMAC/SuperDMAC + WD33C93) emulation
*
* Copyright 2007 Toni Wilen
*
static int isirq(void)
{
if (superdmac) {
- if ((dmac_cntr & SCNTR_INTEN) && (dmac_istr & ISTR_INTS))
+ if ((dmac_cntr & SCNTR_INTEN) && (dmac_istr & (ISTR_INTS | ISTR_E_INT)))
return 1;
} else {
- if ((dmac_cntr & CNTR_INTEN) && (dmac_istr & ISTR_INTS))
+ if ((dmac_cntr & CNTR_INTEN) && (dmac_istr & (ISTR_INTS | ISTR_E_INT)))
return 1;
}
return 0;
static void dmac_stop_dma(void)
{
dmac_dma = 0;
+ dmac_istr &= ~ISTR_E_INT;
}
static void dmac_reset(void)
#endif
}
-static void incsasr(void)
+static void incsasr(int w)
{
if (sasr == WD_AUXILIARY_STATUS || sasr == WD_DATA || sasr == WD_COMMAND)
return;
+ if (w && sasr == WD_SCSI_STATUS)
+ return;
sasr++;
sasr &= 0x1f;
}
set_status(CSR_TIMEOUT, 0);
}
+static void wd_cmd_reset(void)
+{
+#if WD33C93_DEBUG > 0
+ write_log("%s reset\n", WD33C93);
+#endif
+ set_status(1, 0);
+}
+
static void wd_cmd_abort(void)
{
#if WD33C93_DEBUG > 0
set_status(CSR_SEL_ABORT, 0);
}
+static int writeonlyreg(int reg)
+{
+ if (reg == WD_SCSI_STATUS)
+ return 1;
+ return 0;
+}
+
void wdscsi_put(uae_u8 d)
{
#if WD33C93_DEBUG > 1
if (sasr != WD_DATA)
- write_log("W %s REG %02.2X (%d) = %02.2X (%d)\n", WD33C93, sasr, sasr, d, d);
+ write_log("W %s REG %02.2X (%d) = %02.2X (%d) PC=%08X\n", WD33C93, sasr, sasr, d, d, M68K_GETPC);
#endif
- wdregs[sasr] = d;
+ if (!writeonlyreg(sasr))
+ wdregs[sasr] = d;
if (!wd_used) {
wd_used = 1;
write_log("%s in use\n", WD33C93);
} else if (sasr == WD_COMMAND) {
switch (d & 0x7f)
{
+ case WD_CMD_RESET:
+ wd_cmd_reset();
+ break;
+ break;
case WD_CMD_SEL_ATN:
wd_cmd_sel_atn();
break;
break;
}
}
- incsasr();
+ incsasr(1);
}
void wdscsi_sasr(uae_u8 b)
set_status(wd_phase, 1);
}
}
- incsasr();
+ incsasr(0);
#if WD33C93_DEBUG > 1
if (osasr != WD_DATA)
- write_log("R %s REG %02.2X (%d) = %02.2X (%d)\n", WD33C93, osasr, osasr, v, v);
+ write_log("R %s REG %02.2X (%d) = %02.2X (%d) PC=%08X\n", WD33C93, osasr, osasr, v, v, M68K_GETPC);
#endif
return v;
}
case 0xa7:
v = 0xff;
break;
+ case 0xe0:
+ case 0xe1:
+ if (!dmac_dma)
+ dmac_start_dma();
+ break;
+ case 0xe2:
+ case 0xe3:
+ dmac_stop_dma();
+ break;
+ case 0xe4:
+ case 0xe5:
+ dmac_cint();
+ break;
case 0xe8:
case 0xe9:
- /* FLUSH */
+ /* FLUSH */
dmac_istr |= ISTR_FE_FLG;
break;
}
special_mem |= S_READ;
#endif
addr &= 65535;
- v = (dmac_bget2 (addr) << 24) | (dmac_bget2 (addr + 1) << 16) |
- (dmac_bget2 (addr + 2) << 8) | (dmac_bget2 (addr + 3));
+ v = dmac_bget2 (addr) << 24;
+ v |= dmac_bget2 (addr + 1) << 16;
+ v |= dmac_bget2 (addr + 2) << 8;
+ v |= dmac_bget2 (addr + 3);
#ifdef A2091_DEBUG
if (addr >= 0x40 && addr < ROM_OFFSET)
write_log ("dmac_lget %08.8X=%08.8X PC=%08.8X\n", addr, v, M68K_GETPC);
special_mem |= S_READ;
#endif
addr &= 65535;
- v = (dmac_bget2 (addr) << 8) | dmac_bget2 (addr + 1);
+ v = dmac_bget2 (addr) << 8;
+ v |= dmac_bget2 (addr + 1);
#if A2091_DEBUG > 0
if (addr >= 0x40 && addr < ROM_OFFSET)
write_log ("dmac_wget %08.8X=%04.4X PC=%08.8X\n", addr, v, M68K_GETPC);
return (val >> (addr * 8)) & 0xff;
}
-static void mbdmac_write (uae_u32 addr, uae_u32 val)
+static void mbdmac_write (uae_u32 addr, uae_u32 val, int mode)
{
if (currprefs.cs_mbdmac > 1)
return;
break;
case 0x3e:
case 0x3f:
- dmac_dma = 0;
dmac_stop_dma();
break;
case 0x41:
+ if ((mode & 0x10) || ((mode & 0x70) > 0x10 && (mode & 0x0f) == 1))
+ sasr = val;
+ break;
case 0x49:
sasr = val;
break;
}
}
-static uae_u32 mbdmac_read (uae_u32 addr)
+static uae_u32 mbdmac_read (uae_u32 addr, int mode)
{
uae_u32 vaddr = addr;
uae_u32 v = 0xffffffff;
break;
case 0x12:
case 0x13:
- if (dmac_dma) {
- dmac_dma = 1;
+ if (!dmac_dma)
dmac_start_dma();
- }
v = 0;
break;
case 0x1a:
static uae_u32 REGPARAM2 mbdmac_lget (uaecptr addr)
{
+ uae_u32 v;
#ifdef JIT
special_mem |= S_READ;
#endif
- return (mbdmac_wget (addr) << 16) | mbdmac_wget (addr + 2);
+ v = mbdmac_read (addr, 0x40 | 0) << 24;
+ v |= mbdmac_read (addr + 1, 0x40 | 1) << 16;
+ v |= mbdmac_read (addr + 2, 0x40 | 2) << 8;
+ v |= mbdmac_read (addr + 3, 0x40 | 3);
+ return v;
}
static uae_u32 REGPARAM2 mbdmac_wget (uaecptr addr)
{
+ uae_u32 v;
#ifdef JIT
special_mem |= S_READ;
#endif
- return (mbdmac_bget (addr) << 8) | mbdmac_bget(addr + 1);;
+ v = mbdmac_read (addr, 0x40 | 0) << 8;
+ v |= mbdmac_read (addr + 1, 0x40 | 1) << 0;
+ return v;
}
static uae_u32 REGPARAM2 mbdmac_bget (uaecptr addr)
{
#ifdef JIT
special_mem |= S_READ;
#endif
- return mbdmac_read (addr);
+ return mbdmac_read (addr, 0x10);
}
-static void REGPARAM2 mbdmac_lput (uaecptr addr, uae_u32 value)
+static void REGPARAM2 mbdmac_lput (uaecptr addr, uae_u32 l)
{
#ifdef JIT
special_mem |= S_WRITE;
#endif
- mbdmac_wput (addr, value >> 16);
- mbdmac_wput (addr + 2, value & 0xffff);
+ mbdmac_write (addr + 0, l >> 24, 0x40 | 0);
+ mbdmac_write (addr + 1, l >> 16, 0x40 | 1);
+ mbdmac_write (addr + 2, l >> 8, 0x40 | 2);
+ mbdmac_write (addr + 3, l, 0x40 | 3);
}
-static void REGPARAM2 mbdmac_wput (uaecptr addr, uae_u32 value)
+static void REGPARAM2 mbdmac_wput (uaecptr addr, uae_u32 w)
{
#ifdef JIT
special_mem |= S_WRITE;
#endif
- mbdmac_bput (addr, value >> 8);
- mbdmac_bput (addr + 1, value & 0xff);
+ mbdmac_write (addr + 0, w >> 8, 0x20 | 0);
+ mbdmac_write (addr + 1, w >> 0, 0x20 | 1);
}
-static void REGPARAM2 mbdmac_bput (uaecptr addr, uae_u32 value)
+static void REGPARAM2 mbdmac_bput (uaecptr addr, uae_u32 b)
{
#ifdef JIT
special_mem |= S_WRITE;
#endif
- mbdmac_write (addr, value);
+ mbdmac_write (addr, b, 0x10 | 0);
}
addrbank mbdmac_a3000_bank = {
if (!hdf_hd_open(hfd, path, blocksize, readonly, devname, sectors, surfaces, reserved, bootpri, filesys))
return 0;
hfd->ansi_version = 2;
- scsis[ch] = scsi_alloc(hfd);
+ scsis[ch] = scsi_alloc(ch, hfd);
return scsis[ch] ? 1 : 0;
}
+static void addnativescsi(void)
+{
+ int i, j;
+ int devices[MAX_TOTAL_DEVICES];
+ int types[MAX_TOTAL_DEVICES];
+ struct device_info dis[MAX_TOTAL_DEVICES];
+
+ i = 0;
+ while (i < MAX_TOTAL_DEVICES) {
+ types[i] = -1;
+ devices[i] = -1;
+ if (sys_command_open (DF_SCSI, i)) {
+ if (sys_command_info (DF_SCSI, i, &dis[i])) {
+ devices[i] = i;
+ types[i] = 100 - i;
+ if (dis[i].type == INQ_ROMD)
+ types[i] = 1000 - i;
+ }
+ sys_command_close (DF_SCSI, i);
+ }
+ i++;
+ }
+ i = 0;
+ while (devices[i] >= 0) {
+ j = i + 1;
+ while (devices[j] >= 0) {
+ if (types[i] > types[j]) {
+ int tmp = types[i];
+ types[i] = types[j];
+ types[j] = tmp;
+ }
+ j++;
+ }
+ i++;
+ }
+ i = 0; j = 0;
+ while (devices[i] >= 0 && j < 7) {
+ if (scsis[j] == NULL) {
+ scsis[j] = scsi_alloc_native(j, devices[i]);
+ write_log("SCSI: %d:'%s'\n", j, dis[i].label);
+ i++;
+ }
+ j++;
+ }
+}
+
int a3000_add_scsi_unit(int ch, char *path, int blocksize, int readonly,
char *devname, int sectors, int surfaces, int reserved,
int bootpri, char *filesys)
wd_used = 0;
superdmac = 0;
superdmac = currprefs.cs_mbdmac ? 1 : 0;
+ if (currprefs.scsi == 2)
+ addnativescsi();
}
void a2091_init (void)
roms[2] = 53;
roms[3] = -1;
- rl = getrombyids(roms);
+ rl = getromlistbyids(roms);
if (rl) {
write_log("A590/A2091 BOOT ROM '%s' %d.%d ", rl->path, rl->rd->ver, rl->rd->rev);
z = zfile_fopen(rl->path, "rb");
} else {
write_log("failed to load\n");
}
+ } else {
+ romwarning(roms);
}
map_banks (&dmaca2091_bank, 0xe80000 >> 16, 0x10000 >> 16, 0x10000);
}
static uae_u32 hrtmem_mask, hrtmem2_mask, hrtmem3_mask;
static uae_u8 *hrtmon_custom, *hrtmon_ciaa, *hrtmon_ciab;
-uae_u32 hrtmem_start, hrtmem2_start, hrtmem3_start, hrtmem_size, hrtmem2_size, hrtmem3_size;
+uae_u32 hrtmem_start, hrtmem2_start, hrtmem3_start, hrtmem_size, hrtmem2_size, hrtmem2_size2, hrtmem3_size;
static int triggered_once;
static void hrtmon_unmap_banks(void);
static uae_u32 REGPARAM2 hrtmem2_bget (uaecptr addr)
{
+ if (addr == 0xb8007c && cart_type == CART_SUPER4) {
+ static int cnt = 60;
+ cnt--;
+ if (cnt == 0)
+ uae_reset(0);
+ }
addr -= hrtmem2_start & hrtmem2_mask;
addr &= hrtmem2_mask;
return hrtmemory2[addr];
Exception (2, ®s, 0);
put_long ((uaecptr)(regs.vbr + 8), old);
} else if (cart_type == CART_SUPER4) {
- old = get_long((uaecptr)(regs.vbr + 0x7c));
- put_long ((uaecptr)(regs.vbr + 0x7c), get_long (hrtmem_start + 0x7c));
- Interrupt (7);
- put_long ((uaecptr)(regs.vbr + 0x7c), old);
+ uae_u32 v = get_long (hrtmem_start + 0x7c);
+ if (v) {
+ old = get_long((uaecptr)(regs.vbr + 0x7c));
+ put_long ((uaecptr)(regs.vbr + 0x7c), v);
+ Interrupt (7);
+ put_long ((uaecptr)(regs.vbr + 0x7c), old);
+ }
} else {
old = get_long((uaecptr)(regs.vbr + 0x7c));
put_long ((uaecptr)(regs.vbr + 0x7c), hrtmem_start + 12 + 2 + get_word (hrtmem_start + 14));
hrtmem_start = 0xd00000;
hrtmem_size = 0x40000;
hrtmem2_start = 0xb00000;
- hrtmem2_size = 0xc0000;
+ hrtmem2_size = 0x100000;
+ hrtmem2_size2 = 0x0c0000;
hrtmem3_start = 0xe00000;
hrtmem3_size = 0x80000;
hrtmemory = mapped_malloc (hrtmem_size, cart_memnames[cart_type]);
memset (hrtmemory, 0x00, hrtmem_size);
- zfile_fseek (f, 0, SEEK_SET);
- zfile_fread (hrtmemory, hrtmem_size, 1, f);
- zfile_fclose (f);
+ if (f) {
+ zfile_fseek (f, 0, SEEK_SET);
+ zfile_fread (hrtmemory, hrtmem_size, 1, f);
+ zfile_fclose (f);
+ }
hrtmem_mask = hrtmem_size - 1;
hrtmem2_mask = hrtmem2_size - 1;
if (strlen(currprefs.cartfile) == 0)
return 0;
+ rd = getromdatabypath(currprefs.cartfile);
+ if (rd && rd->id == 62)
+ return superiv_init(NULL);
f = zfile_fopen(currprefs.cartfile,"rb");
if (!f) {
write_log("failed to load '%s' cartridge ROM\n", currprefs.cartfile);
{
struct zfile *f;
uae_u32 header[4];
+ struct romdata *rd;
+ int isinternal = 0;
/* Don't load a rom if one is already loaded. Use action_replay_unload() first. */
if (armemory_rom)
if (hrtmemory)
return 0;
- //currprefs.cart_internal= changed_prefs.cart_internal = 2;
-
triggered_once = 0;
armodel = 0;
cart_type = CART_AR;
hrtmem_start = 0xa10000;
- if (!currprefs.cart_internal) {
+ rd = getromdatabypath(currprefs.cartfile);
+ if (rd && rd->id == 63)
+ isinternal = 1;
+ if (!isinternal) {
if (strlen(currprefs.cartfile) == 0)
return 0;
f = zfile_fopen(currprefs.cartfile,"rb");
}
hrtmem_size = 0x100000;
hrtmem_mask = hrtmem_size - 1;
- if (currprefs.cart_internal == 1) {
+ if (isinternal) {
#ifdef ACTION_REPLAY_HRTMON
struct zfile *zf = zfile_fopen_data ("hrtrom.gz", hrtrom_len, hrtrom);
f = zfile_gunzip (zf);
return;
map_banks (&hrtmem_bank, hrtmem_start >> 16, hrtmem_size >> 16, 0);
if (hrtmem2_size)
- map_banks (&hrtmem2_bank, hrtmem2_start >> 16, hrtmem2_size >> 16, 0);
+ map_banks (&hrtmem2_bank, hrtmem2_start >> 16, hrtmem2_size2 >> 16, 0);
if (hrtmem3_size)
map_banks (&hrtmem3_bank, hrtmem3_start >> 16, hrtmem3_size >> 16, 0);
}
return;
map_banks (&dummy_bank, hrtmem_start >> 16, hrtmem_size >> 16, 0);
if (hrtmem2_size)
- map_banks (&dummy_bank, hrtmem2_start >> 16, hrtmem2_size >> 16, 0);
+ map_banks (&dummy_bank, hrtmem2_start >> 16, hrtmem2_size2 >> 16, 0);
if (hrtmem3_size)
map_banks (&dummy_bank, hrtmem3_start >> 16, hrtmem3_size >> 16, 0);
}
}
}
-static void scsi_atapi_fixup_inquiry (uaecptr req)
+static void scsi_atapi_fixup_inquiry (struct amigascsi *as)
{
- uaecptr scsi_data = get_long (req + 0);
- uae_u32 scsi_len = get_long (req + 4);
- uaecptr scsi_cmd = get_long (req + 12);
+ uae_u8 *scsi_data = as->data;
+ uae_u32 scsi_len = as->len;
+ uae_u8 *scsi_cmd = as->cmd;
uae_u8 cmd;
- cmd = get_byte (scsi_cmd);
+ cmd = scsi_cmd[0];
/* CDROM INQUIRY: most Amiga programs expect ANSI version == 2
* (ATAPI normally responds with zero)
*/
if (cmd == 0x12 && scsi_len > 2 && scsi_data) {
- uae_u8 per = get_byte (scsi_data + 0);
- uae_u8 b = get_byte (scsi_data + 2);
+ uae_u8 per = scsi_data[0];
+ uae_u8 b = scsi_data[2];
/* CDROM and ANSI version == 0 ? */
if ((per & 31) == 5 && (b & 7) == 0) {
b |= 2;
- put_byte (scsi_data + 2, b);
+ scsi_data[2] = b;
}
}
}
-int sys_command_scsi_direct (int unitnum, uaecptr request)
+int sys_command_scsi_direct_native(int unitnum, struct amigascsi *as)
{
- int ret = device_func[DF_SCSI]->exec_direct (unitnum, request);
+ int ret = device_func[DF_SCSI]->exec_direct (unitnum, as);
if (!ret && device_func[DF_SCSI]->isatapi(unitnum))
- scsi_atapi_fixup_inquiry (request);
+ scsi_atapi_fixup_inquiry (as);
+ return ret;
+}
+
+int sys_command_scsi_direct (int unitnum, uaecptr acmd)
+{
+ int ret, i;
+ struct amigascsi as;
+ uaecptr ap;
+ addrbank *bank;
+
+ ap = get_long (acmd + 0);
+ as.len = get_long (acmd + 4);
+
+ bank = &get_mem_bank (ap);
+ if (!bank || !bank->check(ap, as.len))
+ return -5;
+ as.data = bank->xlateaddr (ap);
+
+ ap = get_long (acmd + 12);
+ as.cmd_len = get_word (acmd + 16);
+ for (i = 0; i < as.cmd_len; i++)
+ as.cmd[i] = get_byte(ap++);
+ as.flags = get_byte (acmd + 20);
+ as.sense_len = get_word (acmd + 26);
+
+ ret = sys_command_scsi_direct_native (unitnum, &as);
+
+ put_long(acmd + 8, as.actual);
+ put_word(acmd + 18, as.cmdactual);
+ put_byte(acmd + 21, as.status);
+ put_word(acmd + 28, as.sactual);
+
+ ap = get_long(acmd + 22);
+ for (i = 0; i < as.sactual; i++)
+ put_byte(ap, as.sensedata[i]);
+
return ret;
}
};
/* 3-state boolean! */
static const char *fullmodes[] = { "false", "true", /* "FILE_NOT_FOUND", */ "fullwindow", 0 };
+/* bleh for compatibility */
+static const char *scsimode[] = { "false", "true", "scsi", 0 };
static const char *obsolete[] = {
"accuracy", "gfx_opengl", "gfx_32bit_blits", "32bit_blits",
free (str);
if (p->cartident[0])
cfgfile_write (f, "cart=%s\n", p->cartident);
- cfgfile_write (f, "cart_internal=%s\n", cartsmode[p->cart_internal]);
+ //cfgfile_write (f, "cart_internal=%s\n", cartsmode[p->cart_internal]);
cfgfile_write (f, "kickshifter=%s\n", p->kickshifter ? "true" : "false");
p->nr_floppies = 4;
cfgfile_write (f, "serial_on_demand=%s\n", p->serial_demand ? "true" : "false");
cfgfile_write (f, "serial_hardware_ctsrts=%s\n", p->serial_hwctsrts ? "true" : "false");
cfgfile_write (f, "serial_direct=%s\n", p->serial_direct ? "true" : "false");
- cfgfile_write (f, "scsi=%s\n", p->scsi ? "true" : "false");
+ cfgfile_write (f, "scsi=%s\n", scsimode[p->scsi]);
cfgfile_write (f, "uaeserial=%s\n", p->uaeserial ? "true" : "false");
cfgfile_write (f, "sound_output=%s\n", soundmode1[p->produce_sound]);
|| cfgfile_yesno (option, value, "comp_midopt", &p->comp_midopt)
|| cfgfile_yesno (option, value, "comp_lowopt", &p->comp_lowopt)
|| cfgfile_yesno (option, value, "rtg_nocustom", &p->picasso96_nocustom)
- || cfgfile_yesno (option, value, "uaeserial", &p->uaeserial)
- || cfgfile_yesno (option, value, "scsi", &p->scsi))
+ || cfgfile_yesno (option, value, "uaeserial", &p->uaeserial))
return 1;
if (cfgfile_intval (option, value, "cachesize", &p->cachesize, 1)
|| cfgfile_strval (option, value, "ksmirror", &p->cs_ksmirror, ksmirrortype, 0)
|| cfgfile_strval (option, value, "ciaatod", &p->cs_ciaatod, ciaatodmode, 0)
|| cfgfile_strval (option, value, "ide", &p->cs_ide, idemode, 0)
+ || cfgfile_strval (option, value, "scsi", &p->scsi, scsimode, 0)
|| cfgfile_strval (option, value, "comp_trustword", &p->comptrustword, compmode, 0)
|| cfgfile_strval (option, value, "comp_trustlong", &p->comptrustlong, compmode, 0)
|| cfgfile_strval (option, value, "comp_trustnaddr", &p->comptrustnaddr, compmode, 0)
|| cfgfile_string (option, value, "ghostscript_parameters", p->ghostscript_parameters, sizeof p->ghostscript_parameters))
return 1;
- if (cfgfile_strval (option, value, "cart_internal", &p->cart_internal, cartsmode, 0))
+ if (cfgfile_strval (option, value, "cart_internal", &p->cart_internal, cartsmode, 0)) {
+ if (p->cart_internal) {
+ struct romdata *rd = getromdatabyid(63);
+ if (rd)
+ sprintf(p->cartfile, ":%s", rd->configname);
+ }
return 1;
+ }
if (cfgfile_string (option, value, "kickstart_rom", p->romident, sizeof p->romident)) {
decode_rom_ident (p->romfile, sizeof p->romfile, p->romident);
return 1;
static int configure_rom (struct uae_prefs *p, int *rom, int msg)
{
struct romdata *rd;
- char tmp1[MAX_DPATH], tmp2[MAX_DPATH];
char *path = 0;
int i;
- tmp2[0] = 0;
i = 0;
while (rom[i] >= 0) {
rd = getromdatabyid (rom[i]);
continue;
}
path = romlist_get (rd);
- if (!path) {
- getromname (rd, tmp1);
- strcat (tmp2, "- ");
- strcat (tmp2, tmp1);
- strcat (tmp2, "\n");
- i++;
- continue;
- }
- break;
+ if (path)
+ break;
+ i++;
}
if (!path) {
- if (msg) {
- char tmp3[MAX_DPATH];
- translate_message (NUMSG_ROMNEED, tmp3);
- gui_message (tmp3, tmp2);
- }
+ if (msg)
+ romwarning(rom);
return 0;
}
switch (rd->type)
}
}
+static int bip_a3000 (struct uae_prefs *p, int config, int compa, int romcheck)
+{
+ int roms[2];
+
+ if (config) {
+ roms[0] = 61;
+ } else {
+ roms[0] = 59;
+ }
+ roms[1] = -1;
+ p->immediate_blits = 1;
+ p->bogomem_size = 0;
+ p->chipmem_size = 0x200000;
+ p->cpu_model = 68030;
+ p->fpu_model = 68882;
+ p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
+ p->cpu_compatible = p->address_space_24 = 0;
+ p->m68k_speed = -1;
+ p->immediate_blits = 0;
+ p->produce_sound = 2;
+ p->cachesize = 8192;
+ p->dfxtype[0] = DRV_35_HD;
+ p->dfxtype[1] = DRV_35_HD;
+ p->floppy_speed = 0;
+ p->cpu_idle = 150;
+ p->cs_compatible = CP_A3000;
+ p->mbresmem_low_size = 8 * 1024 * 1024;
+ build_in_chipset_prefs (p);
+ p->cs_ciaatod = p->ntscmode ? 2 : 1;
+ return configure_rom (p, roms, romcheck);
+}
+static int bip_a4000 (struct uae_prefs *p, int config, int compa, int romcheck)
+{
+ int roms[8];
+
+ roms[0] = 16;
+ roms[1] = 31;
+ roms[2] = 13;
+ roms[3] = -1;
+ p->immediate_blits = 1;
+ p->bogomem_size = 0;
+ p->chipmem_size = 0x200000;
+ p->cpu_model = 68040;
+ p->fpu_model = 68040;
+ p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
+ p->cpu_compatible = p->address_space_24 = 0;
+ p->m68k_speed = -1;
+ p->immediate_blits = 0;
+ p->produce_sound = 2;
+ p->cachesize = 8192;
+ p->dfxtype[0] = DRV_35_HD;
+ p->dfxtype[1] = DRV_35_HD;
+ p->floppy_speed = 0;
+ p->cpu_idle = 150;
+ p->cs_compatible = CP_A4000;
+ build_in_chipset_prefs (p);
+ p->cs_ciaatod = p->ntscmode ? 2 : 1;
+ return configure_rom (p, roms, romcheck);
+}
+static int bip_a4000t (struct uae_prefs *p, int config, int compa, int romcheck)
+{
+
+ int roms[8];
+
+ roms[0] = 16;
+ roms[1] = 31;
+ roms[2] = 13;
+ roms[3] = -1;
+ p->immediate_blits = 1;
+ p->bogomem_size = 0;
+ p->chipmem_size = 0x200000;
+ p->cpu_model = 68040;
+ p->fpu_model = 68040;
+ p->chipset_mask = CSMASK_AGA | CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
+ p->cpu_compatible = p->address_space_24 = 0;
+ p->m68k_speed = -1;
+ p->immediate_blits = 0;
+ p->produce_sound = 2;
+ p->cachesize = 8192;
+ p->dfxtype[0] = DRV_35_HD;
+ p->dfxtype[1] = DRV_35_HD;
+ p->floppy_speed = 0;
+ p->cpu_idle = 150;
+ p->cs_compatible = CP_A4000T;
+ build_in_chipset_prefs (p);
+ p->cs_ciaatod = p->ntscmode ? 2 : 1;
+ return configure_rom (p, roms, romcheck);
+}
+
static int bip_a1000 (struct uae_prefs *p, int config, int compa, int romcheck)
{
int roms[4];
p->sound_filter = FILTER_SOUND_ON;
set_68000_compa (p, compa);
p->dfxtype[1] = DRV_NONE;
- p->cs_compatible = 7;
+ p->cs_compatible = CP_A1000;
build_in_chipset_prefs (p);
if (config > 0)
p->chipset_mask |= CSMASK_NO_EHB;
p->dfxtype[0] = DRV_35_DD;
p->dfxtype[1] = DRV_NONE;
set_68000_compa (p, compa);
- p->cs_compatible = 2;
+ p->cs_compatible = CP_CDTV;
build_in_chipset_prefs (p);
fetch_datapath (p->flashfile, sizeof (p->flashfile));
strcat(p->flashfile, "cdtv.nvr");
p->dfxtype[0] = DRV_NONE;
p->dfxtype[1] = DRV_NONE;
set_68020_compa (p, compa);
- p->cs_compatible = 3;
+ p->cs_compatible = CP_CD32;
build_in_chipset_prefs (p);
fetch_datapath (p->flashfile, sizeof (p->flashfile));
strcat(p->flashfile, "cd32.nvr");
p->cs_rtc = 2;
}
set_68020_compa (p, compa);
- p->cs_compatible = 8;
+ p->cs_compatible = CP_A1200;
build_in_chipset_prefs (p);
return configure_rom (p, roms, romcheck);
}
p->fastmem_size = 0x400000;
p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
set_68000_compa (p, compa);
- p->cs_compatible = 6;
+ p->cs_compatible = CP_A600;
build_in_chipset_prefs (p);
return configure_rom (p, roms, romcheck);
}
p->fastmem_size = 0x400000;
p->chipset_mask = CSMASK_ECS_AGNUS | CSMASK_ECS_DENISE;
set_68000_compa (p, compa);
- p->cs_compatible = 5;
+ p->cs_compatible = CP_A500P;
build_in_chipset_prefs (p);
return configure_rom (p, roms, romcheck);
}
break;
}
set_68000_compa (p, compa);
- p->cs_compatible = 4;
+ p->cs_compatible = CP_A500;
build_in_chipset_prefs (p);
return configure_rom (p, roms, romcheck);
}
p->dfxtype[0] = DRV_NONE;
p->dfxtype[1] = DRV_NONE;
set_68000_compa (p, compa);
- p->cs_compatible = 4;
+ p->cs_compatible = CP_A500;
build_in_chipset_prefs (p);
fetch_datapath (p->flashfile, sizeof (p->flashfile));
strcat(p->flashfile, "arcadia.nvr");
v = bip_a1200 (p, config, compa, romcheck);
break;
case 5:
- v = bip_cd32 (p, config, compa, romcheck);
+ v = bip_a3000 (p, config, compa, romcheck);
break;
case 6:
- v = bip_cdtv (p, config, compa, romcheck);
+ v = bip_a4000 (p, config, compa, romcheck);
break;
case 7:
- v = bip_arcadia (p, config , compa, romcheck);
+ v = bip_a4000t (p, config, compa, romcheck);
+ break;
+ case 8:
+ v = bip_cd32 (p, config, compa, romcheck);
+ break;
+ case 9:
+ v = bip_cdtv (p, config, compa, romcheck);
break;
case 10:
+ v = bip_arcadia (p, config , compa, romcheck);
+ break;
+ case 11:
v = bip_super (p, config, compa, romcheck);
break;
}
switch (p->cs_compatible)
{
- case 1: // generic
+ case CP_GENERIC: // generic
p->cs_rtc = 2;
p->cs_fatgaryrev = 0;
p->cs_ide = -1;
p->cs_mbdmac = 1;
p->cs_ramseyrev = 0x0f;
break;
- case 2: // CDTV
+ case CP_CDTV: // CDTV
p->cs_rtc = 1;
p->cs_cdtvcd = p->cs_cdtvram = 1;
p->cs_df0idhw = 0;
p->cs_ksmirror = 0;
break;
- case 3: // CD32
+ case CP_CD32: // CD32
p->cs_cd32c2p = p->cs_cd32cd = p->cs_cd32nvram = 1;
p->cs_ksmirror = 0;
break;
- case 4: // A500
+ case CP_A500: // A500
p->cs_df0idhw = 0;
break;
- case 5: // A500+
+ case CP_A500P: // A500+
break;
- case 6: // A600
+ case CP_A600: // A600
p->cs_ide = 1;
p->cs_pcmcia = 1;
break;
- case 7: // A1000
+ case CP_A1000: // A1000
p->cs_a1000ram = 1;
p->cs_ciaatod = p->ntscmode ? 2 : 1;
p->cs_ksmirror = 0;
p->cs_rtc = 0;
p->chipset_mask |= CSMASK_BLTBUSY_BUG;
break;
- case 8: // A1200
+ case CP_A1200: // A1200
p->cs_ide = 1;
p->cs_pcmcia = 1;
p->cs_ksmirror = 2;
break;
- case 9: // A2000
+ case CP_A2000: // A2000
p->cs_rtc = 1;
p->cs_ciaatod = p->ntscmode ? 2 : 1;
break;
break;
- case 10: // A3000
+ case CP_A3000: // A3000
p->cs_rtc = 2;
p->cs_fatgaryrev = 0;
p->cs_ramseyrev = 0x0d;
p->cs_mbdmac = 1;
p->cs_ciaatod = p->ntscmode ? 2 : 1;
break;
- case 11: // A3000T
+ case CP_A3000T: // A3000T
p->cs_rtc = 2;
p->cs_fatgaryrev = 0;
p->cs_ramseyrev = 0x0d;
p->cs_mbdmac = 1;
p->cs_ciaatod = p->ntscmode ? 2 : 1;
break;
- case 12: // A4000
+ case CP_A4000: // A4000
p->cs_rtc = 2;
p->cs_fatgaryrev = 0;
p->cs_ramseyrev = 0x0f;
p->cs_ide = 2;
p->cs_mbdmac = 0;
break;
- case 13: // A4000T
+ case CP_A4000T: // A4000T
p->cs_rtc = 2;
p->cs_fatgaryrev = 0;
p->cs_ramseyrev = 0x0f;
}
// Turn off illegal-mem logging when using JIT...
- if( currprefs.cachesize )
+ if(currprefs.cachesize)
currprefs.illegal_mem = changed_prefs.illegal_mem;// = 0;
currprefs.comp_midopt=changed_prefs.comp_midopt;
currprefs.comp_lowopt=changed_prefs.comp_lowopt;
- if ( ( !canbang || !currprefs.cachesize ) &&
- currprefs.comptrustbyte != 1 )
+ if ((!canbang || !currprefs.cachesize) &&
+ currprefs.comptrustbyte != 1)
{
// Set all of these to indirect when canbang == 0
// Basically, set the compforcesettings option...
changed_prefs.comptrustnaddr= 1;
changed_prefs.compforcesettings = 1;
- if( currprefs.cachesize )
+ if(currprefs.cachesize)
{
write_log( "JIT: Reverting to \"indirect\" access, because canbang is zero!\n" );
}
int debug_copper;
int debug_sprite_mask = 0xff;
+static uaecptr processptr;
+static char *processname;
+
static uaecptr debug_copper_pc;
extern int audio_channel_mask;
debugger_active = 0;
debugging = 0;
exception_debugging = 0;
+ processptr = 0;
+ xfree(processname);
+ processname = NULL;
}
void activate_debugger (void)
" Find effective address <address>\n"
" fi Step forward until PC points to RTS/RTD or RTE\n"
" fi <opcode> Step forward until PC points to <opcode>\n"
+ " fp \"<name>\"/<addr> Step forward until process <name> or <addr> is active\n"
" fl List breakpoints\n"
" fd Remove all breakpoints\n"
" f <addr1> <addr2> Step forward until <addr1> <= PC <= <addr2>\n"
" H[H] <cnt> Show PC history (HH=full CPU info) <cnt> instructions\n"
" C <value> Search for values like energy or lifes in games\n"
" Cl List currently found trainer addresses\n"
- " D Deep trainer\n"
+ " D[idx <[max diff]>] Deep trainer. i=new value must be larger, d=smaller,\n"
+ " x = must be same.\n"
" W <address> <value> Write into Amiga memory\n"
" w <num> <address> <length> <R/W/I/F> [<value>] (read/write/opcode/freeze)\n"
" Add/remove memory watchpoints\n"
static int next_string (char **c, char *out, int max, int forceupper)
{
char *p = out;
+ int startmarker = 0;
+ if (**c == '\"') {
+ startmarker = 1;
+ (*c)++;
+ }
*p = 0;
while (**c != 0) {
- if (**c == 32) {
+ if (**c == '\"' && startmarker)
+ break;
+ if (**c == 32 && !startmarker) {
ignore_ws (c);
- return strlen (out);
+ break;
}
*p = next_char (c);
if (forceupper)
uaecptr prev, prevx;
int size, sizex;
- *next = 0;
if (addr >= lastaddr()) {
*next = -1;
return 0xffffffff;
prev = currprefs.z3fastmem_start;
size = currprefs.z3fastmem_size;
- sizex = size;
- size = currprefs.mbresmem_high_size;
- if (size) {
+ if (currprefs.mbresmem_high_size) {
+ sizex = size;
prevx = prev;
+ size = currprefs.mbresmem_high_size;
prev = a3000hmem_start;
if (addr == prev + size) {
- *next = sizex;
+ *next = prevx + sizex;
return prevx;
}
}
- sizex = size;
- size = currprefs.mbresmem_low_size;
- if (size) {
+ if (currprefs.mbresmem_low_size) {
prevx = prev;
+ sizex = size;
+ size = currprefs.mbresmem_low_size;
prev = a3000lmem_start;
if (addr == prev + size) {
- *next = sizex;
+ *next = prevx + sizex;
return prevx;
}
}
- sizex = size;
- size = currprefs.bogomem_size;
- if (size) {
+ if (currprefs.bogomem_size) {
+ sizex = size;
prevx = prev;
+ size = currprefs.bogomem_size;
prev = bogomem_start;
if (addr == prev + size) {
- *next = sizex;
+ *next = prevx + sizex;
return prevx;
}
}
- sizex = size;
- size = currprefs.fastmem_size;
- if (size) {
+ if (currprefs.fastmem_size) {
+ sizex = size;
prevx = prev;
+ size = currprefs.fastmem_size;
prev = fastmem_start;
if (addr == prev + size) {
- *next = sizex;
+ *next = prevx + sizex;
return prevx;
}
}
sizex = size;
+ prevx = prev;
size = currprefs.chipmem_size;
if (addr == size) {
- *next = sizex;
- return prev;
+ *next = prevx + sizex;
+ return prevx;
}
if (addr == 1)
*next = size;
*end = currprefs.chipmem_size;
return 0;
}
+ if (end)
+ next = *end;
addr = nextaddr2(addr + 1, &next);
+ if (end)
+ *end = next;
#if 0
if (next && addr != 0xffffffff) {
uaecptr xa = addr;
totaltrainers++;
return 1;
}
-static void listcheater(int mode)
+static void listcheater(int mode, int size)
{
int i, skip;
skip = 8;
for(i = 0; i < totaltrainers; i++) {
struct trainerstruct *ts = &trainerdata[i];
- uae_u8 b = get_byte(ts->addr);
+ uae_u16 b;
+
+ if (size) {
+ b = get_byte(ts->addr);
+ } else {
+ b = get_word(ts->addr);
+ }
if (mode)
- console_out("%08.8X=%2.2X ", ts->addr, b, b);
+ console_out("%08.8X=%4.4X ", ts->addr, b);
else
console_out("%08.8X ", ts->addr);
if ((i % skip) == skip)
}
}
-static void deepcheatsearch (char v)
+static void deepcheatsearch (char **c)
{
static int first = 1;
static uae_u8 *memtmp;
uae_u8 *p1, *p2;
uaecptr addr, end;
int i, wasmodified;
+ static int size;
+ static int inconly, deconly, maxdiff;
int addrcnt, cnt;
+ char v;
+
+ v = toupper(**c);
+
+ if(!memtmp || v == 'S') {
+ maxdiff = 0x10000;
+ inconly = 0;
+ deconly = 0;
+ size = 1;
+ }
+
+ if (**c)
+ (*c)++;
+ ignore_ws(c);
+ if ((**c) == '1' || (**c) == '2') {
+ size = **c - '0';
+ (*c)++;
+ }
+ if (more_params(c))
+ maxdiff = readint(c);
if (!memtmp || v == 'S') {
first = 1;
console_out("deep trainer first pass complete.\n");
return;
}
+ inconly = deconly = 0;
wasmodified = v == 'X' ? 0 : 1;
+ if (v == 'I')
+ inconly = 1;
+ if (v == 'D')
+ deconly = 1;
p1 = memtmp;
p2 = memtmp + memsize;
addrcnt = 0;
cnt = 0;
addr = 0xffffffff;
while ((addr = nextaddr(addr, NULL)) != 0xffffffff) {
- uae_u8 b = get_byte (addr);
+ uae_s32 b, b2;
+ int doremove = 0;
int addroff = addrcnt >> 3;
- int addrmask = 1 << (addrcnt & 7);
+ int addrmask ;
+
+ if (size == 1) {
+ b = (uae_s8)get_byte (addr);
+ b2 = (uae_s8)p1[addrcnt];
+ addrmask = 1 << (addrcnt & 7);
+ } else {
+ b = (uae_s16)get_word (addr);
+ b2 = (uae_s16)((p1[addrcnt] << 8) | p1[addrcnt + 1]);
+ addrmask = 3 << (addrcnt & 7);
+ }
+
if (p2[addroff] & addrmask) {
- if ((wasmodified && b == *p1) || (!wasmodified && b != *p1))
+ if (wasmodified) {
+ int diff = b - b2;
+ if (b == b2)
+ doremove = 1;
+ if (abs(diff) > maxdiff)
+ doremove = 1;
+ if (inconly && diff < 0)
+ doremove = 1;
+ if (deconly && diff > 0)
+ doremove = 1;
+ } else if (!wasmodified && b != b2) {
+ doremove = 1;
+ }
+ if (doremove)
p2[addroff] &= ~addrmask;
else
cnt++;
}
- *p1++ = b;
- addrcnt++;
+ if (size == 1) {
+ p1[addrcnt] = b;
+ addrcnt++;
+ } else {
+ p1[addrcnt] = b >> 8;
+ p1[addrcnt + 1] = b >> 0;
+ addr = nextaddr(addr, NULL);
+ if (addr == 0xffffffff)
+ break;
+ addrcnt += 2;
+ }
}
+
console_out ("%d addresses found\n", cnt);
if (cnt <= MAX_CHEAT_VIEW) {
clearcheater();
cnt = 0;
addrcnt = 0;
+ addr = 0xffffffff;
while ((addr = nextaddr(addr, NULL)) != 0xffffffff) {
int addroff = addrcnt >> 3;
- int addrmask = 1 << (addrcnt & 7);
+ int addrmask = (size == 1 ? 1 : 3) << (addrcnt & 7);
if (p2[addroff] & addrmask)
- addcheater(addr, 1);
- addrcnt++;
+ addcheater(addr, size);
+ addrcnt += size;
cnt++;
}
- listcheater(1);
+ listcheater(1, size);
} else {
console_out("Now continue with 'g' and use 'D' again after you have lost another life\n");
}
}
if (toupper(**c) == 'L') {
- listcheater(1);
+ listcheater(1, size);
return;
}
ignore_ws (c);
vlist[prevmemcnt >> 3] &= ~(1 << (prevmemcnt & 7));
prevmemcnt++;
}
- listcheater(0);
+ listcheater(0, size);
}
console_out ("Found %d possible addresses with 0x%X (%u) (%d bytes)\n", count, val, val, size);
console_out ("Now continue with 'g' and use 'C' with a different value\n");
memory_map_dump_2 (1);
}
+STATIC_INLINE uaecptr BPTR2APTR(uaecptr addr)
+{
+ return addr << 2;
+}
+static char* BSTR2CSTR(uae_u8 *bstr)
+{
+ char *cstr = NULL;
+ cstr = xmalloc(bstr[0] + 1);
+ if (cstr) {
+ memcpy(cstr, bstr + 1, bstr[0]);
+ cstr[bstr[0]] = 0;
+ }
+ return cstr;
+}
+
+static void print_task_info(uaecptr node)
+{
+ int process = get_byte(node + 8) == 13 ? 1 : 0;
+ console_out ("%08X: %08X", node, 0);
+ console_out (process ? " PROCESS '%s'" : " TASK '%s'\n", get_real_address (get_long (node + 10)));
+ if (process) {
+ uaecptr cli = BPTR2APTR(get_long(node + 172));
+ int tasknum = get_long(node + 140);
+ if (cli && tasknum) {
+ uae_u8 *command_bstr = get_real_address(BPTR2APTR(get_long(cli + 16)));
+ char * command = BSTR2CSTR(command_bstr);;
+ console_out(" [%d, '%s']\n", tasknum, command);
+ xfree(command);
+ } else {
+ console_out ("\n");
+ }
+ }
+}
+
static void show_exec_tasks (void)
{
uaecptr execbase = get_long (4);
console_out ("execbase at 0x%08X\n", (unsigned long) execbase);
console_out ("Current:\n");
node = get_long (execbase + 276);
- console_out ("%08X: %08X %s\n", node, 0, get_real_address (get_long (node + 10)));
+ print_task_info (node);
console_out ("Ready:\n");
node = get_long (taskready);
end = get_long (taskready + 4);
while (node) {
- console_out ("%08X: %08X %s\n", node, 0, get_real_address (get_long (node + 10)));
+ print_task_info (node);
node = get_long (node);
}
console_out ("Waiting:\n");
node = get_long (taskwait);
end = get_long (taskwait + 4);
while (node) {
- console_out ("%08X: %08X %s\n", node, 0, get_real_address (get_long (node + 10)));
+ print_task_info (node);
node = get_long (node);
}
}
return 1;
}
+static int process_breakpoint(char **c)
+{
+ processptr = 0;
+ xfree(processname);
+ processname = NULL;
+ if (!more_params (c))
+ return 0;
+ if (**c == '\"') {
+ processname = xmalloc(200);
+ next_string(c, processname, 200, 0);
+ } else {
+ processptr = readhex(c);
+ }
+ do_skip = 1;
+ skipaddr_doskip = 1;
+ skipaddr_start = 0;
+ return 1;
+}
+
static void savemem (char **cc)
{
uae_u8 b;
static void find_ea (char **inptr)
{
uae_u32 ea, sea, dea;
- uaecptr addr, end, endbank;
+ uaecptr addr, end;
addr = 0;
end = lastaddr();
end = readhex (inptr);
}
console_out("Searching from %08.8X to %08.8X\n", addr, end);
- while((addr = nextaddr(addr, &endbank)) != 0xffffffff) {
- if (addr == end)
- break;
- if ((addr & 1) == 0 && addr + 6 <= endbank) {
+ while((addr = nextaddr(addr, &end)) != 0xffffffff) {
+ if ((addr & 1) == 0 && addr + 6 <= end) {
sea = 0xffffffff;
dea = 0xffffffff;
m68k_disasm_ea (NULL, addr, NULL, 1, &sea, &dea);
else
m68k_dumpstate (stdout, &nextpc);
break;
- case 'D': deepcheatsearch (toupper(*inptr)); break;
+ case 'D': deepcheatsearch (&inptr); break;
case 'C': cheatsearch (&inptr); break;
case 'W': writeintomem (&inptr); break;
case 'w': memwatch (&inptr); break;
if (inptr[0] == 'a') {
next_char(&inptr);
find_ea (&inptr);
+ } else if (inptr[0] == 'p') {
+ inptr++;
+ if (process_breakpoint(&inptr))
+ return;
} else {
if (instruction_breakpoint (&inptr))
return;
if (skipaddr_doskip) {
if (skipaddr_start == pc)
bp = 1;
- if (skipins != 0xffffffff) {
+ if ((processptr || processname) && !notinrom()) {
+ uaecptr execbase = get_long (4);
+ uaecptr activetask = get_long (execbase + 276);
+ int process = get_byte(activetask + 8) == 13 ? 1 : 0;
+ char *name = get_real_address(get_long(activetask + 10));
+ if (process) {
+ uaecptr cli = BPTR2APTR(get_long(activetask + 172));
+ uaecptr seglist = 0;
+ char *command = NULL;
+ if (cli) {
+ if (processname) {
+ uae_u8 *command_bstr = get_real_address(BPTR2APTR(get_long(cli + 16)));
+ command = BSTR2CSTR(command_bstr);
+ }
+ seglist = BPTR2APTR(get_long(cli + 60));
+ } else {
+ seglist = BPTR2APTR(get_long(activetask + 128));
+ seglist = BPTR2APTR(get_long(seglist + 12));
+ }
+ if (activetask == processptr || (processname && (!stricmp(name, processname) || (command && !stricmp(command, processname))))) {
+ while (seglist) {
+ uae_u32 size = get_long(seglist - 4) - 4;
+ if (pc >= (seglist + 4) && pc < (seglist + size)) {
+ bp = 1;
+ break;
+ }
+ seglist = BPTR2APTR(get_long(seglist));
+ }
+ }
+ xfree(command);
+ }
+ } else if (skipins != 0xffffffff) {
if (skipins == 0x10000) {
if (opcode == 0x4e75 || opcode == 0x4e73 || opcode == 0x4e77)
bp = 1;
skipaddr_doskip = 0;
exception_debugging = 0;
debug_rewind = 0;
+ processptr = 0;
#if 0
if (!currprefs.statecapture) {
changed_prefs.statecapture = currprefs.statecapture = 1;
int notinrom (void)
{
- if (munge24 (m68k_getpc(®s)) < 0x00e00000)
+ uaecptr pc = munge24(m68k_getpc(®s));
+ if (pc < 0x00e00000 || pc > 0x00ffffff)
return 1;
return 0;
}
crc++;
crc += v;
}
+ if (dos == 0x4b49434b) { /* KICK */
+ ret = 10;
+ goto end;
+ }
crc ^= 0xffffffff;
if (crc != crc2) {
ret = 3;
return 1;
if (currprefs.uaeserial)
return 1;
- if (currprefs.scsi)
+ if (currprefs.scsi == 1)
return 1;
if (currprefs.win32_outsidemouse)
return 1;
#define GAYLE_LOG 0
#define IDE_LOG 0
+#define MBRES_LOG 0
#include "sysconfig.h"
#include "sysdeps.h"
write_log ("IDE_READ %08.8X PC=%X\n", addr, M68K_GETPC);
if (currprefs.cs_ide <= 0) {
if (addr == 0x201c) // AR1200 IDE detection hack
- return 0;
+ return 0x7f;
return 0xff;
}
if (addr >= GAYLE_IRQ_4000 && addr <= GAYLE_IRQ_4000 + 1 && currprefs.cs_ide == 2) {
return 0;
}
ide_reg = get_ide_reg(addr);
- /* Emulated "ide hack". Prevents long KS boot delay if no drives installed */
- if (idedrive[0].hdhfd.size == 0 && idedrive[2].hdhfd.size == 0)
+ /* Emulated "ide killer". Prevents long KS boot delay if no drives installed */
+ if (idedrive[0].hdhfd.size == 0 && idedrive[2].hdhfd.size == 0) {
+ if (ide_reg == IDE_STATUS)
+ return 0x7f;
return 0xff;
+ }
switch (ide_reg)
{
case IDE_DRVADDR:
{
addr &= 0xffff;
- if (GAYLE_LOG)
- write_log ("MBRES_WRITE %08.8X=%08.8X (%d) PC=%08.8X\n", addr, val, size, M68K_GETPC);
+ if (MBRES_LOG > 0)
+ write_log ("MBRES_WRITE %08X=%08X (%d) PC=%08X\n", addr, val, size, M68K_GETPC);
if (addr == 0x1002)
garyidoffset = -1;
if (addr == 0x03)
static uae_u32 mbres_read (uaecptr addr, int size)
{
+ uae_u32 v = 0;
addr &= 0xffff;
- if (GAYLE_LOG)
- write_log ("MBRES_READ %08.8X\n", addr);
-
/* Gary ID (I don't think this exists in real chips..) */
if (addr == 0x1002 && currprefs.cs_fatgaryrev >= 0) {
garyidoffset++;
garyidoffset &= 7;
- return (currprefs.cs_fatgaryrev << garyidoffset) & 0x80;
+ v = (currprefs.cs_fatgaryrev << garyidoffset) & 0x80;
}
if (addr == 0x43) { /* RAMSEY revision */
if (currprefs.cs_ramseyrev >= 0)
- return currprefs.cs_ramseyrev;
+ v = currprefs.cs_ramseyrev;
}
if (addr == 0x03) { /* RAMSEY config */
if (currprefs.cs_ramseyrev >= 0)
- return ramsey_config;
+ v = ramsey_config;
}
if (addr == 0x02) { /* coldreboot flag */
if (currprefs.cs_fatgaryrev >= 0)
- return gary_coldboot ? 0x80 : 0x00;
+ v = gary_coldboot ? 0x80 : 0x00;
}
if (addr == 0x01) { /* toenb flag */
if (currprefs.cs_fatgaryrev >= 0)
- return gary_toenb ? 0x80 : 0x00;
+ v = gary_toenb ? 0x80 : 0x00;
}
if (addr == 0x00) { /* timeout flag */
if (currprefs.cs_fatgaryrev >= 0)
- return gary_timeout ? 0x80 : 0x00;
+ v = gary_timeout ? 0x80 : 0x00;
}
- return 0;
+ if (MBRES_LOG > 0)
+ write_log ("MBRES_READ %08X=%08X (%d) PC=%08X\n", addr, v, size, M68K_GETPC);
+ return v;
}
static uae_u32 REGPARAM3 mbres_lget (uaecptr) REGPARAM;
break;
case i_MMUOP30A:
printf ("\tuaecptr pc = m68k_getpc (regs);\n");
- genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
+ genamode (curi->smode, "srcreg", curi->size, "extra", 0, 0, 0);
sync_m68k_pc ();
- printf ("\tmmu_op30(pc, opcode, regs, 1, extra);\n");
+ printf ("\tmmu_op30(pc, opcode, regs, 1, extraa);\n");
break;
case i_MMUOP30B:
printf ("\tuaecptr pc = m68k_getpc (regs);\n");
- genamode (curi->smode, "srcreg", curi->size, "extra", 1, 0, 0);
+ genamode (curi->smode, "srcreg", curi->size, "extra", 0, 0, 0);
sync_m68k_pc ();
printf ("\tmmu_op30(pc, opcode, regs, 0, 0);\n");
break;
hfd->bootpri = bootpri;
hfd->hfd.blocksize = blocksize;
if (!hdf_open(&hfd->hfd, path))
- return -1;
+ return 0;
hfd->path = my_strdup(path);
hfd->hfd.heads = surfaces;
hfd->hfd.reservedblocks = reserved;
p[2] = 0x20;
p[3] = 0;
r[0] += 4;
+ } else if (pcode == 3) {
+ p[0] = 3;
+ p[1] = 24;
+ p[10] = hdhfd->secspertrack >> 8;
+ p[11] = hdhfd->secspertrack;
+ p[12] = hfd->blocksize >> 8;
+ p[13] = hfd->blocksize;
+ p[20] = 0x80;
+ r[0] += p[1];
} else if (pcode == 4) {
p[0] = 4;
wl(p + 1, hdhfd->cyls);
- p[1] = 0x16;
+ p[1] = 24;
p[5] = hdhfd->heads;
ww(p + 20, 5400);
r[0] += p[1];
+ } else {
+ goto err;
}
scsi_len = lr = r[0] + 1;
break;
ls = 12;
break;
default:
+err:
lr = -1;
write_log ("UAEHF: unsupported scsi command 0x%02.2X\n", cmdbuf[0]);
status = 2; /* CHECK CONDITION */
int bufsize;
};
+struct amigascsi
+{
+ uae_u8 *data;
+ uae_u32 len;
+ uae_u8 cmd[16];
+ uae_u32 cmd_len;
+ uae_u8 flags;
+ uae_u8 sensedata[256];
+ uae_u16 sense_len;
+ uae_u16 cmdactual;
+ uae_u8 status;
+ uae_u16 actual;
+ uae_u16 sactual;
+};
+
typedef int (*open_bus_func)(int flags);
typedef void (*close_bus_func)(void);
typedef int (*open_device_func)(int);
typedef struct device_scsi_info* (*scsiinfo_func)(int, struct device_scsi_info*);
typedef uae_u8* (*execscsicmd_out_func)(int, uae_u8*, int);
typedef uae_u8* (*execscsicmd_in_func)(int, uae_u8*, int, int*);
-typedef int (*execscsicmd_direct_func)(int, uaecptr);
+typedef int (*execscsicmd_direct_func)(int, struct amigascsi*);
typedef int (*pause_func)(int, int);
typedef int (*stop_func)(int);
extern uae_u8 *sys_command_cd_rawread (int mode, int unitnum, int offset, int size);
extern uae_u8 *sys_command_read (int mode, int unitnum, int offset);
extern int sys_command_write (int mode, int unitnum, int offset);
+extern int sys_command_scsi_direct_native(int unitnum, struct amigascsi *as);
extern int sys_command_scsi_direct (int unitnum, uaecptr request);
extern int sys_command_ismedia (int mode, int unitnum, int quick);
#ifdef DEBUGGER
#define MAX_HIST 100
-#define MAX_LINEWIDTH 90
+#define MAX_LINEWIDTH 100
extern int debugging;
extern int exception_debugging;
NUMSG_NEEDEXT2, NUMSG_NOROM, NUMSG_NOROMKEY,
NUMSG_KSROMCRCERROR, NUMSG_KSROMREADERROR, NUMSG_NOEXTROM,
NUMSG_MODRIP_NOTFOUND, NUMSG_MODRIP_FINISHED, NUMSG_MODRIP_SAVE,
- NUMSG_KS68EC020, NUMSG_KS68020, NUMSG_ROMNEED, NUMSG_NOZLIB, NUMSG_STATEHD,
+ NUMSG_KS68EC020, NUMSG_KS68020, NUMSG_KS68030,
+ NUMSG_ROMNEED, NUMSG_EXPROMNEED, NUMSG_NOZLIB, NUMSG_STATEHD,
NUMSG_NOCAPS, NUMSG_OLDCAPS, NUMSG_KICKREP, NUMSG_KICKREPNO
} notify_user_msg;
extern int read_kickstart (struct zfile *f, uae_u8 *mem, int size, int dochecksum, int *cloanto_rom);
extern int decode_cloanto_rom_do (uae_u8 *mem, int size, int real_size);
extern void init_shm(void);
+extern void a3000_fakekick(int);
#define ROMTYPE_KICK 1
#define ROMTYPE_KICKCD32 2
#define ROMTYPE_KEY 256
#define ROMTYPE_ARCADIABIOS 512
#define ROMTYPE_ARCADIAGAME 1024
+#define ROMTYPE_HRTMON 2048
struct romdata {
char *name;
int cpu;
int cloanto;
int type;
+ char *configname;
};
struct romlist {
struct romdata *rd;
};
+extern struct romdata *getromdatabypath(char *path);
extern struct romdata *getromdatabycrc (uae_u32 crc32);
extern struct romdata *getromdatabydata (uae_u8 *rom, int size);
extern struct romdata *getromdatabyid (int id);
extern struct romdata *getromdatabyzfile (struct zfile *f);
extern struct romlist **getarcadiaroms (void);
extern struct romdata *getarcadiarombyname (char *name);
-extern struct romlist **getrombyident(int ver, int rev, int subver, int subrev, char *model, int all);
+extern struct romlist **getromlistbyident(int ver, int rev, int subver, int subrev, char *model, int all);
extern void getromname (struct romdata*, char*);
extern struct romdata *getromdatabyname (char*);
-extern struct romlist *getrombyids(int *ids);
+extern struct romlist *getromlistbyids(int *ids);
+extern void romwarning(int *ids);
+extern struct romlist *getromlistbyromdata(struct romdata *rd);
extern void romlist_add (char *path, struct romdata *rd);
extern char *romlist_get (struct romdata *rd);
extern void romlist_clear (void);
extern void m68k_dumpstate (void *, uaecptr *);
extern void m68k_disasm (void *, uaecptr, uaecptr *, int);
extern void sm68k_disasm(char *, char *, uaecptr addr, uaecptr *nextpc);
-extern void m68k_reset (void);
+extern void m68k_reset (int);
extern int getDivu68kCycles(uae_u32 dividend, uae_u16 divisor);
extern int getDivs68kCycles(uae_s32 dividend, uae_s16 divisor);
-extern void mmu_op (uae_u32, struct regstruct *regs, uae_u16);
-extern void mmu_op30 (uaecptr, uae_u32, struct regstruct *regs, int, uae_u16);
+extern void mmu_op (uae_u32, struct regstruct *regs, uae_u32);
+extern void mmu_op30 (uaecptr, uae_u32, struct regstruct *regs, int, uaecptr);
extern void fpp_opp (uae_u32, struct regstruct *regs, uae_u16);
extern void fdbcc_opp (uae_u32, struct regstruct *regs, uae_u16);
int controller;
};
+typedef enum { CP_GENERIC = 1, CP_CDTV, CP_CD32, CP_A500, CP_A500P, CP_A600, CP_A1000,
+ CP_A1200, CP_A2000, CP_A3000, CP_A3000T, CP_A4000, CP_A4000T };
+
struct uae_prefs {
struct strlist *all_lines;
struct scsi_data
{
+ int id;
int len;
uae_u8 *data;
int data_len;
int offset;
uae_u8 buffer[256 * 512];
struct hd_hardfiledata *hfd;
+ int nativescsiunit;
};
-extern struct scsi_data *scsi_alloc(struct hd_hardfiledata*);
+extern struct scsi_data *scsi_alloc(int,struct hd_hardfiledata*);
+extern struct scsi_data *scsi_alloc_native(int,int);
extern void scsi_free(struct scsi_data*);
+extern void scsi_reset(void);
extern void scsi_start_transfer(struct scsi_data*,int);
extern int scsi_send_data(struct scsi_data*, uae_u8);
#include "parallel.h"
#include "a2091.h"
#include "ncr_scsi.h"
+#include "scsi.h"
#ifdef USE_SDL
#include "SDL.h"
{
init_eventtab ();
+#ifdef SCSIEMU
+ scsi_reset ();
+ scsidev_reset ();
+ scsidev_start_threads ();
+#endif
+
#ifdef FILESYS
filesys_reset ();
#endif
filesys_start_threads ();
hardfile_reset ();
#endif
-#ifdef SCSIEMU
- scsidev_reset ();
- scsidev_start_threads ();
-#endif
#ifdef UAESERIAL
uaeserialdev_reset ();
uaeserialdev_start_threads ();
savestate_init ();
#ifdef SCSIEMU
+ scsi_reset ();
scsidev_install ();
#endif
#ifdef UAESERIAL
romlist_cnt = 0;
}
+struct romdata *getromdatabypath(char *path)
+{
+ int i;
+ for (i = 0; i < romlist_cnt; i++) {
+ struct romdata *rd = rl[i].rd;
+ if (rd->configname && path[0] == ':') {
+ if (!strcmp(path + 1, rd->configname))
+ return rd;
+ }
+ if (!strcmp(rl[i].path, path))
+ return rl[i].rd;
+ }
+ return NULL;
+}
+
+#define NEXT_ROM_ID 64
+
static struct romdata roms[] = {
{ "Cloanto Amiga Forever ROM key", 0, 0, 0, 0, 0, 0x869ae1b1, 2069, 0, 0, 1, ROMTYPE_KEY },
{ "Cloanto Amiga Forever 2006 ROM key", 0, 0, 0, 0, 0, 0xb01c4b56, 750, 48, 0, 1, ROMTYPE_KEY },
{ "KS ROM v1.2 (A500,A1000,A2000)", 1, 2, 33, 180, "A500\0A1000\0A2000\0", 0xa6ce1636, 262144, 5, 0, 0, ROMTYPE_KICK },
{ "KS ROM v1.3 (A500,A1000,A2000)", 1, 3, 34, 5, "A500\0A1000\0A2000\0", 0xc4f0f55f, 262144, 6, 0, 0, ROMTYPE_KICK },
{ "KS ROM v1.3 (A3000)", 1, 3, 34, 5, "A3000\0", 0xe0f37258, 262144, 32, 0, 0, ROMTYPE_KICK },
- { "KS ROM v1.4b (A3000)", 1, 4, 36, 16, "A3000\0", 0xbc0ec13f, 524288, 59, 0, 0, ROMTYPE_KICK },
+ { "KS ROM v1.4 (A3000)", 1, 4, 36, 16, "A3000\0", 0xbc0ec13f, 524288, 59, 3, 0, ROMTYPE_KICK },
{ "KS ROM v2.04 (A500+)", 2, 4, 37, 175, "A500+\0", 0xc3bdb240, 524288, 7, 0, 0, ROMTYPE_KICK },
{ "KS ROM v2.05 (A600)", 2, 5, 37, 299, "A600\0", 0x83028fb5, 524288, 8, 0, 0, ROMTYPE_KICK },
{ "KS ROM v3.1 (A4000)", 3, 1, 40, 70, "A4000\0", 0x2b4566f1, 524288, 13, 2 | 4, 0, ROMTYPE_KICK },
{ "KS ROM v3.1 (A500,A600,A2000)", 3, 1, 40, 63, "A500\0A600\0A2000\0", 0xfc24ae0d, 524288, 14, 0, 0, ROMTYPE_KICK },
{ "KS ROM v3.1 (A1200)", 3, 1, 40, 68, "A1200\0", 0x1483a091, 524288, 15, 1, 0, ROMTYPE_KICK },
+ { "KS ROM v3.1 (A3000)", 3, 1, 40, 68, "A3000\0", 0xefb239cc, 524288, 61, 2, 0, ROMTYPE_KICK },
{ "KS ROM v3.1 (A4000)(Cloanto)", 3, 1, 40, 68, "A4000\0", 0x43b6dd22, 524288, 31, 2 | 4, 1, ROMTYPE_KICK },
{ "KS ROM v3.1 (A4000)", 3, 1, 40, 68, "A4000\0", 0xd6bae334, 524288, 16, 2 | 4, 0, ROMTYPE_KICK },
{ "KS ROM v3.1 (A4000T)", 3, 1, 40, 70, "A4000T\0", 0x75932c3a, 524288, 17, 2 | 4, 0, ROMTYPE_KICK },
{ "CD32 extended ROM", 3, 1, 40, 60, "CD32\0", 0x87746be2, 524288, 19, 1, 0, ROMTYPE_EXTCD32 },
{ "CDTV extended ROM v1.00", 1, 0, 1, 0, "CDTV\0", 0x42baa124, 262144, 20, 0, 0, ROMTYPE_EXTCDTV },
- { "CDTV extended ROM v2.30", 2, 30, 2, 30, "CDTV\0", 0x30b54232, 262144, 21, 0, 0, ROMTYPE_EXTCDTV },
{ "CDTV extended ROM v2.07", 2, 7, 2, 7, "CDTV\0", 0xceae68d2, 262144, 22, 0, 0, ROMTYPE_EXTCDTV },
+ { "CDTV extended ROM v2.30", 2, 30, 2, 30, "CDTV\0", 0x30b54232, 262144, 21, 0, 0, ROMTYPE_EXTCDTV },
{ "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 0x62f11c04, 8192, 23, 0, 0, ROMTYPE_KICK },
{ "A1000 bootstrap ROM", 0, 0, 0, 0, "A1000\0", 0x0b1ad2d0, 65536, 24, 0, 0, ROMTYPE_KICK },
{ "Action Replay Mk III v3.09", 3, 9, 3, 9, "AR\0", 0x0ed9b5aa, 262144, 29, 0, 0, ROMTYPE_AR },
{ "Action Replay Mk III v3.17", 3, 17, 3, 17, "AR\0", 0xc8a16406, 262144, 30, 0, 0, ROMTYPE_AR },
{ "Action Replay 1200", 0, 0, 0, 0, "AR\0", 0x8d760101, 262144, 47, 0, 0, ROMTYPE_AR },
- { "Action Cartridge Super IV Pro", 4, 3, 4, 3, "SUPERIV\0", 0xe668a0be, 170368, 60, 0, 0, ROMTYPE_SUPERIV },
+ { "Action Cartridge Super IV Pro (+ROM)", 4, 3, 4, 3, "SUPERIV\0", 0xe668a0be, 170368, 60, 0, 0, ROMTYPE_SUPERIV },
+ { "Action Cartridge Super IV Pro", 0, 0, 0, 0, "SUPERIV\0", 0xffffffff, 0, 62, 0, 0, ROMTYPE_SUPERIV, "SuperIV" },
+ { "HRTMon (built-in)", 0, 0, 0, 0, "HRTMON\0", 0xffffffff, 0, 63, 0, 0, ROMTYPE_HRTMON, "HRTMon" },
- { "A590/A2091 Boot ROM", 6, 0, 6, 0, "A2091BOOT\0", 0x8396cf4e, 16384, 53, 0, 0, ROMTYPE_A2091BOOT },
- { "A590/A2091 Boot ROM", 6, 6, 6, 6, "A2091BOOT\0", 0x33e00a7a, 16384, 54, 0, 0, ROMTYPE_A2091BOOT },
- { "A590/A2091 Boot ROM", 7, 0, 7, 0, "A2091BOOT\0", 0x714a97a2, 16384, 55, 0, 0, ROMTYPE_A2091BOOT },
- { "A590/A2091 Guru Boot ROM", 6, 14, 6, 14, "A2091BOOT\0", 0x04e52f93, 32768, 56, 0, 0, ROMTYPE_A2091BOOT },
- { "A4091 Boot ROM", 40, 9, 40, 9, "A4091BOOT\0", 0x00000000, 32768, 57, 0, 0, ROMTYPE_A4091BOOT },
- { "A4091 Boot ROM", 40, 13, 40, 13, "A4091BOOT\0", 0x54cb9e85, 32768, 58, 0, 0, ROMTYPE_A4091BOOT },
+ { "A590/A2091 SCSI boot ROM", 0, 0, 6, 0, "A590\0A2091\0", 0x8396cf4e, 16384, 53, 0, 0, ROMTYPE_A2091BOOT },
+ { "A590/A2091 SCSI boot ROM", 0, 0, 6, 6, "A590\0A2091\0", 0x33e00a7a, 16384, 54, 0, 0, ROMTYPE_A2091BOOT },
+ { "A590/A2091 SCSI boot ROM", 0, 0, 7, 0, "A590\0A2091\0", 0x714a97a2, 16384, 55, 0, 0, ROMTYPE_A2091BOOT },
+ { "A590/A2091 SCSI Guru boot ROM", 0, 0, 6, 14, "A590\0A2091\0", 0x04e52f93, 32768, 56, 0, 0, ROMTYPE_A2091BOOT },
+ { "A4091 SCSI boot ROM", 0, 0, 40, 9, "A4091\0", 0x00000000, 32768, 57, 0, 0, ROMTYPE_A4091BOOT },
+ { "A4091 SCSI boot ROM", 0, 0, 40, 13, "A4091\0", 0x54cb9e85, 32768, 58, 0, 0, ROMTYPE_A4091BOOT },
{ "Arcadia OnePlay 2.11", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 49, 0, 0, ROMTYPE_ARCADIABIOS },
{ "Arcadia TenPlay 2.11", 0, 0, 0, 0, "ARCADIA\0", 0, 0, 50, 0, 0, ROMTYPE_ARCADIABIOS },
memcpy (rom, tmp, 4);
i = 0;
while (roms[i].name) {
- if (roms[i].crc32) {
+ if (roms[i].crc32 && roms[i].size >= size) {
if (crc32a == roms[i].crc32 || crc32b == roms[i].crc32)
return &roms[i];
if (crc32c == roms[i].crc32 && roms[i].type == ROMTYPE_AR)
if (!rd)
return;
strcat (name, rd->name);
- if (rd->subrev && rd->subrev != rd->rev)
+ if ((rd->subrev || rd->subver) && rd->subver != rd->ver)
sprintf (name + strlen (name), " rev %d.%d", rd->subver, rd->subrev);
if (rd->size > 0)
sprintf (name + strlen (name), " (%dk)", (rd->size + 1023) / 1024);
}
-struct romlist *getrombyids(int *ids)
+struct romlist *getromlistbyromdata(struct romdata *rd)
+{
+ int ids[2];
+
+ ids[0] = rd->id;
+ ids[1] = 0;
+ return getromlistbyids(ids);
+}
+
+struct romlist *getromlistbyids(int *ids)
{
struct romdata *rd;
int i, j;
return NULL;
}
+void romwarning(int *ids)
+{
+ int i, exp;
+ char tmp1[MAX_DPATH], tmp2[MAX_DPATH];
+ char tmp3[MAX_DPATH];
+
+ exp = 0;
+ tmp2[0] = 0;
+ i = 0;
+ while (ids[i] >= 0) {
+ struct romdata *rd = getromdatabyid (ids[i]);
+ getromname (rd, tmp1);
+ strcat (tmp2, "- ");
+ strcat (tmp2, tmp1);
+ strcat (tmp2, "\n");
+ if (rd->type & (ROMTYPE_A2091BOOT | ROMTYPE_A4091BOOT))
+ exp++;
+ i++;
+ }
+ translate_message (exp ? NUMSG_EXPROMNEED : NUMSG_ROMNEED, tmp3);
+ gui_message (tmp3, tmp2);
+}
+
addrbank *mem_banks[MEMORY_BANKS];
/* This has two functions. It either holds a host address that, when added
extendedkickmem_lget, extendedkickmem_wget, ABFLAG_ROM
};
+#define fkickmem_size 524288
+void a3000_fakekick(int map)
+{
+ static uae_u8 *blop;
+ if (map) {
+ uae_u8 *fkickmemory = a3000lmemory + allocated_a3000lmem - fkickmem_size;
+ if (!blop)
+ blop = xmalloc (fkickmem_size);
+ memcpy (blop, kickmemory, fkickmem_size);
+ memcpy (kickmemory, fkickmemory, fkickmem_size);
+ } else {
+ if (blop)
+ memcpy (kickmemory, blop, fkickmem_size);
+ xfree(blop);
+ blop = NULL;
+ }
+}
+
static int kickstart_checksum (uae_u8 *mem, int size)
{
if (!kickstart_checksum_do (mem, size)) {
} else {
struct romdata *rd = getromdatabydata (kickmemory, kickmem_size);
if (rd) {
- if ((rd->cpu & 3) == 1 && changed_prefs.cpu_model < 68020) {
+ if ((rd->cpu & 3) == 3 && changed_prefs.cpu_model != 68030) {
+ notify_user (NUMSG_KS68030);
+ uae_restart (-1, NULL);
+ } else if ((rd->cpu & 3) == 1 && changed_prefs.cpu_model < 68020) {
notify_user (NUMSG_KS68EC020);
uae_restart (-1, NULL);
} else if ((rd->cpu & 3) == 2 && (changed_prefs.cpu_model < 68020 || changed_prefs.address_space_24)) {
if ((cloanto_rom || currprefs.cs_ksmirror) && !currprefs.maprom && !extendedkickmem_type)
map_banks (&kickmem_bank, 0xE0, 8, 0);
if (currprefs.cs_ksmirror == 2) { /* unexpanded A1200 also maps ROM here.. */
- if (currprefs.cart_internal != 1) {
+ struct romdata *rd = getromdatabypath(currprefs.cartfile);
+ if (!rd || rd->id != 63) {
map_banks (&kickmem_bank, 0xA8, 8, 0);
map_banks (&kickmem_bank, 0xB0, 8, 0);
}
* (c) 2007 Toni Wilen
*/
-#define NCR_LOG 0
+#define NCR_LOG 1
#include "sysconfig.h"
#include "sysdeps.h"
return "?";
}
+#define SCNTL0_REG 0x03
+#define FULL_ARBITRATION 0xc0
+#define PARITY 0x08
+#define ENABLE_PARITY 0x04
+#define AUTO_ATN 0x02
+#define SCNTL1_REG 0x02
+#define SLOW_BUS 0x80
+#define ENABLE_SELECT 0x20
+#define ASSERT_RST 0x08
+#define ASSERT_EVEN_PARITY 0x04
+#define SDID_REG 0x01
+#define SIEN_REG 0x00
+#define PHASE_MM_INT 0x80
+#define FUNC_COMP_INT 0x40
+#define SEL_TIMEOUT_INT 0x20
+#define SELECT_INT 0x10
+#define GROSS_ERR_INT 0x08
+#define UX_DISC_INT 0x04
+#define RST_INT 0x02
+#define PAR_ERR_INT 0x01
+#define SCID_REG 0x07
+#define SXFER_REG 0x06
+#define ASYNC_OPERATION 0x00
+#define SODL_REG 0x05
+#define SOCL_REG 0x04
+#define SFBR_REG 0x0b
+#define SIDL_REG 0x0a
+#define SBDL_REG 0x0a
+#define SBCL_REG 0x08
+#define SBCL_IO 0x01
+#define SYNC_DIV_AS_ASYNC 0x00
+#define SYNC_DIV_1_0 0x01
+#define SYNC_DIV_1_5 0x02
+#define SYNC_DIV_2_0 0x03
+#define DSTAT_REG 0x0e
+#define ILGL_INST_DETECTED 0x01
+#define WATCH_DOG_INTERRUPT 0x02
+#define SCRIPT_INT_RECEIVED 0x04
+#define ABORTED 0x10
+#define SSTAT0_REG 0x0e
+#define PARITY_ERROR 0x01
+#define SCSI_RESET_DETECTED 0x02
+#define UNEXPECTED_DISCONNECT 0x04
+#define SCSI_GROSS_ERROR 0x08
+#define SELECTED 0x10
+#define SELECTION_TIMEOUT 0x20
+#define FUNCTION_COMPLETE 0x40
+#define PHASE_MISMATCH 0x80
+#define SSTAT1_REG 0x0d
+#define SIDL_REG_FULL 0x80
+#define SODR_REG_FULL 0x40
+#define SODL_REG_FULL 0x20
+#define SSTAT2_REG 0x0c
+#define CTEST0_REG 0x17
+#define BTB_TIMER_DISABLE 0x40
+#define CTEST1_REG 0x16
+#define CTEST2_REG 0x15
+#define CTEST3_REG 0x14
+#define CTEST4_REG 0x1b
+#define DISABLE_FIFO 0x00
+#define SLBE 0x10
+#define SFWR 0x08
+#define BYTE_LANE0 0x04
+#define BYTE_LANE1 0x05
+#define BYTE_LANE2 0x06
+#define BYTE_LANE3 0x07
+#define SCSI_ZMODE 0x20
+#define ZMODE 0x40
+#define CTEST5_REG 0x1a
+#define MASTER_CONTROL 0x10
+#define DMA_DIRECTION 0x08
+#define CTEST7_REG 0x18
+#define BURST_DISABLE 0x80 /* 710 only */
+#define SEL_TIMEOUT_DISABLE 0x10 /* 710 only */
+#define DFP 0x08
+#define EVP 0x04
+#define DIFF 0x01
+#define CTEST6_REG 0x19
+#define TEMP_REG 0x1C
+#define DFIFO_REG 0x20
+#define FLUSH_DMA_FIFO 0x80
+#define CLR_FIFO 0x40
+#define ISTAT_REG 0x22
+#define ABORT_OPERATION 0x80
+#define SOFTWARE_RESET_710 0x40
+#define DMA_INT_PENDING 0x01
+#define SCSI_INT_PENDING 0x02
+#define CONNECTED 0x08
+#define CTEST8_REG 0x21
+#define LAST_DIS_ENBL 0x01
+#define SHORTEN_FILTERING 0x04
+#define ENABLE_ACTIVE_NEGATION 0x10
+#define GENERATE_RECEIVE_PARITY 0x20
+#define CLR_FIFO_710 0x04
+#define FLUSH_DMA_FIFO_710 0x08
+#define LCRC_REG 0x20
+#define DBC_REG 0x25
+#define DCMD_REG 0x24
+#define DNAD_REG 0x28
+#define DIEN_REG 0x3a
+#define BUS_FAULT 0x20
+#define ABORT_INT 0x10
+#define INT_INST_INT 0x04
+#define WD_INT 0x02
+#define ILGL_INST_INT 0x01
+#define DCNTL_REG 0x38
+#define SOFTWARE_RESET 0x01
+#define COMPAT_700_MODE 0x01
+#define SCRPTS_16BITS 0x20
+#define ASYNC_DIV_2_0 0x00
+#define ASYNC_DIV_1_5 0x40
+#define ASYNC_DIV_1_0 0x80
+#define ASYNC_DIV_3_0 0xc0
+#define DMODE_710_REG 0x3b
+#define DMODE_700_REG 0x34
+#define BURST_LENGTH_1 0x00
+#define BURST_LENGTH_2 0x40
+#define BURST_LENGTH_4 0x80
+#define BURST_LENGTH_8 0xC0
+#define DMODE_FC1 0x10
+#define DMODE_FC2 0x20
+#define BW16 32
+#define MODE_286 16
+#define IO_XFER 8
+#define FIXED_ADDR 4
+
+static void INT2(void)
+{
+ if (ncrregs[SIEN_REG] == 0)
+ return;
+ INTREQ_f(0x8000 | 0x0008);
+ write_log("IRQ\n");
+}
+
+
static uae_u8 read_rom(uaecptr addr)
{
int off;
return;
switch (addr)
{
- case 0x08:
- ncrregs[0x22] |= 2;
+ case SBCL_REG:
break;
- case 0x02: // SCNTL1
+ case SCNTL1_REG:
break;
- case 0x22 : // ISTAT
+ case ISTAT_REG:
+ ncrregs[ISTAT_REG] = 0;
break;
+ case SCID_REG:
+ ncrregs[ISTAT_REG] |= 2;
+ //ncrregs[SSTAT1_REG] |= 1 << 4;
+ //INT2();
+ break;
+
+
}
write_log("%s write %04.4X (%s) = %02.2X PC=%08.8X\n", NCRNAME, addr, regname(addr), val & 0xff, M68K_GETPC);
ncrregs[addr] = val;
v = ncrregs[addr];
switch (addr)
{
- case 0x0c: // SSTAT2
+ case SSTAT2_REG:
v &= ~7;
- v |= ncrregs[8] & 7;
+ v |= ncrregs[SBCL_REG] & 7;
break;
- case 0x0e: // SSTAT0
+ case SSTAT0_REG:
v |= 0x20;
break;
- case 0x22: // ISTAT
- ncrregs[addr] &= 0x40;
+ case ISTAT_REG:
+ if (v)
+ v |= 2;
+ INT2();
break;
- case 0x21: // CTEST8
- v &= 0x0f;
- v |= 0x20;
+ case CTEST8_REG:
+ v &= 0x0f; // revision 0
break;
}
roms[1] = 56;
roms[2] = -1;
- rl = getrombyids(roms);
+ rl = getromlistbyids(roms);
if (rl) {
write_log("A4091 BOOT ROM '%s' %d.%d ", rl->path, rl->rd->ver, rl->rd->rev);
z = zfile_fopen(rl->path, "rb");
} else {
write_log("failed to load\n");
}
+ } else {
+ romwarning(roms);
}
map_banks (&ncr_bank, 0xe80000 >> 16, 0x10000 >> 16, 0x10000);
}
* (c) 1995 Bernd Schmidt
*/
-//#define MOVEC_DEBUG
-//#define MMUOP_DEBUG
+#define MOVEC_DEBUG 0
+#define MMUOP_DEBUG 1
#include "sysconfig.h"
#include "sysdeps.h"
#define MC68060_PCR 0x04300000
#define MC68EC060_PCR 0x04310000
+static uae_u64 srp_030, crp_030;
+static uae_u32 tt0_030, tt1_030, tc_030;
+static uae_u16 mmusr_030;
+
#if COUNT_INSTRS
static unsigned long int instrcount[65536];
static uae_u16 opcodenums[65536];
int m68k_move2c (int regno, uae_u32 *regp)
{
-#ifdef MOVEC_DEBUG
+#if MOVEC_DEBUG > 0
write_log("move2c %04.4X <- %08.8X PC=%x\n", regno, *regp, M68K_GETPC);
#endif
if (movec_illg (regno)) {
int m68k_movec2 (int regno, uae_u32 *regp)
{
-#ifdef MOVEC_DEBUG
+#if MOVEC_DEBUG > 0
write_log("movec2 %04.4X PC=%x\n", regno, M68K_GETPC);
#endif
if (movec_illg (regno)) {
return 0;
}
}
-#ifdef MOVEC_DEBUG
+#if MOVEC_DEBUG > 0
write_log("-> %08.8X\n", *regp);
#endif
return 1;
#endif
-void m68k_reset (void)
+void m68k_reset (int hardreset)
{
regs.kick_mask = 0x00F80000;
regs.spcflags = 0;
regs.caar = regs.cacr = 0;
regs.itt0 = regs.itt1 = regs.dtt0 = regs.dtt1 = 0;
regs.tcr = regs.mmusr = regs.urp = regs.srp = regs.buscr = 0;
+
+ a3000_fakekick(0);
+ /* only (E)nable bit is zeroed when CPU is reset, A3000 SuperKickstart expects this */
+ tc_030 &= ~0x80000000;
+ if (hardreset) {
+ srp_030 = crp_030 = 0;
+ tt0_030 = tt1_030 = tc_030 = 0;
+ }
+ mmusr_030 = 0;
+
/* 68060 FPU is not compatible with 68040,
* 68060 accelerators' boot ROM disables the FPU
*/
}
#ifdef CPUEMU_0
-void mmu_op30(uaecptr pc, uae_u32 opcode, struct regstruct *regs, int isextra, uae_u16 extra)
+
+static char *mmu30regs[] = { "TCR", "", "SRP", "CRP", "", "", "", "" };
+
+static void mmu_op30_pmove(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra)
+{
+ int preg = (next >> 10) & 31;
+ int rw = (next >> 9) & 1;
+ int fd = (next >> 8) & 1;
+ char *reg = NULL;
+ uae_u32 otc = tc_030;
+ int siz;
+
+ switch (preg)
+ {
+ case 0x10: // TC
+ reg = "TC";
+ siz = 4;
+ if (rw)
+ put_long(extra, tc_030);
+ else
+ tc_030 = get_long(extra);
+ break;
+ case 0x12: // SRP
+ reg = "SRP";
+ siz = 8;
+ if (rw) {
+ put_long(extra, srp_030 >> 32);
+ put_long(extra + 4, srp_030);
+ } else {
+ srp_030 = (uae_u64)get_long(extra) << 32;
+ srp_030 |= get_long(extra + 4);
+ }
+ break;
+ case 0x13: // CRP
+ reg = "CRP";
+ siz = 8;
+ if (rw) {
+ put_long(extra, crp_030 >> 32);
+ put_long(extra + 4, crp_030);
+ } else {
+ crp_030 = (uae_u64)get_long(extra) << 32;
+ crp_030 |= get_long(extra + 4);
+ }
+ break;
+ case 0x18: // MMUSR
+ reg = "MMUSR";
+ siz = 2;
+ if (rw)
+ put_word(extra, mmusr_030);
+ else
+ mmusr_030 = get_word(extra);
+ break;
+ case 0x02: // TT0
+ reg = "TT0";
+ siz = 4;
+ if (rw)
+ put_long(extra, tt0_030);
+ else
+ tt0_030 = get_long(extra);
+ break;
+ case 0x03: // TT1
+ reg = "TT1";
+ siz = 4;
+ if (rw)
+ put_long(extra, tt1_030);
+ else
+ tt1_030 = get_long(extra);
+ break;
+ }
+
+ if (!reg) {
+ op_illg(opcode, ®s);
+ return;
+ }
+#if MMUOP_DEBUG > 0
+ {
+ uae_u32 val;
+ if (siz == 8) {
+ uae_u32 val2 = get_long(extra);
+ val = get_long(extra + 4);
+ if (rw)
+ write_log("PMOVE %s,%08X%08X", reg, val2, val);
+ else
+ write_log("PMOVE %08X%08X,%s", val2, val, reg);
+ } else {
+ if (siz == 4)
+ val = get_long(extra);
+ else
+ val = get_word(extra);
+ if (rw)
+ write_log("PMOVE %s,%08X", reg, val);
+ else
+ write_log("PMOVE %08X,%s", val, reg);
+ }
+ write_log (" PC=%08X\n", pc);
+ }
+#endif
+ if (currprefs.cs_mbdmac == 1 && currprefs.mbresmem_low_size > 0) {
+ if (otc != tc_030) {
+ a3000_fakekick(tc_030 & 0x80000000);
+ }
+ }
+}
+
+static void mmu_op30_ptest(uaecptr pc, uae_u32 opcode, uae_u16 next, uaecptr extra)
+{
+#if MMUOP_DEBUG > 0
+ char tmp[10];
+
+ tmp[0] = 0;
+ if ((next >> 8) & 1)
+ sprintf(tmp,",A%d", (next >> 4) & 15);
+ write_log("PTEST%c %02X,%08X,#%X%s PC=%08X\n",
+ ((next >> 9) & 1) ? 'W' : 'R', (next & 15), extra, (next >> 10) & 7, tmp, pc);
+#endif
+ mmusr_030 = 0;
+}
+
+void mmu_op30(uaecptr pc, uae_u32 opcode, struct regstruct *regs, int isnext, uaecptr extra)
{
if (currprefs.cpu_model != 68030) {
-#ifdef MMUOP_DEBUG
- write_log("Unknown 68030 MMU OP %04.4X PC=%X\n", opcode, m68k_getpc(regs));
+#if MMUOP_DEBUG > 0
+ write_log("Unknown 68030 MMU OP %04X PC=%08X\n", opcode, m68k_getpc(regs));
#endif
m68k_setpc (regs, pc);
op_illg (opcode, regs);
return;
}
- if (isextra)
+ if (isnext) {
+ uae_u16 next = get_word(pc + 2);
+ if (next & 0x8000)
+ mmu_op30_ptest(pc, opcode, next, extra);
+ else
+ mmu_op30_pmove(pc, opcode, next, extra);
m68k_setpc (regs, m68k_getpc (regs) + 2);
-#ifdef MMUOP_DEBUG
- write_log("MMU030: %04.4x PC=%x\n", opcode, m68k_getpc(regs));
+ } else {
+#if MMUOP_DEBUG > 0
+ write_log("MMU030: %04x PC=%08x\n", opcode, m68k_getpc(regs));
#endif
+ }
return;
}
-void mmu_op(uae_u32 opcode, struct regstruct *regs, uae_u16 extra)
+void mmu_op(uae_u32 opcode, struct regstruct *regs, uae_u32 extra)
{
-#ifdef MMUOP_DEBUG
- write_log("mmu_op %04.4x\n", opcode);
+#if MMUOP_DEBUG > 0
+ write_log("mmu_op %04X PC=%08X\n", opcode, m68k_getpc(regs));
#endif
if ((opcode & 0xFE0) == 0x0500) {
/* PFLUSH */
regs->mmusr = 0;
-#ifdef MMUOP_DEBUG
- write_log ("PFLUSH @$%lx\n", m68k_getpc(regs));
+#if MMUOP_DEBUG > 0
+ write_log ("PFLUSH\n");
#endif
return;
} else if ((opcode & 0x0FD8) == 0x548) {
if (currprefs.cpu_model < 68060) { /* PTEST not in 68060 */
/* PTEST */
-#ifdef MMUOP_DEBUG
- write_log ("PTEST @$%lx\n", m68k_getpc(regs));
+#if MMUOP > 0
+ write_log ("PTEST\n");
#endif
return;
}
} else if ((opcode & 0x0FB8) == 0x588) {
/* PLPA */
if (currprefs.cpu_model == 68060) {
-#ifdef MMUOP_DEBUG
+#if MMUOP_DEBUG > 0
write_log("PLPA\n");
#endif
return;
} else if (opcode == 0xff00 && extra == 0x01c0) {
/* LPSTOP */
if (currprefs.cpu_model == 68060) {
-#ifdef MMUOP_DEBUG
+#if MMUOP_DEBUG > 0
write_log("LPSTOP\n");
#endif
return;
}
}
-#ifdef MMUOP_DEBUG
+#if MMUOP_DEBUG > 0
write_log("Unknown MMU OP\n");
#endif
m68k_setpc (regs, m68k_getpc (regs) - 2);
customreset ();
if (hardreset)
rtc_hardreset();
- m68k_reset ();
+ m68k_reset (hardreset);
if (hardreset) {
memory_hardreset();
write_log ("hardreset, memory cleared\n");
currprefs.m68k_speed = changed_prefs.m68k_speed = -1;
}
if (model >= 68030) {
- restore_u32();
- restore_u32();
- restore_u16();
- restore_u32();
- restore_u32();
+ crp_030 = restore_u64();
+ srp_030 = restore_u64();
+ tt0_030 =restore_u32();
+ tt1_030 = restore_u32();
+ tc_030 = restore_u32();
+ mmusr_030 = restore_u16();
}
if (model >= 68040) {
regs.itt0 = restore_u32();
save_u32 (regs.msp); /* MSP */
}
if(model >= 68030) {
- save_u32 (0); /* AC0 */
- save_u32 (0); /* AC1 */
- save_u16 (0); /* ACUSR */
- save_u32 (0); /* TT0 */
- save_u32 (0); /* TT1 */
+ save_u64 (crp_030); /* CRP */
+ save_u64 (srp_030); /* SRP */
+ save_u32 (tt0_030); /* TT0/AC0 */
+ save_u32 (tt1_030); /* TT1/AC1 */
+ save_u32 (tc_030); /* TCR */
+ save_u16 (mmusr_030); /* MMUSR/ACUSR */
}
if(model >= 68040) {
save_u32 (regs.itt0); /* ITT0 */
scsi_handle = 0;
}
-static int execscsicmd_direct (int unitnum, uaecptr acmd)
+static int execscsicmd_direct (int unitnum, struct amigascsi *as)
{
int sactual = 0, i, parm;
SCSI *scgp = si[unitnum].handle;
struct scg_cmd *scmd = scgp->scmd;
- uaecptr scsi_data = get_long (acmd + 0);
- uae_u32 scsi_len = get_long (acmd + 4);
- uaecptr scsi_cmd = get_long (acmd + 12);
- int scsi_cmd_len = get_word (acmd + 16);
- int scsi_cmd_len_org = scsi_cmd_len;
- uae_u8 scsi_flags = get_byte (acmd + 20);
- uaecptr scsi_sense = get_long (acmd + 22);
- uae_u16 scsi_sense_len = get_word (acmd + 26);
+ int scsi_cmd_len_org = as->cmd_len;
int io_error = 0;
- addrbank *bank_data = &get_mem_bank (scsi_data);
uae_u8 *scsi_datap, *scsi_datap_org;
- /* do transfer directly to and from Amiga memory */
- if (!bank_data || !bank_data->check (scsi_data, scsi_len))
- return -5; /* IOERR_BADADDRESS */
-
uae_sem_wait (&scgp_sem);
/* the Amiga does not tell us how long the timeout shall be, so make it _very_ long (specified in seconds) */
scmd->timeout = 80 * 60;
- scsi_datap = scsi_datap_org = scsi_len ? bank_data->xlateaddr (scsi_data) : 0;
- scmd->flags = ((scsi_flags & 1) ? SCG_RECV_DATA : 0) | SCG_DISRE_ENA;
- for (i = 0; i < scsi_cmd_len; i++)
- scmd->cdb.cmd_cdb[i] = get_byte (scsi_cmd + i);
+ scsi_datap = scsi_datap_org = as->len ? as->data : 0;
+ scmd->flags = ((as->flags & 1) ? SCG_RECV_DATA : 0) | SCG_DISRE_ENA;
+ for (i = 0; i < as->cmd_len; i++)
+ scmd->cdb.cmd_cdb[i] = as->cmd[i];
scmd->target = si[unitnum].target;
- scmd->sense_len = (scsi_flags & 4) ? 4 : /* SCSIF_OLDAUTOSENSE */
- (scsi_flags & 2) ? scsi_sense_len : /* SCSIF_AUTOSENSE */
+ scmd->sense_len = (as->flags & 4) ? 4 : /* SCSIF_OLDAUTOSENSE */
+ (as->flags & 2) ? as->sense_len : /* SCSIF_AUTOSENSE */
-1;
scmd->sense_count = 0;
scmd->u_scb.cmd_scb[0] = 0;
scgp->addr.target = si[unitnum].target;
scgp->addr.lun = si[unitnum].lun;
if (si[unitnum].isatapi)
- scsi_atapi_fixup_pre (scmd->cdb.cmd_cdb, &scsi_cmd_len, &scsi_datap, &scsi_len, &parm);
+ scsi_atapi_fixup_pre (scmd->cdb.cmd_cdb, &as->cmd_len, &scsi_datap, &as->len, &parm);
scmd->addr = scsi_datap;
- scmd->size = scsi_len;
- scmd->cdb_len = scsi_cmd_len;
+ scmd->size = as->len;
+ scmd->cdb_len = as->cmd_len;
aspi_led (unitnum);
scsicmd (scgp);
aspi_led (unitnum);
- put_word (acmd + 18, scmd->error == SCG_FATAL ? 0 : scsi_cmd_len_org); /* fake scsi_CmdActual */
- put_byte (acmd + 21, scmd->u_scb.cmd_scb[0]); /* scsi_Status */
+ as->cmdactual = scmd->error == SCG_FATAL ? 0 : scsi_cmd_len_org; /* fake scsi_CmdActual */
+ as->status = scmd->u_scb.cmd_scb[0]; /* scsi_Status */
if (scmd->u_scb.cmd_scb[0]) {
io_error = 45; /* HFERR_BadStatus */
/* copy sense? */
- for (sactual = 0; scsi_sense && sactual < scsi_sense_len && sactual < scmd->sense_count; sactual++)
- put_byte (scsi_sense + sactual, scmd->u_sense.cmd_sense[sactual]);
- put_long (acmd + 8, 0); /* scsi_Actual */
+ for (sactual = 0; sactual < as->sense_len && sactual < scmd->sense_count; sactual++)
+ as->sensedata[sactual] = scmd->u_sense.cmd_sense[sactual];
+ as->actual = 0; /* scsi_Actual */
} else {
int i;
- for (i = 0; i < scsi_sense_len; i++)
- put_byte (scsi_sense + i, 0);
+ for (i = 0; i < as->sense_len; i++)
+ as->sensedata[i] = 0;
sactual = 0;
if (scmd->error != SCG_NO_ERROR) {
io_error = 20; /* io_Error, but not specified */
- put_long (acmd + 8, 0); /* scsi_Actual */
+ as->actual = 0; /* scsi_Actual */
} else {
io_error = 0;
if (si[unitnum].isatapi)
- scsi_atapi_fixup_post (scmd->cdb.cmd_cdb, scsi_cmd_len, scsi_datap_org, scsi_datap, &scsi_len, parm);
- put_long (acmd + 8, scsi_len - scmd->resid); /* scsi_Actual */
+ scsi_atapi_fixup_post (scmd->cdb.cmd_cdb, as->cmd_len, scsi_datap_org, scsi_datap, &as->len, parm);
+ as->actual = as->len - scmd->resid; /* scsi_Actual */
}
}
- put_word (acmd + 28, sactual);
+ as->sactual = sactual;
uae_sem_post (&scgp_sem);
return dolen;
}
-static int execscsicmd_direct (int unitnum, uaecptr acmd)
+static int execscsicmd_direct (int unitnum, struct amigascsi *as)
{
SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER swb;
DWORD status;
int sactual = 0, i;
- uaecptr scsi_data = get_long (acmd + 0);
- uae_u32 scsi_len = get_long (acmd + 4);
- uaecptr scsi_cmd = get_long (acmd + 12);
- int scsi_cmd_len = get_word (acmd + 16);
- int scsi_cmd_len_orig = scsi_cmd_len;
- uae_u8 scsi_flags = get_byte (acmd + 20);
- uaecptr scsi_sense = get_long (acmd + 22);
- uae_u16 scsi_sense_len = get_word (acmd + 26);
int io_error = 0, err, parm;
- addrbank *bank_data = &get_mem_bank (scsi_data);
uae_u8 *scsi_datap, *scsi_datap_org;
+ uae_u32 scsi_cmd_len_orig = as->cmd_len;
memset (&swb, 0, sizeof (swb));
swb.spt.Length = sizeof (SCSI_PASS_THROUGH);
swb.spt.SenseInfoOffset = offsetof(SCSI_PASS_THROUGH_DIRECT_WITH_BUFFER, SenseBuf);
- /* do transfer directly to and from Amiga memory */
- if (!bank_data || !bank_data->check (scsi_data, scsi_len))
- return -5; /* IOERR_BADADDRESS */
-
uae_sem_wait (&scgp_sem);
/* the Amiga does not tell us how long the timeout shall be, so make it _very_ long (specified in seconds) */
swb.spt.TimeOutValue = 80 * 60;
- scsi_datap = scsi_datap_org = scsi_len ? bank_data->xlateaddr (scsi_data) : 0;
- swb.spt.DataIn = (scsi_flags & 1) ? SCSI_IOCTL_DATA_IN : SCSI_IOCTL_DATA_OUT;
- for (i = 0; i < scsi_cmd_len; i++)
- swb.spt.Cdb[i] = get_byte (scsi_cmd + i);
- if (scsi_sense_len > 32)
- scsi_sense_len = 32;
- swb.spt.SenseInfoLength = (scsi_flags & 4) ? 4 : /* SCSIF_OLDAUTOSENSE */
- (scsi_flags & 2) ? scsi_sense_len : /* SCSIF_AUTOSENSE */
+ scsi_datap = scsi_datap_org = as->len ? as->data : 0;
+ swb.spt.DataIn = (as->flags & 1) ? SCSI_IOCTL_DATA_IN : SCSI_IOCTL_DATA_OUT;
+ for (i = 0; i < as->cmd_len; i++)
+ swb.spt.Cdb[i] = as->cmd[i];
+ if (as->sense_len > 32)
+ as->sense_len = 32;
+ swb.spt.SenseInfoLength = (as->flags & 4) ? 4 : /* SCSIF_OLDAUTOSENSE */
+ (as->flags & 2) ? as->sense_len : /* SCSIF_AUTOSENSE */
32;
if (dev_info[unitnum].isatapi)
- scsi_atapi_fixup_pre (swb.spt.Cdb, &scsi_cmd_len, &scsi_datap, &scsi_len, &parm);
- swb.spt.CdbLength = (UCHAR)scsi_cmd_len;
- swb.spt.DataTransferLength = scsi_len;
+ scsi_atapi_fixup_pre (swb.spt.Cdb, &as->cmd_len, &scsi_datap, &as->len, &parm);
+ swb.spt.CdbLength = (UCHAR)as->cmd_len;
+ swb.spt.DataTransferLength = as->len;
swb.spt.DataBuffer = scsi_datap;
status = doscsi (unitnum, &swb, &err);
- put_word (acmd + 18, status == 0 ? 0 : scsi_cmd_len_orig); /* fake scsi_CmdActual */
- put_byte (acmd + 21, swb.spt.ScsiStatus); /* scsi_Status */
+ as->cmdactual = status == 0 ? 0 : scsi_cmd_len_orig; /* fake scsi_CmdActual */
+ as->status = swb.spt.ScsiStatus; /* scsi_Status */
if (swb.spt.ScsiStatus) {
io_error = 45; /* HFERR_BadStatus */
/* copy sense? */
- for (sactual = 0; scsi_sense && sactual < scsi_sense_len && sactual < swb.spt.SenseInfoLength; sactual++)
- put_byte (scsi_sense + sactual, swb.SenseBuf[sactual]);
- put_long (acmd + 8, 0); /* scsi_Actual */
+ for (sactual = 0; sactual < as->sense_len && sactual < swb.spt.SenseInfoLength; sactual++)
+ as->sensedata[sactual] = swb.SenseBuf[sactual];
+ as->actual = 0; /* scsi_Actual */
} else {
int i;
- for (i = 0; i < scsi_sense_len; i++)
- put_byte (scsi_sense + i, 0);
+ for (i = 0; i < as->sense_len; i++)
+ as->sensedata[i] = 0;
sactual = 0;
if (status == 0) {
io_error = 20; /* io_Error, but not specified */
- put_long (acmd + 8, 0); /* scsi_Actual */
+ as->actual = 0; /* scsi_Actual */
} else {
- scsi_len = swb.spt.DataTransferLength;
+ as->len = swb.spt.DataTransferLength;
if (dev_info[unitnum].isatapi)
- scsi_atapi_fixup_post (swb.spt.Cdb, scsi_cmd_len, scsi_datap_org, scsi_datap, &scsi_len, parm);
+ scsi_atapi_fixup_post (swb.spt.Cdb, as->cmd_len, scsi_datap_org, scsi_datap, &as->len, parm);
io_error = 0;
- put_long (acmd + 8, scsi_len); /* scsi_Actual */
+ as->actual = as->len; /* scsi_Actual */
}
}
- put_word (acmd + 28, sactual);
+ as->sactual = sactual;
uae_sem_post (&scgp_sem);
if (scsi_datap != scsi_datap_org)
if (sb->eintr) {
// Destroy socket to cancel abort, replace it with fake socket to enable proper closing.
// This is in accordance with BSD behaviour.
- shutdown(s,1);
+ shutdown(s,1);
closesocket(s);
sb->dtable[sd-1] = socket(AF_INET,SOCK_STREAM,IPPROTO_TCP);
}
currhist = NULL;
if (histcount > 0 && !strcmp(command, lasthist->command))
return;
- else if (histcount == MAXINPUTHIST) {
+ else if (histcount == MAXINPUTHIST)
DeleteFromHistory(1);
- }
tmp = lasthist;
lasthist = malloc(sizeof(struct histnode));
if (histcount == 0)
if (tmp)
tmp->next = lasthist;
histcount++;
- currhist = NULL;
}
int GetInput (char *out, int maxlen)
static void DoSomeWeirdPrintingStuff (char val)
{
- static char prev[4];
- static uae_u8 one = 1;
- static uae_u8 three = 3;
+ static char prev[5];
memmove (prev, prev + 1, 3);
prev[3] = val;
+ prev[4] = 0;
if (currprefs.parallel_postscript_detection) {
if (psmode && val == 4) {
flushprtbuf ();
}
if (!gsdll) {
HKEY key;
- if (RegOpenKeyEx (HKEY_LOCAL_MACHINE, "SOFTWARE\\AFPL Ghostscript", 0, KEY_ALL_ACCESS, &key) == ERROR_SUCCESS) {
+ DWORD ret = RegOpenKeyEx (HKEY_LOCAL_MACHINE, "SOFTWARE\\AFPL Ghostscript", 0, KEY_ALL_ACCESS, &key);
+ if (ret |= ERROR_SUCCESS)
+ ret = RegOpenKeyEx (HKEY_LOCAL_MACHINE, "SOFTWARE\\GPL Ghostscript", 0, KEY_ALL_ACCESS, &key);
+ if (ret == ERROR_SUCCESS) {
int idx = 0, cnt = 20;
char tmp1[MAX_DPATH];
while (cnt-- > 0) {
#define IDC_CS_DMAC2 1769
#define IDC_CS_A4091 1770
#define IDC_CS_CDTVSCSI 1771
+#define IDC_CS_SCSIMODE 1772
#define ID__FLOPPYDRIVES 40004
#define ID_FLOPPYDRIVES_DF0 40005
#define ID_ST_CONFIGURATION 40010
#define _APS_3D_CONTROLS 1
#define _APS_NEXT_RESOURCE_VALUE 253
#define _APS_NEXT_COMMAND_VALUE 40029
-#define _APS_NEXT_CONTROL_VALUE 1771
+#define _APS_NEXT_CONTROL_VALUE 1772
#define _APS_NEXT_SYMED_VALUE 101
#endif
#endif
#define IDS_HDCLONE_OK 328
#define IDS_HDCLONE_FAIL 329
#define IDR_DBGACCEL 330
+#define IDS_NUMSG_KS68030 331
+#define IDS_NUMSG_EXPROMNEED 332
#define IDS_QS_MODELS 1000
#define IDS_QS_MODEL_A500 1001
#define IDS_QS_MODEL_A500P 1002
#define IDS_QS_MODEL_CDTV 1007
#define IDS_QS_MODEL_UAE 1008
#define IDS_QS_MODEL_ARCADIA 1009
+#define IDS_QS_MODEL_A3000 1010
+#define IDS_QS_MODEL_A4000 1011
+#define IDS_QS_MODEL_A4000T 1012
#define IDC_RESOLUTION 1021
#define IDC_SERIAL 1022
#define IDC_REFRESHRATE 1022
#define IDC_CS_DMAC2 1769
#define IDC_CS_A4091 1770
#define IDC_CS_CDTVSCSI 1771
+#define IDC_CS_SCSIMODE 1772
#define ID__FLOPPYDRIVES 40004
#define ID_FLOPPYDRIVES_DF0 40005
#define ID_ST_CONFIGURATION 40010
#define _APS_3D_CONTROLS 1
#define _APS_NEXT_RESOURCE_VALUE 253
#define _APS_NEXT_COMMAND_VALUE 40029
-#define _APS_NEXT_CONTROL_VALUE 1772
+#define _APS_NEXT_CONTROL_VALUE 1773
#define _APS_NEXT_SYMED_VALUE 101
#endif
#endif
RTEXT "Flash RAM file:",IDC_FLASHTEXT,8,112,75,10\r
EDITTEXT IDC_FLASHFILE,89,110,185,13,ES_AUTOHSCROLL\r
PUSHBUTTON "...",IDC_FLASHCHOOSER,280,110,10,15\r
- GROUPBOX "HRTMon Settings",-1,5,136,290,31\r
+ GROUPBOX "HRTMon Settings",-1,5,136,290,31,NOT WS_VISIBLE\r
CONTROL "Enable HRTMon [] HRTMon is monitor/debugger similar to Action Replay series, default activation key is Page Up.",IDC_HRTMON,\r
- "Button",BS_AUTOCHECKBOX | WS_TABSTOP,89,148,84,10\r
+ "Button",BS_AUTOCHECKBOX | NOT WS_VISIBLE | WS_TABSTOP,89,148,84,10\r
END\r
\r
IDD_DISPLAY DIALOGEX 0, 0, 300, 235\r
CONTROL "Power Supply 50Hz",IDC_CS_CIAA_TOD2,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,95,81,85,10\r
CONTROL "Power Supply 60Hz",IDC_CS_CIAA_TOD3,"Button",BS_AUTORADIOBUTTON | WS_TABSTOP,192,81,88,10\r
CONTROL "Boot ROM Mirror",IDC_CS_KSMIRROR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,108,80,10\r
- CONTROL "A1000 Boot RAM/ROM",IDC_CS_A1000RAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,108,88,10\r
+ CONTROL "A1000 Boot RAM/ROM",IDC_CS_A1000RAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,108,88,10\r
CONTROL "CD32 CD",IDC_CS_CD32CD,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,121,76,10\r
- CONTROL "CD32 C2P",IDC_CS_CD32C2P,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,121,87,10\r
- CONTROL "CD32 NVRAM",IDC_CS_CD32NVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,193,121,84,10\r
+ CONTROL "CD32 C2P",IDC_CS_CD32C2P,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,121,87,10\r
+ CONTROL "CD32 NVRAM",IDC_CS_CD32NVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,121,84,10\r
CONTROL "CDTV CD",IDC_CS_CDTVCD,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,134,47,10\r
- CONTROL "CDTV SRAM",IDC_CS_CDTVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,133,87,10\r
- CONTROL "CDTV SRAM Expansion",IDC_CS_CDTVRAMEXP,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,193,133,90,10\r
+ CONTROL "CDTV SRAM",IDC_CS_CDTVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,133,87,10\r
+ CONTROL "CDTV SRAM Expansion",IDC_CS_CDTVRAMEXP,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,133,90,10\r
CONTROL "A600/A1200 IDE",IDC_CS_IDE1,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,146,79,10\r
- CONTROL "A4000/A4000T IDE",IDC_CS_IDE2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,146,88,10\r
+ CONTROL "A4000/A4000T IDE",IDC_CS_IDE2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,146,88,10\r
CONTROL "Ramsey revision:",IDC_CS_RAMSEY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,211,71,10\r
EDITTEXT IDC_CS_RAMSEYREV,94,209,45,13,ES_AUTOHSCROLL\r
CONTROL "Fat Gary revision:",IDC_CS_FATGARY,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,224,71,10\r
EDITTEXT IDC_CS_FATGARYREV,94,223,45,13,ES_AUTOHSCROLL\r
- CONTROL "A3000 SCSI",IDC_CS_DMAC,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,175,76,10\r
+ CONTROL "A3000 SCSI",IDC_CS_DMAC,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,175,76,10\r
CONTROL "Compatible Settings",IDC_CS_COMPATIBLE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,21,234,10\r
- CONTROL "DF0: ID Hardware",IDC_CS_DF0IDHW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,193,108,92,10\r
+ CONTROL "DF0: ID Hardware",IDC_CS_DF0IDHW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,108,92,10\r
CONTROL "Agnus/Alice revision:",IDC_CS_AGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,150,211,81,10\r
EDITTEXT IDC_CS_AGNUSREV,235,209,45,13,ES_AUTOHSCROLL\r
CONTROL "Denise/Lisa revision:",IDC_CS_DENISE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,150,227,81,10\r
EDITTEXT IDC_CS_DENISEREV,235,226,45,13,ES_AUTOHSCROLL\r
CONTROL "A590/A2091 SCSI",IDC_CS_A2091,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,175,76,10\r
- CONTROL "A4000T SCSI",IDC_CS_DMAC2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,193,175,88,10\r
+ CONTROL "A4000T SCSI",IDC_CS_DMAC2,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,175,88,10\r
LTEXT "A4000/A4000T SCSI not yet implemented.",IDC_STATIC,25,161,224,8,SS_CENTERIMAGE\r
- CONTROL "PCMCIA",IDC_CS_PCMCIA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,193,146,92,10\r
+ CONTROL "PCMCIA",IDC_CS_PCMCIA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,146,92,10\r
CONTROL "A4091 SCSI",IDC_CS_A4091,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,17,187,76,10\r
- CONTROL "CDTV SCSI",IDC_CS_CDTVSCSI,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,100,187,76,10\r
+ CONTROL "CDTV SCSI",IDC_CS_CDTVSCSI,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,97,187,76,10\r
+ CONTROL "Include host SCSI devices",IDC_CS_SCSIMODE,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,190,187,101,10\r
END\r
\r
IDD_AVIOUTPUT DIALOGEX 0, 0, 288, 203\r
IDS_NUMSG_NOROM "Could not load system ROM, trying system ROM replacement."\r
IDS_HDCLONE_OK "Hard drive image file created succesfully."\r
IDS_HDCLONE_FAIL "Hard drive image file creation failed.\nError code %d:%d."\r
+ IDS_NUMSG_KS68030 "The selected system ROM requires a 68030 CPU."\r
+ IDS_NUMSG_EXPROMNEED "One of the following expansion boot ROMs is required:\n\n%s\n\nCheck the System ROM path in the Paths panel and click Rescan ROMs."\r
END\r
\r
STRINGTABLE \r
BEGIN\r
- IDS_QS_MODELS "A500\nA500+\nA600\nA1000\nA1200\nCD32\nCDTV\nArcadia Multi Select system\nExpanded WinUAE example configuration"\r
+ IDS_QS_MODELS "A500\nA500+\nA600\nA1000\nA1200\nA3000\nCD32\nCDTV\nArcadia Multi Select system\nExpanded WinUAE example configuration"\r
IDS_QS_MODEL_A500 "1.3 ROM, OCS, 512 KB Chip + 512 KB Slow RAM (most common)\nThis configuration is capable of running most games and demos produced for first-generation hardware. Only few exceptions need a different configuration (e.g. the oldest games tend to be incompatible with this configuration).\n1.3 ROM, ECS Agnus, 512 KB Chip RAM + 512 KB Slow RAM\nLater hardware revision of the A500. Nearly 100% compatible with the previous configuration.\n1.3 ROM, ECS Agnus, 1 MB Chip RAM\nFew newer games and demos require this configuration.\n1.3 ROM, OCS Agnus, 512 KB Chip RAM\nVery old (e.g. pre-1988) games and demos may require this configuration.\n1.2 ROM, OCS Agnus, 512 KB Chip RAM\nAs available for the A1000, and installed on the first A500 and A2000 series. Some very old programs only work correctly with this configuration. Note: This system ROM version can only boot from floppy disk (no hard disk boot support).\n1.2 ROM, OCS Agnus, 512 KB Chip RAM + 512 KB Slow RAM\nThis configuration adds expansion memory to the first A500 produced. Try this if your game does not work with newer configurations, but works with the previous one. It could add some features to the game, including faster loading times. Note: This system ROM version can only boot from floppy disk (no hard disk boot support)."\r
IDS_QS_MODEL_A500P "Basic non-expanded configuration\nThe A500+ adds an ECS Agnus chip, 1 MB of Chip RAM and a 2.0 ROM to the A500. Many A500 games and demos don't work properly on an A500+.\n2 MB Chip RAM expanded configuration\n\n4 MB Fast RAM expanded configuration\n"\r
IDS_QS_MODEL_A600 "Basic non-expanded configuration\nThe A600 is smaller than the A500+ and has an updated 2.0 ROM.\n2 MB Chip RAM expanded configuration\n\n4 MB Fast RAM expanded configuration\n"\r
BEGIN\r
IDS_QS_MODEL_UAE "High-end expanded configuration"\r
IDS_QS_MODEL_ARCADIA "Arcadia\nArcadia Multi Select system is arcade platform developed by Arcadia and Mastertronic. It is based on an A500 mainboard with ROM cage attached to expansion port. Arcadia ROM files go to ""Cartridge ROM File"" in ROM-panel."\r
+ IDS_QS_MODEL_A3000 "1.4 ROM, 2MB Chip + 8MB Fast\n\n3.1 ROM, 2MB Chip + 8MB Fast\n"\r
+ IDS_QS_MODEL_A4000 "A4000 (test)\nA4000"\r
+ IDS_QS_MODEL_A4000T "A4000T (test)\nA4000T"\r
END\r
\r
#endif // English (U.S.) resources\r
err = RegEnumValue(fkey, idx, tmp, &size, NULL, NULL, tmp2, &size2);
if (err != ERROR_SUCCESS)
break;
- if (strlen (tmp) == 5) {
+ if (strlen (tmp) == 6) {
idx2 = atol (tmp + 3);
if (idx2 >= 0 && strlen (tmp2) > 0) {
struct romdata *rd = getromdatabyid (idx2);
#define GETBDM(x) (((x) - ((x / 10000) * 10000)) / 100)
#define GETBDD(x) ((x) % 100)
-#define WINUAEBETA 2
+#define WINUAEBETA 3
#define WINUAEPUBLICBETA 1
-#define WINUAEDATE MAKEBD(2007, 5, 20)
+#define WINUAEDATE MAKEBD(2007, 5, 27)
#define WINUAEEXTRA ""
#define WINUAEREV ""
if (!cl)
rd = getromdatabydata (rombuf, size);
if (!rd)
- write_log ("'%s' %d, unknown CRC32 %04.4x\n",
+ write_log ("'%s' %d, unknown CRC32 %08X\n",
zfile_getname(f), size, get_crc32(rombuf, size));
free (rombuf);
return rd;
rd = scan_arcadia_rom (tmp, 0);
if (rd)
return rd;
+ rd = getromdatabypath(path);
+ if (rd && rd->crc32 == 0xffffffff)
+ return rd;
z = zfile_fopen (path, "rb");
if (!z)
return 0;
static int addrom (HKEY fkey, struct romdata *rd, char *name)
{
- char tmp[MAX_DPATH];
- sprintf (tmp, "ROM%02d", rd->id);
- if (RegQueryValueEx (fkey, tmp, 0, NULL, NULL, NULL) == ERROR_SUCCESS)
- return 0;
- if (RegSetValueEx (fkey, tmp, 0, REG_SZ, (CONST BYTE *)name, strlen (name) + 1) != ERROR_SUCCESS)
+ char tmp1[MAX_DPATH], tmp2[MAX_DPATH];
+ sprintf (tmp1, "ROM%03d", rd->id);
+ if (RegQueryValueEx (fkey, tmp1, 0, NULL, NULL, NULL) == ERROR_SUCCESS)
return 0;
+ tmp2[0] = 0;
+ if (name)
+ strcpy (tmp2, name);
+ if (rd->crc32 == 0xffffffff) {
+ if (rd->configname)
+ sprintf(tmp2, ":%s", rd->configname);
+ else
+ sprintf(tmp2, ":ROM%03d", rd->id);
+ }
+ if (RegSetValueEx (fkey, tmp1, 0, REG_SZ, (CONST BYTE *)tmp2, strlen (tmp2) + 1) != ERROR_SUCCESS)
+ return 0;
return 1;
}
8, 9, 10, -1, -1, // A600
23, 24, -1, -1, // A1000
11, 31, 15, -1, -1, // A1200
- 32, 58, -1, -1, // A3000
- 53, 54, 55, -1, -1, // A2091
- 56, 57, -1, -1, // A4091
+ 61, 32, 59, -1, -1, // A3000
+ 16, 46, 31, 13, 12, -1, -1, // A4000
18, -1, 19, -1, -1, // CD32
20, 21, 22, -1, 6, 32, -1, -1, // CDTV
49, 50, 51, -1, 5, 4, -1, -1, // ARCADIA
46, -1, -1, // highend
+ 53, 54, 55, -1, -1, // A2091
+ 56, 57, -1, -1, // A4091
0, 0, 0
};
WIN32GUI_LoadUIString (IDS_ROM_UNAVAILABLE, unavail, sizeof (avail));
strcat (avail, "\n");
strcat (unavail, "\n");
- p1 = "A500 Boot ROM 1.2\0A500 Boot ROM 1.3\0A500+\0A600\0A1000\0A1200\0A3000\0A590/A2091 SCSI Boot ROM\0A4091 SCSI Boot ROM\0CD32\0CDTV\0Arcadia Multi Select\0High end WinUAE\0\0";
+ p1 = "A500 Boot ROM 1.2\0A500 Boot ROM 1.3\0A500+\0A600\0A1000\0A1200\0A3000\0A4000\0\nCD32\0CDTV\0Arcadia Multi Select\0High end WinUAE\0\nA590/A2091 SCSI Boot ROM\0A4091 SCSI Boot ROM\0\0";
p = malloc (100000);
if (!p)
strcat (p, p1); strcat (p, ": ");
if (listrom (rp))
ok = 1;
- while(*rp++ != -1)
- rp++;
+ while(*rp++ != -1);
if (*rp != -1) {
ok = 0;
if (listrom (rp))
ok = 1;
while(*rp++ != -1);
- rp++;
}
+ rp++;
if (ok)
strcat (p, avail); else strcat (p, unavail);
p1 = p2;
char path[MAX_DPATH];
int ret;
static int recursive;
+ int id;
+ HKEY fkey;
if (recursive)
return 0;
if (ret)
set_path ("KickstartPath", path);
}
+ if (hWinUAEKey) {
+ RegCreateKeyEx(hWinUAEKey , "DetectedROMs", 0, NULL, REG_OPTION_NON_VOLATILE,
+ KEY_READ | KEY_WRITE, NULL, &fkey, NULL);
+ if (fkey) {
+ id = 1;
+ for (;;) {
+ struct romdata *rd = getromdatabyid(id);
+ if (!rd)
+ break;
+ if (rd->crc32 == 0xffffffff)
+ addrom(fkey, rd, NULL);
+ id++;
+ }
+ RegCloseKey(fkey);
+ }
+ }
read_rom_list ();
show_rom_list ();
recursive--;
{ 4, IDS_QS_MODEL_A600 }, // "Amiga 600"
{ 4, IDS_QS_MODEL_A1000 }, // "Amiga 1000"
{ 3, IDS_QS_MODEL_A1200 }, // "Amiga 1200"
+ { 1, IDS_QS_MODEL_A3000 }, // "Amiga 3000"
+ { 0, }, //{ 1, IDS_QS_MODEL_A4000 }, // "Amiga 4000"
+ { 0, }, //{ 1, IDS_QS_MODEL_A4000T }, // "Amiga 4000T"
{ 3, IDS_QS_MODEL_CD32 }, // "CD32"
{ 4, IDS_QS_MODEL_CDTV }, // "CDTV"
{ 4, IDS_QS_MODEL_ARCADIA }, // "Arcadia"
- { 0, 0 },
- { 0, 0 },
{ 1, IDS_QS_MODEL_UAE }, // "Expanded UAE example configuration"
{ -1 }
};
CheckDlgButton (hDlg, IDC_CS_A2091, workprefs.cs_a2091 > 0);
CheckDlgButton (hDlg, IDC_CS_A4091, workprefs.cs_a4091 > 0);
CheckDlgButton (hDlg, IDC_CS_CDTVSCSI, workprefs.cs_cdtvscsi > 0);
+ CheckDlgButton (hDlg, IDC_CS_SCSIMODE, workprefs.scsi == 2);
CheckDlgButton (hDlg, IDC_CS_PCMCIA, workprefs.cs_pcmcia > 0);
CheckDlgButton (hDlg, IDC_CS_IDE1, workprefs.cs_ide > 0 && (workprefs.cs_ide & 1));
CheckDlgButton (hDlg, IDC_CS_IDE2, workprefs.cs_ide > 0 && (workprefs.cs_ide & 2));
workprefs.cs_mbdmac = IsDlgButtonChecked (hDlg, IDC_CS_DMAC2) ? 2 : 0;
workprefs.cs_a2091 = IsDlgButtonChecked (hDlg, IDC_CS_A2091) ? 1 : 0;
workprefs.cs_a4091 = IsDlgButtonChecked (hDlg, IDC_CS_A4091) ? 1 : 0;
+ if (msg == WM_COMMAND && LOWORD(wParam) == IDC_CS_SCSIMODE)
+ workprefs.scsi = IsDlgButtonChecked (hDlg, IDC_CS_SCSIMODE) ? 2 : 0;
workprefs.cs_cdtvscsi = IsDlgButtonChecked (hDlg, IDC_CS_CDTVSCSI) ? 1 : 0;
workprefs.cs_pcmcia = IsDlgButtonChecked (hDlg, IDC_CS_PCMCIA) ? 1 : 0;
workprefs.cs_ide = IsDlgButtonChecked (hDlg, IDC_CS_IDE1) ? 1 : (IsDlgButtonChecked (hDlg, IDC_CS_IDE2) ? 2 : 0);
ew (hDlg, IDC_CS_DMAC2, e);
ew (hDlg, IDC_CS_A2091, e);
ew (hDlg, IDC_CS_A4091, e);
+ ew (hDlg, IDC_CS_SCSIMODE, TRUE);
ew (hDlg, IDC_CS_CDTVSCSI, e);
ew (hDlg, IDC_CS_PCMCIA, e);
ew (hDlg, IDC_CS_CD32CD, e);
int err = RegEnumValue(fkey, idx, tmp, &size, NULL, NULL, tmp2, &size2);
if (err != ERROR_SUCCESS)
break;
- if (strlen (tmp) == 5) {
+ if (strlen (tmp) == 6) {
idx2 = atol (tmp + 3);
if (idx2 >= 0) {
struct romdata *rd = getromdatabyid (idx2);
if (val == CB_ERR) {
SendDlgItemMessage (hDlg, d, WM_GETTEXT, (WPARAM)size, (LPARAM)path);
} else {
- char tmp1[MAX_DPATH], tmp2[MAX_DPATH];
+ char tmp1[MAX_DPATH];
struct romdata *rd;
SendDlgItemMessage (hDlg, d, CB_GETLBTEXT, (WPARAM)val, (LPARAM)tmp1);
path[0] = 0;
rd = getromdatabyname (tmp1);
- if (rd && hWinUAEKey) {
- HKEY fkey;
- RegCreateKeyEx(hWinUAEKey , "DetectedROMs", 0, NULL, REG_OPTION_NON_VOLATILE,
- KEY_READ | KEY_WRITE, NULL, &fkey, NULL);
- if (fkey) {
- DWORD outsize = size;
- sprintf (tmp1, "ROM%02d", rd->id);
- tmp2[0] = 0;
- RegQueryValueEx (fkey, tmp1, NULL, NULL, tmp2, &outsize);
- RegCloseKey (fkey);
- if (tmp2[0])
- strncpy (path, tmp2, size);
- }
+ if (rd) {
+ struct romlist *rl = getromlistbyromdata(rd);
+ if (rd->configname)
+ sprintf (path, ":%s", rd->configname);
+ else if (rl)
+ strncpy (path, rl->path, size);
}
}
}
-#define CART_SUPERIV "[Action Cartridge Super IV Professional]"
-
static void values_from_kickstartdlg (HWND hDlg)
{
getromfile (hDlg, IDC_ROMFILE, workprefs.romfile, sizeof (workprefs.romfile));
getromfile (hDlg, IDC_ROMFILE2, workprefs.romextfile, sizeof (workprefs.romextfile));
getromfile (hDlg, IDC_CARTFILE, workprefs.cartfile, sizeof (workprefs.cartfile));
- if (workprefs.cartfile[0])
- workprefs.cart_internal = 0;
- if (!strcmp(workprefs.cartfile, CART_SUPERIV)) {
- workprefs.cart_internal = 2;
- }
ew (hDlg, IDC_HRTMON, workprefs.cartfile[0] ? FALSE : TRUE);
- CheckDlgButton(hDlg, IDC_HRTMON, workprefs.cart_internal == 1 ? TRUE : FALSE);
+ //CheckDlgButton(hDlg, IDC_HRTMON, workprefs.cart_internal == 1 ? TRUE : FALSE);
}
static void values_to_kickstartdlg (HWND hDlg)
load_keyring(&workprefs, NULL);
addromfiles (fkey, hDlg, IDC_ROMFILE, workprefs.romfile, ROMTYPE_KICK | ROMTYPE_KICKCD32);
addromfiles (fkey, hDlg, IDC_ROMFILE2, workprefs.romextfile, ROMTYPE_EXTCD32 | ROMTYPE_EXTCDTV | ROMTYPE_ARCADIABIOS);
- addromfiles (fkey, hDlg, IDC_CARTFILE, workprefs.cartfile, ROMTYPE_AR | ROMTYPE_SUPERIV | ROMTYPE_ARCADIAGAME);
+ addromfiles (fkey, hDlg, IDC_CARTFILE, workprefs.cartfile, ROMTYPE_AR | ROMTYPE_SUPERIV | ROMTYPE_ARCADIAGAME | ROMTYPE_HRTMON);
if (fkey)
RegCloseKey (fkey);
}
SetDlgItemText(hDlg, IDC_FLASHFILE, workprefs.flashfile);
CheckDlgButton(hDlg, IDC_KICKSHIFTER, workprefs.kickshifter);
CheckDlgButton(hDlg, IDC_MAPROM, workprefs.maprom);
- CheckDlgButton(hDlg, IDC_HRTMON, workprefs.cart_internal == 1);
+ //CheckDlgButton(hDlg, IDC_HRTMON, workprefs.cart_internal == 1);
}
static void init_kickstart (HWND hDlg)
case IDC_MAPROM:
workprefs.maprom = IsDlgButtonChecked(hDlg, IDC_MAPROM) ? 0xe00000 : 0;
break;
-
+#if 0
case IDC_HRTMON:
workprefs.cart_internal = IsDlgButtonChecked(hDlg, IDC_HRTMON) ? 1 : 0;
ew (hDlg, IDC_CARTFILE, workprefs.cart_internal == 1 ? FALSE : TRUE);
break;
-
+#endif
}
recursive--;
break;
CheckDlgButton (hDlg, IDC_CTRLF11, workprefs.win32_ctrl_F11_is_quit);
CheckDlgButton (hDlg, IDC_NOOVERLAY, workprefs.win32_no_overlay);
CheckDlgButton (hDlg, IDC_SHOWLEDS, workprefs.leds_on_screen);
- CheckDlgButton (hDlg, IDC_SCSIDEVICE, workprefs.scsi);
+ CheckDlgButton (hDlg, IDC_SCSIDEVICE, workprefs.scsi == 1);
CheckDlgButton (hDlg, IDC_NOTASKBARBUTTON, workprefs.win32_notaskbarbutton);
CheckDlgButton (hDlg, IDC_ALWAYSONTOP, workprefs.win32_alwaysontop);
CheckDlgButton (hDlg, IDC_CLOCKSYNC, workprefs.tod_hack);
workprefs.win32_ctrl_F11_is_quit = IsDlgButtonChecked (hDlg, IDC_CTRLF11);
break;
case IDC_SCSIDEVICE:
- workprefs.scsi = IsDlgButtonChecked (hDlg, IDC_SCSIDEVICE);
+ workprefs.scsi = IsDlgButtonChecked (hDlg, IDC_SCSIDEVICE) ? 1 : 0;
enable_for_miscdlg (hDlg);
break;
case IDC_CLOCKSYNC:
}
if (workprefs.dfxclick[idx] < 0) {
p = drivesounds;
- i = DS_BUILD_IN_SOUNDS + 2 + 1;
+ i = DS_BUILD_IN_SOUNDS + (driveclick_pcdrivemask ? 2 : 0) + 1;
while (p && p[0]) {
if (!strcmpi (p, workprefs.dfxclickexternal[idx])) {
SendDlgItemMessage (hDlg, IDC_SOUNDDRIVESELECT, CB_SETCURSEL, i, 0);
NUMSG_MODRIP_SAVE,IDS_NUMSG_MODRIP_SAVE,
NUMSG_KS68EC020,IDS_NUMSG_KS68EC020,
NUMSG_KS68020,IDS_NUMSG_KS68020,
+ NUMSG_KS68030,IDS_NUMSG_KS68030,
NUMSG_ROMNEED,IDS_NUMSG_ROMNEED,
+ NUMSG_EXPROMNEED,IDS_NUMSG_EXPROMNEED,
NUMSG_NOZLIB,IDS_NUMSG_NOZLIB,
NUMSG_STATEHD,IDS_NUMSG_STATEHD,
NUMSG_OLDCAPS, IDS_NUMSG_OLDCAPS,
+Beta 3:
+
+ROM rescan required (or new hrtmon/superiv config support won't work)
+
+- ROM scan report dialog was totally broken
+- uaescsi.device backends (SPTI/ASPI) are now available in new
+ SCSI emulation mode. Checkbox added to advanced chipset, merges
+ all SCSI and IDE CD/DVD devices automatically, does not override
+ configured HDFs. Not multithreaded yet = emulation is stopped while
+ SCSI command is executing = mostly useless for real world tasks,
+ also SCSI configuration panel is still not implemented..
+- confirmed A3000 3.1 ROM added to rom scan list.
+- floppy drive sound GUI didn't work correctly if fdrawcmd.sys was
+ not installed (=no PC floppy drives listed)
+- A3000 36.141 KS ROM SCSI driver compatiblity fix (long word writes
+ to byte wide WD33C93 registers.. not the first time Commodore ignored
+ their own programming guidelines.. )
+- A3000 SuperKickstart support hack, SuperKickstart loading works!
+ (simple memory map remap hack, there is no MMU!)
+- QS panel does not anymore complain about boot block crc error if disk
+ is A1000 Kickstart disk or A3000 SuperKickstart disk
+- A3000 Quickstart settings added, 1.4 = KS with Kickstart menu,
+ SuperKickstart disk (or HD installed SuperKickstart) required.
+ (also try clicking on top/left corner..)
+- added "need 68030 CPU" dialog (KS 1.4)
+- added expansion boot rom missing dialog
+- added process breakpoint debugger feature (KB)
+- GPL Ghostscript registry installation detection added (AFPL was only
+ supported previously)
+- Ghostscript printing fixed (only worked previously by accident..)
+- built-in HRTMon moved to Cartridge ROM select menu
+- added "real" SuperIV cart emulation (=need loader disk)
+- debugger deep trainer improved. "D[<s><dix> <[max diff]>]"
+ Di = value must increase, Dd = decrease, abs(new value minus
+ old value) must be smaller than "max diff". s = 1 = byte, 2 = word.
+ long words not supported. (defaults to byte) Signed integers used in
+ comparison. NOTE: not really tested, I was not interested :)
+
+
Beta 2:
- WD33C93 + (Super)DMAC based SCSI HDF emulation. A590/A2091, A3000 and
#include "options.h"
#include "scsi.h"
#include "filesys.h"
+#include "blkdev.h"
static int outcmd[] = { 0x0a, 0x2a, 0xaa, -1 };
static int incmd[] = { 0x08, 0x12, 0x1a, 0x25, 0x28, 0xa8, 0x37, -1 };
int len = sd->buffer[4];
memset (sd->buffer, 0, len);
memcpy (sd->buffer, sd->sense, sd->sense_len > len ? len : sd->sense_len);
- } else {
+ } else if (sd->nativescsiunit < 0) {
sd->status = scsi_emulate(&sd->hfd->hfd, sd->hfd,
sd->cmd, sd->len, sd->buffer, &sd->data_len, sd->reply, &sd->reply_len, sd->sense, &sd->sense_len);
if (sd->status == 0) {
memcpy(sd->buffer, sd->reply, sd->reply_len);
}
}
+ } else {
+ struct amigascsi as;
+ memset(&as, 0, sizeof as);
+ memcpy (&as.cmd, sd->cmd, sd->len);
+ as.flags = 2;
+ if (sd->direction < 0)
+ as.flags |= 1;
+ as.sense_len = 32;
+ as.cmd_len = sd->len;
+ as.data = sd->buffer;
+ as.len = sd->direction < 0 ? 256 * 512 : sd->data_len;
+ sys_command_scsi_direct_native(sd->nativescsiunit, &as);
+ sd->status = as.status;
+ memcpy(sd->sense, as.sensedata, as.sense_len);
}
sd->offset = 0;
}
-struct scsi_data *scsi_alloc(struct hd_hardfiledata *hfd)
+struct scsi_data *scsi_alloc(int id, struct hd_hardfiledata *hfd)
{
struct scsi_data *sd = xcalloc(sizeof (struct scsi_data), 1);
sd->hfd = hfd;
+ sd->id = id;
+ sd->nativescsiunit = -1;
return sd;
}
+struct scsi_data *scsi_alloc_native(int id, int nativeunit)
+{
+ struct scsi_data *sd;
+ if (!sys_command_open (DF_SCSI, nativeunit)) {
+ write_log("SCSI: native scsi unit %d failed to open\n", nativeunit);
+ return NULL;
+ }
+ sd = xcalloc(sizeof (struct scsi_data), 1);
+ sd->id = id;
+ sd->nativescsiunit = nativeunit;
+ return sd;
+}
+
+void scsi_reset(void)
+{
+ device_func_init (DEVICE_TYPE_SCSI);
+}
+
void scsi_free(struct scsi_data *sd)
{
+ if (!sd)
+ return;
+ if (sd->nativescsiunit >= 0) {
+ sys_command_close (DF_SCSI, sd->nativescsiunit);
+ }
xfree(sd);
}
uaecptr scsidev_startup (uaecptr resaddr)
{
- if (!currprefs.scsi)
+ if (currprefs.scsi != 1)
return resaddr;
if (log_scsi)
write_log ("scsidev_startup(0x%x)\n", resaddr);
uae_u32 initcode, openfunc, closefunc, expungefunc;
uae_u32 beginiofunc, abortiofunc;
- if (!currprefs.scsi)
+ if (currprefs.scsi != 1)
return;
if (log_scsi)
write_log ("diskdev_install(): 0x%x\n", here ());
uae_u32 initcode, openfunc, closefunc, expungefunc;
uae_u32 beginiofunc, abortiofunc;
- if (!currprefs.scsi)
+ if (currprefs.scsi != 1)
return;
if (log_scsi)
write_log ("scsidev_install(): 0x%x\n", here ());
void scsidev_start_threads (void)
{
- if (!currprefs.scsi) /* quite useless.. */
+ if (currprefs.scsi != 1) /* quite useless.. */
return;
if (log_scsi)
write_log ("scsidev_start_threads()\n");
void scsidev_reset (void)
{
- if (!currprefs.scsi)
+ if (currprefs.scsi != 1)
return;
dev_reset ();
}
1111 0011 01ss sSSS:42:?????:?????:10: FRESTORE s[!Dreg,Areg,Apdi,Immd]
% 68030 MMU (allowed addressing modes not checked!)
-1111 0000 00ss sSSS:30:?????:?????:11: MMUOP30A s,#1
-1111 1000 00ss sSSS:30:?????:?????:11: MMUOP30B s
+1111 0000 00ss sSSS:30:?????:?????:11: MMUOP30A s[!Dreg,Areg,Immd],#1
+1111 1000 00ss sSSS:30:?????:?????:11: MMUOP30B s[!Immd]
% Misc MMU
1111 0101 iiii iSSS:50:?????:?????:11: MMUOP #i,s
projects / francis / winuae.git / commitdiff