static void wordsync_detected(bool startup)
{
+ // wordsync interrupt is edge triggered
if (!dsksync_on) {
- INTREQ_INT(12, 0);
+ // wordsync interrupt is inhibited if DSKLEN write bit is set
+ if (!(dsklen & 0x4000)) {
+ INTREQ_INT(12, 0);
+ }
dsksync_on = true;
}
+ // wordsync enables disk read if DMA is already active
if (dskdmaen != DSKDMA_OFF) {
int prev_dma_enabled = dma_enable;
if (!startup) {
dumpdisk(_T("SYNC"));
}
}
+ // wordsync match resets read shifter
if (adkcon & 0x0400) { // WORDSYNC
bitoffset = 15;
}
dsklen2 = dsklen = v;
dsklength2 = dsklength = dsklen & 0x3fff;
- if ((v & 0x8000) && !(prevlen & 0x8000)) {
- //bitoffset = 15;
- }
if ((v & 0x8000) && (prevlen & 0x8000)) {
if (dskdmaen == DSKDMA_READ && !(v & 0x4000)) {
// update only currently active DMA length, don't change DMA state
DISK_update_predict();
}
-void DISK_update_adkcon (int hpos, uae_u16 v)
+void DISK_update_adkcon(int hpos, uae_u16 v)
{
- uae_u16 vold = adkcon;
- uae_u16 vnew = adkcon;
- if (v & 0x8000)
- vnew |= v & 0x7FFF;
- else
- vnew &= ~v;
- if ((vnew & 0x400) && !(vold & 0x400))
- bitoffset = 0;
}
void DSKSYNC(int hpos, uae_u16 v)