//#define ROMHACK
//#define ROMHACK2
//#define CDTV_DEBUG
-//#define CDTV_DEBUG_CMD
+#define CDTV_DEBUG_CMD
//#define CDTV_DEBUG_6525
#include "sysconfig.h"
cd_led ^= LED_CD_ACTIVE2;
}
-static int cdrom_command_cnt_out, cdrom_command_size_out;
+static volatile int cdrom_command_cnt_out, cdrom_command_size_out;
static uae_u8 cdrom_command_output[16];
static volatile int stch, sten, scor, sbcp;
return 1;
}
-static int read_sectors(int start, int length)
+static int read_sectors (int start, int length)
{
#ifdef CDTV_DEBUG
write_log (L"READ DATA sector %d, %d sectors (blocksize=%d)\n", start, length, cdtv_sectorsize);
}
}
-static uae_u8 tp_bget(int addr)
+static uae_u8 tp_bget (int addr)
{
uae_u8 v = 0;
switch (addr)
}
break;
case 0xa1:
- cdrom_command(b);
+ cdrom_command (b);
break;
case 0xe0:
case 0xe1:
COP_skip1,
COP_strobe_delay1,
COP_strobe_delay2,
+ COP_strobe_extra, // just to skip current cycle when CPU wrote to COPJMP
COP_start_delay
};
static void record_color_change2 (int hpos, int regno, unsigned long value)
{
curr_color_changes[next_color_change].linepos = hpos * 2;
-#if 0
- // hpos >= 0xe0, add 2 lores pixels (should be in copper emul..)
- //curr_color_changes[next_color_change].linepos += (hpos >= maxhpos - 3) ? 2 : 0;
-#endif
curr_color_changes[next_color_change].regno = regno;
curr_color_changes[next_color_change++].value = value;
curr_color_changes[next_color_change].regno = -1;
fetch_start (hpos);
fetch_cycle = 0;
last_fetch_hpos = hstart;
+ cycle_diagram_shift = last_fetch_hpos;
out_nbits = 0;
out_offs = 0;
toscr_nbits = 0;
cop_state.ignore_next = 0;
if (!oldstrobe)
cop_state.state_prev = cop_state.state;
- cop_state.state = vblank ? COP_start_delay : COP_strobe_delay1;
+ cop_state.state = vblank ? COP_start_delay : (copper_access ? COP_strobe_delay1 : COP_strobe_extra);
cop_state.vpos = vpos;
cop_state.hpos = current_hpos () & ~1;
copper_enabled_thisline = 0;
continue;
cop_state.state = COP_skip1;
break;
+ case COP_strobe_extra:
+ // wait 1 copper cycle doing nothing
+ cop_state.state = COP_strobe_delay1;
+ break;
case COP_strobe_delay1:
// first cycle after COPJMP is just like normal first read cycle
if (copper_cant_read (old_hpos, 1))
decide_line (hpos);
decide_fetch (hpos);
decide_blitter (hpos);
- r = custom_wput_copper (hpos, addr, l, 1);
+ debug_wputpeek (0xdff000 + addr, l);
+ r = custom_wput_1 (hpos, addr, l, 1);
if (currprefs.chipset_mask & CSMASK_AGA) {
v = l;
last_custom_value1 = 0xffff;
int debug_copper = 0;
int debug_dma = 0;
int debug_sprite_mask = 0xff;
+int debug_illegal = 0;
+uae_u64 debug_illegal_mask;
static uaecptr processptr;
static uae_char *processname;
L" f <addr1> <addr2> Step forward until <addr1> <= PC <= <addr2>\n"
L" e Dump contents of all custom registers, ea = AGA colors\n"
L" i [<addr>] Dump contents of interrupt and trap vectors\n"
+ L" il [<mask>] Exception breakpoint\n"
L" o <0-2|addr> [<lines>]View memory as Copper instructions\n"
L" od Enable/disable Copper vpos/hpos tracing\n"
L" ot Copper single step trace\n"
{
case 'c': dumpcia (); dumpdisk (); dumpcustom (); break;
case 'i':
- addr = 0xffffffff;
- if (more_params (&inptr))
- addr = readhex (&inptr);
- dump_vectors (addr);
+ {
+ if (*inptr == 'l') {
+ next_char (&inptr);
+ if (more_params (&inptr)) {
+ debug_illegal_mask = readhex (&inptr);
+ } else {
+ debug_illegal_mask = debug_illegal ? 0 : -1;
+ debug_illegal_mask &= ~((uae_u64)255 << 24); // mask interrupts
+ }
+ write_log (L"Exception breakpoint mask: %0I64X\n", debug_illegal_mask);
+ debug_illegal = debug_illegal_mask ? 1 : 0;
+ } else {
+ addr = 0xffffffff;
+ if (more_params (&inptr))
+ addr = readhex (&inptr);
+ dump_vectors (addr);
+ }
break;
+ }
case 'e': dump_custom_regs (tolower(*inptr) == 'a'); break;
case 'r':
{
} else {
uae_u32 daddr;
int count;
- if (more_params(&inptr))
- daddr = readhex(&inptr);
+ if (more_params (&inptr))
+ daddr = readhex (&inptr);
else
daddr = nxdis;
- if (more_params(&inptr))
- count = readhex(&inptr);
+ if (more_params (&inptr))
+ count = readhex (&inptr);
else
count = 10;
m68k_disasm (stdout, daddr, &nxdis, count);
extern int debug_sprite_mask;
extern int debug_bpl_mask, debug_bpl_mask_one;
extern int debugger_active;
+extern int debug_illegal;
+extern uae_u64 debug_illegal_mask;
extern void debug (void);
extern void debugger_change (int mode);
#endif
}
+STATIC_INLINE int in_rom (uaecptr pc)
+{
+ return (munge24 (pc) & 0xFFF80000) == 0xF80000;
+}
+
+STATIC_INLINE int in_rtarea (uaecptr pc)
+{
+ return (munge24 (pc) & 0xFFFF0000) == rtarea_base && uae_boot_rom;
+}
+
void REGPARAM2 MakeSR (void)
{
regs.sr = ((regs.t1 << 15) | (regs.t0 << 14)
*/
-static void Exception_ce (int nr, uaecptr oldpc)
+static void Exception_ce000 (int nr, uaecptr oldpc)
{
uae_u32 currpc = m68k_getpc (), newpc;
int sv = regs.s;
- int start;
+ int start, interrupt;
start = 6;
if (nr == 7) // TRAPV
start = 2;
else if (nr == 4 || nr == 8) // ILLG & PRIVIL VIOL
start = 2;
+ interrupt = nr >= 24 && nr < 24 + 8;
if (start)
- do_cycles_ce (start * CYCLE_UNIT / 2);
+ do_cycles_ce000 (start);
- if (nr >= 24 && nr < 24 + 8) { // fetch interrupt vector number
+ if (interrupt) { // fetch interrupt vector number
nr = get_byte_ce (0x00fffff1 | ((nr - 24) << 1));
}
put_word_ce (m68k_areg (regs, 7) + 4, last_fault_for_exception_3);
put_word_ce (m68k_areg (regs, 7) + 0, mode);
put_word_ce (m68k_areg (regs, 7) + 2, last_fault_for_exception_3 >> 16);
- do_cycles_ce (2 * CYCLE_UNIT / 2);
+ do_cycles_ce000 (2);
write_log (L"Exception %d (%x) at %x -> %x!\n", nr, oldpc, currpc, get_long (4 * nr));
goto kludge_me_do;
}
m68k_areg (regs, 7) -= 6;
put_word_ce (m68k_areg (regs, 7) + 4, currpc); // write low address
put_word_ce (m68k_areg (regs, 7) + 0, regs.sr); // write SR
+ if (interrupt)
+ do_cycles_ce000 (4);
put_word_ce (m68k_areg (regs, 7) + 2, currpc >> 16); // write high address
kludge_me_do:
newpc = get_word_ce (4 * nr) << 16; // read high address
}
m68k_setpc (newpc);
regs.ir = get_word_ce (m68k_getpc ()); // prefetch 1
- do_cycles_ce (2 * CYCLE_UNIT / 2);
+ do_cycles_ce000 (2);
regs.irc = get_word_ce (m68k_getpc () + 2); // prefetch 2
set_special (SPCFLAG_END_COMPILE);
exception_trace (nr);
{
#ifdef CPUEMU_12
if (currprefs.cpu_cycle_exact && currprefs.cpu_model == 68000)
- Exception_ce (nr, oldpc);
+ Exception_ce000 (nr, oldpc);
else
#endif
if (currprefs.mmu_model)
Exception_mmu (nr, oldpc);
else
Exception_normal (nr, oldpc);
+
+ if (debug_illegal && !in_rom (M68K_GETPC)) {
+ int v = nr;
+ if (nr <= 63 && (debug_illegal_mask & ((uae_u64)1 << nr))) {
+ write_log (L"Exception %d breakpoint\n", nr);
+ activate_debugger ();
+ }
+ }
}
STATIC_INLINE void do_interrupt (int nr)
fill_prefetch_slow ();
}
-STATIC_INLINE int in_rom (uaecptr pc)
-{
- return (munge24 (pc) & 0xFFF80000) == 0xF80000;
-}
-
-STATIC_INLINE int in_rtarea (uaecptr pc)
-{
- return (munge24 (pc) & 0xFFFF0000) == rtarea_base && uae_boot_rom;
-}
-
unsigned long REGPARAM2 op_illg (uae_u32 opcode)
{
uaecptr pc = m68k_getpc ();
if ((opcode & 0xF000) == 0xF000) {
if (warned < 20) {
write_log (L"B-Trap %x at %x (%p)\n", opcode, pc, regs.pc_p);
- //activate_debugger ();
warned++;
}
Exception (0xB, 0);
}
if (warned < 20) {
write_log (L"Illegal instruction: %04x at %08X -> %08X\n", opcode, pc, get_long (regs.vbr + 0x10));
- //activate_debugger ();
warned++;
}
}
/* "cycle exact" 68020 */
+#define MAX68020CYCLES 4
static void m68k_run_2ce (void)
{
struct regstruct *r = ®s;
+ int tmpcycles = MAX68020CYCLES;
for (;;) {
uae_u32 opcode = get_word_ce020_prefetch (0);
(*cpufunctbl[opcode])(opcode);
if (r->ce020memcycles > 0) {
+ tmpcycles = CYCLE_UNIT * MAX68020CYCLES;
do_cycles_ce (r->ce020memcycles);
r->ce020memcycles = 0;
}
if (do_specialties (0))
return;
}
+ tmpcycles -= cpucycleunit;
+ if (tmpcycles <= 0) {
+ do_cycles_ce (1 * CYCLE_UNIT);
+ tmpcycles = CYCLE_UNIT * MAX68020CYCLES;;
+ }
}
}
#define WINUAEPUBLICBETA 1
#define LANG_DLL 1
-#define WINUAEBETA L"Beta 25"
-#define WINUAEDATE MAKEBD(2009, 12, 5)
-#define WINUAEEXTRA L"RC3"
+#define WINUAEBETA L"Beta 26"
+#define WINUAEDATE MAKEBD(2009, 12, 9)
+#define WINUAEEXTRA L"RC4"
#define WINUAEREV L""
#define IHF_WINDOWHIDDEN 6
+Beta 26: (RC4)
+
+- in some specific cases copper didn't use its allocated cycle
+ because it thought it was reserved for BPL DMA (broke in early
+ 2.0 betas. Rebels Megademo "Made in Sweden" part)
+- CPU writes to COPJMPx caused copper to start fetching instruction
+ words instantly, using same cycle as CPU. Added 1 extra copper idle
+ cycle if COPJMPx was written by CPU (harmless, caused only DMA
+ debugger warnings)
+- 68020 CE emulation become very slow if most accesses were cache hits
+ and froze if all acceses were cache hits
+
Beta 25: (RC3)
- directory filesystem parameter (label, bootpri, rw) changes were
- added Quickstart Arcadia ROM selection (lists all roms)
- random jumping single black scanline bug finally fixed (variable
that was not reset properly caused BPL DMA emulation to think this
- line had BPL DMA disabled) I finally managed to duplicate this bug
- 100% using Arcadia Leaderboard..
+ line had DMA disabled) I finally managed to duplicate this bug 100%
+ using Arcadia Leaderboard..
Beta 24: (RC2)