if (m->bus_error) {
if (((m->bus_error & 1) && (rwi & 1)) || ((m->bus_error & 4) && (rwi & 4)) || ((m->bus_error & 2) && (rwi & 2))) {
-#if HARDWARE_BUS_ERROR_EMULATION
- hardware_bus_error = 1;
-#else
- exception2(addr, (rwi & 2) == 0, size, ((rwi & 4) ? 2 : 1) | (regs.s ? 4 : 0));
-#endif
+ hardware_exception2(addr, val, (rwi & 2) != 0, (rwi & 4) != 0, size == 4 ? sz_long : (size == 2 ? sz_word : sz_byte));
}
continue;
}
mwn->reg = 0xffffffff;
mwn->frozen = 0;
mwn->modval_written = 0;
+ mwn->bus_error = 0;
ignore_ws (c);
if (more_params (c)) {
mwn->size = readhex (c);
const TCHAR *n = memwatch_access_masks[i].name;
int len = _tcslen(n);
if (!_tcsnicmp(cs, n, len)) {
- if (cs[len] == 0 || cs[len] == 10 || cs[len] == 13) {
+ if (cs[len] == 0 || cs[len] == 10 || cs[len] == 13 || cs[len] == ' ') {
mwn->access_mask |= memwatch_access_masks[i].mask;
while (len > 0) {
len--;
for (;;) {
TCHAR ncc = _totupper(peek_next_char(c));
TCHAR nc = _totupper(next_char(c));
- if (mwn->rwi == 7)
+ if (mwn->rwi == 7 && (nc == 'W' || nc == 'R' || nc == 'I'))
mwn->rwi = 0;
if (nc == 'F')
mwn->frozen = 1;
if (!mwn->bus_error)
mwn->bus_error = 7;
}
+ if (nc == 'L')
+ mwn->reportonly = true;
+ if (nc == 'N')
+ mwn->nobreak = true;
if (ncc == ' ' || ncc == 0)
break;
if (nc == 'P' && ncc == 'C') {
next_char(c);
mwn->pc = readhex(c, NULL);
}
- if (ncc == 'L')
- mwn->reportonly = true;
- if (ncc == 'N')
- mwn->nobreak = true;
if (!more_params(c))
break;
}
m68k_setpc (newpc);
branch_stack_push(currpc, currpc);
regs.ir = x_get_word (m68k_getpc ()); // prefetch 1
-#if HARDWARE_BUS_ERROR_EMULATION
if (hardware_bus_error) {
if (nr == 2 || nr == 3) {
cpu_halt(CPU_HALT_DOUBLE_FAULT);
exception2_fetch(regs.irc, 0);
return;
}
-#endif
regs.ird = regs.ir;
x_do_cycles (2 * cpucycleunit);
regs.ipl_pin = intlev();
ipl_fetch();
regs.irc = x_get_word (m68k_getpc () + 2); // prefetch 2
-#if HARDWARE_BUS_ERROR_EMULATION
if (hardware_bus_error) {
if (nr == 2 || nr == 3) {
cpu_halt(CPU_HALT_DOUBLE_FAULT);
exception2_fetch(regs.ir, 2);
return;
}
-#endif
#ifdef JIT
set_special (SPCFLAG_END_COMPILE);
#endif
// Common hardware bus error entry point. Both for MMU and non-MMU emulation.
void hardware_exception2(uaecptr addr, uae_u32 v, bool read, bool ins, int size)
{
- if (currprefs.mmu_model) {
+ if (currprefs.cpu_model <= 68010 && currprefs.cpu_compatible && HARDWARE_BUS_ERROR_EMULATION) {
+ hardware_bus_error = 1;
+ } else if (currprefs.mmu_model) {
if (currprefs.mmu_model == 68030) {
mmu030_hardware_bus_error(addr, v, read, ins, size);
} else {
mmu_hardware_bus_error(addr, v, read, ins, size);
}
return;
+ } else {
+ int fc = (regs.s ? 4 : 0) | (ins ? 2 : 1);
+ if (ismoves_nommu) {
+ ismoves_nommu = false;
+ fc = read ? regs.sfc : regs.dfc;
+ }
+ // Non-MMU
+ exception2_setup(regs.opcode, addr, read, size, fc);
+ THROW(2);
}
- int fc = (regs.s ? 4 : 0) | (ins ? 2 : 1);
- if (ismoves_nommu) {
- ismoves_nommu = false;
- fc = read ? regs.sfc : regs.dfc;
- }
- // Non-MMU
- exception2_setup(regs.opcode, addr, read, size, fc);
- THROW(2);
}
void exception2_read(uae_u32 opcode, uaecptr addr, int size, int fc)