]> git.unchartedbackwaters.co.uk Git - francis/winuae.git/commitdiff
A2410 improvements.
authorToni Wilen <twilen@winuae.net>
Tue, 7 Jul 2015 15:05:12 +0000 (18:05 +0300)
committerToni Wilen <twilen@winuae.net>
Tue, 7 Jul 2015 15:05:12 +0000 (18:05 +0300)
mame/a2410.cpp
mame/mameglue.h
mame/tm34010/34010gfx.c
mame/tm34010/34010ops.c
mame/tm34010/tms34010.cpp

index a9cd84e5120d32f73138a8b51b3ff91e33ca9bc4..ef840c11d85976d46eb06ef1897249caa27a2082 100644 (file)
@@ -25,12 +25,15 @@ static tms340x0_device tms_device;
 static address_space tms_space;
 mscreen *m_screen;
 
-#define OVERLAY_WIDTH 512
+#define OVERLAY_WIDTH 1024
 
+static int fullrefresh;
+static int request_fullrefresh;
 static uae_u8 *program_ram;
 static int a2410_palette_index;
 static uae_u8 a2410_palette[4 * (256 + 4)];
 static uae_u32 a2410_palette_32[256 + 4];
+static uae_u8 a2410_palette_temp[4];
 static uae_u8 a2410_palette_control[4];
 static uae_u16 a2410_control;
 static bool a2410_modified[1024];
@@ -95,6 +98,11 @@ static uaecptr makeaddr(UINT32 a, int *bank)
        return addr;
 }
 
+UINT32 total_cycles(void)
+{
+       return get_cycles() / CYCLE_UNIT;
+}
+
 void m_to_shiftreg_cb(address_space space, offs_t offset, UINT16 *shiftreg)
 {
        memcpy(shiftreg, &gfxmem_bank.baseaddr[TOWORD(offset)], 256 * sizeof(UINT16));
@@ -130,32 +138,50 @@ static void mark_overlay(int addr)
        if (!a2410_isactive)
                return;
        addr &= 0x1ffff;
-       addr /= OVERLAY_WIDTH / 4;
+       addr /= OVERLAY_WIDTH / 8;
        a2410_modified[addr] = true;
 }
 
 static void a2410_create_palette32(int offset)
 {
        int idx = a2410_palette_index / 4 + offset;
+       if (a2410_palette[idx * 4 + 0] != a2410_palette_temp[0] ||
+               a2410_palette[idx * 4 + 1] != a2410_palette_temp[1] ||
+               a2410_palette[idx * 4 + 2] != a2410_palette_temp[2]) {
+               request_fullrefresh = 1;
+       }
+       a2410_palette[idx * 4 + 0] = a2410_palette_temp[0];
+       a2410_palette[idx * 4 + 1] = a2410_palette_temp[1];
+       a2410_palette[idx * 4 + 2] = a2410_palette_temp[2];
        a2410_palette_32[idx] =
-               (a2410_palette[idx * 4 + 0] << 16) |
-               (a2410_palette[idx * 4 + 1] <<  8) |
-               (a2410_palette[idx * 4 + 2] <<  0);
+               (a2410_palette_temp[0] << 16) |
+               (a2410_palette_temp[1] <<  8) |
+               (a2410_palette_temp[2] <<  0);
+#if 0
+       write_log(_T("PAL %d: %02x %02x %02x = %08x\n"),
+               idx,
+               a2410_palette_temp[0],
+               a2410_palette_temp[1],
+               a2410_palette_temp[2],
+               a2410_palette_32[idx]);
+#endif
 }
 
 static void write_ramdac(int addr, uae_u8 v)
 {
+       int coloridx = a2410_palette_index & 3;
        switch (addr)
        {
                case 0:
                a2410_palette_index = v * 4;
                break;
                case 1:
-               a2410_palette[a2410_palette_index] = v;
-               a2410_create_palette32(0);
+               a2410_palette_temp[coloridx] = v;
                a2410_palette_index++;
-               if ((a2410_palette_index & 3) == 3)
+               if ((a2410_palette_index & 3) == 3) {
+                       a2410_create_palette32(0);
                        a2410_palette_index++;
+               }
                if (a2410_palette_index >= 256 * 4)
                        a2410_palette_index = 0;
                break;
@@ -191,11 +217,12 @@ static void write_ramdac(int addr, uae_u8 v)
                break;
                case 3:
                if (a2410_palette_index < 4 * 4) {
-                       a2410_palette[a2410_palette_index + 256 * 4] = v;
-                       a2410_create_palette32(256);
+                       a2410_palette_temp[coloridx] = v;
                        a2410_palette_index++;
-                       if ((a2410_palette_index & 3) == 3)
+                       if ((a2410_palette_index & 3) == 3) {
+                               a2410_create_palette32(256);
                                a2410_palette_index++;
+                       }
                        if (a2410_palette_index >= 4 * 4)
                                a2410_palette_index = 0;
                }
@@ -256,6 +283,8 @@ UINT8 address_space::read_byte(UINT32 a)
        uae_u8 v = 0;
        UINT32 aa = a << 3;
        uaecptr addr = makeaddr(a, &bank);
+
+       addr ^= 1;
        switch (bank)
        {
                case A2410_BANK_PROGRAM:
@@ -264,11 +293,11 @@ UINT8 address_space::read_byte(UINT32 a)
                break;
                case A2410_BANK_FRAMEBUFFER:
                v = gfxmem_bank.baseaddr[addr];
-               write_log(_T("TMS byte read framebuffer %08x (%08x) = %02x PC=%08x\n"), aa, addr, v, M68K_GETPC);
+               //write_log(_T("TMS byte read framebuffer %08x (%08x) = %02x PC=%08x\n"), aa, addr, v, M68K_GETPC);
                break;
                case A2410_BANK_RAMDAC:
                v = read_ramdac(addr);
-               write_log(_T("RAMDAC READ %08x = %02x PC=%08x\n"), aa, v, M68K_GETPC);
+               //write_log(_T("RAMDAC READ %08x = %02x PC=%08x\n"), aa, v, M68K_GETPC);
                break;
                case A2410_BANK_CONTROL:
                v = get_a2410_control();
@@ -287,11 +316,12 @@ UINT16 address_space::read_word(UINT32 a)
        uae_u16 v = 0;
        UINT32 aa = a << 3;
        uaecptr addr = makeaddr(a, &bank);
+
        switch (bank)
        {
                case A2410_BANK_TMSIO:
                v = tms_device.io_register_r(*this, addr);
-               write_log(_T("TMS IO word read %08x (%08x) = %04x PC=%08x PC=%08x\n"), aa, addr, v, M68K_GETPC);
+               //write_log(_T("TMS IO word read %08x (%08x) = %04x PC=%08x PC=%08x\n"), aa, addr, v, M68K_GETPC);
                break;
                case A2410_BANK_PROGRAM:
                v = program_ram[addr] << 8;
@@ -305,7 +335,7 @@ UINT16 address_space::read_word(UINT32 a)
                break;
                case A2410_BANK_RAMDAC:
                v = read_ramdac(addr);
-               write_log(_T("RAMDAC READ %08x = %02x PC=%08x\n"), aa, v, M68K_GETPC);
+               //write_log(_T("RAMDAC READ %08x = %02x PC=%08x\n"), aa, v, M68K_GETPC);
                break;
                case A2410_BANK_CONTROL:
                v = get_a2410_control();
@@ -317,11 +347,13 @@ UINT16 address_space::read_word(UINT32 a)
        }
        return v;
 }
+
 void address_space::write_byte(UINT32 a, UINT8 b)
 {
        int bank;
        UINT32 aa = a << 3;
        uaecptr addr = makeaddr(a, &bank);
+       addr ^= 1;
        switch (bank)
        {
                case A2410_BANK_PROGRAM:
@@ -332,7 +364,7 @@ void address_space::write_byte(UINT32 a, UINT8 b)
                break;
                case A2410_BANK_FRAMEBUFFER:
                gfxmem_bank.baseaddr[addr] = b;
-               write_log(_T("TMS gfx byte write %08x (%08x) = %02x PC=%08x\n"), aa, addr, b, M68K_GETPC);
+               //write_log(_T("TMS gfx byte write %08x (%08x) = %02x PC=%08x\n"), aa, addr, b, M68K_GETPC);
                break;
                case A2410_BANK_RAMDAC:
                //write_log(_T("RAMDAC WRITE %08x = %02x PC=%08x\n"), aa, b, M68K_GETPC);
@@ -347,6 +379,7 @@ void address_space::write_byte(UINT32 a, UINT8 b)
                break;
        }
 }
+
 void address_space::write_word(UINT32 a, UINT16 b)
 {
        int bank;
@@ -356,7 +389,7 @@ void address_space::write_word(UINT32 a, UINT16 b)
        {
                case A2410_BANK_TMSIO:
                tms_device.io_register_w(*this, addr, b);
-               write_log(_T("TMS IO word write %08x (%08x) = %04x PC=%08x\n"), aa, addr, b, M68K_GETPC);
+               //write_log(_T("TMS IO word write %08x (%08x) = %04x PC=%08x\n"), aa, addr, b, M68K_GETPC);
                break;
                case A2410_BANK_PROGRAM:
                program_ram[addr] = b >> 8;
@@ -371,7 +404,7 @@ void address_space::write_word(UINT32 a, UINT16 b)
                //write_log(_T("TMS gfx word write %08x (%08x) = %04x PC=%08x\n"), aa, addr, b, M68K_GETPC);
                break;
                case A2410_BANK_RAMDAC:
-               //write_log(_T("RAMDAC WRITE %08x = %04x PC=%08x\n"), aa, b, M68K_GETPC);
+               //write_log(_T("RAMDAC WRITE %08x = %04x IDX=%d/%d PC=%08x\n"), aa, b, a2410_palette_index / 4, a2410_palette_index & 3, M68K_GETPC);
                write_ramdac(addr, b);
                break;
                case A2410_BANK_CONTROL:
@@ -480,6 +513,7 @@ static void REGPARAM2 tms_bput(uaecptr addr, uae_u32 b)
                }
                return;
        }
+//     write_log(_T("tms_bput %08x=%02x\n"), addr, b);
        tms_device.host_w(tms_space, addr >> 1, (b << 8) | b);
        tms_execute_single();
 }
@@ -491,9 +525,27 @@ addrbank tms_bank = {
        tms_lget, tms_wget, ABFLAG_IO
 };
 
+static bool a2410_modechanged;
+static int a2410_gotmode;
+static int a2410_width, a2410_height;
+static int a2410_vram_start_offset;
+static uae_u8 *a2410_surface;
+static int a2410_interlace;
+static int a2410_interrupt;
+
 void tms_reset(void)
 {
-       tms_device.device_reset();
+       if (a2410_surface)
+               gfx_unlock_picasso(true);
+       a2410_surface = NULL;
+
+       a2410_modechanged = false;
+       a2410_gotmode = 0;
+       a2410_interlace = 0;
+       a2410_interrupt = 0;
+
+       if (program_ram)
+               tms_device.device_reset();
        tms_configured = 0;
 }
 
@@ -511,8 +563,12 @@ static void ew(int addr, uae_u32 value)
 
 void tms_free(void)
 {
+       if (a2410_surface)
+               gfx_unlock_picasso(true);
+       a2410_surface = NULL;
        mapped_free(&gfxmem_bank);
        xfree(program_ram);
+       program_ram = NULL;
 }
 
 addrbank *tms_init(int devnum)
@@ -528,11 +584,11 @@ addrbank *tms_init(int devnum)
        mapped_free(&gfxmem_bank);
        xfree(program_ram);
 
-       gfxmem_bank.label = _T("x_a0");
+       gfxmem_bank.label = _T("ram_a8");
        gfxmem_bank.allocated = 1 * 1024 * 1024;
        mapped_malloc(&gfxmem_bank);
        picasso_allocatewritewatch(gfxmem_bank.allocated);
-       gfxmem_bank.start = 0xa00000;
+       gfxmem_bank.start = 0xa80000;
 
        program_ram = xcalloc(uae_u8, 1 * 1024 * 1024);
 
@@ -543,14 +599,6 @@ addrbank *tms_init(int devnum)
        return &tms_bank;
 }
 
-static bool a2410_modechanged;
-static int a2410_gotmode;
-static int a2410_width, a2410_height;
-static int fullrefresh;
-static int a2410_vram_start_offset;
-static uae_u8 *a2410_surface;
-static int a2410_interlace;
-
 void mscreen::configure(int width, int height, rectangle vis)
 {
        a2410_width = vis.max_x - vis.min_x + 1;
@@ -601,7 +649,7 @@ bool tms_toggle(int mode)
        return false;
 }
 
-void tms_vsync_handler(void)
+static void tms_vsync_handler2(bool internalsync)
 {
        if (!tms_configured)
                return;
@@ -640,8 +688,14 @@ void tms_vsync_handler(void)
                if (currprefs.leds_on_screen & STATUSLINE_RTG) {
                        get_a2410_surface();
                }
-               if (fullrefresh > 0)
-                       fullrefresh--;
+               if (internalsync) {
+                       if (fullrefresh > 0)
+                               fullrefresh--;
+                       if (request_fullrefresh) {
+                               fullrefresh = 1;
+                               request_fullrefresh = 0;
+                       }
+               }
        }
 
        if (a2410_surface)
@@ -661,39 +715,53 @@ void tms_vsync_handler(void)
        }
 }
 
+
+static void a2410_rethink(void)
+{
+       if (a2410_interrupt)
+               INTREQ_0(0x8000 | 0x0008);
+}
+
+void tms_vsync_handler(void)
+{
+       if (!a2410_isactive)
+               tms_vsync_handler2(false);
+
+       if (a2410_surface)
+               gfx_unlock_picasso(false);
+       a2410_surface = NULL;
+}
+
 void tms_hsync_handler(void)
 {
-       int a2410_vpos = tms_vp;
        if (!tms_configured)
                return;
 
-       if (a2410_vpos == 0 && a2410_isactive) {
-               picasso_getwritewatch(a2410_vram_start_offset);
-       }
-
        tms_device.m_icount = 50;
        tms_device.execute_run();
-       tms_vp = tms_device.scanline_callback(NULL, tms_vp);
+       int a2410_vpos = tms_vp;
+       tms_vp = tms_device.scanline_callback(NULL, tms_vp, a2410_interlace < 0);
+
+       a2410_rethink();
 
        if (!a2410_isactive)
                return;
 
+       if (a2410_vpos == 0) {
+               tms_vsync_handler2(true);
+               picasso_getwritewatch(a2410_vram_start_offset);
+       }
+
+       if (a2410_modechanged)
+               return;
+
        tms34010_display_params parms;
        tms_device.get_display_params(&parms);
 
-       if (a2410_interlace) {
-               a2410_vpos = tms_vp * 2;
-               if (a2410_interlace < 0)
-                       a2410_vpos++;
-       }
-
        a2410_displaywidth = parms.hsblnk - parms.heblnk;
        a2410_displayend = parms.heblnk;
        a2410_vertical_start = parms.veblnk;
 
-       if (a2410_vpos >= a2410_height || a2410_vpos >= picasso_vidinfo.height)
-               return;
-
        int overlay_yoffset = a2410_vpos - a2410_vertical_start;
 
        int coladdr = parms.coladdr;
@@ -701,24 +769,39 @@ void tms_hsync_handler(void)
        uae_u16 *vram = (uae_u16*)gfxmem_bank.baseaddr + vramoffset;
 
        int overlayoffset = a2410_vpos - parms.veblnk;
-       uae_u8 *overlay0 = program_ram + overlayoffset * OVERLAY_WIDTH / 4;
-       uae_u8 *overlay1 = overlay0 + 0x20000;
 
-       if (!fullrefresh && (overlay_yoffset < 0 || !a2410_modified[overlay_yoffset])) {
+       if (overlay_yoffset < 0)
+               return;
+
+       if (a2410_interlace) {
+               overlay_yoffset *= 2;
+               if (a2410_interlace < 0)
+                       overlay_yoffset++;
+       }
+
+       if (overlay_yoffset >= a2410_height || overlay_yoffset >= picasso_vidinfo.height)
+               return;
+
+
+       if (!fullrefresh && !a2410_modified[overlay_yoffset]) {
                if (!picasso_is_vram_dirty(gfxmem_bank.start + (vramoffset << 1), a2410_displaywidth)) {
                        if (!picasso_is_vram_dirty(gfxmem_bank.start + ((vramoffset + 0x200) << 1), a2410_displaywidth)) {
                                return;
                        }
                }
        }
-       if (overlay_yoffset >= 0)
-               a2410_modified[overlay_yoffset] = false;
+
+       a2410_modified[overlay_yoffset] = false;
 
        get_a2410_surface();
        uae_u8 *dst = a2410_surface;
        if (!dst)
                return;
-       dst += a2410_vpos * picasso_vidinfo.rowbytes;
+       dst += overlay_yoffset * picasso_vidinfo.rowbytes;
+       uae_u32 *dst32 = (uae_u32*)dst;
+
+       uae_u8 *overlay0 = program_ram + overlayoffset * OVERLAY_WIDTH / 8;
+       uae_u8 *overlay1 = overlay0 + 0x20000;
 
        bool overlay0color = !(a2410_palette_control[6 - 4] & 0x40);
        uae_u16 bitmap_mask = a2410_palette_control[4 - 4];
@@ -729,9 +812,7 @@ void tms_hsync_handler(void)
                        overlay_mask[0] = 0;
                if (a2410_palette_control[6 - 4] & 8)
                        overlay_mask[1] = 0;
-               uae_u16 blink_mask = a2410_palette_control[5 - 4];
-               blink_mask |= blink_mask << 8;
-               bitmap_mask &= ~blink_mask;
+               bitmap_mask &= ~a2410_palette_control[5 - 4];
        }
 
        int xx = 0;
@@ -740,69 +821,66 @@ void tms_hsync_handler(void)
        uae_u8 opix0 = 0, opix1 = 0;
 
        for (int x = parms.heblnk; x < parms.hsblnk && xx < picasso_vidinfo.width; x += 2, xx += 2) {
-               uae_u16 pix;
 
-               if (!overlay_bitcount && overlayoffset >= 0) {
-                       opix0 = overlay0[overlay_offset ^ 1] & a2410_overlay_mask[0];
-                       opix1 = overlay1[overlay_offset ^ 1] & a2410_overlay_mask[1];
-                       overlay_offset++;
-               }
+               if (a2410_vpos >= parms.veblnk && a2410_vpos < parms.vsblnk) {
 
-               if (overlay0color || opix0 || opix1) {
+                       if (!overlay_bitcount && overlayoffset >= 0) {
+                               opix0 = overlay0[overlay_offset ^ 1] & a2410_overlay_mask[0];
+                               opix1 = overlay1[overlay_offset ^ 1] & a2410_overlay_mask[1];
+                               overlay_offset++;
+                       }
 
-                       int pal;
-                       uae_u8 ov;
+                       uae_u16 pix = vram[coladdr & 0x1ff];
+                       coladdr++;
 
-                       pix = vram[coladdr & 0x1ff];
+                       if (overlay0color || opix0 || opix1) {
 
-                       pal = (pix >> 8) & bitmap_mask;
-                       ov = opix0 & 1;
-                       ov |= (opix1 & 1) << 1;
-                       if (ov || overlay0color)
-                               pal = 256 + ov;
-                       ((uae_u32*)dst)[0] = a2410_palette_32[pal];
-                       opix0 >>= 1;
-                       opix1 >>= 1;
+                               int pal;
+                               uae_u8 ov;
 
-                       pal = pix & bitmap_mask;
-                       ov = opix0 & 1;
-                       ov |= (opix1 & 1) << 1;
-                       if (ov || overlay0color)
-                               pal = 256 + ov;
-                       ((uae_u32*)dst)[1] = a2410_palette_32[pal];
-                       opix0 >>= 1;
-                       opix1 >>= 1;
+                               pal = (pix >> 8) & bitmap_mask;
+                               ov = opix0 & 1;
+                               ov |= (opix1 & 1) << 1;
+                               if (ov || overlay0color)
+                                       pal = 256 + ov;
+                               *dst32++ = a2410_palette_32[pal];
+                               opix0 >>= 1;
+                               opix1 >>= 1;
 
-                       dst += 8;
-                       coladdr++;
+                               pal = pix & bitmap_mask;
+                               ov = opix0 & 1;
+                               ov |= (opix1 & 1) << 1;
+                               if (ov || overlay0color)
+                                       pal = 256 + ov;
+                               *dst32++ = a2410_palette_32[pal];
+                               opix0 >>= 1;
+                               opix1 >>= 1;
 
-               } else {
 
-                       pix = vram[coladdr & 0x1ff];
+                       } else {
 
-                       ((uae_u32*)dst)[0] = a2410_palette_32[pix >> 8];
-                       ((uae_u32*)dst)[1] = a2410_palette_32[pix & 0xff];
+                               *dst32++ = a2410_palette_32[pix >> 8];
+                               *dst32++ = a2410_palette_32[pix & 0xff];
 
-                       dst += 8;
-                       coladdr++;
+                               opix0 >>= 2;
+                               opix1 >>= 2;
 
-                       opix0 >>= 2;
-                       opix1 >>= 2;
+                       }
 
+                       overlay_bitcount += 2;
+                       overlay_bitcount &= 7;
                }
-
-               overlay_bitcount += 2;
-               overlay_bitcount &= 7;
        }
+
        while (xx < picasso_vidinfo.width) {
-               ((uae_u32*)dst)[0] = 0;
-               dst += 4;
+               *dst32++ = 0;
                xx++;
        }
 
 }
 
-void standard_irq_callback(int v)
+void standard_irq_callback(int level)
 {
-       INTREQ_0(0x8000 | 0x0008);
+       a2410_interrupt = level;
+       a2410_rethink();
 }
index 010c4fd646f658263bc50cf6573eb40dbb95a30f..6d47a19d09954acca1963181e7d69c6d355cf532 100644 (file)
@@ -27,7 +27,7 @@ typedef unsigned long offs_t;
 #define FALSE 0
 #define TRUE 1
 
-#define TIMER_CALLBACK_MEMBER(x) int x(void *p, int param)
+#define TIMER_CALLBACK_MEMBER(x) int x(void *p, int param, int param2)
 extern void standard_irq_callback(int);
 
 #define CONCAT_64(hi,lo)    (((UINT64)(hi) << 32) | (UINT32)(lo))
@@ -98,3 +98,4 @@ typedef UINT32 bitmap_ind16;
 
 extern void m_to_shiftreg_cb(address_space, offs_t, UINT16*);
 extern void m_from_shiftreg_cb(address_space, offs_t, UINT16*);
+extern UINT32 total_cycles(void);
index 01d5688f7e92801778d3381539302a6123860bc4..d0d4801bef42573c4f9a6a22a0748eda0a59334b 100644 (file)
@@ -219,6 +219,7 @@ UINT16 tms340x0_device::memory_r(address_space &space, offs_t offset)
 
 void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data)
 {
+       m_from_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
 #if 0
        if (!m_from_shiftreg_cb.isnull())
                m_from_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
@@ -229,6 +230,7 @@ void tms340x0_device::shiftreg_w(address_space &space, offs_t offset,UINT16 data
 
 UINT16 tms340x0_device::shiftreg_r(address_space &space, offs_t offset)
 {
+       m_to_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
 #if 0
        if (!m_to_shiftreg_cb.isnull())
                m_to_shiftreg_cb(space, (UINT32)(offset << 3) & ~15, &m_shiftreg[0]);
index ab5a5671ca999c75c0e311982b94cb1176da7376..160d53e39e754806d283eb91ef9b74367faed2d8 100644 (file)
@@ -95,15 +95,17 @@ void tms340x0_device::unimpl(UINT16 op)
        m_pc = RLONG(0xfffffc20);
        COUNT_UNKNOWN_CYCLES(16);
 
-       write_log("TMS UNIMPL!\n");
-#if 0
        /* extra check to prevent bad things */
-       if (m_pc == 0 || s_opcode_table[m_direct->read_decrypted_word(TOBYTE(m_pc)) >> 4] == &tms34010_device::unimpl)
+       if (m_pc == 0 || s_opcode_table[m_direct->read_decrypted_word(TOBYTE(m_pc)) >> 4] == &tms340x0_device::unimpl)
        {
+               write_log("TMS invalid program counter or opcode. CPU halted.!\n");
+               IOREG(REG_HSTCTLH) |= 0x8000;
+
+#if 0
                set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
                debugger_break(machine());
-       }
 #endif
+       }
 }
 
 
index 31f780546c719ae81ccb221f0fb9320e7216da8a..683b8bf7af1b4f02a116c06ad6b482a30d96f1e2 100644 (file)
@@ -864,6 +864,7 @@ TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback )
        int vcount = param;
        int enabled;
        int master;
+       int oddline = param2;
 
        /* fetch the core timing parameters */
        const rectangle &current_visarea = m_screen->visible_area();
@@ -885,7 +886,7 @@ TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback )
        if (enabled && vcount == SMART_IOREG(DPYINT))
        {
                /* generate the display interrupt signal */
-               internal_interrupt_callback(NULL, TMS34010_DI);
+               internal_interrupt_callback(NULL, TMS34010_DI, 0);
        }
 
        /* at the start of VBLANK, load the starting display address */
@@ -895,6 +896,9 @@ TIMER_CALLBACK_MEMBER( tms340x0_device::scanline_callback )
                if (!m_is_34020)
                {
                        IOREG(REG_DPYADR) = IOREG(REG_DPYSTRT);
+                       if ((SMART_IOREG(DPYCTL) & 0x4000) == 0 && oddline) {
+                               IOREG(REG_DPYADR) += (IOREG(REG_DPYCTL) & 0x03fc) / 2;
+                       }
                        //LOG(("Start of VBLANK, DPYADR = %04X\n", IOREG(REG_DPYADR)));
                }
 
@@ -1177,7 +1181,7 @@ WRITE16_MEMBER( tms340x0_device::io_register_w )
 
                                /* NMI issued? */
                                if (data & 0x0100) {
-                                       internal_interrupt_callback(NULL, 0);
+                                       internal_interrupt_callback(NULL, 0, 0);
 #if 0
                                        machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), 0);
 #endif
@@ -1210,19 +1214,21 @@ WRITE16_MEMBER( tms340x0_device::io_register_w )
                                {
 //                                     if (!m_output_int_cb.isnull())
 //                                             m_output_int_cb(1);
-                                       write_log(_T("m_output_int_cb(1)\n"));
+                                       standard_irq_callback(1);
+//                                     write_log(_T("m_output_int_cb(1)\n"));
                                }
                                else if ((oldreg & 0x0080) && !(newreg & 0x0080))
                                {
 //                                     if (!m_output_int_cb.isnull())
 //                                             m_output_int_cb(0);
-                                       write_log(_T("m_output_int_cb(0)\n"));
+                                       standard_irq_callback(0);
+//                                     write_log(_T("m_output_int_cb(0)\n"));
                                }
 
                                /* input interrupt? (should really be state-based, but the functions don't exist!) */
                                if (!(oldreg & 0x0008) && (newreg & 0x0008)) {
                                        //machine().scheduler().synchronize(timer_expired_delegate(FUNC(tms340x0_device::internal_interrupt_callback), this), TMS34010_HI);
-                                       internal_interrupt_callback(NULL, TMS34010_HI);
+                                       internal_interrupt_callback(NULL, TMS34010_HI, 0);
                                } else if ((oldreg & 0x0008) && !(newreg & 0x0008)) {
                                        IOREG(REG_INTPEND) &= ~TMS34010_HI;
                                }
@@ -1480,12 +1486,8 @@ READ16_MEMBER( tms340x0_device::io_register_r )
                                result -= total;
                        return result;
                case REG_REFCNT:
-#if 0
                        return (total_cycles() / 16) & 0xfffc;
-#else
-                       write_log("REG_REFCNT\n");
-               return 0;
-#endif
+
                case REG_INTPEND:
                        result = IOREG(offset);
 
@@ -1496,8 +1498,6 @@ READ16_MEMBER( tms340x0_device::io_register_r )
                        if (SMART_IOREG(VCOUNT) + 1 == SMART_IOREG(DPYINT) &&
                                m_scantimer->remaining() < attotime::from_hz(40000000/8/3))
                                result |= TMS34010_DI;
-#else
-                       write_log("REG_INTPEND %04x\n", result);
 #endif
                        return result;
        }