_T("gfx_hdr"),
+ _T("bogomem_fast"),
+
NULL
};
return cfgfile_option_find_it(s, option, true);
}
-bool cfgfile_option_get_bool(const TCHAR* s, const TCHAR* option)
+bool cfgfile_option_get_bool(const TCHAR *s, const TCHAR *option)
{
TCHAR *d = cfgfile_option_find_it(s, option, true);
bool ret = d && (!_tcsicmp(d, _T("true")) || !_tcsicmp(d, _T("1")));
return ret;
}
+bool cfgfile_option_get_nbool(const TCHAR *s, const TCHAR *option)
+{
+ TCHAR *d = cfgfile_option_find_it(s, option, true);
+ bool ret = d && (!_tcsicmp(d, _T("false")) || !_tcsicmp(d, _T("0")));
+ xfree(d);
+ return ret;
+}
static void trimwsa (char *s)
{
_stprintf(tmp1, _T("%s_size"), name);
if (!_tcsicmp(option, tmp1)) {
v = 0;
- if (!_tcsicmp(tmp1, _T("chipmem_size")))
+ if (!_tcsicmp(tmp1, _T("chipmem_size"))) {
+ rb->chipramtiming = true;
return false;
+ }
+ if (!_tcsicmp(tmp1, _T("bogomem_size"))) {
+ rb->chipramtiming = true;
+ }
cfgfile_intval(option, value, tmp1, &v, 0x100000);
rb->size = v;
return true;
rb->nodma = true;
if (cfgfile_option_get_bool(value, _T("force16bit")))
rb->force16bit = true;
+ if (cfgfile_option_get_bool(value, _T("slow")))
+ rb->chipramtiming = true;
+ else if (cfgfile_option_get_nbool(value, _T("slow")))
+ rb->chipramtiming = false;
s = cfgfile_option_get(value, _T("data"));
if (s && _tcslen(s) >= 3 * 16 - 1) {
rb->autoconfig_inuse = true;
_tcscpy(p, _T("force16bit=true"));
p += _tcslen(p);
}
+ if (!_tcsicmp(tmp1, _T("chipmem_options")) || !_tcsicmp(tmp1, _T("bogomem_options"))) {
+ if (!rb->chipramtiming) {
+ if (tmp2[0])
+ *p++ = ',';
+ _tcscpy(p, _T("slow=false"));
+ p += _tcslen(p);
+ }
+ } else {
+ if (rb->chipramtiming) {
+ if (tmp2[0])
+ *p++ = ',';
+ _tcscpy(p, _T("slow=true"));
+ p += _tcslen(p);
+ }
+ }
if (rb->autoconfig_inuse) {
uae_u8 *ac = rb->autoconfig;
if (tmp2[0])
cfgfile_dwrite(f, _T("fatgary"), _T("%d"), p->cs_fatgaryrev);
cfgfile_dwrite(f, _T("ramsey"), _T("%d"), p->cs_ramseyrev);
cfgfile_dwrite_bool(f, _T("pcmcia"), p->cs_pcmcia);
- cfgfile_dwrite_bool(f, _T("bogomem_fast"), p->cs_slowmemisfast);
cfgfile_dwrite_bool(f, _T("resetwarning"), p->cs_resetwarning);
cfgfile_dwrite_bool(f, _T("denise_noehb"), p->cs_denisenoehb);
cfgfile_dwrite_bool(f, _T("agnus_bltbusybug"), p->cs_agnusbltbusybug);
|| cfgfile_yesno(option, value, _T("cdtvram"), &p->cs_cdtvram)
|| cfgfile_yesno(option, value, _T("a1000ram"), &p->cs_a1000ram)
|| cfgfile_yesno(option, value, _T("cia_overlay"), &p->cs_ciaoverlay)
- || cfgfile_yesno(option, value, _T("bogomem_fast"), &p->cs_slowmemisfast)
|| cfgfile_yesno(option, value, _T("ksmirror_e0"), &p->cs_ksmirror_e0)
|| cfgfile_yesno(option, value, _T("ksmirror_a8"), &p->cs_ksmirror_a8)
|| cfgfile_yesno(option, value, _T("resetwarning"), &p->cs_resetwarning)
|| cfgfile_yesno(option, value, _T("memory_pattern"), &p->cs_memorypatternfill)
|| cfgfile_strval(option, value, _T("ciaa_type"), &p->cs_ciatype[0], ciatype, 0)
|| cfgfile_strval(option, value, _T("ciab_type"), &p->cs_ciatype[1], ciatype, 0)
- || cfgfile_strboolval (option, value, _T("comp_flushmode"), &p->comp_hardflush, flushmode, 0)
+ || cfgfile_strboolval(option, value, _T("comp_flushmode"), &p->comp_hardflush, flushmode, 0)
|| cfgfile_strval(option, value, _T("eclocksync"), &p->cs_eclocksync, eclocksync, 0))
return 1;
p->cs_ciaoverlay = 1;
p->cs_ciaatod = 0;
p->cs_df0idhw = 1;
- p->cs_slowmemisfast = 0;
p->cs_resetwarning = 1;
p->cs_ciatodbug = false;
p->cs_unmapped_space = 0;
p->z3autoconfig_start = 0x10000000;
p->chipmem.size = 0x00080000;
+ p->chipmem.chipramtiming = true;
p->bogomem.size = 0x00080000;
+ p->bogomem.chipramtiming = true;
for (int i = 0; i < MAX_RTG_BOARDS; i++) {
p->rtgboards[i].rtg_index = i;
}
p->cpuboard_subtype = 0;
p->chipmem.size = 0x00080000;
+ p->chipmem.chipramtiming = true;
p->bogomem.size = 0x00080000;
+ p->bogomem.chipramtiming = true;
p->z3chipmem.size = 0;
for (int i = 0; i < MAX_RAM_BOARDS; i++) {
memset(p->fastmem, 0, sizeof(struct ramboard));
set_68000_compa (p, compa);
p->floppyslots[1].dfxtype = DRV_NONE;
p->cs_compatible = CP_VELVET;
- p->cs_slowmemisfast = 1;
+ p->bogomem.chipramtiming = false;
p->cs_dipagnus = 1;
p->cs_agnusbltbusybug = 1;
built_in_chipset_prefs (p);
set_68000_compa (p, compa);
p->floppyslots[1].dfxtype = DRV_NONE;
p->cs_compatible = CP_A1000;
- p->cs_slowmemisfast = 1;
+ p->bogomem.chipramtiming = false;
p->cs_dipagnus = 1;
p->cs_agnusbltbusybug = 1;
built_in_chipset_prefs (p);
p->cs_rtc_adjust_mode = p->cs_rtc_adjust = 0;
p->cs_df0idhw = 1;
p->cs_resetwarning = 1;
- p->cs_slowmemisfast = 0;
p->cs_ciatodbug = false;
p->cs_z3autoconfig = false;
p->cs_bytecustomwritebug = false;
RL; // currprefs.cs_rtc_adjust = changed_prefs.cs_rtc_adjust = RL;
currprefs.cs_a1000ram = changed_prefs.cs_a1000ram = RBB;
- currprefs.cs_slowmemisfast = changed_prefs.cs_slowmemisfast = RBB;
//currprefs.a2091rom.enabled = changed_prefs.a2091rom.enabled = RBB;
//currprefs.a4091rom.enabled = changed_prefs.a4091rom.enabled = RBB;
SL(currprefs.cs_rtc_adjust);
SB(currprefs.cs_a1000ram ? 1 : 0);
- SB(currprefs.cs_slowmemisfast ? 1 : 0);
SB(is_board_enabled(&currprefs, ROMTYPE_A2091, 0) ? 1 : 0);
SB(is_board_enabled(&currprefs, ROMTYPE_A4091, 0) ? 1 : 0);
currprefs.cs_deniserev = changed_prefs.cs_deniserev;
currprefs.cs_mbdmac = changed_prefs.cs_mbdmac;
currprefs.cs_df0idhw = changed_prefs.cs_df0idhw;
- currprefs.cs_slowmemisfast = changed_prefs.cs_slowmemisfast;
currprefs.cs_denisenoehb = changed_prefs.cs_denisenoehb;
currprefs.cs_z3autoconfig = changed_prefs.cs_z3autoconfig;
currprefs.cs_bytecustomwritebug = changed_prefs.cs_bytecustomwritebug;
bool readonly;
bool nodma;
bool force16bit;
+ bool chipramtiming;
struct boardloadfile lf;
};
struct expansion_params
int cs_mbdmac;
bool cs_cdtvcr;
bool cs_df0idhw;
- bool cs_slowmemisfast;
bool cs_resetwarning;
bool cs_denisenoehb;
bool cs_dipagnus;
{
if (!ab || !ab->allocated_size)
return;
- if (!mb->force16bit)
- return;
- for (int i = (ab->start >> 16); i < ((ab->start + ab->allocated_size) >> 16); i++) {
- if (ce_banktype[i] == CE_MEMBANK_FAST32)
- ce_banktype[i] = CE_MEMBANK_FAST16;
- if (ce_banktype[i] == CE_MEMBANK_CHIP32)
- ce_banktype[i] = CE_MEMBANK_CHIP16;
+ if (mb->force16bit) {
+ for (int i = (ab->start >> 16); i < ((ab->start + ab->allocated_size) >> 16); i++) {
+ if (ce_banktype[i] == CE_MEMBANK_FAST32)
+ ce_banktype[i] = CE_MEMBANK_FAST16;
+ if (ce_banktype[i] == CE_MEMBANK_CHIP32)
+ ce_banktype[i] = CE_MEMBANK_CHIP16;
+ }
+ }
+ if (mb->chipramtiming) {
+ for (int i = (ab->start >> 16); i < ((ab->start + ab->allocated_size) >> 16); i++) {
+ ce_banktype[i] = ce_banktype[0];
+ }
}
}
ce_banktype[i] = (currprefs.cs_mbdmac || (currprefs.chipset_mask & CSMASK_AGA)) ? CE_MEMBANK_CHIP32 : CE_MEMBANK_CHIP16;
}
}
- if (!currprefs.cs_slowmemisfast) {
- for (i = (0xc00000 >> 16); i < (0xe00000 >> 16); i++)
- ce_banktype[i] = ce_banktype[0];
- for (i = (bogomem_bank.start >> 16); i < ((bogomem_bank.start + bogomem_bank.allocated_size) >> 16); i++)
- ce_banktype[i] = ce_banktype[0];
- }
for (i = (0xd00000 >> 16); i < (0xe00000 >> 16); i++) {
ce_banktype[i] = CE_MEMBANK_CHIP16;
}
#define IDC_CS_DENISEREV 1738
#define IDC_DBG_OUTPUT1 1739
#define IDC_CS_PCMCIA 1739
-#define IDC_CS_SLOWISFAST 1740
#define IDC_DBG_HELP 1740
#define IDC_DBG_INPUT 1741
#define IDC_CS_KSMIRROR_A8 1741
#define IDC_SAMPLER_STEREO 1812
#define IDC_FASTMEMFORCE16 1812
#define IDC_LISTDIALOG_LIST 1813
+#define IDC_FASTMEMSLOW 1813
#define IDC_LOGPATH 1814
#define IDC_MIDIROUTER 1815
#define IDC_CDLIST 1815
CONTROL "Display resync blanking",IDC_RESYNCBLANK,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,155,172,122,10
END
-IDD_MEMORY DIALOGEX 0, 0, 396, 316
+IDD_MEMORY DIALOGEX 0, 0, 396, 303
STYLE DS_LOCALEDIT | DS_SETFONT | DS_3DLOOK | DS_CONTROL | WS_CHILD
EXSTYLE WS_EX_CONTEXTHELP
FONT 8, "MS Sans Serif", 0, 0, 0x1
CONTROL "",IDC_Z3CHIPMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,248,90,60,20
EDITTEXT IDC_Z3CHIPRAM,311,95,40,12,ES_CENTER | ES_READONLY
EDITTEXT IDC_MAX32RAM,14,118,366,12,ES_CENTER | ES_READONLY
- GROUPBOX "Advanced Memory Settings",IDC_STATIC,1,147,393,137
+ GROUPBOX "Advanced Memory Settings",IDC_STATIC,1,134,393,161
COMBOBOX IDC_MEMORYSELECT,14,170,228,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
CONTROL "",IDC_MEMORYMEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,253,164,68,20
EDITTEXT IDC_MEMORYRAM,328,167,40,12,ES_CENTER | ES_READONLY
CONTROL "Manual configuration",IDC_FASTMEMNOAUTOCONFIG,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,201,103,8
CONTROL "DMA Capable",IDC_FASTMEMDMA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,213,103,8
CONTROL "Force 16-bit",IDC_FASTMEMFORCE16,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,225,103,8
- LTEXT "Z3 mapping mode:",IDC_STATIC,263,236,115,15,SS_CENTERIMAGE
- COMBOBOX IDC_Z3MAPPING,262,256,117,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+ LTEXT "Z3 mapping mode:",IDC_STATIC,263,256,115,15,SS_CENTERIMAGE
+ COMBOBOX IDC_Z3MAPPING,262,276,117,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
+ CONTROL "Slow RAM",IDC_FASTMEMSLOW,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,261,238,103,8
END
IDD_CPU DIALOGEX 0, 0, 396, 316
CONTROL "CD32 NVRAM",IDC_CS_CD32NVRAM,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,106,125,11
CONTROL "CDTV-CR",IDC_CS_CDTVCR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,119,123,11
CONTROL "PCMCIA",IDC_CS_PCMCIA,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,132,125,11
- CONTROL "C00000 is Fast RAM",IDC_CS_SLOWISFAST,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,145,125,11
- CONTROL "A1000 Agnus (8361/8367)",IDC_CS_DIPAGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,158,125,11
- CONTROL "Composite color burst",IDC_CS_COMPOSITECOLOR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,171,125,12
+ CONTROL "A1000 Agnus (8361/8367)",IDC_CS_DIPAGNUS,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,145,125,11
+ CONTROL "Composite color burst",IDC_CS_COMPOSITECOLOR,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,158,125,12
CONTROL "CIA 391078-01 [] CIA revision that can't read IO pin status in output mode",IDC_CS_CIA,
- "Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,184,125,12
+ "Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,171,125,12
RTEXT "Unmapped address space:",IDC_STATIC,15,215,101,9
COMBOBOX IDC_CS_UNMAPPED,125,212,71,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
GROUPBOX "Internal SCSI Hardware",IDC_STATIC,0,232,395,30
EDITTEXT IDC_CS_DENISEREV,311,298,45,13,ES_AUTOHSCROLL
COMBOBOX IDC_CS_CIASYNC,313,212,71,75,CBS_DROPDOWNLIST | WS_VSCROLL | WS_TABSTOP
RTEXT "CIA E-Clock Sync",IDC_STATIC,206,215,101,9
- CONTROL "Power up memory pattern",IDC_CS_MEMORYPATTERN,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,197,125,12
+ CONTROL "Power up memory pattern",IDC_CS_MEMORYPATTERN,"Button",BS_AUTOCHECKBOX | WS_TABSTOP,264,184,125,12
END
IDD_AVIOUTPUT DIALOGEX 0, 0, 396, 316
IDD_MEMORY, DIALOG
BEGIN
- BOTTOMMARGIN, 284
+ BOTTOMMARGIN, 289
END
IDD_CPU, DIALOG
CheckDlgButton(hDlg, IDC_CS_DMAC, workprefs.cs_mbdmac & 1);
CheckDlgButton(hDlg, IDC_CS_DMAC2, workprefs.cs_mbdmac & 2);
CheckDlgButton(hDlg, IDC_CS_PCMCIA, workprefs.cs_pcmcia);
- CheckDlgButton(hDlg, IDC_CS_SLOWISFAST, workprefs.cs_slowmemisfast);
CheckDlgButton(hDlg, IDC_CS_CIATODBUG, workprefs.cs_ciatodbug);
CheckDlgButton(hDlg, IDC_CS_Z3AUTOCONFIG, workprefs.cs_z3autoconfig);
CheckDlgButton(hDlg, IDC_CS_IDE1, workprefs.cs_ide > 0 && (workprefs.cs_ide & 1));
workprefs.cs_mbdmac = ischecked (hDlg, IDC_CS_DMAC) ? 1 : 0;
workprefs.cs_mbdmac |= ischecked (hDlg, IDC_CS_DMAC2) ? 2 : 0;
workprefs.cs_pcmcia = ischecked (hDlg, IDC_CS_PCMCIA) ? 1 : 0;
- workprefs.cs_slowmemisfast = ischecked (hDlg, IDC_CS_SLOWISFAST) ? 1 : 0;
workprefs.cs_z3autoconfig = ischecked (hDlg, IDC_CS_Z3AUTOCONFIG) ? 1 : 0;
workprefs.cs_ide = ischecked (hDlg, IDC_CS_IDE1) ? 1 : (ischecked (hDlg, IDC_CS_IDE2) ? 2 : 0);
workprefs.cs_ciaatod = ischecked (hDlg, IDC_CS_CIAA_TOD1) ? 0
ew(hDlg, IDC_CS_DMAC, e);
ew(hDlg, IDC_CS_DMAC2, e);
ew(hDlg, IDC_CS_PCMCIA, e);
- ew(hDlg, IDC_CS_SLOWISFAST, e);
ew(hDlg, IDC_CS_CD32CD, e);
ew(hDlg, IDC_CS_CD32NVRAM, e);
ew(hDlg, IDC_CS_CD32C2P, e);
ew(hDlg, IDC_FASTMEMNOAUTOCONFIG, isfast);
ew(hDlg, IDC_FASTMEMDMA, true);
ew(hDlg, IDC_FASTMEMFORCE16, true);
+ ew(hDlg, IDC_FASTMEMSLOW, fastram_select > 0);
ew(hDlg, IDC_MEMORYRAM, true);
ew(hDlg, IDC_MEMORYMEM, true);
ew(hDlg, IDC_RAM_ADDRESS, manual && size);
setchecked(hDlg, IDC_FASTMEMNOAUTOCONFIG, rb && rb->manual_config);
setchecked(hDlg, IDC_FASTMEMDMA, rb && rb->nodma == 0);
setchecked(hDlg, IDC_FASTMEMFORCE16, rb && rb->force16bit != 0);
+ setchecked(hDlg, IDC_FASTMEMSLOW, rb && (rb->chipramtiming != 0 || rb == &workprefs.chipmem));
if (rb) {
if (rb->manual_config) {
if (rb->end_address <= rb->start_address || rb->start_address + rb->size < rb->end_address)
{
case IDC_FASTMEMDMA:
if (fastram_select_ramboard) {
- struct ramboard* rb = fastram_select_ramboard;
+ struct ramboard *rb = fastram_select_ramboard;
rb->nodma = ischecked(hDlg, IDC_FASTMEMDMA) == 0;
setfastram_selectmenu(hDlg, 0);
}
break;
case IDC_FASTMEMFORCE16:
if (fastram_select_ramboard) {
- struct ramboard* rb = fastram_select_ramboard;
+ struct ramboard *rb = fastram_select_ramboard;
rb->force16bit = ischecked(hDlg, IDC_FASTMEMFORCE16) != 0;
setfastram_selectmenu(hDlg, 0);
}
break;
+ case IDC_FASTMEMSLOW:
+ if (fastram_select_ramboard) {
+ struct ramboard *rb = fastram_select_ramboard;
+ rb->chipramtiming = ischecked(hDlg, IDC_FASTMEMSLOW) != 0;
+ setfastram_selectmenu(hDlg, 0);
+ }
+ break;
case IDC_FASTMEMAUTOCONFIGUSE:
if (fastram_select_ramboard) {
- struct ramboard* rb = fastram_select_ramboard;
+ struct ramboard *rb = fastram_select_ramboard;
rb->autoconfig_inuse = ischecked(hDlg, IDC_FASTMEMAUTOCONFIGUSE);
rb->manual_config = false;
setfastram_selectmenu(hDlg, 0);