Sync shift options

diff --git a/cfgfile.cpp b/cfgfile.cpp
index 09e8ec66c559e70876bd5e0d1e42672177d58a96..c619b4c3d7625f6c05fda827e208e8900a423653 100644 (file)
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -2779,6 +2779,8 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
        cfgfile_dwrite_bool(f, _T("1mchipjumper"), p->cs_1mchipjumper);
        cfgfile_dwrite_bool(f, _T("color_burst"), p->cs_color_burst);
        cfgfile_dwrite_strarr(f, _T("hvcsync"), hvcsync, p->cs_hvcsync);
+       cfgfile_dwrite(f, _T("hsyncadjust"), _T("%d"), p->cs_hsyncadjust);
+       cfgfile_dwrite(f, _T("vsyncadjust"), _T("%d"), p->cs_vsyncadjust);
        cfgfile_dwrite_bool(f, _T("toshiba_gary"), p->cs_toshibagary);
        cfgfile_dwrite_bool(f, _T("rom_is_slow"), p->cs_romisslow);
        cfgfile_dwrite_strarr(f, _T("ciaa_type"), ciatype, p->cs_ciatype[0]);
@@ -6086,6 +6088,8 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
                || cfgfile_intval(option, value, _T("keyboard_handshake"), &p->cs_kbhandshake, 1)
                || cfgfile_intval(option, value, _T("eclockphase"), &p->cs_eclockphase, 1)
                || cfgfile_intval(option, value, _T("chipset_rtc_adjust"), &p->cs_rtc_adjust, 1)
+               || cfgfile_intval(option, value, _T("hsyncadjust"), &p->cs_hsyncadjust, 1)
+               || cfgfile_intval(option, value, _T("vsyncadjust"), &p->cs_vsyncadjust, 1)
                || cfgfile_intval(option, value, _T("rndseed"), &p->seed, 1))
                return 1;
 
@@ -8630,6 +8634,8 @@ void default_prefs (struct uae_prefs *p, bool reset, int type)
        p->cs_unmapped_space = 0;
        p->cs_color_burst = false;
        p->cs_hvcsync = 0;
+       p->cs_hsyncadjust = CCKS_AFTER_HSYNC * 2 * 4;
+       p->cs_vsyncadjust = LINES_AFTER_VSYNC * 2;
        p->cs_ciatype[0] = 0;
        p->cs_ciatype[1] = 0;
        p->cs_memorypatternfill = true;

diff --git a/custom.cpp b/custom.cpp
index 883c00d160b0291ba7109651696e3394da2f86c8..ae9ab65614aeb4226a2ab516956207776a5f8780 100644 (file)
--- a/custom.cpp
+++ b/custom.cpp
@@ -1912,11 +1912,11 @@ static void init_beamcon0(void)
        }
 
        // after vsync, it seems earlier possible visible line is vsync+3.
-       vsync_startline = LINES_AFTER_VSYNC;
+       vsync_startline = currprefs.cs_vsyncadjust / 2;
        if ((beamcon0 & BEAMCON0_VARVBEN) && (beamcon0 & bemcon0_vsync_mask)) {
                vsync_startline += vsstrt;
                if (vsync_startline >= vsync_lines / 2) {
-                       vsync_startline = LINES_AFTER_VSYNC;
+                       vsync_startline = currprefs.cs_vsyncadjust / 2;
                }
        }
 
@@ -1934,8 +1934,8 @@ static void init_beamcon0(void)
                total /= 4;
        }
        int hsylen = current_agnus_hslen_cck;
-       hsylen += CCKS_AFTER_HSYNC;
        hsylen *= 2;
+       hsylen += currprefs.cs_hsyncadjust / 4;
        //hsstop_detect = hbe;
        if (hbe < hsylen) {
                hbe = hsylen;
@@ -1958,8 +1958,6 @@ static void init_beamcon0(void)
                } else {
                        maxvpos_display--;
                }
-       } else if (currprefs.gfx_overscanmode == OVERSCANMODE_BROADCAST) {
-               maxhpos_display += 7;
        } else if (currprefs.gfx_overscanmode >= OVERSCANMODE_ULTRA) {
                maxhpos_display = hsync_ccks * 2;
                display_hstart_cyclewait_start = 0;

diff --git a/include/options.h b/include/options.h
index 96867ab171d6a69d30923ac8a214993e6fa62921..b9c533ed61aa379590f3430ca0ef9a15f108db10 100644 (file)
--- a/include/options.h
+++ b/include/options.h
@@ -758,6 +758,8 @@ struct uae_prefs {
        int cs_ciatype[2];
        int cs_kbhandshake;
        int cs_hvcsync;
+       int cs_hsyncadjust;
+       int cs_vsyncadjust;
        int cs_eclockphase;
        int cs_eclocksync;
        int cs_agnusmodel;

diff --git a/main.cpp b/main.cpp
index 40f7b67c567a329a9a937cb793960f2e07b39216..ad262a625268bb6ba52b1a2e23f6e2b9397b8829 100644 (file)
--- a/main.cpp
+++ b/main.cpp
@@ -790,8 +790,9 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
 #endif
        }
 #endif
-       if (p->gfx_framerate < 1)
+       if (p->gfx_framerate < 1) {
                p->gfx_framerate = 1;
+       }
        if (p->gfx_display_sections < 1) {
                p->gfx_display_sections = 1;
        } else if (p->gfx_display_sections > 99) {
@@ -808,12 +809,27 @@ void fixup_prefs (struct uae_prefs *p, bool userconfig)
                p->maprom = 0;
        }
 
-       if (p->tod_hack && p->cs_ciaatod == 0)
+       if (p->tod_hack && p->cs_ciaatod == 0) {
                p->cs_ciaatod = p->ntscmode ? 2 : 1;
+       }
 
        // PCem does not support max speed.
-       if (p->x86_speed_throttle < 0)
+       if (p->x86_speed_throttle < 0) {
                p->x86_speed_throttle = 0;
+       }
+
+       if (p->cs_hsyncadjust < 2 * 4 * 2) {
+               p->cs_hsyncadjust = 2 * 4 * 2;
+       }
+       if (p->cs_hsyncadjust > 20 * 4 * 2) {
+               p->cs_hsyncadjust = 20 * 4 * 2;
+       }
+       if (p->cs_vsyncadjust < 0) {
+               p->cs_vsyncadjust = 0;
+       }
+       if (p->cs_vsyncadjust > 20 * 2) {
+               p->cs_vsyncadjust = 20 * 2;
+       }
 
        built_in_chipset_prefs (p);
        blkdev_fix_prefs (p);