2410b4

diff --git a/custom.cpp b/custom.cpp
index 4e9f1a7055cb25a350f1399328c4c8027ca6ca5e..41b3759bc34811588f6cad8cff988ddf7e3e4530 100644 (file)
--- a/custom.cpp
+++ b/custom.cpp
@@ -2894,7 +2894,10 @@ void compute_framesync (void)
                if (vres2 > VRES_QUAD)
                        vres2 = VRES_QUAD;
 
-               gfxvidinfo.drawbuffer.inwidth =  (((hbstrt > hbstop ? 0 : (maxhpos - (hbstop - hbstrt))) * 2) << res2);
+               int start = hbstrt;
+               int stop = hbstop;
+
+               gfxvidinfo.drawbuffer.inwidth =  (((start > stop ? (maxhpos - (maxhpos - start + stop)) : (maxhpos - (stop - start))) * 2) << res2);
                gfxvidinfo.drawbuffer.extrawidth = 0;
                gfxvidinfo.drawbuffer.inwidth2 = gfxvidinfo.drawbuffer.inwidth;
 

diff --git a/drawing.cpp b/drawing.cpp
index 618646d00447c158ef3636f5a73d25dc0cfb1ffd..ca0e39ce724fbca30de03e91fa816a424d1fe489 100644 (file)
--- a/drawing.cpp
+++ b/drawing.cpp
@@ -381,7 +381,7 @@ int get_custom_limits (int *pw, int *ph, int *pdx, int *pdy)
        if (interlace_seen) {
                // interlace = only use long frames
                if (!lof_store)
-                       return 1;
+                       return ret;
                last_planes_vpos++;
                plflastline_total++;
        }
@@ -442,7 +442,7 @@ int get_custom_limits (int *pw, int *ph, int *pdx, int *pdy)
        }
 
        if (dx < 0)
-               dx = 1;
+               dx = 0;
 
        dy = xshift (dy, dbl2);
        h = xshift (h, dbl1);
@@ -472,7 +472,7 @@ int get_custom_limits (int *pw, int *ph, int *pdx, int *pdy)
        if (gclow == w && gcloh == h && gclox == dx && gcloy == dy)
                return ret;
 
-       if (w <= 0 || h <= 0 || dx <= 0 || dy <= 0)
+       if (w <= 0 || h <= 0 || dx < 0 || dy < 0)
                return ret;
        if (doublescan <= 0 && !programmedmode) {
                if (dx > gfxvidinfo.outbuffer->inwidth / 3)

diff --git a/gencpu.cpp b/gencpu.cpp
index b85eb981c2c9694be6ba953afa92a3c6982c2486..a16eae3fa7a192322d03b5ece762555b429ccbc6 100644 (file)
--- a/gencpu.cpp
+++ b/gencpu.cpp
@@ -1474,7 +1474,10 @@ static void gen_opcode (unsigned long int opcode)
                        dstb = "x_put_byte";
                        do_cycles = "do_cycles_ce000";
                } else if (using_ce020) {
-                       disp020 = "x_get_disp_ea_020";
+                       /* x_ not used if it redirects to
+                        * get_word_ce020_prefetch()
+                        */
+                       disp020 = "x_get_disp_ea_ce020";
                        prefetch_long = "get_long_ce020_prefetch";
                        prefetch_word = "get_word_ce020_prefetch";
                        srcli = "x_get_ilong";
@@ -1487,6 +1490,8 @@ static void gen_opcode (unsigned long int opcode)
                        srcb = "x_get_byte";
                        dstb = "x_put_byte";
                        do_cycles = "do_cycles_ce020";
+                       nextw = "next_iword_020ce";
+                       nextl = "next_ilong_020ce";
                }
 
        } else if (using_ce020) {
@@ -3895,7 +3900,7 @@ static void generate_cpu (int id, int mode)
        } else {
                cpu_level = 5 - id; // "generic"
        }
-       using_indirect = using_ce && !using_ce020;
+       using_indirect = using_ce || using_ce020;
 
        if (generate_stbl) {
                if ((id > 0 && id < 10) || (id >= 20))

diff --git a/include/newcpu.h b/include/newcpu.h
index 42a296caf85fd22c67c5ea2496cbf4ab3c2d334b..b19deec7d41f474ff72cb3438144e44caf0dcc8b 100644 (file)
--- a/include/newcpu.h
+++ b/include/newcpu.h
@@ -353,6 +353,7 @@ extern void (*x_do_cycles_pre)(unsigned long);
 extern void (*x_do_cycles_post)(unsigned long, uae_u32);
 
 extern uae_u32 REGPARAM3 x_get_disp_ea_020 (uae_u32 base, uae_u32 dp) REGPARAM;
+extern uae_u32 REGPARAM3 x_get_disp_ea_ce020 (uae_u32 base, uae_u32 dp) REGPARAM;
 extern uae_u32 REGPARAM3 x_get_bitfield (uae_u32 src, uae_u32 bdata[2], uae_s32 offset, int width) REGPARAM;
 extern void REGPARAM3 x_put_bitfield (uae_u32 dst, uae_u32 bdata[2], uae_u32 val, uae_s32 offset, int width) REGPARAM;
 

diff --git a/isofs.cpp b/isofs.cpp
index fc35a835d12f70afe8e79a5d40d35759065cec56..3915f9af9c3b163418ecca3786556247212a3225 100644 (file)
--- a/isofs.cpp
+++ b/isofs.cpp
@@ -1932,8 +1932,10 @@ root_found:
         */
        if (sbi->s_rock == 1) {
                joliet_level = 0;
+               sbi->s_cdtv = 1; /* only convert if plain iso9660 */
        } else if (joliet_level) {
                sbi->s_rock = 0;
+               sbi->s_cdtv = 1; /* only convert if plain iso9660 */
                if (sbi->s_firstdatazone != first_data_zone) {
                        sbi->s_firstdatazone = first_data_zone;
                        write_log (_T("ISOFS: changing to secondary root\n"));
@@ -2025,8 +2027,9 @@ static int isofs_name_translate(struct iso_directory_record *de, char *newn, str
                if (!c)
                        break;
 
-               if (!inode->i_sb->ei.s_cdtv) { /* keep case if CDTV/CD32 */
-                       if (c >= 'A' && c <= 'Z')
+               if (!inode->i_sb->ei.s_cdtv) { /* keep case if Amiga/CDTV/CD32 */
+                       /* convert from second character (same as CacheCDFS default) */
+                       if (i > 0 && c >= 'A' && c <= 'Z')
                                c |= 0x20;      /* lower case */
                }
 

diff --git a/memory.cpp b/memory.cpp
index de9ae7686c07842c4416b2f90ad77c6a3d44ab13..8be7b56f48f6e3333c13b71439e77bbe891fadd1 100644 (file)
--- a/memory.cpp
+++ b/memory.cpp
@@ -2112,7 +2112,7 @@ static void allocate_memory (void)
 
                memsize = allocated_chipmem = chipmem_full_size = currprefs.chipmem_size;
                chipmem_full_mask = chipmem_mask = allocated_chipmem - 1;
-               if (memsize < 0x100000)
+               if (!canbang && memsize < 0x100000)
                        memsize = 0x100000;
                if (memsize > 0x100000 && memsize < 0x200000)
                        memsize = 0x200000;
@@ -2127,7 +2127,7 @@ static void allocate_memory (void)
                }
                currprefs.chipset_mask = changed_prefs.chipset_mask;
                chipmem_full_mask = allocated_chipmem - 1;
-               if (currprefs.chipset_mask & CSMASK_ECS_AGNUS) {
+               if ((currprefs.chipset_mask & CSMASK_ECS_AGNUS) && !canbang) {
                        if (allocated_chipmem < 0x100000)
                                chipmem_full_mask = 0x100000 - 1;
                        if (allocated_chipmem > 0x100000 && allocated_chipmem < 0x200000)

diff --git a/newcpu.cpp b/newcpu.cpp
index 864f4f8d9592f606907b598ca26081bff81e2b44..b43c064ac7543276804b20293404a296de1a7cce 100644 (file)
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -10,6 +10,7 @@
 #define MMUOP_DEBUG 2
 #define DEBUG_CD32CDTVIO 0
 #define EXCEPTION3_DEBUG 0
+#define CPUTRACE_DEBUG 0
 
 #include "sysconfig.h"
 #include "sysdeps.h"
@@ -179,8 +180,29 @@ void (*x_do_cycles_post)(unsigned long, uae_u32);
 
 static struct cputracestruct cputrace;
 
+#if CPUTRACE_DEBUG
+static void validate_trace (void)
+{
+       for (int i = 0; i < cputrace.memoryoffset; i++) {
+               struct cputracememory *ctm = &cputrace.ctm[i];
+               if (ctm->data == 0xdeadf00d) {
+                       write_log (L"unfinished write operation %d %08x\n", i, ctm->addr);
+               }
+       }
+}
+#endif
+
+static void debug_trace (void)
+{
+       if (cputrace.writecounter > 10000 || cputrace.readcounter > 10000)
+               write_log (L"cputrace.readcounter=%d cputrace.writecounter=%d\n", cputrace.readcounter, cputrace.writecounter);
+}
+
 STATIC_INLINE void clear_trace (void)
 {
+#if CPUTRACE_DEBUG
+       validate_trace ();
+#endif
        struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset++];
        ctm->mode = 0;
        cputrace.cyclecounter = 0;
@@ -188,6 +210,9 @@ STATIC_INLINE void clear_trace (void)
 }
 static void set_trace (uaecptr addr, int accessmode, int size)
 {
+#if CPUTRACE_DEBUG
+       validate_trace ();
+#endif
        struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset++];
        ctm->addr = addr;
        ctm->data = 0xdeadf00d;
@@ -197,9 +222,16 @@ static void set_trace (uaecptr addr, int accessmode, int size)
                cputrace.writecounter++;
        else
                cputrace.readcounter++;
+       debug_trace ();
 }
 static void add_trace (uaecptr addr, uae_u32 val, int accessmode, int size)
 {
+       if (cputrace.memoryoffset < 1) {
+#if CPUTRACE_DEBUG
+               write_log (L"add_trace memoryoffset=%d!\n", cputrace.memoryoffset);
+#endif
+               return;
+       }
        int mode = accessmode | (size << 4);
        struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset - 1];
        ctm->addr = addr;
@@ -211,6 +243,7 @@ static void add_trace (uaecptr addr, uae_u32 val, int accessmode, int size)
                else
                        cputrace.readcounter++;
        }
+       debug_trace ();
        cputrace.cyclecounter_pre = cputrace.cyclecounter_post = 0;
 }
 
@@ -588,6 +621,12 @@ static void cputracefunc2_x_do_cycles_pre (unsigned long cycles)
 
 static void cputracefunc_x_do_cycles_post (unsigned long cycles, uae_u32 v)
 {
+       if (cputrace.memoryoffset < 1) {
+#if CPUTRACE_DEBUG
+               write_log (L"cputracefunc_x_do_cycles_post memoryoffset=%d!\n", cputrace.memoryoffset);
+#endif
+               return;
+       }
        struct cputracememory *ctm = &cputrace.ctm[cputrace.memoryoffset - 1];
        ctm->data = v;
        cputrace.cyclecounter_post = cycles;
@@ -1790,6 +1829,62 @@ uae_u32 REGPARAM2 x_get_disp_ea_020 (uae_u32 base, uae_u32 dp)
        return v;
 }
 
+uae_u32 REGPARAM2 x_get_disp_ea_ce020 (uae_u32 base, uae_u32 dp)
+{
+       int reg = (dp >> 12) & 15;
+       int cycles = 0;
+       uae_u32 v;
+
+       uae_s32 regd = regs.regs[reg];
+       if ((dp & 0x800) == 0)
+               regd = (uae_s32)(uae_s16)regd;
+       regd <<= (dp >> 9) & 3;
+       if (dp & 0x100) {
+               uae_s32 outer = 0;
+               if (dp & 0x80)
+                       base = 0;
+               if (dp & 0x40)
+                       regd = 0;
+
+               if ((dp & 0x30) == 0x20) {
+                       base += (uae_s32)(uae_s16) next_iword_020ce ();
+                       cycles++;
+               }
+               if ((dp & 0x30) == 0x30) {
+                       base += x_next_ilong ();
+                       cycles++;
+               }
+
+               if ((dp & 0x3) == 0x2) {
+                       outer = (uae_s32)(uae_s16) next_iword_020ce ();
+                       cycles++;
+               }
+               if ((dp & 0x3) == 0x3) {
+                       outer = next_ilong_020ce ();
+                       cycles++;
+               }
+
+               if ((dp & 0x4) == 0) {
+                       base += regd;
+                       cycles++;
+               }
+               if (dp & 0x3) {
+                       base = x_get_long (base);
+                       cycles++;
+               }
+               if (dp & 0x4) {
+                       base += regd;
+                       cycles++;
+               }
+               v = base + outer;
+       } else {
+               v = base + (uae_s32)((uae_s8)dp) + regd;
+       }
+       if (cycles && currprefs.cpu_cycle_exact)
+               x_do_cycles (cycles * cpucycleunit);
+       return v;
+}
+
 STATIC_INLINE int in_rom (uaecptr pc)
 {
        return (munge24 (pc) & 0xFFF80000) == 0xF80000;
@@ -3942,9 +4037,13 @@ static void m68k_run_2ce (void)
 
        for (;;) {
                r->instruction_pc = m68k_getpc ();
-               uae_u16 opcode = x_prefetch (0);
+               uae_u16 opcode = get_word_ce020_prefetch (0);
 
                if (cpu_tracer) {
+
+#if CPUTRACE_DEBUG
+                       validate_trace ();
+#endif
                        memcpy (&cputrace.regs, &r->regs, 16 * sizeof (uae_u32));
                        cputrace.opcode = opcode;
                        cputrace.ir = r->ir;
@@ -4840,7 +4939,7 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr)
        else
                dstbak = dst = xmalloc (uae_u8, 1000);
 
-       save_u32 (2);
+       save_u32 (2 | 4);
        save_u16 (cputrace.opcode);
        for (int i = 0; i < 16; i++)
                save_u32 (cputrace.regs[i]);
@@ -4870,6 +4969,20 @@ uae_u8 *save_cpu_trace (int *len, uae_u8 *dstptr)
                write_log (_T("CPUT%d: %08x %08x %08x\n"), i, cputrace.ctm[i].addr, cputrace.ctm[i].data, cputrace.ctm[i].mode);
        }
        save_u32 (cputrace.startcycles);
+
+       if (currprefs.cpu_model == 68020) {
+               for (int i = 0; i < CACHELINES020; i++) {
+                       save_u32 (cputrace.caches020[i].data);
+                       save_u32 (cputrace.caches020[i].tag);
+                       save_u8 (cputrace.caches020[i].valid ? 1 : 0);
+               }
+               save_u32 (cputrace.prefetch020addr);
+               save_u32 (cputrace.cacheholdingaddr020);
+               save_u32 (cputrace.cacheholdingdata020);
+               for (int i = 0; i < CPU_PIPELINE_MAX; i++)
+                       save_u16 (cputrace.prefetch020[i]);
+       }
+
        *len = dst - dstbak;
        cputrace.needendcycles = 1;
        return dstbak;
@@ -4880,7 +4993,7 @@ uae_u8 *restore_cpu_trace (uae_u8 *src)
        cpu_tracer = 0;
        cputrace.state = 0;
        uae_u32 v = restore_u32 ();
-       if (v != 0 && v != 2)
+       if (!(v & 2))
                return src;
        cputrace.opcode = restore_u16 ();
        for (int i = 0; i < 16; i++)
@@ -4906,9 +5019,31 @@ uae_u8 *restore_cpu_trace (uae_u8 *src)
                cputrace.ctm[i].mode = restore_u32 ();
        }
        cputrace.startcycles = restore_u32 ();
+
+       if (v & 4) {
+               if (currprefs.cpu_model == 68020) {
+                       for (int i = 0; i < CACHELINES020; i++) {
+                               cputrace.caches020[i].data = restore_u32 ();
+                               cputrace.caches020[i].tag = restore_u32 ();
+                               cputrace.caches020[i].valid = restore_u8 () != 0;
+                       }
+                       cputrace.prefetch020addr = restore_u32 ();
+                       cputrace.cacheholdingaddr020 = restore_u32 ();
+                       cputrace.cacheholdingdata020 = restore_u32 ();
+                       for (int i = 0; i < CPU_PIPELINE_MAX; i++)
+                               cputrace.prefetch020[i] = restore_u16 ();
+               }
+       }
+
        cputrace.needendcycles = 1;
-       if (v && cputrace.state)
-               cpu_tracer = -1;
+       if (v && cputrace.state) {
+               if (currprefs.cpu_model > 68000) {
+                       if (v & 4)
+                               cpu_tracer = -1;
+               } else {
+                       cpu_tracer = -1;
+               }
+       }
 
        return src;
 }
@@ -5387,7 +5522,7 @@ static void fill_icache020 (uae_u32 addr)
                return;
        }
        // cache miss
-       data = mem_access_delay_longi_read_ce020 (addr);
+       data = x_get_long (addr);
        if (!(regs.cacr & 2)) {
                c->tag = tag;
                c->valid = !!(regs.cacr & 1);

diff --git a/od-win32/win32.h b/od-win32/win32.h
index 4eee38311b9e6fbf480b07186bb7d04dacf14f59..661edc927136725785ba164f6012d12c85405a7e 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -19,8 +19,8 @@
 #define LANG_DLL 1
 
 //#define WINUAEBETA _T("")
-#define WINUAEBETA _T("Beta 3")
-#define WINUAEDATE MAKEBD(2012, 4, 3)
+#define WINUAEBETA _T("Beta 4")
+#define WINUAEDATE MAKEBD(2012, 4, 4)
 #define WINUAEEXTRA _T("")
 //#define WINUAEEXTRA _T("AmiKit Preview")
 #define WINUAEREV _T("")

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index ff0e83a96b174d07f8a75c06e442ddb5611386f9..8c5a3895c06192b98222586cefde2cc16ac53bea 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -4,6 +4,17 @@
 - restore only single input target to default.
 - hdd from command line
 
+- 68020 CE mode statefile CPUTRACE (CPU state can be saved even in mid instruction) support was not complete,
+  should fix "CPU trace: blah" errors when restoring statefiles. It can't fix already created broken statefiles.
+- Fix built-in CDFS lowercase conversion. Only convert to lower case if plain ISO-9660 (without RockRidge or Joliet)
+  also convert from second character to match CacheCDFS default behavior. Fixes AmigaOS 3.5/3.9 CD file names.
+- Automatic scale/center/resize didn't like screen mode that has horizontal start as early as possible (SuperPlus + ECS)
+- Automatic resize kept resizing forever in interlaced modes. (2.4)
+- Do not emulate ECS Agnus internal 1M address space if JIT enabled and 0.5M Chip RAM because JIT ignores memory
+  bank masks causing OS to misdetect full 1M Chip.
+
+Beta 3:
+
 - On screen led status line was drawn using both D3D sprite and directly to bitmap methods in D3D no-filter mode (b2).
 - Removed PAL/NTSC vertical scaling hack which is not needed anymore.
 - PAL/NTSC vertical scaling added to Fullscreen (TV)/(Max) filter modes.