map_banks(&cpuboardmem2_bank, cpuboardmem2_bank.start >> 16, (0x10000000 - cpuboardmem2_bank.start) >> 16, cpuboardmem2_bank.allocated_size);
}
}
- if (is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs)) {
+
+ if (is_mtec_ematrix530(&currprefs) || is_sx32pro(&currprefs) || is_apollo(&currprefs)) {
if (cpuboardmem1_bank.allocated_size) {
map_banks(&cpuboardmem1_bank, cpuboardmem1_bank.start >> 16, cpuboardmem1_bank.allocated_size >> 16, 0);
}
+ if (cpuboardmem2_bank.allocated_size) {
+ map_banks(&cpuboardmem2_bank, cpuboardmem2_bank.start >> 16, cpuboardmem2_bank.allocated_size >> 16, 0);
+ }
}
}
mapped_free(&cpuboardmem1_bank);
mapped_free(&cpuboardmem2_bank);
+ cpuboardmem1_bank.jit_read_flag = 0;
+ cpuboardmem1_bank.jit_write_flag = 0;
+ cpuboardmem2_bank.jit_read_flag = 0;
+ cpuboardmem2_bank.jit_write_flag = 0;
+}
+
+static void memory_mirror_bank(addrbank *bank, uaecptr end_addr)
+{
+ uaecptr addr = bank->start;
+ while (addr + bank->allocated_size < end_addr) {
+ map_banks(bank, (addr + bank->allocated_size) >> 16, bank->allocated_size >> 16, 0);
+ addr += bank->allocated_size;
+ }
+}
+
+static void cpuboard_custom_memory(uaecptr addr, int max, bool swap, bool alias)
+{
+ int size1 = swap ? currprefs.cpuboardmem2_size : currprefs.cpuboardmem1_size;
+ int size2 = swap ? currprefs.cpuboardmem1_size : currprefs.cpuboardmem2_size;
+ int size_low = size1;
+ max *= 1024 * 1024;
+ if (size_low > max)
+ size_low = max;
+ int size_high;
+ if (size2 == 0 && size1 > max) {
+ size_high = size1 - max;
+ } else {
+ size_high = size2;
+ }
+ if (!size_low && !size_high)
+ return;
+ cpuboardmem1_bank.start = addr - size_low;
+ cpuboardmem1_bank.reserved_size = size_low + size_high;
+ cpuboardmem1_bank.mask = cpuboardmem1_bank.reserved_size - 1;
+ mapped_malloc(&cpuboardmem1_bank);
}
+
static void cpuboard_init_2(void)
{
if (!currprefs.cpuboard_type)
blizzardf0_bank.mask = blizzardf0_bank.reserved_size - 1;
mapped_malloc(&blizzardf0_bank);
+ cpuboard_custom_memory(0x03000000, 32, false, true);
+
+
} else if (is_fusionforty(&currprefs)) {
blizzardf0_bank.start = 0x00f40000;
cpuboard_init_2();
}
-
void cpuboard_overlay_override(void)
{
if (is_a2630(&currprefs)) {
// prod 0x33 = IDE only
const uae_u8 apollo_autoconfig[16] = { 0xd1, 0x22, 0x00, 0x00, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, APOLLO_ROM_OFFSET >> 8, APOLLO_ROM_OFFSET & 0xff };
-const uae_u8 apollo_autoconfig_cpuboard[16] = { 0xd2, 0x23, 0x00, 0x00, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, APOLLO_ROM_OFFSET >> 8, APOLLO_ROM_OFFSET & 0xff };
-const uae_u8 apollo_autoconfig_cpuboard_060[16] = { 0xd2, 0x23, 0x00, 0x00, 0x22, 0x22, 0x00, 0x00, 0x00, 0x02, APOLLO_ROM_OFFSET >> 8, APOLLO_ROM_OFFSET & 0xff };
+const uae_u8 apollo_autoconfig_cpuboard[16] = { 0xd2, 0x23, 0x40, 0x00, 0x22, 0x22, 0x00, 0x00, 0x00, 0x00, APOLLO_ROM_OFFSET >> 8, APOLLO_ROM_OFFSET & 0xff };
+const uae_u8 apollo_autoconfig_cpuboard_060[16] = { 0xd2, 0x23, 0x40, 0x00, 0x22, 0x22, 0x00, 0x00, 0x00, 0x02, APOLLO_ROM_OFFSET >> 8, APOLLO_ROM_OFFSET & 0xff };
static bool apollo_init(struct autoconfig_info *aci, bool cpuboard)
{
return false;
if (cpuboard) {
- ide->userdata = currprefs.cpuboard_settings & 3;
+ // bit 0: scsi enable
+ // bit 1: memory disable
+ ide->userdata = currprefs.cpuboard_settings & 1;
} else {
ide->userdata = aci->rc->autoboot_disabled ? 2 : 0;
}
ide->keepautoconfig = false;
for (int i = 0; i < 16; i++) {
uae_u8 b = autoconfig[i];
+ if (cpuboard && i == 9 && (currprefs.cpuboard_settings & 2))
+ b |= 1; // memory disable (serial bit 0)
ew(ide, i * 4, b);
}
if (cpuboard) {