IPL low/high delay is optional and off by default.

diff --git a/cfgfile.cpp b/cfgfile.cpp
index 3651713f56a86f9ebb056a1e4a5987c422392a57..24d9769fc8675e84718b9fb5830ec7c843780250 100644 (file)
--- a/cfgfile.cpp
+++ b/cfgfile.cpp
@@ -2716,7 +2716,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
        cfgfile_write_strarr(f, _T("chipset_compatible"), cscompa, p->cs_compatible);
        cfgfile_dwrite_strarr(f, _T("ciaatod"), ciaatodmode, p->cs_ciaatod);
        cfgfile_dwrite_strarr(f, _T("rtc"), rtctype, p->cs_rtc);
-       cfgfile_dwrite (f, _T("chipset_rtc_adjust"), _T("%d"), p->cs_rtc_adjust);
+       cfgfile_dwrite(f, _T("chipset_rtc_adjust"), _T("%d"), p->cs_rtc_adjust);
        cfgfile_dwrite_bool(f, _T("cia_overlay"), p->cs_ciaoverlay);    
        cfgfile_dwrite_bool(f, _T("ksmirror_e0"), p->cs_ksmirror_e0);
        cfgfile_dwrite_bool(f, _T("ksmirror_a8"), p->cs_ksmirror_a8);
@@ -2747,6 +2747,7 @@ void cfgfile_save_options (struct zfile *f, struct uae_prefs *p, int type)
        cfgfile_dwrite_strarr(f, _T("ciab_type"), ciatype, p->cs_ciatype[1]);
        cfgfile_dwrite_strarr(f, _T("unmapped_address_space"), unmapped, p->cs_unmapped_space);
        cfgfile_dwrite_bool(f, _T("memory_pattern"), p->cs_memorypatternfill);
+       cfgfile_dwrite_bool(f, _T("ipl_delay"), p->cs_ipldelay);
        cfgfile_dwrite(f, _T("keyboard_handshake"), _T("%d"), currprefs.cs_kbhandshake);
        cfgfile_dwrite(f, _T("chipset_hacks"), _T("0x%x"), p->cs_hacks);
        cfgfile_dwrite(f, _T("eclockphase"), _T("%d"), p->cs_eclockphase);
@@ -5973,26 +5974,27 @@ static int cfgfile_parse_hardware (struct uae_prefs *p, const TCHAR *option, TCH
                || cfgfile_intval(option, value, _T("chipset_rtc_adjust"), &p->cs_rtc_adjust, 1))
                return 1;
 
-       if (cfgfile_strval (option, value, _T("comp_trustbyte"), &p->comptrustbyte, compmode, 0)
-               || cfgfile_strval (option, value, _T("rtc"), &p->cs_rtc, rtctype, 0)
-               || cfgfile_strval (option, value, _T("ciaatod"), &p->cs_ciaatod, ciaatodmode, 0)
-               || cfgfile_strval (option, value, _T("scsi"), &p->scsi, scsimode, 0)
-               || cfgfile_strval (option, value, _T("comp_trustword"), &p->comptrustword, compmode, 0)
-               || cfgfile_strval (option, value, _T("comp_trustlong"), &p->comptrustlong, compmode, 0)
-               || cfgfile_strval (option, value, _T("comp_trustnaddr"), &p->comptrustnaddr, compmode, 0)
-               || cfgfile_strval (option, value, _T("collision_level"), &p->collision_level, collmode, 0)
-               || cfgfile_strval (option, value, _T("parallel_matrix_emulation"), &p->parallel_matrix_emulation, epsonprinter, 0)
+       if (cfgfile_strval(option, value, _T("comp_trustbyte"), &p->comptrustbyte, compmode, 0)
+               || cfgfile_strval(option, value, _T("rtc"), &p->cs_rtc, rtctype, 0)
+               || cfgfile_strval(option, value, _T("ciaatod"), &p->cs_ciaatod, ciaatodmode, 0)
+               || cfgfile_strval(option, value, _T("scsi"), &p->scsi, scsimode, 0)
+               || cfgfile_strval(option, value, _T("comp_trustword"), &p->comptrustword, compmode, 0)
+               || cfgfile_strval(option, value, _T("comp_trustlong"), &p->comptrustlong, compmode, 0)
+               || cfgfile_strval(option, value, _T("comp_trustnaddr"), &p->comptrustnaddr, compmode, 0)
+               || cfgfile_strval(option, value, _T("collision_level"), &p->collision_level, collmode, 0)
+               || cfgfile_strval(option, value, _T("parallel_matrix_emulation"), &p->parallel_matrix_emulation, epsonprinter, 0)
                || cfgfile_strval(option, value, _T("monitoremu"), &p->monitoremu, specialmonitorconfignames, 0)
                || cfgfile_strval(option, value, _T("genlockmode"), &p->genlock_image, genlockmodes, 0)
-               || cfgfile_strval (option, value, _T("waiting_blits"), &p->waiting_blits, waitblits, 0)
-               || cfgfile_strval (option, value, _T("floppy_auto_extended_adf"), &p->floppy_auto_ext2, autoext2, 0)
-               || cfgfile_strval (option, value,  _T("z3mapping"), &p->z3_mapping_mode, z3mapping, 0)
-               || cfgfile_strval (option, value,  _T("scsidev_mode"), &p->uaescsidevmode, uaescsidevmodes, 0)
+               || cfgfile_strval(option, value, _T("waiting_blits"), &p->waiting_blits, waitblits, 0)
+               || cfgfile_strval(option, value, _T("floppy_auto_extended_adf"), &p->floppy_auto_ext2, autoext2, 0)
+               || cfgfile_strval(option, value,  _T("z3mapping"), &p->z3_mapping_mode, z3mapping, 0)
+               || cfgfile_strval(option, value,  _T("scsidev_mode"), &p->uaescsidevmode, uaescsidevmodes, 0)
                || cfgfile_strval(option, value, _T("boot_rom_uae"), &p->boot_rom, uaebootrom, 0)
-               || cfgfile_strval (option, value,  _T("serial_translate"), &p->serial_crlf, serialcrlf, 0)
+               || cfgfile_strval(option, value,  _T("serial_translate"), &p->serial_crlf, serialcrlf, 0)
                || cfgfile_strval(option, value, _T("hvcsync"), &p->cs_hvcsync, hvcsync, 0)
                || cfgfile_strval(option, value, _T("unmapped_address_space"), &p->cs_unmapped_space, unmapped, 0)
                || cfgfile_yesno(option, value, _T("memory_pattern"), &p->cs_memorypatternfill)
+               || cfgfile_yesno(option, value, _T("ipl_delay"), &p->cs_ipldelay)
                || cfgfile_strval(option, value, _T("ciaa_type"), &p->cs_ciatype[0], ciatype, 0)
                || cfgfile_strval(option, value, _T("ciab_type"), &p->cs_ciatype[1], ciatype, 0)
                || cfgfile_strboolval(option, value, _T("comp_flushmode"), &p->comp_hardflush, flushmode, 0)
@@ -8495,6 +8497,7 @@ void default_prefs (struct uae_prefs *p, bool reset, int type)
        p->cs_ciatype[0] = 0;
        p->cs_ciatype[1] = 0;
        p->cs_memorypatternfill = true;
+       p->cs_ipldelay = false;
 
        for (int i = 0; i < MAX_FILTERDATA; i++) {
                struct gfx_filterdata *f = &p->gf[i];

diff --git a/include/options.h b/include/options.h
index 8dc93b8e4a13f8f6d3fba9cd9420c2fc6e656d53..5c13517bb2b6e1ce31a70f0b659c0b4519594571 100644 (file)
--- a/include/options.h
+++ b/include/options.h
@@ -728,6 +728,7 @@ struct uae_prefs {
        int cs_agnussize;
        int cs_denisemodel;
        bool cs_memorypatternfill;
+       bool cs_ipldelay;
 
        struct boardromconfig expansionboard[MAX_EXPANSION_BOARDS];
 

diff --git a/newcpu.cpp b/newcpu.cpp
index 0c098181eafbecced2a5bac32731e3ac2e598116..0a26cedf0be4a352db007a6455a34fef20dd23c6 100644 (file)
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -4497,10 +4497,12 @@ void ipl_fetch_next(void)
 {
        evt_t c = get_cycles();
 
-       if (c - regs.ipl_pin_change_evt >= cpuipldelay4) {
+       evt_t cd = c - regs.ipl_pin_change_evt;
+       evt_t cdp = c - regs.ipl_pin_change_evt_p;
+       if (cd >= cpuipldelay4) {
                regs.ipl[0] = regs.ipl_pin;
                regs.ipl[1] = 0;
-       } else if (c - regs.ipl_pin_change_evt_p >= cpuipldelay2) {
+       } else if (cdp >= cpuipldelay2) {
                regs.ipl[0] = regs.ipl_pin_p;
                regs.ipl[1] = 0;
        } else {
@@ -4561,7 +4563,7 @@ void doint(void)
                // Paula does low to high IPL changes about 1.5 CPU clocks later than high to low.
                // -> CPU detects IPL change 1 CCK later if any IPL pin has high to low transition.
                // (In real world IPL is active low and delay is added if 0 to 1 transition)
-               if (m68k_accurate_ipl && regs.ipl_pin >= 0 && ipl >= 0 && (
+               if (currprefs.cs_ipldelay && m68k_accurate_ipl && regs.ipl_pin >= 0 && ipl >= 0 && (
                        ((regs.ipl_pin & 1) && !(ipl & 1)) ||
                        ((regs.ipl_pin & 2) && !(ipl & 2)) ||
                        ((regs.ipl_pin & 4) && !(ipl & 4))