2700b6

diff --git a/custom.cpp b/custom.cpp
index 2a7d340267194ef12f9cf34fc613fefe2087090b..775a67a8ff71342c441cee2826cd8207f2a80ce3 100644 (file)
--- a/custom.cpp
+++ b/custom.cpp
@@ -3225,6 +3225,10 @@ void compute_framesync (void)
        );
 
        set_config_changed ();
+
+       if (target_graphics_buffer_update ()) {
+               reset_drawing ();
+       }
 }
 
 /* set PAL/NTSC or custom timing variables */
@@ -6177,9 +6181,6 @@ static void vsync_handler_post (void)
        } else if (interlace_changed || changed_chipset_refresh () || lof_changed) {
                compute_framesync ();
        }
-       if (target_graphics_buffer_update ()) {
-               reset_drawing ();
-       }
 
        lof_changed = 0;
        bplcon0_interlace_seen = false;

diff --git a/drawing.cpp b/drawing.cpp
index 04f80ff03ff203a088cc811e4ee28c097319f8d2..00f2cb0c9ae14b005dc41576437e1a840cd03a20 100644 (file)
--- a/drawing.cpp
+++ b/drawing.cpp
@@ -2801,8 +2801,14 @@ static void lightpen_update (struct vidbuffer *vb)
                lightpen_active = 0;
 }
 
+static int lasti, lastwhere2, lastline;
+struct vidbuffer *xvbin, *xvbout;
+
 static void draw_frame2 (struct vidbuffer *vbin, struct vidbuffer *vbout)
 {
+       xvbin = vbin;
+       xvbout = vbout;
+
        for (int i = 0; i < max_ypos_thisframe; i++) {
                int i1 = i + min_ypos_for_screen;
                int line = i + thisframe_y_adjust_real;
@@ -2813,6 +2819,11 @@ static void draw_frame2 (struct vidbuffer *vbin, struct vidbuffer *vbout)
                        break;
                if (where2 < 0)
                        continue;
+
+               lasti = i;
+               lastline = line;
+               lastwhere2 = where2;
+
                hposblank = 0;
                pfield_draw_line (vbout, line, where2, amiga2aspect_line_map[i1 + 1]);
        }

diff --git a/events.cpp b/events.cpp
index b8cb6b514125a124f2a418d98791f2a427d752d7..5637349b998a8ec6a452d6389b31f35321eeec5c 100644 (file)
--- a/events.cpp
+++ b/events.cpp
@@ -39,6 +39,8 @@ void events_schedule (void)
        nextevent = currcycle + mintime;
 }
 
+static int iwas1 = 123, iwas2 = 123, ihandled = 123;
+
 void do_cycles_slow (unsigned long cycles_to_add)
 {
        if ((pissoff -= cycles_to_add) >= 0)
@@ -80,8 +82,12 @@ void do_cycles_slow (unsigned long cycles_to_add)
                currcycle = nextevent;
 
                for (i = 0; i < ev_max; i++) {
+                       iwas1 = i;
                        if (eventtab[i].active && eventtab[i].evtime == currcycle) {
+                               iwas2 = i;
+                               ihandled = -1;
                                (*eventtab[i].handler)();
+                               ihandled = 1;
                        }
                }
                events_schedule ();

diff --git a/gfxboard.cpp b/gfxboard.cpp
index ed5afeca86eb7af3d956ca8d393241a23aa52317..633a6ac81576f0a943db73f25c66da51ff55ed43 100644 (file)
--- a/gfxboard.cpp
+++ b/gfxboard.cpp
@@ -10,11 +10,15 @@
 #define VRAMLOG 0
 #define MEMLOGR 0
 #define MEMLOGW 0
+#define MEMLOGINDIRECT 0
 #define MEMDEBUG 0
 #define MEMDEBUGMASK 0x7fffff
 #define MEMDEBUGTEST 0x280000
 #define PICASSOIV_DEBUG_IO 0
 
+static bool memlogr = false;
+static bool memlogw = false;
+
 #define BYTESWAP_WORD -1
 #define BYTESWAP_LONG 1
 
@@ -71,6 +75,7 @@
 #define BOARD_MODEL_MEMORY_SPECTRUM 1
 #define BOARD_MODEL_REGISTERS_SPECTRUM 2
 
+extern addrbank gfxboard_bank_memory, gfxboard_bank_memory_nojit;
 extern addrbank gfxboard_bank_special;
 extern addrbank gfxboard_bank_wbsmemory;
 extern addrbank gfxboard_bank_lbsmemory;
@@ -159,9 +164,9 @@ static TCHAR regbankname[40];
 
 static int configured_mem, configured_regs;
 static struct gfxboard *board;
-static uae_u32 memory_mask;
 static uae_u8 expamem_lo;
 static uae_u8 *automemory;
+static uae_u32 banksize_mask;
 
 static uae_u8 picassoiv_bank, picassoiv_flifi;
 static uae_u8 p4autoconfig[256];
@@ -172,7 +177,8 @@ static uae_u32 p4_special_mask;
 static uae_u32 p4_vram_bank[2];
 
 static CirrusVGAState vga;
-static uae_u8 *vram;
+static uae_u8 *vram, *vramrealstart;
+static int vram_start_offset;
 static uae_u32 gfxboardmem_start;
 static bool monswitch;
 static bool oldswitch;
@@ -194,13 +200,20 @@ static MemoryRegion vgaioregion, vgavramregion;
 
 static void init_board (void)
 {
-       int vramsize = currprefs.rtgmem_size;
+       int vramsize = board->vrammax;
+
+       vram_start_offset = 0;
+       if (ISP4() && !p4z2) // JIT direct compatibility hack
+               vram_start_offset = 0x01000000;
+       vramsize += vram_start_offset;
        xfree (fakesurface_surface);
        fakesurface_surface = xmalloc (uae_u8, 4 * 10000);
        vram_offset[0] = vram_offset[1] = 0;
        vram_enabled = true;
        vram_offset_enabled = false;
        vram = mapped_malloc (vramsize, board->z3 ? _T("z3_gfx") : _T("z2_gfx"));
+       vramrealstart = vram;
+       vram += vram_start_offset;
        gfxmem_bank.baseaddr = vram;
        vga.vga.vram_size_mb = currprefs.rtgmem_size >> 20;
        vgaioregion.opaque = &vgaioregionptr;
@@ -354,7 +367,7 @@ void gfxboard_vsync_handler (void)
        }
 
        if (monswitch) {
-               picasso_getwritewatch ();
+               picasso_getwritewatch (vram_start_offset);
                if (fullrefresh)
                        vga.vga.graphic_mode = -1;
                vga.vga.hw_ops->gfx_update(&vga);
@@ -413,17 +426,25 @@ void memory_region_init_alias(MemoryRegion *mr,
                mr->opaque = &vgabank1regionptr;
        }
 }
-static void remap_vram (hwaddr offset0, hwaddr offset1, bool enabled)
+
+static void jit_reset (void)
 {
 #ifdef JIT
-       if (currprefs.cachesize && (!currprefs.comptrustbyte || !currprefs.comptrustword || !currprefs.comptrustlong))
+       if (currprefs.cachesize && (!currprefs.comptrustbyte || !currprefs.comptrustword || !currprefs.comptrustlong)) {
                flush_icache (0, 3);
+       }
 #endif
+}
+
+static void remap_vram (hwaddr offset0, hwaddr offset1, bool enabled)
+{
+       jit_reset ();
        vram_offset[0] = offset0;
        vram_offset[1] = offset1;
 #if VRAMLOG
        if (vram_enabled != enabled)
                write_log (_T("VRAM state=%d\n"), enabled);
+       bool was_vram_offset_enabled = vram_offset_enabled;
 #endif
        vram_enabled = enabled && (vga.vga.sr[0x07] & 0x01);
 #if 0
@@ -432,7 +453,7 @@ static void remap_vram (hwaddr offset0, hwaddr offset1, bool enabled)
        // offset==0 and offset1==0x8000: linear vram mapping
        vram_offset_enabled = offset0 != 0 || offset1 != 0x8000;
 #if VRAMLOG
-       if (vram_offset_enabled)
+       if (vram_offset_enabled || was_vram_offset_enabled)
                write_log (_T("VRAM offset %08x and %08x\n"), offset0, offset1);
 #endif
 }
@@ -495,8 +516,13 @@ void qemu_register_reset(QEMUResetHandler *func, void *opaque)
 
 static void p4_pci_check (void)
 {
-       p4_vram_bank[0] = p4_pci[0x10 + 2] << 16;
-       p4_vram_bank[1] = p4_pci[0x14 + 2] << 16;
+       uaecptr b0, b1;
+
+       b0 = p4_pci[0x10 + 2] << 16;
+       b1 = p4_pci[0x14 + 2] << 16;
+
+       p4_vram_bank[0] = b0;
+       p4_vram_bank[1] = b1;
 #if PICASSOIV_DEBUG_IO
        write_log (_T("%08X %08X\n"), p4_vram_bank[0], p4_vram_bank[1]);
 #endif
@@ -633,7 +659,7 @@ static uaecptr fixaddr_bs (uaecptr addr, int mask, int *bs)
                }
        }
 #ifdef JIT
-       if (vram_offset || !vram_enabled || swapped)
+       if (mask && (vram_offset_enabled || !vram_enabled || swapped || p4z2))
                special_mem |= mask;
 #endif
        if (vram_offset_enabled) {
@@ -643,14 +669,14 @@ static uaecptr fixaddr_bs (uaecptr addr, int mask, int *bs)
                        addr += vram_offset[0];
                }
        }
-       addr &= memory_mask;
+       addr &= gfxmem_bank.mask;
        return addr;
 }
 
-static uaecptr fixaddr (uaecptr addr, int mask)
+STATIC_INLINE uaecptr fixaddr (uaecptr addr, int mask)
 {
 #ifdef JIT
-       if (vram_offset || !vram_enabled)
+       if (mask && (vram_offset_enabled || !vram_enabled))
                special_mem |= mask;
 #endif
        if (vram_offset_enabled) {
@@ -660,14 +686,27 @@ static uaecptr fixaddr (uaecptr addr, int mask)
                        addr += vram_offset[0];
                }
        }
-       addr &= memory_mask;
+       addr &= gfxmem_bank.mask;
+       return addr;
+}
+
+STATIC_INLINE uaecptr fixaddr (uaecptr addr)
+{
+       if (vram_offset_enabled) {
+               if (addr & 0x8000) {
+                       addr += vram_offset[1] & ~0x8000;
+               } else {
+                       addr += vram_offset[0];
+               }
+       }
+       addr &= gfxmem_bank.mask;
        return addr;
 }
 
 STATIC_INLINE const MemoryRegionOps *getvgabank (uaecptr *paddr)
 {
        uaecptr addr = *paddr;
-       addr &= memory_mask;
+       addr &= gfxmem_bank.mask;
        *paddr = addr;
        return vgaram;
 }
@@ -677,7 +716,7 @@ static uae_u32 gfxboard_lget_vram (uaecptr addr, int bs)
        uae_u32 v;
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
-               addr &= memory_mask;
+               addr &= gfxmem_bank.mask;
                if (bs < 0) { // WORD
                        v  = bank->read (&vga, addr + 1, 1) << 24;
                        v |= bank->read (&vga, addr + 0, 1) << 16;
@@ -697,7 +736,7 @@ static uae_u32 gfxboard_lget_vram (uaecptr addr, int bs)
        } else {
                uae_u8 *m = vram + addr;
                if (bs < 0) {
-                       v  = (*((uae_u16*)m)) << 16;
+                       v  = (*((uae_u16*)(m + 0))) << 16;
                        v |= (*((uae_u16*)(m + 2))) << 0;
                } else if (bs > 0) {
                        v = *((uae_u32*)m);
@@ -706,11 +745,15 @@ static uae_u32 gfxboard_lget_vram (uaecptr addr, int bs)
                }
        }
 #if MEMLOGR
-       write_log (_T("R %08X L %08X\n"), addr, v);
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogr)
+       write_log (_T("R %08X L %08X BS=%d EN=%d\n"), addr, v, bs, vram_enabled);
 #endif
        return v;
 }
-static uae_u32 gfxboard_wget_vram (uaecptr addr, int bs)
+static uae_u16 gfxboard_wget_vram (uaecptr addr, int bs)
 {
        uae_u32 v;
        if (!vram_enabled) {
@@ -730,11 +773,15 @@ static uae_u32 gfxboard_wget_vram (uaecptr addr, int bs)
                        v = do_get_mem_word ((uae_u16*)m);
        }
 #if MEMLOGR
-       write_log (_T("R %08X W %08X\n"), addr, v & 0xffff);
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogr)
+       write_log (_T("R %08X W %08X BS=%d EN=%d\n"), addr, v, bs, vram_enabled);
 #endif
        return v;
 }
-static uae_u32 gfxboard_bget_vram (uaecptr addr)
+static uae_u8 gfxboard_bget_vram (uaecptr addr)
 {
        uae_u32 v;
        if (!vram_enabled) {
@@ -744,7 +791,11 @@ static uae_u32 gfxboard_bget_vram (uaecptr addr)
                v = vram[addr];
        }
 #if MEMLOGR
-       write_log (_T("R %08X B %02X\n"), addr, v);
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogr)
+       write_log (_T("R %08X B %08X BS=0 EN=%d\n"), addr, v, vram_enabled);
 #endif
        return v;
 }
@@ -756,31 +807,35 @@ static void gfxboard_lput_vram (uaecptr addr, uae_u32 l, int bs)
                write_log (_T("%08X L %08X\n"), addr, l);
 #endif
 #if MEMLOGW
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogw)
        write_log (_T("W %08X L %08X\n"), addr, l);
 #endif
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
                if (bs < 0) { // WORD
                        bank->write (&vga, addr + 1, l >> 24, 1);
-                       bank->write (&vga, addr + 0, l >> 16, 1);
-                       bank->write (&vga, addr + 3, l >> 8, 1);
-                       bank->write (&vga, addr + 2, l >> 0, 1);
-               } else if (bs > 0) {
+                       bank->write (&vga, addr + 0, (l >> 16) & 0xff, 1);
+                       bank->write (&vga, addr + 3, (l >> 8) & 0xff, 1);
+                       bank->write (&vga, addr + 2, (l >> 0) & 0xff, 1);
+               } else if (bs > 0) { // LONG
                        bank->write (&vga, addr + 3, l >> 24, 1);
-                       bank->write (&vga, addr + 2, l >> 16, 1);
-                       bank->write (&vga, addr + 1, l >> 8, 1);
-                       bank->write (&vga, addr + 0, l >> 0, 1);
+                       bank->write (&vga, addr + 2, (l >> 16) & 0xff, 1);
+                       bank->write (&vga, addr + 1, (l >> 8) & 0xff, 1);
+                       bank->write (&vga, addr + 0, (l >> 0) & 0xff, 1);
                } else {
                        bank->write (&vga, addr + 0, l >> 24, 1);
-                       bank->write (&vga, addr + 1, l >> 16, 1);
-                       bank->write (&vga, addr + 2, l >> 8, 1);
-                       bank->write (&vga, addr + 3, l >> 0, 1);
+                       bank->write (&vga, addr + 1, (l >> 16) & 0xff, 1);
+                       bank->write (&vga, addr + 2, (l >> 8) & 0xff, 1);
+                       bank->write (&vga, addr + 3, (l >> 0) & 0xff, 1);
                }
        } else {
                uae_u8 *m = vram + addr;
                if (bs < 0) {
-                       *((uae_u16*)m) = l >> 16;
-                       *((uae_u16*)(m + 2)) = l >> 0;
+                       *((uae_u16*)(m + 0)) = l >> 16;
+                       *((uae_u16*)(m + 2)) = l >>  0;
                } else if (bs > 0) {
                        *((uae_u32*)m) = l;
                } else {
@@ -788,23 +843,27 @@ static void gfxboard_lput_vram (uaecptr addr, uae_u32 l, int bs)
                }
        }
 }
-static void gfxboard_wput_vram (uaecptr addr, uae_u32 w, int bs)
+static void gfxboard_wput_vram (uaecptr addr, uae_u16 w, int bs)
 {
 #if MEMDEBUG
        if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && w)
                write_log (_T("%08X W %04X\n"), addr, w & 0xffff);
 #endif
 #if MEMLOGW
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogw)
        write_log (_T("W %08X W %04X\n"), addr, w & 0xffff);
 #endif
        if (!vram_enabled) {
                const MemoryRegionOps *bank = getvgabank (&addr);
                if (bs) {
-                       bank->write (&vga, addr + 0, w >> 0, 1);
+                       bank->write (&vga, addr + 0, (w >> 0) & 0xff, 1);
                        bank->write (&vga, addr + 1, w >> 8, 1);
                } else {
                        bank->write (&vga, addr + 0, w >> 8, 1);
-                       bank->write (&vga, addr + 1, w >> 0, 1);
+                       bank->write (&vga, addr + 1, (w >> 0) & 0xff, 1);
                }
        } else {
                uae_u8 *m = vram + addr;
@@ -814,13 +873,17 @@ static void gfxboard_wput_vram (uaecptr addr, uae_u32 w, int bs)
                        do_put_mem_word ((uae_u16*)m, w);
        }
 }
-static void gfxboard_bput_vram (uaecptr addr, uae_u32 b)
+static void gfxboard_bput_vram (uaecptr addr, uae_u8 b)
 {
 #if MEMDEBUG
        if ((addr & MEMDEBUGMASK) >= MEMDEBUGTEST && b)
                write_log (_T("%08X B %02X\n"), addr, b & 0xff);
 #endif
 #if MEMLOGW
+#if MEMLOGINDIRECT
+       if (!vram_enabled || vram_offset_enabled)
+#endif
+       if (memlogw)
        write_log (_T("W %08X B %02X\n"), addr, b & 0xff);
 #endif
        if (!vram_enabled) {
@@ -837,130 +900,297 @@ static void gfxboard_bput_vram (uaecptr addr, uae_u32 b)
 // LONG byteswapped VRAM
 static uae_u32 REGPARAM2 gfxboard_lget_lbsmem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return 0;
        return gfxboard_lget_vram (addr, BYTESWAP_LONG);
 }
 static uae_u32 REGPARAM2 gfxboard_wget_lbsmem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return 0;
        return gfxboard_wget_vram (addr, BYTESWAP_LONG);
 }
 static void REGPARAM2 gfxboard_lput_lbsmem (uaecptr addr, uae_u32 l)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return;
        gfxboard_lput_vram (addr, l, BYTESWAP_LONG);
 }
 static void REGPARAM2 gfxboard_wput_lbsmem (uaecptr addr, uae_u32 w)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return;
        gfxboard_wput_vram (addr, w, BYTESWAP_LONG);
 }
+
 // WORD byteswapped VRAM
 static uae_u32 REGPARAM2 gfxboard_lget_wbsmem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return 0;
        return gfxboard_lget_vram (addr, BYTESWAP_WORD);
 }
 static uae_u32 REGPARAM2 gfxboard_wget_wbsmem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_READ);
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return 0;
        return gfxboard_wget_vram (addr, BYTESWAP_WORD);
 }
 static void REGPARAM2 gfxboard_lput_wbsmem (uaecptr addr, uae_u32 l)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return;
        gfxboard_lput_vram (addr, l, BYTESWAP_WORD);
 }
 static void REGPARAM2 gfxboard_wput_wbsmem (uaecptr addr, uae_u32 w)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr (addr, S_WRITE);
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return;
        gfxboard_wput_vram (addr, w, BYTESWAP_WORD);
 }
+
 // normal or byteswapped (banked) vram
 static uae_u32 REGPARAM2 gfxboard_lget_nbsmem (uaecptr addr)
 {
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
        int bs = 0;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr_bs (addr, S_READ, &bs);
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr_bs (addr, 0, &bs);
+       if (addr == -1)
+               return 0;
+//     activate_debugger();
        return gfxboard_lget_vram (addr, bs);
 }
 static uae_u32 REGPARAM2 gfxboard_wget_nbsmem (uaecptr addr)
 {
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
        int bs = 0;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr_bs (addr, S_READ, &bs);
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr_bs (addr, 0, &bs);
+       if (addr == -1)
+               return 0;
        return gfxboard_wget_vram (addr, bs);
 }
 static void REGPARAM2 gfxboard_lput_nbsmem (uaecptr addr, uae_u32 l)
 {
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
        int bs = 0;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr_bs (addr, S_WRITE, &bs);
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr_bs (addr, 0, &bs);
+       if (addr == -1)
+               return;
        gfxboard_lput_vram (addr, l, bs);
 }
 static void REGPARAM2 gfxboard_wput_nbsmem (uaecptr addr, uae_u32 w)
 {
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
        int bs = 0;
-       addr -= gfxboardmem_start & memory_mask;
-       addr = fixaddr_bs (addr, S_WRITE, &bs);
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr_bs (addr, 0, &bs);
+       if (addr == -1)
+               return;
        gfxboard_wput_vram (addr, w, bs);
 }
+
+static uae_u32 REGPARAM2 gfxboard_bget_bsmem (uaecptr addr)
+{
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return 0;
+       return gfxboard_bget_vram (addr);
+}
+static void REGPARAM2 gfxboard_bput_bsmem (uaecptr addr, uae_u32 b)
+{
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr, 0);
+       if (addr == -1)
+               return;
+       gfxboard_bput_vram (addr, b);
+}
+
 // normal vram
 static uae_u32 REGPARAM2 gfxboard_lget_mem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_READ);
+       if (addr == -1)
+               return 0;
        return gfxboard_lget_vram (addr, 0);
 }
 static uae_u32 REGPARAM2 gfxboard_wget_mem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_READ);
+       if (addr == -1)
+               return 0;
        return gfxboard_wget_vram (addr, 0);
 }
 static uae_u32 REGPARAM2 gfxboard_bget_mem (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_READ);
+       if (addr == -1)
+               return 0;
        return gfxboard_bget_vram (addr);
 }
 static void REGPARAM2 gfxboard_lput_mem (uaecptr addr, uae_u32 l)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_WRITE);
+       if (addr == -1)
+               return;
        gfxboard_lput_vram (addr, l, 0);
 }
 static void REGPARAM2 gfxboard_wput_mem (uaecptr addr, uae_u32 w)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_WRITE);
+       if (addr == -1)
+               return;
        gfxboard_wput_vram (addr, w, 0);
 }
 static void REGPARAM2 gfxboard_bput_mem (uaecptr addr, uae_u32 b)
 {
-       addr -= gfxboardmem_start & memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
        addr = fixaddr (addr, S_WRITE);
+       if (addr == -1)
+               return;
+       gfxboard_bput_vram (addr, b);
+}
+
+// normal vram, no jit direct
+static uae_u32 REGPARAM2 gfxboard_lget_mem_nojit (uaecptr addr)
+{
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return 0;
+       return gfxboard_lget_vram (addr, 0);
+}
+static uae_u32 REGPARAM2 gfxboard_wget_mem_nojit (uaecptr addr)
+{
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return 0;
+       return gfxboard_wget_vram (addr, 0);
+}
+static uae_u32 REGPARAM2 gfxboard_bget_mem_nojit (uaecptr addr)
+{
+#ifdef JIT
+       special_mem |= S_READ;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return 0;
+       return gfxboard_bget_vram (addr);
+}
+static void REGPARAM2 gfxboard_lput_mem_nojit (uaecptr addr, uae_u32 l)
+{
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return;
+       gfxboard_lput_vram (addr, l, 0);
+}
+static void REGPARAM2 gfxboard_wput_mem_nojit (uaecptr addr, uae_u32 w)
+{
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return;
+       gfxboard_wput_vram (addr, w, 0);
+}
+static void REGPARAM2 gfxboard_bput_mem_nojit (uaecptr addr, uae_u32 b)
+{
+#ifdef JIT
+       special_mem |= S_WRITE;
+#endif
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr = fixaddr (addr);
+       if (addr == -1)
+               return;
        gfxboard_bput_vram (addr, b);
 }
 
 static int REGPARAM2 gfxboard_check (uaecptr addr, uae_u32 size)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr &= memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr &= gfxmem_bank.mask;
        return (addr + size) <= currprefs.rtgmem_size;
 }
 static uae_u8 *REGPARAM2 gfxboard_xlate (uaecptr addr)
 {
-       addr -= gfxboardmem_start & memory_mask;
-       addr &= memory_mask;
+       addr -= gfxboardmem_start & gfxmem_bank.mask;
+       addr &= gfxmem_bank.mask;
        return vram + addr;
 }
 
@@ -999,10 +1229,13 @@ static void REGPARAM2 gfxboard_wput_mem_autoconfig (uaecptr addr, uae_u32 b)
                gfxboard_bank_memory.bput = gfxboard_bput_mem;
                gfxboard_bank_memory.wput = gfxboard_wput_mem;
                if (ISP4()) {
+                       // main vram
                        map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM1) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
                        map_banks (&gfxboard_bank_wbsmemory, (gfxmem_bank.start + PICASSOIV_VRAM1 + 0x400000) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
-                       map_banks (&gfxboard_bank_memory, (gfxmem_bank.start + PICASSOIV_VRAM2) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
+                       // secondary
+                       map_banks (&gfxboard_bank_memory_nojit, (gfxmem_bank.start + PICASSOIV_VRAM2) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
                        map_banks (&gfxboard_bank_wbsmemory, (gfxmem_bank.start + PICASSOIV_VRAM2 + 0x400000) >> 16, 0x400000 >> 16, currprefs.rtgmem_size);
+                       // regs
                        map_banks (&gfxboard_bank_registers, (gfxmem_bank.start + PICASSOIV_REG) >> 16, 0x200000 >> 16, BOARD_REGISTERS_SIZE);
                        map_banks (&gfxboard_bank_special, gfxmem_bank.start >> 16, PICASSOIV_REG >> 16, PICASSOIV_REG);
                        picassoiv_bank = 0;
@@ -1142,8 +1375,10 @@ static uae_u32 REGPARAM2 gfxboard_bget_regs (uaecptr addr)
        special_mem |= S_READ;
 #endif
        addr &= 65535;
-       if (addr >= 0x8000)
+       if (addr >= 0x8000) {
+               write_log (_T("GFX SPECIAL BGET IO %08X\n"), addr);
                return 0;
+       }
        addr = mungeaddr (addr, false);
        if (addr) {
                v = vgaio->read (&vga, addr, 1);
@@ -1160,7 +1395,7 @@ static void REGPARAM2 gfxboard_lput_regs (uaecptr addr, uae_u32 l)
        //write_log (_T("GFX LONG PUT IO %04X = %04X\n"), addr & 65535, l);
        addr = mungeaddr (addr, true);
        if (addr) {
-               vgaio->write (&vga, addr + 0, (l >> 24) & 0xff, 1);
+               vgaio->write (&vga, addr + 0, l >> 24, 1);
                bput_regtest (addr + 0, (l >> 24));
                vgaio->write (&vga, addr + 1, (l >> 16) & 0xff, 1);
                bput_regtest (addr + 0, (l >> 16));
@@ -1192,7 +1427,7 @@ static void REGPARAM2 gfxboard_bput_regs (uaecptr addr, uae_u32 b)
        //write_log (_T("GFX BYTE PUT IO %04X = %02X\n"), addr & 65535, b & 0xff);
        addr &= 65535;
        if (addr >= 0x8000) {
-               write_log (_T("GFX SPECIAL BYTE PUT IO %04X = %02X\n"), addr & 65535, b & 0xff);
+               write_log (_T("GFX SPECIAL BPUT IO %08X = %02X\n"), addr, b & 0xff);
                switch (board->manufacturer)
                {
                case BOARD_MANUFACTURER_PICASSO:
@@ -1266,13 +1501,14 @@ void gfxboard_reset (void)
 {
        if (currprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
                board = &boards[currprefs.rtgmem_type - GFXBOARD_HARDWARE];
-               memory_mask = currprefs.rtgmem_size - 1;
+               gfxmem_bank.mask = currprefs.rtgmem_size - 1;
        }
        if (vram) {
-               mapped_free (vram);
+               mapped_free (vramrealstart);
                gfxmem_bank.baseaddr = NULL;
        }
        vram = NULL;
+       vramrealstart = NULL;
        xfree (fakesurface_surface);
        fakesurface_surface = NULL;
        configured_mem = 0;
@@ -1291,31 +1527,38 @@ void gfxboard_reset (void)
        }
 }
 
-addrbank gfxboard_bank_memory = {
+static addrbank gfxboard_bank_memory = {
        gfxboard_lget_mem, gfxboard_wget_mem, gfxboard_bget_mem,
        gfxboard_lput_mem, gfxboard_wput_mem, gfxboard_bput_mem,
        gfxboard_xlate, gfxboard_check, NULL, NULL,
        gfxboard_lget_mem, gfxboard_wget_mem, ABFLAG_RAM
 };
-addrbank gfxboard_bank_wbsmemory = {
-       gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, gfxboard_bget_mem,
-       gfxboard_lput_wbsmem, gfxboard_wput_wbsmem, gfxboard_bput_mem,
+static addrbank gfxboard_bank_memory_nojit = {
+       gfxboard_lget_mem_nojit, gfxboard_wget_mem_nojit, gfxboard_bget_mem_nojit,
+       gfxboard_lput_mem_nojit, gfxboard_wput_mem_nojit, gfxboard_bput_mem_nojit,
+       gfxboard_xlate, gfxboard_check, NULL, NULL,
+       gfxboard_lget_mem_nojit, gfxboard_wget_mem_nojit, ABFLAG_RAM
+};
+
+static addrbank gfxboard_bank_wbsmemory = {
+       gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, gfxboard_bget_bsmem,
+       gfxboard_lput_wbsmem, gfxboard_wput_wbsmem, gfxboard_bput_bsmem,
        gfxboard_xlate, gfxboard_check, NULL, NULL,
        gfxboard_lget_wbsmem, gfxboard_wget_wbsmem, ABFLAG_RAM
 };
-addrbank gfxboard_bank_lbsmemory = {
-       gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, gfxboard_bget_mem,
-       gfxboard_lput_lbsmem, gfxboard_wput_lbsmem, gfxboard_bput_mem,
+static addrbank gfxboard_bank_lbsmemory = {
+       gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, gfxboard_bget_bsmem,
+       gfxboard_lput_lbsmem, gfxboard_wput_lbsmem, gfxboard_bput_bsmem,
        gfxboard_xlate, gfxboard_check, NULL, NULL,
        gfxboard_lget_lbsmem, gfxboard_wget_lbsmem, ABFLAG_RAM
 };
-addrbank gfxboard_bank_nbsmemory = {
-       gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, gfxboard_bget_mem,
-       gfxboard_lput_nbsmem, gfxboard_wput_nbsmem, gfxboard_bput_mem,
+static addrbank gfxboard_bank_nbsmemory = {
+       gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, gfxboard_bget_bsmem,
+       gfxboard_lput_nbsmem, gfxboard_wput_nbsmem, gfxboard_bput_bsmem,
        gfxboard_xlate, gfxboard_check, NULL, _T("Picasso IV banked VRAM"),
        gfxboard_lget_nbsmem, gfxboard_wget_nbsmem, ABFLAG_RAM
 };
-addrbank gfxboard_bank_registers = {
+static addrbank gfxboard_bank_registers = {
        gfxboard_lget_regs, gfxboard_wget_regs, gfxboard_bget_regs,
        gfxboard_lput_regs, gfxboard_wput_regs, gfxboard_bput_regs,
        default_xlate, default_check, NULL, NULL,
@@ -1549,11 +1792,12 @@ static void REGPARAM2 gfxboards_lput_regs (uaecptr addr, uae_u32 l)
        write_log (_T("PicassoIV LPUT %08x %08x\n"), addr, l);
 #endif
 }
-static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 w)
+static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 v)
 {
 #ifdef JIT
        special_mem |= S_WRITE;
 #endif
+       uae_u16 w = (uae_u16)v;
        addr &= p4_special_mask;
        if (addr >= 0x400000 || (p4z2 && !(picassoiv_bank & PICASSOIV_BANK_MAPRAM) && (picassoiv_bank & PICASSOIV_BANK_UNMAPFLASH) && ((addr >= 0x800 && addr < 0xc00) || (addr >= 0x1000 && addr < 0x2000)))) {
                uae_u32 addr2 = addr & 0xffff;
@@ -1583,8 +1827,8 @@ static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 w)
                        write_log (_T("PicassoIV MMIO LPUT %08x %08x\n"), addr, w & 0xffff);
 #endif
                        uae_u32 addr2 = addr - p4_mmiobase;
-                       vgammio->write(&vga, addr2 + 0, w >>  8, 1);
-                       vgammio->write(&vga, addr2 + 1, w >>  0, 1);
+                       vgammio->write(&vga, addr2 + 0, w >> 8, 1);
+                       vgammio->write(&vga, addr2 + 1, (w >> 0) & 0xff, 1);
                        return;
                }
        }
@@ -1592,7 +1836,7 @@ static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 w)
                addr -= 0x10000;
                addr = mungeaddr (addr, true);
                if (addr) {
-                       vgaio->write (&vga, addr + 0, (w >> 8) & 0xff, 1);
+                       vgaio->write (&vga, addr + 0, w >> 8, 1);
                        bput_regtest (addr + 0, w >> 8);
                        vgaio->write (&vga, addr + 1, (w >> 0) & 0xff, 1);
                        bput_regtest (addr + 1, w >> 0);
@@ -1604,8 +1848,9 @@ static void REGPARAM2 gfxboards_wput_regs (uaecptr addr, uae_u32 w)
 #endif
 }
 
-static void REGPARAM2 gfxboards_bput_regs (uaecptr addr, uae_u32 b)
+static void REGPARAM2 gfxboards_bput_regs (uaecptr addr, uae_u32 v)
 {
+       uae_u8 b = (uae_u8)v;
 #ifdef JIT
        special_mem |= S_WRITE;
 #endif
@@ -1691,8 +1936,8 @@ int gfxboard_get_vram_min (int type)
        if (type < 2)
                return -1;
        board = &boards[type - 2];
-       return board->vrammax;
-       //return board->vrammin;
+       //return board->vrammax;
+       return board->vrammin;
 }
 
 int gfxboard_get_vram_max (int type)
@@ -1732,6 +1977,7 @@ static void gfxboard_init (void)
        p4z2 = false;
        zfile_fclose (p4rom);
        p4rom = NULL;
+       banksize_mask = board->banksize - 1;
        memset (cirrus_pci, 0, sizeof cirrus_pci);
        reset_pci ();
 }
@@ -1852,6 +2098,7 @@ void gfxboard_init_memory (void)
        _stprintf (regbankname, _T("%s REG"), board->name);
 
        gfxboard_bank_memory.name = memorybankname;
+       gfxboard_bank_memory_nojit.name = memorybankname;
        gfxboard_bank_wbsmemory.name = wbsmemorybankname;
        gfxboard_bank_lbsmemory.name = lbsmemorybankname;
        gfxboard_bank_registers.name = regbankname;

diff --git a/jit/compemu_support.cpp b/jit/compemu_support.cpp
index e3b93be60f2b503e7010c8ef83b2259470342a45..c9675f5a80c0b7bd68331e8946f8b0fce4ad68b9 100644 (file)
--- a/jit/compemu_support.cpp
+++ b/jit/compemu_support.cpp
@@ -5044,7 +5044,8 @@ STATIC_INLINE void writemem(int address, int source, int offset, int size, int t
 
 void writebyte(int address, int source, int tmp)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustbyte;
+#if 0
        switch (currprefs.comptrustbyte) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5052,7 +5053,7 @@ void writebyte(int address, int source, int tmp)
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_WRITE) || distrust)
                writemem_special(address,source,20,1,tmp);
        else
@@ -5062,7 +5063,8 @@ void writebyte(int address, int source, int tmp)
 STATIC_INLINE void writeword_general(int address, int source, int tmp,
        int clobber)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustword;
+#if 0
        switch (currprefs.comptrustword) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5070,7 +5072,7 @@ STATIC_INLINE void writeword_general(int address, int source, int tmp,
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_WRITE) || distrust)
                writemem_special(address,source,16,2,tmp);
        else
@@ -5090,7 +5092,8 @@ void writeword(int address, int source, int tmp)
 STATIC_INLINE void writelong_general(int address, int source, int tmp,
        int clobber)
 {
-       int  distrust;
+       int  distrust = currprefs.comptrustlong;
+#if 0
        switch (currprefs.comptrustlong) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5098,7 +5101,7 @@ STATIC_INLINE void writelong_general(int address, int source, int tmp,
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_WRITE) || distrust)
                writemem_special(address,source,12,4,tmp);
        else
@@ -5171,7 +5174,8 @@ STATIC_INLINE void readmem(int address, int dest, int offset, int size, int tmp)
 
 void readbyte(int address, int dest, int tmp)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustbyte;
+#if 0
        switch (currprefs.comptrustbyte) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5179,7 +5183,7 @@ void readbyte(int address, int dest, int tmp)
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_READ) || distrust)
                readmem_special(address,dest,8,1,tmp);
        else
@@ -5188,7 +5192,8 @@ void readbyte(int address, int dest, int tmp)
 
 void readword(int address, int dest, int tmp)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustword;
+#if 0
        switch (currprefs.comptrustword) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5196,7 +5201,7 @@ void readword(int address, int dest, int tmp)
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_READ) || distrust)
                readmem_special(address,dest,4,2,tmp);
        else
@@ -5205,7 +5210,8 @@ void readword(int address, int dest, int tmp)
 
 void readlong(int address, int dest, int tmp)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustlong;
+#if 0
        switch (currprefs.comptrustlong) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5213,7 +5219,7 @@ void readlong(int address, int dest, int tmp)
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if ((special_mem&S_READ) || distrust)
                readmem_special(address,dest,0,4,tmp);
        else
@@ -5251,7 +5257,8 @@ STATIC_INLINE void get_n_addr_real(int address, int dest, int tmp)
 
 void get_n_addr(int address, int dest, int tmp)
 {
-       int  distrust;
+       int distrust = currprefs.comptrustnaddr;
+#if 0
        switch (currprefs.comptrustnaddr) {
        case 0: distrust=0; break;
        case 1: distrust=1; break;
@@ -5259,7 +5266,7 @@ void get_n_addr(int address, int dest, int tmp)
        case 3: distrust=!have_done_picasso; break;
        default: abort();
        }
-
+#endif
        if (special_mem || distrust)
                get_n_addr_old(address,dest,tmp);
        else

diff --git a/jit/gencomp.cpp b/jit/gencomp.cpp
index 05df39992f3f2bc6f82f74ba39e8c0b505294159..d4baf31ee8770d6727c477a7bdb08f8784ecae5a 100644 (file)
--- a/jit/gencomp.cpp
+++ b/jit/gencomp.cpp
@@ -262,7 +262,7 @@ gen_nextibyte (void)
 static void
 sync_m68k_pc (void)
 {
-    comprintf("\t if (m68k_pc_offset>100) sync_m68k_pc();\n");
+    comprintf("\t if (m68k_pc_offset>JIT_M68K_PC_SYNC) sync_m68k_pc();\n");
 }
 
 
@@ -714,7 +714,10 @@ genmovemel (uae_u16 opcode)
     comprintf ("\tint i;\n");
     comprintf ("\tint offset=0;\n");
     genamode (table68k[opcode].dmode, "dstreg", table68k[opcode].size, "src", 2, 1);
-    comprintf("\tif (1 && !special_mem) {\n");
+       if (table68k[opcode].size == sz_long)
+           comprintf("\tif (!currprefs.comptrustlong && !special_mem) {\n");
+       else
+           comprintf("\tif (!currprefs.comptrustword && !special_mem) {\n");
 
     /* Fast but unsafe...  */
     comprintf("\tget_n_addr(srca,native,scratchie);\n");
@@ -787,7 +790,10 @@ genmovemle (uae_u16 opcode)
        on her, but unfortunately, gfx mem isn't "real" mem, and thus that
        act of cleverness means that movmle must pay attention to special_mem,
        or Genetic Species is a rather boring-looking game ;-) */
-    comprintf("\tif (1 && !special_mem) {\n");
+       if (table68k[opcode].size == sz_long)
+           comprintf("\tif (!currprefs.comptrustlong && !special_mem) {\n");
+       else
+           comprintf("\tif (!currprefs.comptrustword && !special_mem) {\n");
     comprintf("\tget_n_addr(srca,native,scratchie);\n");
 
     if (table68k[opcode].dmode!=Apdi) {
@@ -2883,6 +2889,114 @@ generate_includes (FILE * f, int bigger)
 
 static int postfix;
 
+
+static char *decodeEA (amodes mode, wordsizes size)
+{
+       static char buffer[80];
+
+       buffer[0] = 0;
+       switch (mode){
+       case Dreg:
+               strcpy (buffer,"Dn");
+               break;
+       case Areg:
+               strcpy (buffer,"An");
+               break;
+       case Aind:
+               strcpy (buffer,"(An)");
+               break;
+       case Aipi:
+               strcpy (buffer,"(An)+");
+               break;
+       case Apdi:
+               strcpy (buffer,"-(An)");
+               break;
+       case Ad16:
+               strcpy (buffer,"(d16,An)");
+               break;
+       case Ad8r:
+               strcpy (buffer,"(d8,An,Xn)");
+               break;
+       case PC16:
+               strcpy (buffer,"(d16,PC)");
+               break;
+       case PC8r:
+               strcpy (buffer,"(d8,PC,Xn)");
+               break;
+       case absw:
+               strcpy (buffer,"(xxx).W");
+               break;
+       case absl:
+               strcpy (buffer,"(xxx).L");
+               break;
+       case imm:
+               switch (size){
+               case sz_byte:
+                       strcpy (buffer,"#<data>.B");
+                       break;
+               case sz_word:
+                       strcpy (buffer,"#<data>.W");
+                       break;
+               case sz_long:
+                       strcpy (buffer,"#<data>.L");
+                       break;
+               default:
+                       break;
+               }
+               break;
+       case imm0:
+               strcpy (buffer,"#<data>.B");
+               break;
+       case imm1:
+               strcpy (buffer,"#<data>.W");
+               break;
+       case imm2:
+               strcpy (buffer,"#<data>.L");
+               break;
+       case immi:
+               strcpy (buffer,"#<data>");
+               break;
+
+       default:
+               break;
+       }
+       return buffer;
+}
+
+static char *outopcode (int opcode)
+{
+       static char out[100];
+       struct instr *ins;
+       int i;
+
+       ins = &table68k[opcode];
+       for (i = 0; lookuptab[i].name[0]; i++) {
+               if (ins->mnemo == lookuptab[i].mnemo)
+                       break;
+       }
+       {
+               char *s = ua (lookuptab[i].name);
+               strcpy (out, s);
+               xfree (s);
+       }
+       if (ins->smode == immi)
+               strcat (out, "Q");
+       if (ins->size == sz_byte)
+               strcat (out,".B");
+       if (ins->size == sz_word)
+               strcat (out,".W");
+       if (ins->size == sz_long)
+               strcat (out,".L");
+       strcat (out," ");
+       if (ins->suse)
+               strcat (out, decodeEA (ins->smode, ins->size));
+       if (ins->duse) {
+               if (ins->suse) strcat (out,",");
+               strcat (out, decodeEA (ins->dmode, ins->size));
+       }
+       return out;
+}
+
 static void
 generate_one_opcode (int rp, int noflags)
 {
@@ -3011,25 +3125,24 @@ generate_one_opcode (int rp, int noflags)
        comprintf ("return 0;\n");
        comprintf ("}\n");
 
-       char name[100] = { 0 };
-       for (int k = 0; lookuptab[i].name[k]; k++)
-               name[k] = lookuptab[i].name[k];
-       
+       char *name = ua (lookuptab[i].name);
        if (aborted) {
            fprintf (stblfile, "{ NULL, %ld, 0x%08x }, /* %s */\n", opcode, flags, name);
            com_discard();
        } else {
-           if (noflags) {
+               printf ("/* %s */\n", outopcode (opcode));
+               if (noflags) {
                fprintf (stblfile, "{ op_%lx_%d_comp_nf, %ld, 0x%08x }, /* %s */\n", opcode, postfix, opcode, flags, name);
                fprintf (headerfile, "extern compop_func op_%lx_%d_comp_nf;\n", opcode, postfix);
-               printf ("uae_u32 REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
+               printf ("uae_u32 REGPARAM2 op_%lx_%d_comp_nf(uae_u32 opcode)\n{\n", opcode, postfix);
            } else {
                fprintf (stblfile, "{ op_%lx_%d_comp_ff, %ld, 0x%08x }, /* %s */\n", opcode, postfix, opcode, flags, name);
                fprintf (headerfile, "extern compop_func op_%lx_%d_comp_ff;\n", opcode, postfix);
-               printf ("uae_u32 REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode) /* %s */\n{\n", opcode, postfix, name);
+               printf ("uae_u32 REGPARAM2 op_%lx_%d_comp_ff(uae_u32 opcode)\n{\n", opcode, postfix);
            }
            com_flush();
        }
+       xfree (name);
     }
     opcode_next_clev[rp] = next_cpu_level;
     opcode_last_postfix[rp] = postfix;
@@ -3074,6 +3187,8 @@ generate_func (int noflags)
                 "extern void comp_fscc_opp();\n"
                 "extern void comp_fbcc_opp();\n\n");
 
+       printf ("#define JIT_M68K_PC_SYNC 100\n\n");
+
        rp = 0;
        for (j = 1; j <= 8; ++j)
        {
@@ -3142,3 +3257,7 @@ main (int argc, char **argv)
     free (table68k);
     return 0;
 }
+
+void write_log (const TCHAR *format,...)
+{
+}

diff --git a/newcpu.cpp b/newcpu.cpp
index 5aba315b749b489fd42473e71b76e0605d92a151..465bc3657c98a70bc41def420b3db5c7465c4335 100644 (file)
--- a/newcpu.cpp
+++ b/newcpu.cpp
@@ -4760,6 +4760,7 @@ static void m68k_run_2p (void)
 /* Same thing, but don't use prefetch to get opcode.  */
 static void m68k_run_2 (void)
 {
+       static int done;
        struct regstruct *r = &regs;
 
        for (;;) {
@@ -4776,12 +4777,16 @@ static void m68k_run_2 (void)
                        used[opcode] = 1;
                }
 #endif 
+               if (done)
+                       write_log (_T("%08x %04X %d "), r->instruction_pc, opcode, cpu_cycles);
+
                do_cycles (cpu_cycles);
                cpu_cycles = (*cpufunctbl[opcode])(opcode);
                cpu_cycles = adjust_cycles (cpu_cycles);
                if (r->spcflags) {
-                       if (do_specialties (cpu_cycles))
-                               return;
+                       if (do_specialties (cpu_cycles)) {
+                               break;
+                       }
                }
        }
 }

diff --git a/od-win32/gencomp_msvc/gencomp_msvc.vcxproj b/od-win32/gencomp_msvc/gencomp_msvc.vcxproj
index cd361aa4cfa4f349079c3cfca10fc0916953accd..bbd1c0fe88388a54d40d470093e68a1a192f889c 100644 (file)
--- a/od-win32/gencomp_msvc/gencomp_msvc.vcxproj
+++ b/od-win32/gencomp_msvc/gencomp_msvc.vcxproj
@@ -49,7 +49,7 @@
     <ConfigurationType>Application</ConfigurationType>
     <UseOfMfc>false</UseOfMfc>
     <UseOfAtl>false</UseOfAtl>
-    <CharacterSet>MultiByte</CharacterSet>
+    <CharacterSet>Unicode</CharacterSet>
     <PlatformToolset>v110</PlatformToolset>
   </PropertyGroup>
   <PropertyGroup Condition="'$(Configuration)|$(Platform)'=='Test|Win32'" Label="Configuration">
@@ -313,6 +313,7 @@ od-win32\gencomp_msvc\gencomp.exe
     <ClCompile Include="..\..\jit\gencomp.cpp" />
     <ClCompile Include="..\..\missing.cpp" />
     <ClCompile Include="..\..\readcpu.cpp" />
+    <ClCompile Include="..\unicode.cpp" />
   </ItemGroup>
   <Import Project="$(VCTargetsPath)\Microsoft.Cpp.targets" />
   <ImportGroup Label="ExtensionTargets">

diff --git a/od-win32/gencomp_msvc/gencomp_msvc.vcxproj.filters b/od-win32/gencomp_msvc/gencomp_msvc.vcxproj.filters
index 21011b42317720df0a1804528a14f424b4e3d506..cfb0742965269e168988136b69c4e5b60cfdc907 100644 (file)
--- a/od-win32/gencomp_msvc/gencomp_msvc.vcxproj.filters
+++ b/od-win32/gencomp_msvc/gencomp_msvc.vcxproj.filters
@@ -19,5 +19,8 @@
     <ClCompile Include="..\..\readcpu.cpp">
       <Filter>Source Files</Filter>
     </ClCompile>
+    <ClCompile Include="..\unicode.cpp">
+      <Filter>Source Files</Filter>
+    </ClCompile>
   </ItemGroup>
 </Project>
\ No newline at end of file

diff --git a/od-win32/picasso96_win.cpp b/od-win32/picasso96_win.cpp
index 2e678b3f9e93509129d132b6d75cfe747525e1c0..a02c2af70427977fa8e0f7e22321bdaf42c296f8 100644 (file)
--- a/od-win32/picasso96_win.cpp
+++ b/od-win32/picasso96_win.cpp
@@ -2037,11 +2037,13 @@ void picasso_allocatewritewatch (int gfxmemsize)
 }
 
 static ULONG_PTR writewatchcount;
-void picasso_getwritewatch (void)
+static int watch_offset;
+void picasso_getwritewatch (int offset)
 {
        ULONG ps;
        writewatchcount = gwwbufsize;
-       if (GetWriteWatch (WRITE_WATCH_FLAG_RESET, gfxmem_bank.start + natmem_offset, (gwwbufsize - 1) * gwwpagesize, gwwbuf, &writewatchcount, &ps)) {
+       watch_offset = offset;
+       if (GetWriteWatch (WRITE_WATCH_FLAG_RESET, gfxmem_bank.start + natmem_offset + offset, (gwwbufsize - 1) * gwwpagesize, gwwbuf, &writewatchcount, &ps)) {
                write_log (_T("picasso_getwritewatch %d\n"), GetLastError ());
                writewatchcount = 0;
                return;
@@ -2049,7 +2051,7 @@ void picasso_getwritewatch (void)
 }
 bool picasso_is_vram_dirty (uaecptr addr, int size)
 {
-       uae_u8 *a = addr + natmem_offset;
+       uae_u8 *a = addr + natmem_offset + watch_offset;
        int s = size;
        int ms = gwwpagesize;
        for (ULONG_PTR i = 0; i < writewatchcount; i++) {

diff --git a/od-win32/picasso96_win.h b/od-win32/picasso96_win.h
index 4ef6ec75ac594270561f8d9747519b37d2c8f4d0..77bb0e5c17d58ff071e1bec5cceb8872247b8802 100644 (file)
--- a/od-win32/picasso96_win.h
+++ b/od-win32/picasso96_win.h
@@ -557,7 +557,7 @@ extern int picasso_setwincursor (void);
 extern int picasso_palette (void);
 extern bool picasso_flushpixels (uae_u8 *src, int offset);
 extern void picasso_allocatewritewatch (int gfxmemsize);
-extern void picasso_getwritewatch (void);
+extern void picasso_getwritewatch (int offset);
 extern bool picasso_is_vram_dirty (uaecptr addr, int size);
 extern void picasso_statusline (uae_u8 *dst);
 extern void picasso_invalidate (int x, int y, int w, int h);

diff --git a/od-win32/resources/winuae.rc b/od-win32/resources/winuae.rc
index 35288fb576149d35d3edca184c49ee2f928e9f31..89dbddb75ad57baa050420ae25e85992364d999f 100644 (file)
--- a/od-win32/resources/winuae.rc
+++ b/od-win32/resources/winuae.rc
@@ -1030,7 +1030,7 @@ FONT 8, "MS Sans Serif", 0, 0, 0x1
 BEGIN
     GROUPBOX        "RTG Graphics Card",IDC_STATIC,1,0,393,189
     COMBOBOX        IDC_RTG_Z2Z3,26,14,118,150,CBS_DROPDOWNLIST | CBS_HASSTRINGS | WS_VSCROLL | WS_TABSTOP
-    RTEXT           "Memory: [] Graphics card memory. Required for RTG (Picasso96) emulation.",IDC_GFXCARDTEXT,2,35,76,10,SS_NOTIFY | SS_CENTERIMAGE
+    RTEXT           "VRAM size: [] Graphics card memory. Required for RTG (Picasso96) emulation.",IDC_GFXCARDTEXT,2,35,76,10,SS_NOTIFY | SS_CENTERIMAGE
     CONTROL         "",IDC_P96MEM,"msctls_trackbar32",TBS_AUTOTICKS | TBS_TOP | WS_TABSTOP,88,31,60,20
     EDITTEXT        IDC_P96RAM,152,34,40,12,ES_CENTER | ES_READONLY
     CONTROL         "Match host and RTG color depth if possible",IDC_RTG_MATCH_DEPTH,

diff --git a/od-win32/win32.h b/od-win32/win32.h
index d1e84b1f7543e907797ad9b5bbfb9b6439120470..de4a1838d5a90392cc376ca076152714e6b353b2 100644 (file)
--- a/od-win32/win32.h
+++ b/od-win32/win32.h
@@ -19,11 +19,11 @@
 #define LANG_DLL 1
 
 #if WINUAEPUBLICBETA
-#define WINUAEBETA _T("5")
+#define WINUAEBETA _T("6")
 #else
 #define WINUAEBETA _T("")
 #endif
-#define WINUAEDATE MAKEBD(2013, 8, 1)
+#define WINUAEDATE MAKEBD(2013, 8, 3)
 #define WINUAEEXTRA _T("")
 //#define WINUAEEXTRA _T("AmiKit Preview")
 //#define WINUAEEXTRA _T("Amiga Forever Edition")

diff --git a/od-win32/win32gui.cpp b/od-win32/win32gui.cpp
index ce6bda4991e74625c0a9ff935d8ae12a452afcc5..f96107aa7ae9009200fb697e7db6c6bbfc344fe8 100644 (file)
--- a/od-win32/win32gui.cpp
+++ b/od-win32/win32gui.cpp
@@ -7170,6 +7170,7 @@ static void values_to_memorydlg (HWND hDlg)
                mem_size = 6;
        else
                mem_size = 7;
+       int min_mem = MIN_P96_MEM;
        int max_mem = MAX_P96_MEM_Z3;
        if (!gfxboard_is_z3 (workprefs.rtgmem_type)) {
                int v = workprefs.rtgmem_size;
@@ -7196,7 +7197,19 @@ static void values_to_memorydlg (HWND hDlg)
                        v = gfxboard_get_vram_min (workprefs.rtgmem_type);
                workprefs.rtgmem_size = v;
        }
-       SendDlgItemMessage (hDlg, IDC_P96MEM, TBM_SETRANGE, TRUE, MAKELONG (MIN_P96_MEM, max_mem));
+       if (workprefs.rtgmem_type >= GFXBOARD_HARDWARE) {
+               switch (gfxboard_get_vram_min (workprefs.rtgmem_type)) {
+                       case 0x00100000: min_mem = 1; break;
+                       case 0x00200000: min_mem = 2; break;
+                       case 0x00400000: min_mem = 3; break;
+               }
+               switch (gfxboard_get_vram_max (workprefs.rtgmem_type)) {
+                       case 0x00100000: max_mem = 1; break;
+                       case 0x00200000: max_mem = 2; break;
+                       case 0x00400000: max_mem = 3; break;
+               }
+       }
+       SendDlgItemMessage (hDlg, IDC_P96MEM, TBM_SETRANGE, TRUE, MAKELONG (min_mem, max_mem));
        SendDlgItemMessage (hDlg, IDC_Z3CHIPMEM, TBM_SETPOS, TRUE, mem_size);
        SetDlgItemText (hDlg, IDC_Z3CHIPRAM, memsize_names[msi_z3chip[mem_size]]);
 

diff --git a/od-win32/winuaechangelog.txt b/od-win32/winuaechangelog.txt
index 0841e9e38044cdeedc57d717966f338f983b2535..98434a9e2b106b573cd9eee047fe8af9b51b381a 100644 (file)
--- a/od-win32/winuaechangelog.txt
+++ b/od-win32/winuaechangelog.txt
@@ -1,6 +1,41 @@
 
 - restore only single input target to default.
 
+Beta 6:
+
+- Enabled Cirrus Logic RTG VRAM size configuration. CL VRAM memory bank setups used by VRAM size
+  detection code is now (partially) emulated, should be enough to support CGX and Picasso96.
+- Fixed crash that usually happened when system was reset and if it caused immediate PAL/NTSC
+  mode change. (2.5 or 2.6 bug)
+- Removed some dead JIT code, "afterPic" and "indirectKS" comptrustxxx parameters that haven't been
+  used for ages.
+- JIT MOVEM used direct mode if memory was direct capable but direct mode was disabled.
+- Picasso IV VRAM is now always (*) in JIT indirect access mode. It can't be made JIT Direct compatible
+  due to multiple banks. Also P4 Z2 CGX 15/16 bit mode has graphics corruption if JIT Direct is enabled
+  because of JIT issue that can't be fixed. If same code is used to copy data from RAM and it is later
+  used to copy data from VRAM, there is no way for JIT to detect that it should recompile it and
+  use indirect mode instead of (incorrect for this bank) JIT direct mode. Other boards are very
+  simple and can support JIT direct VRAM access.
+- *) P4 Z3 mode includes now a hack that makes it JIT direct compatible. At least it seems to work..
+- Cirrus emulation large basic copy blits are now 4x faster. (P96Speed horiz/vert scroll tests are not
+  extremely slow anymore)
+
+Beta 5:
+
+- Spectrum 28/24 official name is EGS-28/24 Spectrum.
+- Stupid bug in b4 CD image update. Some CD32 games refused to play first audio track.
+- Some CUE images with both INDEX0 and INDEX1 and audio tracks in separate files may have played 1-2
+  seconds of previous track when starting CD audio.
+- Added partial support for non-direct JIT only memory mapping support that allows Z3 boards in their
+  original non-hacked OS chosen base address (0x40000000-> vs 0x10000000->). Not available yet.
+- More old 68020 CE state files load now but note that it is impossible to support all of them with new
+  emulation code.
+- Some 68020 CE mode timing tweaks.
+- Emulate Picasso IV byteswapped VRAM bank (5446 CL chip feature) Fixes CGX 15/16 bit modes.
+- Cirrus Logic blitter emulation bug fixed (Inversion + Color expansion + Transparency combination uses
+  foreground color, there is no background vs foreground swapping like in all other inverted modes)
+  Fixes graphics glitches in Picasso IV 24-bit Picasso96 modes.
+
 Beta 4:
 
 - Picasso IV RTG board emulation implemented. Very important information:

diff --git a/qemuvga/cirrus_vga.cpp b/qemuvga/cirrus_vga.cpp
index 5116778158c9b9d799698046e0cc9953e0d7bd78..ea4a1e4584b98aaa2bad710e5e608faf8f389900 100644 (file)
--- a/qemuvga/cirrus_vga.cpp
+++ b/qemuvga/cirrus_vga.cpp
@@ -46,7 +46,10 @@
 //#define DEBUG_VGA
 //#define DEBUG_CIRRUS
 //#define DEBUG_VGA_REG
+//#define DEBUG_VGA_REG_READ
+//#define DEBUG_VGA_REG_WRITE
 //#define DEBUG_BITBLT
+//#define DEBUG_CIRRUS_MEMORY_CONFIG
 #define TARGET_FMT_plx "%x"
 
 /***************************************
@@ -1170,6 +1173,26 @@ static void cirrus_update_bank_ptr(CirrusVGAState * s, unsigned bank_index)
     }
 }
 
+static void cirrus_valid_memory_config(CirrusVGAState *s)
+{
+       s->valid_memory_config = 1;
+       if (s->device_id >= CIRRUS_ID_CLGD5426 && s->device_id <= CIRRUS_ID_CLGD5430) {
+               // '26/28/29 can't have 2M and 256kx16 memory config
+               // Amiga CyberGraphX uses this to detect memory size
+               // by writing long and then reading it back, if SRF[7]
+               // set and test value reads correct: memory size = 2M.
+               if (s->vga.vram_size_mb == 1 && (s->vga.sr[0xf] & 0x80))
+                       s->valid_memory_config = 0;
+       } else if (s->device_id >= CIRRUS_ID_CLGD5434) {
+               // SRF[7] must be set for 4M VRAM chips
+               if (s->vga.vram_size_mb == 4 && !(s->vga.sr[0xf] & 0x80))
+                       s->valid_memory_config = 0;
+       }
+#ifdef DEBUG_CIRRUS_MEMORY_CONFIG
+       write_log("valid_memory_config %d %02X\n", s->valid_memory_config, s->vga.sr[0xf]);
+#endif
+}
+
 /***************************************
  *
  *  I/O access between 0x3c4-0x3c5
@@ -1294,7 +1317,11 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
        if (s->device_id < CIRRUS_ID_CLGD5446 && (s->vga.cr[0x17] & 0x04))
                s->hw_cursor_y <<= 1;
        break;
-    case 0x07:                 // Extended Sequencer Mode
+    case 0x0f:                 // DRAM Control
+       s->vga.sr[s->vga.sr_index] = val;
+       cirrus_valid_memory_config(s);
+       break;          
+       case 0x07:                      // Extended Sequencer Mode
     cirrus_update_memory_access(s);
     case 0x08:                 // EEPROM Control
     case 0x09:                 // Scratch Register 0
@@ -1303,7 +1330,6 @@ static void cirrus_vga_write_sr(CirrusVGAState * s, uint32_t val)
     case 0x0c:                 // VCLK 1
     case 0x0d:                 // VCLK 2
     case 0x0e:                 // VCLK 3
-    case 0x0f:                 // DRAM Control
     case 0x12:                 // Graphics Cursor Attribute
     case 0x13:                 // Graphics Cursor Pattern Address
     case 0x14:                 // Scratch Register 2
@@ -2001,7 +2027,10 @@ static uint64_t cirrus_vga_mem_read(void *opaque,
     unsigned bank_offset;
     uint32_t val;
 
-    if ((s->vga.sr[0x07] & 0x01) == 0) {
+       if (!s->valid_memory_config)
+               return 0xff;
+
+       if ((s->vga.sr[0x07] & 0x01) == 0) {
         return vga_mem_readb(&s->vga, addr);
     }
 
@@ -2046,6 +2075,9 @@ static void cirrus_vga_mem_write(void *opaque,
     unsigned bank_offset;
     unsigned mode;
 
+       if (!s->valid_memory_config)
+               return;
+
     if ((s->vga.sr[0x07] & 0x01) == 0) {
         vga_mem_writeb(&s->vga, addr, mem_value);
         return;
@@ -2303,6 +2335,9 @@ static uint64_t cirrus_linear_read(void *opaque, hwaddr addr,
 
     addr &= s->cirrus_addr_mask;
 
+       if (!s->valid_memory_config)
+               return 0xff;
+
        // linear vram also need planar handling. TW.
     if ((s->vga.sr[0x07] & 0x01) == 0) {
         return vga_mem_readb(&s->vga, addr);
@@ -2337,6 +2372,9 @@ static void cirrus_linear_write(void *opaque, hwaddr addr,
 
     addr &= s->cirrus_addr_mask;
 
+       if (!s->valid_memory_config)
+               return;
+
        // linear vram also need planar handling. TW.
     if ((s->vga.sr[0x07] & 0x01) == 0) {
         vga_mem_writeb(&s->vga, addr, val);
@@ -2427,7 +2465,8 @@ static void map_linear_vram_bank(CirrusVGAState *s, unsigned bank)
         && !((s->vga.sr[0x07] & 0x01) == 0)
         && !((s->vga.gr[0x0B] & 0x14) == 0x14)
         && !(s->vga.gr[0x0B] & 0x02);
-
+       if (!s->valid_memory_config)
+               enabled = false;
     memory_region_set_enabled(mr, enabled);
     memory_region_set_alias_offset(mr, s->cirrus_bank_base[bank]);
 }
@@ -2520,7 +2559,7 @@ static uint64_t cirrus_vga_ioport_read(void *opaque, hwaddr addr,
        case 0x3c5:
            val = cirrus_vga_read_sr(c);
             break;
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_READ
            write_log("vga: read SR%x = 0x%02x\n", s->sr_index, val);
 #endif
            break;
@@ -2548,7 +2587,7 @@ static uint64_t cirrus_vga_ioport_read(void *opaque, hwaddr addr,
            break;
        case 0x3cf:
            val = cirrus_vga_read_gr(c, s->gr_index);
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_READ
            write_log("vga: read GR%x = 0x%02x\n", s->gr_index, val);
 #endif
            break;
@@ -2559,7 +2598,7 @@ static uint64_t cirrus_vga_ioport_read(void *opaque, hwaddr addr,
        case 0x3b5:
        case 0x3d5:
             val = cirrus_vga_read_cr(c, s->cr_index);
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_READ
            write_log("vga: read CR%x = 0x%02x\n", s->cr_index, val);
 #endif
            break;
@@ -2594,7 +2633,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val,
     if (vga_ioport_invalid(s, addr)) {
        return;
     }
-#ifdef DEBUG_VGA
+#ifdef DEBUG_VGA_WRITE
     write_log("VGA: write addr=0x%04x data=0x%02x\n", addr, val);
 #endif
 
@@ -2653,7 +2692,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val,
        s->sr_index = val;
        break;
     case 0x3c5:
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_WRITE
        write_log("vga: write SR%x = 0x%02x\n", s->sr_index, val);
 #endif
        cirrus_vga_write_sr(c, val);
@@ -2679,7 +2718,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val,
        s->gr_index = val;
        break;
     case 0x3cf:
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_WRITE
        write_log("vga: write GR%x = 0x%02x\n", s->gr_index, val);
 #endif
        cirrus_vga_write_gr(c, s->gr_index, val);
@@ -2690,7 +2729,7 @@ static void cirrus_vga_ioport_write(void *opaque, hwaddr addr, uint64_t val,
        break;
     case 0x3b5:
     case 0x3d5:
-#ifdef DEBUG_VGA_REG
+#ifdef DEBUG_VGA_REG_WRITE
        write_log("vga: write CR%x = 0x%02x\n", s->cr_index, val);
 #endif
        cirrus_vga_write_cr(c, val);
@@ -2953,6 +2992,7 @@ void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,
     s->vga.cursor_invalidate = cirrus_cursor_invalidate;
     s->vga.cursor_draw_line = cirrus_cursor_draw_line;
     qemu_register_reset(cirrus_reset, s);
+       cirrus_valid_memory_config(s);
 }
 
 #if 0

diff --git a/qemuvga/cirrus_vga_rop.h b/qemuvga/cirrus_vga_rop.h
index 24cf95acfeaf742674f4f9c29b9ed7d14e18795c..45a77a0127f9ad1724125cd16d8f3305b40742a6 100644 (file)
--- a/qemuvga/cirrus_vga_rop.h
+++ b/qemuvga/cirrus_vga_rop.h
@@ -61,7 +61,12 @@ glue(cirrus_bitblt_rop_fwd_, ROP_NAME)(CirrusVGAState *s,
 #endif
 
     for (y = 0; y < bltheight; y++) {
-        for (x = 0; x < bltwidth; x++) {
+               for (x = 0; x < (bltwidth & ~3); x += 4) {
+                       ROP_OP_32((uint32_t*)dst, *((uint32_t*)src));
+                       dst += 4;
+                       src += 4;
+               }
+               for (; x < bltwidth; x++) {
             ROP_OP(dst, *src);
             dst++;
             src++;
@@ -81,7 +86,14 @@ glue(cirrus_bitblt_rop_bkwd_, ROP_NAME)(CirrusVGAState *s,
     dstpitch += bltwidth;
     srcpitch += bltwidth;
     for (y = 0; y < bltheight; y++) {
-        for (x = 0; x < bltwidth; x++) {
+               for (x = 0; x < (bltwidth & ~3); x += 4) {
+                       dst -= 3;
+                       src -= 3;
+                       ROP_OP_32((uint32_t*)dst, *((uint32_t*)src));
+                       dst -= 1;
+                       src -= 1;
+               }
+        for (; x < bltwidth; x++) {
             ROP_OP(dst, *src);
             dst--;
             src--;

diff --git a/qemuvga/qemuuaeglue.h b/qemuvga/qemuuaeglue.h
index fb72a0767868c962f2b15ec7391663f1771675ad..2ac00e77b88a745fff14a8bb961d506b41aa1233 100644 (file)
--- a/qemuvga/qemuuaeglue.h
+++ b/qemuvga/qemuuaeglue.h
@@ -3,6 +3,8 @@
 #include <stdint.h>
 #include <stdio.h>
 
+extern void activate_debugger(void);
+
 //#define DEBUG_VGA_REG
 //#define DEBUG_VGA
 
@@ -274,6 +276,7 @@ typedef struct CirrusVGAState {
        int total_vram_size;
     int device_id;
     int bustype;
+       int valid_memory_config;
 } CirrusVGAState;
 
 void cirrus_init_common(CirrusVGAState * s, int device_id, int is_pci,